Hafnium oxide-based ferroelectric capacitor, ferroelectric thin film transistor and preparation method thereof

Abstract

The invention relates to a hafnium oxide-based ferroelectric capacitor and a preparation method thereof, and a hafnium oxide-based ferroelectric thin film transistor and a preparation method thereof, and the ferroelectric capacitor comprises a bottom electrode layer, a ferroelectric layer and a top electrode layer which are sequentially stacked from bottom to top. The ferroelectric layer comprises m layers of ferroelectric films and n layers of insertion films, the m layers of ferroelectric films and the n layers of insertion films are alternately stacked in the thickness direction to form a stacked structure, and the ferroelectric films are arranged at the top and the bottom of the stacked structure. The ferroelectric thin film transistor comprises a ferroelectric layer, the ferroelectric layer comprises a layers of ferroelectric films and b layers of metal inserting films, the a layers of ferroelectric films and the b layers of metal inserting films are alternately stacked in the thickness direction to form a stacked structure, and the ferroelectric films are arranged at the top and the bottom of the stacked structure. According to the ferroelectric capacitor, the insertion film with the metal characteristic is introduced into the ferroelectric layer, the remanent polarization intensity of the ferroelectric layer is greatly improved, meanwhile, the coercive electric field is reduced, the ferroelectric capacitor structure is further applied to a negative capacitance transistor, a stable negative capacitance area can be obtained, and the negative capacitance effect is achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic devices, in particular to a hafnium oxide-based ferroelectric capacitor and a preparation method thereof, and also to a hafnium oxide-based ferroelectric thin film transistor and a preparation method thereof. Background Art

[0002] A ferroelectric capacitor is a capacitive device based on ferroelectric materials, such as Figure 1 As shown, a ferroelectric capacitor generally includes a substrate 100, a bottom electrode layer 101, a ferroelectric layer 102, and a top electrode layer 103 stacked in sequence from bottom to top. Among them, the structure of the ferroelectric layer 102 gives the ferroelectric capacitor a unique polarization characteristic, the core feature of which is spontaneous polarization and polarization reversal, which can maintain the polarization state even in the absence of an external electric field. This characteristic makes it perform well in non-volatile memories (such as FRAM). In addition, the high dielectric constant and nonlinear capacitance characteristics of ferroelectric capacitors enable them to be used to achieve a negative capacitance effect, thereby reducing the threshold voltage of transistors and improving energy efficiency. However, the residual polarization strength (P r ) is often relatively low, while the coercive electric field (E c ) is relatively high, which is not conducive to achieving the negative capacitance effect when the ferroelectric capacitor with a single-layer ferroelectric film is applied to a negative capacitance transistor. Summary of the Invention

[0003] Based on this, the purpose of the present invention is to overcome the defects or shortcomings of the prior art. On the one hand, a hafnium oxide-based ferroelectric capacitor is provided, which has a higher residual polarization intensity and a lower coercive electric field.

[0004] A hafnium oxide-based ferroelectric capacitor comprises a bottom electrode layer, a ferroelectric layer and a top electrode layer stacked in sequence from bottom to top; the ferroelectric layer comprises m layers of ferroelectric film and n layers of intercalation film, wherein n≥1 and m=n+1; the m layers of ferroelectric film and the n layers of intercalation film are alternately stacked in the thickness direction to form a stacked structure, and the top and bottom of the stacked structure are both ferroelectric films.

[0005] Compared with the prior art, the hafnium oxide-based ferroelectric capacitor of the present invention greatly improves the residual polarization strength of the ferroelectric layer and reduces the coercive electric field by introducing an intercalation film with metallic properties into the ferroelectric layer.

[0006] In one embodiment, the thermal expansion coefficient of the insertion film is smaller than the thermal expansion coefficient of the ferroelectric film.

[0007] In one embodiment, the insert film is made of a material having metallic properties.

[0008] In another aspect, the present invention provides a method for preparing a hafnium oxide-based ferroelectric capacitor, comprising the following steps:

[0009] forming a bottom electrode layer;

[0010] A stacked structure consisting of m layers of ferroelectric films and n layers of intercalation films alternately stacked on top of the bottom electrode layer is formed, which is a ferroelectric layer, wherein n≥1 and m=n+1;

[0011] A top electrode layer is formed on top of the ferroelectric layer, and then a rapid annealing process is performed.

[0012] On the other hand, the present invention also provides a hafnium oxide-based ferroelectric thin film transistor, comprising an electrode layer, a ferroelectric layer and an active layer stacked in sequence from bottom to top, and a source-drain electrode arranged in the active layer; the ferroelectric layer comprises a ferroelectric film layer and a b intercalation film layer, wherein b≥1, a=b+1; the ferroelectric film layer a and the metal intercalation film layer b are alternately stacked along the thickness direction to form a stacked structure, and the top and bottom of the stacked structure are both ferroelectric films.

[0013] Compared with the prior art, the present invention further applies the structure of the ferroelectric capacitor with high remnant polarization and low coercive electric field to the negative capacitance transistor. By introducing an intercalation film with metallic properties into the ferroelectric layer, the remnant polarization of the ferroelectric capacitor is increased and its coercive electric field is reduced, so that it can be accurately matched with the MOS capacitor, thereby obtaining a stable negative capacitance area and realizing the negative capacitance effect.

[0014] In one embodiment, the thermal expansion coefficient of the insertion film is smaller than the thermal expansion coefficient of the ferroelectric film.

[0015] In one embodiment, the material of the insert film is metal or a compound with metallic properties.

[0016] In one embodiment, the hafnium oxide-based ferroelectric thin film transistor further includes a dielectric layer, and the dielectric layer is disposed between the ferroelectric layer and the active layer.

[0017] In another aspect, the present invention further provides a method for preparing a hafnium oxide-based ferroelectric thin film transistor, comprising the following steps:

[0018] forming an electrode layer;

[0019] A stacked structure consisting of a layer a of ferroelectric film and a layer b of metal insertion film alternately stacked is formed on top of the electrode layer, which is a ferroelectric layer, wherein b≥1 and a=b+1;

[0020] forming an active layer on top of the ferroelectric layer and then performing an annealing process;

[0021] Source and drain electrodes are formed on the active layer.

[0022] In one embodiment, before forming the active layer, the following steps are further performed: forming a dielectric layer on top of the ferroelectric layer; and performing a rapid annealing process on the ferroelectric layer and the dielectric layer.

[0023] For better understanding and implementation, the present invention is described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 Schematic diagram of the structure of a traditional ferroelectric capacitor;

[0025] Figure 2 A schematic structural diagram of an embodiment of a hafnium oxide-based ferroelectric capacitor according to the present invention;

[0026] Figure 3 A diagram comparing the internal state of a ferroelectric layer in a conventional ferroelectric capacitor and the internal state of a ferroelectric layer in an embodiment of a hafnium oxide-based ferroelectric capacitor of the present invention; Figure 3 (a): Internal state diagram of a single-layer ferroelectric film in a conventional ferroelectric capacitor; Figure 3 (b) Schematic diagram of the internal state of the ferroelectric layer in one embodiment of the hafnium oxide-based ferroelectric capacitor of the present invention;

[0027] Figure 4 A comparison diagram of the PV hysteresis loops of a conventional ferroelectric capacitor and an embodiment of the hafnium oxide-based ferroelectric capacitor of the present invention;

[0028] Figure 5 A GIXRD comparison diagram of a conventional ferroelectric capacitor and an embodiment of the hafnium oxide-based ferroelectric capacitor of the present invention;

[0029] Figure 6 PV hysteresis loop distribution diagram of one embodiment of the hafnium oxide-based ferroelectric capacitor(s) of the present invention;

[0030] Figure 7 A schematic structural diagram of an embodiment of a hafnium oxide-based ferroelectric thin film transistor according to the present invention;

[0031] Figure 8 A transfer characteristic curve diagram of an embodiment of a hafnium oxide-based ferroelectric thin film transistor of the present invention;

[0032] Figure 9 This is a subthreshold swing distribution diagram of an embodiment of a hafnium oxide-based ferroelectric thin film transistor of the present invention.

[0033] Reference numerals:

[0034] 10. Hafnium oxide-based ferroelectric capacitor; 100. Substrate of hafnium oxide-based ferroelectric capacitor; 101. Bottom electrode layer of hafnium oxide-based ferroelectric capacitor; 102. Ferroelectric layer of hafnium oxide-based ferroelectric capacitor; 1020. Ferroelectric film of hafnium oxide-based ferroelectric capacitor; 1022. Intercalation film of hafnium oxide-based ferroelectric capacitor; 103. Top electrode layer of hafnium oxide-based ferroelectric capacitor;

[0035] 20. Hafnium oxide-based ferroelectric thin film transistor; 200. Substrate of hafnium oxide-based ferroelectric thin film transistor; 201. Electrode layer of hafnium oxide-based ferroelectric thin film transistor; 202. Ferroelectric layer of hafnium oxide-based ferroelectric thin film transistor; 2020. Ferroelectric film of hafnium oxide-based ferroelectric thin film transistor; 2022. Intercalation film of hafnium oxide-based ferroelectric thin film transistor; 203. Dielectric layer of hafnium oxide-based ferroelectric thin film transistor; 204. Active layer of hafnium oxide-based ferroelectric thin film transistor; 206. Source and drain electrodes of hafnium oxide-based ferroelectric thin film transistor. DETAILED DESCRIPTION

[0036] Ferroelectric capacitors use the spontaneous polarization and reversible polarization flipping properties of ferroelectric materials to store charge. Their structure usually includes Figure 1 The conventional ferroelectric capacitor shown generally includes a substrate 100, a bottom electrode layer 101, a ferroelectric layer 102, and a top electrode layer 103 stacked sequentially from bottom to top. However, such a ferroelectric capacitor having a single ferroelectric film has a low remanent polarization intensity and a high coercive electric field. When such a single ferroelectric material is used in a negative capacitance transistor, it is not conducive to achieving a negative capacitance effect.

[0037] A negative capacitance transistor (NCT) is a ferroelectric thin-film transistor with a negative capacitance effect. This effect is achieved by introducing ferroelectric material into the gate structure of a conventional transistor, forming a ferroelectric capacitor in series with a MOS capacitor. The negative capacitance effect stems from the polarization properties of the ferroelectric material. When voltage is applied, the polarization state of the ferroelectric material undergoes a nonlinear change, resulting in a negative capacitance. This negative capacitance effect, through the series coupling of the ferroelectric layer and the MOS capacitor, amplifies the gate voltage's ability to regulate the channel potential, minimizing the threshold voltage change required to turn the transistor on and off, thereby reducing power consumption and improving switching characteristics. The basic structure of a conventional negative capacitance transistor consists of an electrode layer, a ferroelectric layer, and an active layer stacked from bottom to top. The electrode layer and ferroelectric layer form a ferroelectric capacitor (FE), while the electrode layer and active layer form a MOS capacitor (CMOS). Matching the electrode layer with the ferroelectric and MOS capacitors is a key factor in achieving high performance in negative capacitance transistors. However, since traditional negative capacitance transistors usually only have a single ferroelectric film layer, the residual polarization strength of the ferroelectric capacitor is low and the coercive electric field is high, making it difficult to accurately match it with the MOS capacitor, resulting in uneven local electric field distribution, which in turn affects the polarization reversal and makes the negative capacitance effect unstable.

[0038] Based on this, the present invention introduces an intercalation film with metallic properties into the ferroelectric layer of the ferroelectric capacitor to promote the transformation of the non-ferroelectric phase of the ferroelectric material in the ferroelectric layer to the ferroelectric phase, improve the ferroelectricity of the ferroelectric layer, and thus improve the residual polarization strength of the device ferroelectric capacitor; at the same time, since the reduction of grain size during the growth of the ferroelectric material will lead to an increase in the coercive electric field, the present invention introduces an intercalation film with metallic properties into the ferroelectric layer to block the growth of vertical grains in the ferroelectric material at the bottom of the ferroelectric layer, so as to induce lateral grain growth of the ferroelectric material to improve the crystallinity, thereby improving the residual polarization strength while reducing the coercive electric field and avoiding the defects of oxygen vacancy aggregation and increased leakage at the grain boundary caused by vertical grain growth; in addition, the introduction of the intercalation film reduces the distribution difference between polycrystalline and multiphase in the ferroelectric film, and effectively suppresses the redistribution of charge and oxygen vacancy migration in the ferroelectric film, ultimately obtaining a ferroelectric capacitor with high residual polarization strength, low coercive electric field and uniform ferroelectricity.

[0039] Based on the same technical concept, the present invention further applies the above-mentioned ferroelectric capacitor with high remnant polarization and low coercive electric field to prepare a ferroelectric thin film transistor (i.e., a negative capacitance transistor) that can achieve a negative capacitance effect. On the basis of the traditional negative capacitance transistor with a three-layer structure of electrode layer-ferroelectric layer-active layer, by introducing an intercalation film with metallic properties into the ferroelectric layer, the remnant polarization of the ferroelectric capacitor is increased and its coercive electric field is reduced, so that it can be accurately matched with the MOS capacitor, thereby obtaining a stable negative capacitance region and realizing a negative capacitance effect. Furthermore, a dielectric layer is added between the ferroelectric layer and the active layer to optimize the negative capacitance effect of the thin film transistor.

[0040] Based on the above design ideas, the hafnium oxide-based ferroelectric capacitor and its preparation method, as well as the hafnium oxide-based ferroelectric thin film transistor and its preparation method of the present invention are described in detail below.

[0041] like Figure 2 As shown, the hafnium oxide-based ferroelectric capacitor 10 of the present invention includes a substrate 100, a bottom electrode layer 101, a ferroelectric layer 102, and a top electrode layer 103 stacked in sequence from bottom to top. Specifically, the substrate 100 is made of silicon. The bottom electrode layer 101 and the top electrode layer 103 are conductive metal films, which are made of conductive metals such as copper, aluminum, gold, silver or nickel. The ferroelectric layer 101 is composed of m layers of ferroelectric film 1020 and n layers of intercalation film 1022 with metallic properties, wherein n≥1, m=n+1, the number of layers m of the intercalation film 1022 is preferably 1≤n≤2, and the number of layers of the ferroelectric film 1020 is preferably 2≤m≤3. As shown Figure 2As shown, in this embodiment, the number n of intercalation films 1022 layers is 2, and the number m of ferroelectric films 1020 layers is 3. Ferroelectric films 1020 and intercalation films 1022 with metallic properties are alternately stacked along the thickness direction to form a five-layer ferroelectric layer 102. The top and bottom of the stacked ferroelectric layer 102 are both ferroelectric films 1020. In other words, the ferroelectric film 1020 contacts both the bottom electrode layer 101 and the top electrode layer 103. In this embodiment, the ferroelectric film 1020 is made of HZO (hafnium zirconium oxide). In addition to HZO, other HfO2-based ferroelectric materials can also be used. Intercalation films 1022 are specifically made of any metal such as copper, gold, aluminum, tantalum, tungsten, or molybdenum, or a compound with metallic properties such as titanium nitride or silicon nitride. Here, metallic properties refer to electrical conductivity. These metallic materials all have a lower thermal expansion coefficient than the ferroelectric film 1020, which can be used to optimize the performance of the ferroelectric film 1020.

[0042] In the ferroelectric layer 102 of the ferroelectric capacitor 10, clamping stress is generated between the metallic intercalation film 1022 and the adjacent bottom electrode layer 101 or top electrode layer 103, and between the intercalation film 1022 and the adjacent HZO film 1022. Because the thermal expansion coefficient of metals or metallic compounds is lower than that of HZO, they can generate higher in-plane tensile stress. Therefore, during the HZO film preparation process, when performing a rapid annealing treatment, the clamping stress formed between the metallic intercalation film 1022, the bottom electrode layer 101, and the top electrode layer 103, which sandwich the HZO films, can suppress the m-phase (monoclinic phase) while promoting the transformation of the t-phase (tetragonal phase, i.e., non-ferroelectric phase) to the o-phase (orthorhombic phase, i.e., ferroelectric phase). This also promotes the crystallization of the o-phase, thereby improving the ferroelectricity of the HZO film and enhancing the spontaneous polarization, thereby achieving a higher remanent polarization strength. During the growth of the HZO film, the residual polarization and coercive electric field are related to the size of the grains produced during the thermal annealing process: the increase in grain size is conducive to increasing the residual polarization of the ferroelectric film 1020 while reducing the coercive electric field. Figure 3 As shown in (a), in a traditional single-layer HZO film, the grains grow in a direction perpendicular to the substrate 100 during the annealing process to form vertical grains. The longer the vertical grains, the higher the residual polarization intensity and the lower the coercive electric field. However, since the distribution of the formed vertical grains is relatively dispersed and they cannot be connected into one, the volume of the vertical grains is relatively small, and the vertical grains grow in the vertical direction, which may lead to the segmentation of the electric domain in the vertical direction. The defects or stress at the grain boundaries may hinder the synergy of the polarization reversal. All these make the improvement of the residual polarization intensity by the formed vertical grains limited. If the size of the vertical grains is too large, it will lead to the aggregation of oxygen vacancies at the grain boundaries, increase leakage current, and cause defects. In order to increase the residual polarization intensity while reducing the coercive electric field and avoid the aggregation of oxygen vacancies at the grain boundaries, which will increase leakage current and cause defects, as shown in FIG. Figure 3 As shown in (b), the ferroelectric capacitor of the present invention separates the single-layer HZO film into multiple layers of ultra-thin HZO film by introducing a single-layer or multi-layer intercalation film 1022 with metallic properties into the single-layer ferroelectric film 1020. The formation of the intercalation film 1022 blocks the growth of vertical grains in the HZO film located therebelow, and at the same time induces the grains to transform into lateral crystallization during the rapid annealing process, thereby improving the crystallinity of the lateral crystallization and making the overall size of the lateral grains larger, thus having a higher residual polarization strength and a lower coercive electric field; and compared with vertical grains, lateral grains growing in the horizontal direction are more likely to form a more continuous grain boundary structure, which is beneficial to the uniform reversal of the electric domain along the direction of the electric field, thereby significantly improving the residual polarization strength; at the same time, it can also avoid the defects of oxygen vacancy aggregation and increased leakage at the grain boundary caused by excessive vertical grains.

[0043] In addition to the remanent polarization and coercive electric field, the ferroelectric uniformity of the ferroelectric layer 102 in the ferroelectric capacitor 10 is also a key factor affecting the ferroelectric properties of the ferroelectric layer 102. This is because the essence of the change in ferroelectric properties is the coexistence and random distribution of non-ferroelectric and ferroelectric phases in the polycrystalline ferroelectric film. The transition between different phases may affect the ferroelectric domain structure and domain wall motion of the material, thereby affecting its electrical properties. Figure 3 (b) In the ferroelectric layer 102 of the ferroelectric capacitor 10 of the present invention, the introduction of the metal-like intercalation film 1022 not only reduces the distribution difference of polycrystalline and multiphase inside the ferroelectric film 1020, but also effectively suppresses the redistribution of charge and the migration of oxygen vacancies in the ferroelectric film 1020. Figure 3 (a) and Figure 3 (b) It can be seen that the pure HZO film with a single-layer structure is a polycrystalline and multiphase structure, and the large number of interfaces and grain boundaries will affect the ferroelectric properties of the single-layer pure HZO film. However, after the introduction of the metal intercalation film 1022, the crystalline region of the HZO interface shows lattice fringes in almost the same direction and grows continuously, reducing the distribution difference between the polycrystalline and multiphase HZO film. This is because the intercalation film 1022 blocks the vertical grain growth of the underlying HZO film, inducing lateral crystallization of the HZO to improve the crystallinity, thereby improving the ferroelectric properties of the HZO film, reducing defects and stress at the interface, and reducing the generation of bulk effects. In addition, under the action of an electric field, the introduction of the intercalation film 1022 can effectively suppress the redistribution of charge in the HZO film and the longitudinal migration of oxygen vacancies. Inserting the metal intercalation film 1022 into the HZO thins the single-layer HZO, uniformly distributes oxygen vacancies along the lateral direction, and regulates the oxygen vacancies to an appropriate concentration. The presence of an appropriate amount of oxygen vacancies will increase the o-phase transition temperature, which is beneficial to the formation of the o-phase, thereby improving the ferroelectric uniformity of the ferroelectric layer 102 .

[0044] Thus, by introducing a single layer or multiple layers of metal-containing intercalation films 1022 into the single layer ferroelectric film 1020, the resulting ferroelectric capacitor 10 has a higher residual polarization intensity, a lower coercive electric field, and good ferroelectric uniformity.

[0045] To prepare the ferroelectric capacitor 10, the present invention provides a method for preparing a ferroelectric capacitor, comprising the following steps:

[0046] S0: prepare substrate 100;

[0047] Specifically, a lightly doped silicon wafer was used as the substrate 100 . After being cleaned twice with acetone, isopropyl alcohol, and deionized water, the surface was blown dry with a nitrogen gun and dried on a hot plate for 5 minutes.

[0048] S1: forming a bottom electrode layer 101;

[0049] Specifically, at room temperature, a bottom electrode is deposited on the substrate 100 by DC magnetron sputtering in argon gas to form a bottom electrode layer 101. The material of the bottom electrode layer 101 is any one of copper, gold, aluminum, tantalum, tungsten, molybdenum, titanium nitride, and silicon nitride, and the deposition thickness is 20180 nm. The magnetron sputtering power is set to 20-100 W, argon gas is used as the shielding gas, and the argon partial pressure in the deposition environment is 3.0×10 -1 Pa.

[0050] S2: forming a ferroelectric layer 102;

[0051] Specifically, the method includes the following steps:

[0052] S21: The substrate 100 with the bottom electrode layer 101 deposited thereon is placed in an ALD reaction chamber at 280°C, and an oxygen source substance O3 is introduced into the chamber and adsorbed on the surface of the bottom electrode. Subsequently, the precursor TDMAH (Hf[N(CH3)2]4) or TEMAZ (Zr[N(CH3)(CH2CH3)]4) is added to the chamber, adsorbed on the surface of the substrate and reacted to form Hf-O / Zr-O bonds. The alternating growth of Hf-O / Zr-O forms an HZO film, i.e., a ferroelectric film 1020, and the thickness of the ferroelectric film 1020 is controlled to be 3-30nm through the number of Hf-O / Zr-O growth cycles.

[0053] The change in thickness of the ferroelectric film 1020 will change the capacitance value of the ferroelectric layer 1020. If the ferroelectric film 1020 is too thick, a non-ferroelectric phase is easily formed. Therefore, the thickness needs to be controlled within 3-30 nm.

[0054] S22: Using the same temperature and argon partial pressure conditions as step S1, an intercalation film 1022 having metallic properties is deposited on the ferroelectric film 1020 by DC magnetron sputtering, with a deposition thickness of 2-20 nm. The intercalation film 1022 can be made of any of a metal material such as copper, gold, aluminum, tantalum, tungsten, or molybdenum, or a compound having metallic properties such as titanium nitride or silicon nitride. In the same ferroelectric capacitor, the material of the intercalation film 1022 can be the same as or different from the material of the bottom electrode layer 101.

[0055] Here, different thicknesses of the intercalation film 1022 lead to different interface coupling effects, which in turn affect the remanent polarization (Pr) and coercive electric field (Ec). If the intercalation film 1022 is too thin, it can easily become discontinuous, forming island structures. This can fail to effectively suppress the migration of oxygen vacancies in the ferroelectric film 1020, leading to a decrease in the remanent polarization. If the intercalation film 1022 is too thick, it can easily lead to stress mismatch. The difference in thermal expansion coefficients between the intercalation film 1022 and the ferroelectric film 1020 induces interfacial stress, destroying the metastable orthorhombic phase (o-phase) of HZO, causing amorphization and a decrease in the remanent polarization. Furthermore, an excessively thick intercalation film 1022 can form a short circuit path, increasing leakage current.

[0056] Steps S21 and S22 are alternately performed in this manner until the desired number and thickness of ferroelectric films 1020 and intercalation films 1022 are reached, forming a stack of alternating ferroelectric films 1020 and intercalation films 1022. The number of layers of ferroelectric films 1020 and intercalation films 1022 can be adjusted as needed, as long as both the top and bottom of the stack are ferroelectric films 1020. The number of intercalation films 1022 layers, n, is preferably 1 ≤ n ≤ 2, and the number of ferroelectric films 1020 layers is preferably 2 ≤ m ≤ 3. The thickness of the ferroelectric layer 102 is controlled within a range of 8-130 nm. In this embodiment, the number of intercalation films 1022 layers is 2, and the number of ferroelectric films 1020 layers is 3. The alternating layers form a five-layer ferroelectric layer 102.

[0057] S3: forming a top electrode layer 104, and then performing a rapid annealing process to obtain a ferroelectric capacitor 10;

[0058] Specifically, the top electrode layer is deposited on the ferroelectric film 1020 by DC magnetron sputtering under the same temperature and argon partial pressure conditions as in step S1, forming the top electrode layer 1020 with a deposition thickness of 20-180 nm; wherein the material of the intercalation film 1022 is also any one of copper, gold, aluminum, tantalum, tungsten, molybdenum, titanium nitride, and silicon nitride. Here, the top electrode layer 104 can be as follows Figure 2 The dot electrodes shown are distributed in a matrix, or they can be a whole sheet of layer electrodes.

[0059] Then, a rapid annealing treatment is performed, with an annealing temperature of 350-700°C, an annealing atmosphere of argon or nitrogen, an annealing time of 30-300s, and a heating time of 7s, to finally obtain the following Figure 2 Here, the annealing process must be completed in a short time (30-300s) to induce high in-plane tensile stress; otherwise, thermodynamic relaxation effects will occur, and the same level of stress control cannot be achieved in the ferroelectric film 1020.

[0060] Performance Testing

[0061] The hafnium oxide-based ferroelectric capacitor 10 of the present invention and a conventional ferroelectric capacitor were prepared using the above-described preparation method. The difference between the two is that the ferroelectric layer 102 of the conventional ferroelectric capacitor does not include the insertion film 1022. However, the ferroelectric layer 102 of the two capacitors has the same thickness, and the other steps and parameters are also the same.

[0062] Then, the PV hysteresis loop and GIXRD curve of the conventional ferroelectric capacitor and the hafnium oxide-based ferroelectric capacitor 10 of the present invention were prepared respectively. Figure 4 , Figure 4 PV hysteresis loops of a conventional ferroelectric capacitor and a hafnium oxide-based ferroelectric capacitor prepared by the above-mentioned preparation method of the present invention are shown. Figure 4 As shown, in 10 5 Hz test frequency, ±4V voltage conditions, the saturation residual polarization intensity value 2P of the traditional ferroelectric capacitor and the ferroelectric capacitor 10 prepared by the preparation method of the present invention r 17.4μC / cm 2 and 78.4 μC / cm 2 . And by Figure 4 It can be seen intuitively that the coercive electric field of the ferroelectric capacitor of the present invention is lower than that of the traditional ferroelectric capacitor. It can be seen that the residual polarization intensity of the ferroelectric capacitor 10 after the introduction of the metal-like insert film 1022 is greatly improved, and at the same time, the coercive electric field is effectively reduced. Figure 5 , Figure 5 FIG. 4 shows the GIXRD curves of a conventional ferroelectric capacitor and a ferroelectric capacitor prepared by the above-mentioned preparation method of the present invention. Figure 5As shown, the o / t-mixed phase peak at 2θ~30.5° in the ferroelectric capacitor 10 of the present invention, which incorporates the intercalation film 1022, is enhanced and shifted to the left. This indicates that the metallic intercalation film 1022 promotes the transformation of the non-ferroelectric t(011) phase to the ferroelectric o(111) phase. Compared to the single-layer HZO film in conventional ferroelectric capacitors, the HZO film in the ferroelectric capacitor 10 of the present invention exhibits almost no diffraction peaks at 2θ~28.5° and ~31.6°, indicating that its non-ferroelectric m-phase is well suppressed. This is because during the rapid annealing process, the metallic intercalation film 1022 has a lower thermal expansion coefficient and generates higher in-plane tensile stress. The clamping stress between the electrodes is an important factor in suppressing the m-phase and promoting the transformation of the t-phase to the o-phase. The introduction of the intercalation film 1022 promotes the crystallization of the HZO film into the o(111) phase, which is beneficial for enhancing the spontaneous polarization and improving the ferroelectric properties of the HZO film.

[0063] According to the above preparation method, a plurality of ferroelectric devices with the insertion film 1022 are prepared on the same substrate 100, such as Figure 2 As shown. Among them, Figure 2 Each dot electrode in the top electrode layer 103 represents a ferroelectric device, and then the PV hysteresis loops of these ferroelectric devices are respectively prepared. Figure 6 The PV hysteresis loop distribution statistics of these ferroelectric capacitors are shown, where each grid cell represents the PV loop of a single device. Figure 6 As shown in Figure 2, the PV hysteresis loops of most ferroelectric devices show a typical “S” shape, and these ferroelectric devices are 5 Hz test frequency, saturated residual polarization intensity value 2P at ±4.5V voltage r The average value is about 79.6μC / cm 2 , close to the saturated remnant polarization intensity value 2P of a single device r , indicating that the ferroelectric capacitor 10 of the present invention has good and uniform ferroelectric properties after the insertion film 1022 is introduced. This is because the introduction of the insertion film 1022 reduces the distribution difference between the polycrystalline and multi-phase of the HZO film and effectively suppresses the redistribution of charge in the HZO film and the vertical migration of oxygen vacancies.

[0064] Since the negative capacitance effect of the negative capacitance transistor depends on whether the ferroelectric capacitor can match the MOS capacitor, and the residual polarization strength and coercive electric field of the ferroelectric capacitor are key factors affecting whether the ferroelectric capacitor can match the MOS capacitor, a higher residual polarization strength and a lower coercive electric field are conducive to the matching between the ferroelectric capacitor and the MOS capacitor. Therefore, in order to improve the residual polarization strength of the ferroelectric capacitor in the negative capacitance transistor and reduce its coercive electric field at the same time, based on the same technical concept as the above-mentioned ferroelectric capacitor, the present invention provides a hafnium oxide-based ferroelectric thin film transistor, such as Figure 7As shown, a hafnium oxide-based ferroelectric thin film transistor 20 according to an embodiment of the present invention includes a substrate 200 , an electrode layer 201 , a ferroelectric layer 202 and an active layer 204 stacked sequentially from bottom to top, and a source-drain electrode 206 disposed in the active layer 204 .

[0065] Specifically, substrate 200 is also a silicon substrate. Electrode layer 202 is a conductive metal film made of a conductive metal such as copper, aluminum, gold, silver, or nickel. Active layer 204 includes one or more semiconductors, specifically oxides such as In2O3, ZnO, IZO, IGO, and IGZO. Source-drain electrodes 206 are disposed on top of dielectric layer 203 and located on opposite sides of each semiconductor. The source-drain electrodes 206 are specifically made of copper, gold, aluminum, tantalum, tungsten, molybdenum, or any one of titanium nitride and silicon nitride. Each semiconductor and the source-drain electrodes 206 disposed on opposite sides thereof form a semiconductor channel structure. In the above-described thin-film transistor structure, electrode layer 201 and ferroelectric layer 202 form a ferroelectric capacitor, while electrode layer 201, dielectric layer 203, and active layer 204 form a MOS capacitor. When the ferroelectric capacitors and MOS capacitors are connected in series, a negative capacitance effect can be achieved. In order to make it easier to match the ferroelectric capacitor with the MOS capacitor, in the above ferroelectric thin film transistor, the ferroelectric layer 202 is composed of a layer of ferroelectric film 1020 and a layer of insertion film 1022 with metallic properties, wherein b≥1, a=b+1, the number of layers b of the insertion film 2022 is preferably 1≤b≤2, and the number of layers of the ferroelectric film 2020 is preferably 2≤a≤3. Figure 7 As shown, in this embodiment, the number b of the insertion films 2022 is 2, and the number a of the ferroelectric films 2020 is 3. The ferroelectric films 2020 and the insertion films 2022 having metallic properties are alternately stacked along the thickness direction to form a five-layer ferroelectric layer 202. The top and bottom of the stacked structure of the ferroelectric layer 202 are both ferroelectric films 2020. In other words, the ferroelectric layer 202 is in contact with the electrode layer 201 and the dielectric layer 203 at the ferroelectric film 2020.

[0066] like Figure 7 As shown, a dielectric layer 203 is provided between the ferroelectric layer 202 and the active layer 204. Specifically, the dielectric layer 203 is a film structure made of Al2O3. The Al2O3 dielectric film cap layer provides stress to the HZO film during the rapid annealing process to induce the generation of a ferroelectric phase and effectively prevents oxygen ions in the HZO from diffusing into the IGZO active layer 204, thereby improving the stability of the device. In addition to Al2O3, the material of the dielectric layer 203 can also be HfO2, ZrO2, HfAlO x 、ZrAlO xOf course, in some embodiments, the dielectric layer 203 may not be provided. However, in a ferroelectric thin film transistor without the dielectric layer 203, since the ferroelectric layer 202 is in direct contact with the active layer 204, there are many interface defects, which will result in a small negative capacitance area. Therefore, the preferred solution is to add a layer of insulating oxide between the ferroelectric layer 202 and the active layer 204 as the dielectric layer 203 to stabilize and expand the negative capacitance area.

[0067] Thus, by introducing the metallic intercalation film 2022 into the ferroelectric layer 202, the remnant polarization of the ferroelectric layer 202 is increased while its coercive electric field is reduced. Since the mechanism of increasing the remnant polarization of the ferroelectric layer 202 and reducing its coercive electric field by introducing the intercalation film 2022 has been previously described, it will not be repeated here. The increased remnant polarization and reduced coercive electric field of the ferroelectric film 1020 can make the characteristics of the ferroelectric capacitor closer to those of a MOS capacitor, facilitating capacitance matching between the ferroelectric capacitor and the MOS capacitor, expanding the negative capacitance region, and thus achieving a negative capacitance effect.

[0068] In order to prepare the ferroelectric thin film transistor 20, the present invention provides a method for preparing the hafnium oxide-based ferroelectric thin film transistor, comprising the following steps:

[0069] S0: prepare substrate 200;

[0070] S1: forming an electrode layer 201;

[0071] S2: forming a ferroelectric layer 202;

[0072] The number of layers b of the insertion film 2022 of the ferroelectric layer 202 is preferably 1≤b≤2, and the number of layers of the ferroelectric film 2020 is preferably 2≤a≤3, so the thickness of the ferroelectric layer 202 is controlled in the range of 8-130 nm.

[0073] Since the processes and conditions used in the above steps S0-S2 are the same as those used in the above steps S0-S2 of preparing the ferroelectric capacitor, the specific process will not be described here.

[0074] However, it should be noted that the negative capacitance effect depends on the matching of ferroelectric capacitors and MOS capacitors. Changes in the thickness of ferroelectric layer 202 will change the capacitance value of ferroelectric layer 202, thereby affecting the capacitive coupling efficiency of the entire transistor. If the ferroelectric layer 202 is too thin, it may cause capacitance mismatch, weakening the negative capacitance effect and further affecting the effect of reducing subthreshold swing (SS). If the ferroelectric layer 202 is too thick, it is easy to form a non-ferroelectric phase, reducing the ferroelectric orthogonal phase ratio. Therefore, the thickness of ferroelectric layer 202 is preferably controlled within 8-130nm.

[0075] S3: forming a dielectric layer 203;

[0076] Specifically, a dielectric layer 203 of a certain thickness is deposited and grown on the top of the ferroelectric layer 202. The dielectric layer 203 is made of a material such as Al2O3, HfO2, ZrO2, HfAlO x 、ZrAlO x Any one of which has a thickness of 0.2-20 nm;

[0077] S4: performing a rapid annealing process on the formed ferroelectric layer 202 and dielectric layer 203;

[0078] Specifically, the annealing temperature is 350-700°C, the annealing atmosphere is argon or nitrogen, the annealing time is 30-300 seconds, and the heating time is 7 seconds. In this embodiment, the annealing temperature is specifically 550°C, and the annealing time is 30 seconds. During the rapid annealing process, the dielectric layer 203 provides stress to the HZO film, thereby inducing the formation of a ferroelectric phase in the HZO film.

[0079] In ferroelectric thin film transistors, dielectric layer 203 is adopted to adjust the capacitance matching of ferroelectric layer and MOS structure, which can optimize negative capacitance effect. Dielectric layer 203 can suppress the migration of oxygen vacancies and reduce interface state density. Here, the thickness of dielectric layer 203 is extremely critical. If dielectric layer 203 is too thick, the electric field required for ferroelectric polarization will be increased, causing the coercive electric field to rise and affecting the switching characteristics of the device. Simultaneously, the thickness variation of dielectric layer 203 causes the equivalent oxide layer thickness to increase, and the gate control capability declines, thereby affecting SS and switching ratio. When dielectric layer 203 is too thin, the capacitance coupling between it and ferroelectric layer 202 is insufficient, which can cause the negative capacitance effect to weaken, and SS cannot break through the Boltzmann limit. Therefore, to stabilize the negative capacitance effect, under the premise that the thickness of the ferroelectric layer 202 is 8-130nm, the thickness of the dielectric layer 203 is controlled to be 0.2-5nm. This allows the capacitance value of the ferroelectric capacitor composed of the electrode layer 201 and the ferroelectric layer 202 to approach the capacitance value of the MOS capacitor composed of the electrode layer 201, the dielectric layer 203 and the active layer 204, achieving capacitance matching. This makes the total capacitance of the ferroelectric capacitor and the MOS capacitor connected in series close to infinity. At this time, the gate voltage works on the series capacitance, and a slight change in the gate voltage can cause a significant change in the charge in the channel region of the active layer 204, thereby increasing the switching speed of the transistor and reducing the subthreshold swing.

[0080] S5: forming an active layer 204 and then performing an annealing process;

[0081] At room temperature, one or more semiconductors are deposited on the dielectric layer film in step 9 by radio frequency magnetron sputtering. The specific material of the semiconductor is an oxide such as In2O3, ZnO, IZO, IGO, IGZO, etc., and the thickness thereof is 5-50 nm. The magnetron sputtering power is set to 15-150 W, argon is used as the shielding gas, and the argon partial pressure in the cavity is 5.0×10-1 Pa, 0.2-5 sccm of oxygen is introduced to fill the oxygen vacancies in the oxide active layer.

[0082] The formed semiconductor is annealed to reduce defects in the active layer 204; the annealing atmosphere is nitrogen, oxygen, argon or air, the annealing temperature is 150-500° C., and the annealing duration is 20-60 minutes.

[0083] S6: forming source and drain electrodes 206 in the active layer 204;

[0084] At room temperature, source and drain electrodes 206 are deposited on both sides of each semiconductor by direct current magnetron sputtering to form a semiconductor channel structure. The material of the source and drain electrodes 206 is specifically any one of copper, gold, aluminum, tantalum, tungsten, molybdenum, titanium nitride, and silicon nitride, and the deposition thickness is 20180 nm. The magnetron sputtering power is set to 20-100 W, argon is used as the shielding gas, and the argon partial pressure in the deposition environment is 3.0×10 -1 Pa.

[0085] Finally, we get Figure 7 A hafnium oxide-based ferroelectric thin film transistor 20 is shown.

[0086] The hafnium oxide-based ferroelectric thin film transistor of the present invention introduces an insertion film 2022 with metallic properties, which not only accurately matches the ferroelectric capacitor with the MOS capacitor to achieve a negative capacitance effect, but also suppresses the hysteresis characteristics of the device transfer characteristic curve and reduces the hysteresis window to near zero. Figure 8-9 The transfer characteristic curves (I DS -V GS curve) and subthreshold swing distribution curve (SS-I DS ).like Figure 8-9 As shown, the introduction of the tungsten insertion film 1022 can increase the residual polarization intensity and reduce the coercive electric field, so that it can achieve a larger polarization reversal at a lower voltage. The threshold voltage window of polarization reversal is narrow. Therefore, when the gate voltage is scanned, the polarization reversal points in the positive and negative directions are close to each other, or even almost coincide, which reduces the hysteresis phenomenon and enables the device to achieve zero hysteresis in different voltage scanning ranges. It also has good current turn-off and saturation characteristics, and its switching ratio I on / I off About 6 orders of magnitude. SS is less than 60mV / dev in some ranges, with a negative capacitance effect, which can achieve fast current switching, thereby reducing the operating voltage and power consumption of the transistor. The high 2P rThe low coercive electric field and good ferroelectric uniformity are the key reasons for further reducing SS and maintaining a stable level below 60mV / dev over a large area. By introducing the tungsten intercalation film 2022, the hafnium oxide-based ferroelectric thin-film transistor can optimize capacitance matching, eliminate hysteresis in the negative capacitance region, and achieve the generation and stabilization of the negative capacitance region.

[0087] Compared with the prior art, the present invention introduces an intercalation film with metallic properties into the ferroelectric layer of the ferroelectric capacitor to promote the transformation of the non-ferroelectric phase of the ferroelectric material in the ferroelectric layer to the ferroelectric phase, thereby improving the ferroelectricity of the ferroelectric layer and thus improving the residual polarization strength of the ferroelectric layer; at the same time, since the reduction of grain size during the growth of the ferroelectric material will lead to an increase in the coercive electric field, the present invention introduces an intercalation film with metallic properties into the ferroelectric layer to block the growth of vertical grains in the ferroelectric material at the bottom of the ferroelectric layer, so as to induce lateral grain growth of the ferroelectric material to improve the crystallinity, thereby improving the residual polarization strength while reducing the coercive electric field and avoiding the defects of oxygen vacancy aggregation and increased leakage at the grain boundary caused by vertical grain growth; in addition, the introduction of the intercalation film reduces the distribution difference between polycrystalline and multiphase ferroelectric films, and effectively suppresses the redistribution of charge and oxygen vacancy migration in the ferroelectric film, ultimately obtaining a ferroelectric capacitor with high residual polarization strength, low coercive electric field and uniform ferroelectricity. Based on the same technical concept, the present invention further applies the above-mentioned ferroelectric capacitor structure with high residual polarization strength and low coercive electric field to the preparation of ferroelectric thin film transistors (i.e., negative capacitance transistors) that can achieve negative capacitance effect. On the basis of the traditional negative capacitance transistor with electrode layer-ferroelectric layer-active layer structure, by introducing an intercalation film with metallic properties into the ferroelectric layer, the residual polarization strength of the ferroelectric capacitor is increased and its coercive electric field is reduced, so that it can be accurately matched with the MOS capacitor, thereby obtaining a stable negative capacitance area and realizing the negative capacitance effect.

[0088] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the present application. The singular forms of "a", "said" and "the" used in the embodiments of the present application and the claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that, unless otherwise specified, "multiple" refers to two or more; the terms "first", "second", "third", etc. are only used to distinguish, and are not used to describe a specific order or sequence, nor can they be understood to indicate or imply relative importance. The term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items. When the above description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. In the description of the present application, for those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0089] The above-described embodiments merely illustrate several implementations of the present invention. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, and all such variations and improvements fall within the scope of protection of the present invention.

Claims

1. A hafnium oxide-based ferroelectric capacitor, characterized in that: It includes a bottom electrode layer, a ferroelectric layer and a top electrode layer stacked in sequence from bottom to top; The ferroelectric layer includes m layers of ferroelectric films and n layers of intercalation films, wherein n≥1 and m=n+1; The m-layer ferroelectric film and the n-layer intercalation film are alternately stacked in the thickness direction to form a stacked structure, and the top and bottom of the stacked structure are both ferroelectric films.

2. The hafnium oxide-based ferroelectric capacitor according to claim 1, wherein: The thermal expansion coefficient of the insertion film is smaller than the thermal expansion coefficient of the ferroelectric film.

3. The hafnium oxide-based ferroelectric capacitor according to claim 1, wherein: The material of the insert film is a substance with metallic properties.

4. A method for preparing a hafnium oxide-based ferroelectric capacitor, characterized in that: The following steps are involved: forming a bottom electrode layer; A stacked structure consisting of m layers of ferroelectric films and n layers of intercalation films alternately stacked on top of the bottom electrode layer is formed, which is a ferroelectric layer, wherein n≥1 and m=n+1; A top electrode layer is formed on top of the ferroelectric layer, and then a rapid annealing process is performed.

5. A hafnium oxide-based ferroelectric thin film transistor, characterized in that: It includes an electrode layer, a ferroelectric layer and an active layer stacked in sequence from bottom to top, and a source-drain electrode arranged in the active layer; The ferroelectric layer includes a ferroelectric film layer and a plug-in film layer, wherein b≥1 and a=b+1; The a-layer ferroelectric film and the b-layer metal insertion film are alternately stacked in a thickness direction to form a stacked structure, and the top and bottom of the stacked structure are both ferroelectric films.

6. The hafnium oxide-based ferroelectric thin film transistor according to claim 5, wherein: The thermal expansion coefficient of the insertion film is smaller than the thermal expansion coefficient of the ferroelectric film.

7. The hafnium oxide-based ferroelectric thin film transistor according to claim 5, wherein: The material of the insert membrane is metal or a compound with metallic properties.

8. The hafnium oxide-based ferroelectric thin film transistor according to claim 5, wherein: It also includes a dielectric layer, which is arranged between the ferroelectric layer and the active layer.

9. A method for preparing a hafnium oxide-based ferroelectric thin film transistor, characterized in that: The following steps are involved: forming an electrode layer; A stacked structure consisting of a layer a of ferroelectric film and a layer b of metal insertion film alternately stacked is formed on top of the electrode layer, which is a ferroelectric layer, wherein b≥1 and a=b+1; forming an active layer on top of the ferroelectric layer and then performing an annealing process; Source and drain electrodes are formed in the active layer.

10. The method for preparing a hafnium oxide-based ferroelectric thin film transistor according to claim 9, wherein: Before forming the active layer, the following steps are further performed: forming a dielectric layer on top of the ferroelectric layer; The ferroelectric layer and the dielectric layer are subjected to a rapid annealing process.

Images