Silicon-based capacitor and manufacturing method thereof

Abstract

The invention provides a silicon-based capacitor and a manufacturing method thereof, and the method comprises the steps: providing a silicon-based capacitor basic device which comprises a substrate with a groove and an upper electrode structure located in the groove; reducing the substrate of the silicon-based capacitor basic device by using a wet etching process to obtain a semi-finished product device; and forming a lower electrode structure on one side, deviating from the upper electrode structure, of the semi-finished product device to obtain the silicon-based capacitor. The thickness of the substrate is reduced through the wet etching process, the stress problem can be avoided while the thickness of the substrate is reduced, the stability of the device structure is guaranteed, meanwhile, high-frequency performance is provided through the lower electrode structure formed on the back face of a semi-finished product device, and the problem of how to effectively reduce the thickness of the silicon-based capacitor while the high-frequency performance is guaranteed is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a silicon-based capacitor and a manufacturing method thereof. Background Art

[0002] Silicon-based devices are typically manufactured using semiconductor processes. During this process, the substrate needs to have a certain thickness to provide wafer stress and ensure the stability of the device morphology and structure during the operation of various equipment and machines in the process. For device types that have thickness requirements for the final product, after the process is roughly completed, the wafer substrate will be thinned through thinning equipment to reduce the size of the finished product or improve its performance. The principle of wafer thinning equipment is to achieve substrate thinning through mechanical cutting or simultaneous use of chemical polishing fluid. Therefore, in actual operation, there is still a need to support the physical thickness of the substrate, which limits the degree of substrate thinning.

[0003] Existing silicon-based capacitors typically have a device structure consisting of a lower electrode, a silicon-based substrate, a dielectric, and an upper electrode, arranged in this order from bottom to top. To accommodate high energy density and high-frequency applications, silicon-based capacitors are typically thickened overall, making them thicker and hindering the reduction of finished product size, thus limiting their application. Summary of the Invention

[0004] The object of the present invention is to provide a silicon-based capacitor and a method for manufacturing the same, so as to solve the problem of how to effectively reduce the thickness of the silicon-based capacitor while ensuring high-frequency performance.

[0005] To solve the above technical problems, the present invention provides a method for manufacturing a silicon-based capacitor, comprising: A silicon-based capacitor basic device is provided, wherein the silicon-based capacitor basic device includes a substrate having a trench and an upper electrode structure located in the trench; Using a wet etching process, the substrate of the silicon-based capacitor basic device is removed to obtain a semi-finished device; A lower electrode structure is formed on a side of the semi-finished device facing away from the upper electrode structure to obtain a silicon-based capacitor.

[0006] Optionally, in the method for manufacturing the silicon-based capacitor, the upper electrode structure includes a dielectric material layer and an electrode material layer formed by staggered stacking.

[0007] Optionally, in the method for manufacturing the silicon-based capacitor, the semi-finished device still has a substrate, and the thickness of the substrate at the bottom of the trench is greater than or equal to 0 and less than the thickness of the substrate at the trench in the silicon-based capacitor basic device.

[0008] Optionally, in the method for manufacturing the silicon-based capacitor, the method for forming the lower electrode structure on the side of the semi-finished device facing away from the upper electrode structure to obtain the silicon-based capacitor includes: A metal electrode layer is formed on the bottom of the substrate of the semi-finished device to obtain a silicon-based capacitor.

[0009] Optionally, in the method for manufacturing the silicon-based capacitor, the method for using a wet etching process to remove the substrate of the silicon-based capacitor basic device to obtain a semi-finished device includes: The wet etching process is used in conjunction with the bonding / debonding process to completely remove the substrate of the silicon-based capacitor basic device to obtain a semi-finished device.

[0010] Optionally, in the method for manufacturing the silicon-based capacitor, the method for forming the lower electrode structure on the side of the semi-finished device facing away from the upper electrode structure to obtain the silicon-based capacitor includes: Sequentially and alternately stacking dielectric material layers and electrode material layers at the bottom of the upper electrode structure to obtain a lower electrode structure; The surface of the lower electrode structure is planarized to obtain a silicon-based capacitor.

[0011] In order to solve the above technical problems, the present invention also provides a silicon-based capacitor manufactured using the manufacturing method as described in any of the above items, and the silicon-based capacitor includes a lower electrode structure and an upper electrode structure arranged in sequence from bottom to top.

[0012] Optionally, in the silicon-based capacitor, a substrate is provided between the lower electrode structure and the upper electrode structure; and the thickness of the substrate is greater than or equal to 0.

[0013] Optionally, in the silicon-based capacitor, when the silicon-based capacitor contains a substrate, the lower electrode structure is a metal electrode layer; when the silicon-based capacitor does not contain a substrate, the lower electrode structure includes a dielectric material layer and an electrode material layer formed by staggered stacking.

[0014] Optionally, in the silicon-based capacitor, the upper electrode structure includes a dielectric material layer and an electrode material layer formed by staggered stacking.

[0015] The present invention provides a silicon-based capacitor and a method for manufacturing the same, comprising: providing a silicon-based capacitor base device, the silicon-based capacitor base device comprising a substrate having a groove and an upper electrode structure located within the groove; using a wet etching process to reduce the substrate thickness of the silicon-based capacitor base device to obtain a semi-finished device; and forming a lower electrode structure on a side of the semi-finished device facing away from the upper electrode structure to obtain a silicon-based capacitor. Reducing the substrate thickness through the wet etching process can reduce the substrate thickness while avoiding stress issues, ensuring the stability of the device structure. Simultaneously, the lower electrode structure formed on the back of the semi-finished device provides high-frequency performance, thereby solving the problem of how to effectively reduce the thickness of the silicon-based capacitor while maintaining high-frequency performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A flow chart of a method for manufacturing a silicon-based capacitor provided in this embodiment; 2(A) to 2(G) are schematic diagrams of device structures corresponding to various steps in the method for manufacturing a silicon-based capacitor provided in this embodiment; Figure 3 A schematic diagram of the overall structure of a silicon-based capacitor provided in this embodiment; Figure 4 A schematic diagram of the overall structure of another silicon-based capacitor provided in this embodiment; The descriptions of the reference numerals are as follows: 100 - substrate; 101 - trench; 200 - upper electrode structure; 201 - first dielectric material layer; 202 - first electrode material layer; 203 - second dielectric material layer; 204 - second electrode material layer; 205 - reverse deep trench; 300 - lower electrode structure; 301 - metal electrode layer. DETAILED DESCRIPTION

[0017] The silicon-based capacitor and its manufacturing method proposed in the present invention are further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not in precise proportions. They are only used to conveniently and clearly assist in illustrating the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to be presented with different focuses and sometimes use different proportions.

[0018] It should be noted that the terms "first", "second", etc. in the specification, claims, and accompanying drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, and are not used to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or are inherent to these processes, methods, products, or apparatuses.

[0019] This embodiment provides a method for manufacturing a silicon-based capacitor, such as Figure 1 Shown, including: S1, providing a silicon-based capacitor basic device, wherein the silicon-based capacitor basic device includes a substrate having a trench and an upper electrode structure located in the trench; S2, using a wet etching process to remove the substrate of the silicon-based capacitor basic device to obtain a semi-finished device; S3, forming a lower electrode structure on a side of the semi-finished device away from the upper electrode structure to obtain a silicon-based capacitor.

[0020] The manufacturing method of the silicon-based capacitor provided in this embodiment reduces the substrate thickness through a wet etching process, which can avoid stress problems while thinning the substrate thickness, ensuring the stability of the device structure. At the same time, high-frequency performance is provided through the lower electrode structure formed on the back of the semi-finished device, solving the problem of how to effectively reduce the thickness of the silicon-based capacitor while ensuring high-frequency performance.

[0021] Specifically, in this embodiment, step S1 provides a silicon-based capacitor basic device, which includes a substrate having a groove and an upper electrode structure located in the groove, wherein the upper electrode structure includes a dielectric material layer and an electrode material layer formed by staggered stacking.

[0022] In the actual process, first, as shown in Figure 2 (A), a trench 101 is formed on the substrate 100 using an etching process; then, as shown in Figure 2 (B), a dielectric material and an electrode material are sequentially deposited in the trench 101 using a chemical vapor deposition process or a physical vapor deposition process, thereby sequentially forming a first dielectric material layer 201, a first electrode material layer 202, a second dielectric material layer 203 and a second electrode material layer 204 in the trench 101; the first dielectric material layer 201, the first electrode material layer 202, the second dielectric material layer 203 and the second electrode material layer 204 constitute the upper electrode structure 200.

[0023] The materials of the first dielectric material layer 201 and the second dielectric material layer 203 can be the same or different; the materials of the first electrode material layer 202 and the second electrode material layer 204 can be the same or different, which is not limited in this application.

[0024] Since the method for manufacturing a silicon-based capacitor provided in this embodiment requires a wet etching process to thin the substrate, when forming the upper electrode structure 200, the first dielectric material layer 201 formed on the substrate 100 needs to have a sufficient thickness and be relatively close to the substrate 100. Of course, before forming the upper electrode structure 200, a wet etching-resistant material layer can also be formed (e.g., by deposition) on the surface of the substrate 100 and the trench 101.

[0025] Furthermore, in this embodiment, in step S2, a wet etching process is used to remove the substrate of the silicon-based capacitor basic device to obtain a semi-finished device.

[0026] Specifically, it is necessary to select a chemical wet process with high selectivity to the silicon substrate to perform wet etching on the substrate 100 .

[0027] In one specific embodiment, as shown in FIG2(C), a portion of the substrate 100 can be removed, thereby reducing the thickness of the substrate 100. In practical applications, the thickness of the substrate 100 at the bottom of the trench 101 is greater than or equal to 0 and less than the thickness of the substrate 100 at the trench 101 in the silicon-based capacitor basic device. In other words, the substrate 100 between two adjacent upper electrode structures 200 remains, but the substrate at the bottom of the upper electrode structures 200 can be completely removed or only a thin layer can be left.

[0028] In this way, since the substrate 100 still exists between two adjacent upper electrode structures 200 , that is, there is no gap in the overall structure of the device, thereby ensuring the stability of the device structure.

[0029] In another specific embodiment, as shown in FIG2(D), a wet etching process can be used to completely remove the substrate 100. Considering that complete removal of the substrate 100 may affect the stability of the upper electrode structure 200, in this embodiment, a bonding / debonding process can be used in conjunction with the complete removal of the substrate 100 to overcome stress issues caused by excessively thin thickness, thereby achieving an ultra-thin silicon-based capacitor while ensuring the stability of the device structure.

[0030] After the substrate 100 is completely removed, as shown in FIG. 2(E) , an inverted deep trench 205 is formed between two adjacent upper electrode structures 200 .

[0031] Of course, in the actual process, when the thickness of the silicon-based substrate is relatively thick, the substrate 100 can be thinned by chemical mechanical grinding or cutting technology first, and then the substrate 100 can be further thinned by dry etching. Finally, in order to ensure the integrity of the device structure, the substrate 100 can be finely thinned by wet etching to obtain a semi-finished device that meets the requirements.

[0032] Furthermore, in this embodiment, in step S3 , a lower electrode structure is formed on a side of the semi-finished device away from the upper electrode structure to obtain a silicon-based capacitor.

[0033] When the silicon-based capacitor includes a substrate 100, i.e., the semi-finished device structure is as shown in FIG2(C), a metal electrode layer 301 is formed at the bottom of the substrate 100 of the semi-finished device. The metal electrode layer 301 serves as the lower electrode structure. The structure of the resulting silicon-based capacitor is shown in FIG2(F).

[0034] In practical applications, the material of the metal electrode layer 301 may be the same as or different from the material of the electrode material layer in the upper electrode structure 200 , and this application does not impose any limitation on this.

[0035] In this way, while ensuring the stability of the device, the thickness of the substrate 100 can be effectively reduced through the wet etching process, thereby effectively reducing the overall thickness of the silicon-based capacitor.

[0036] When the silicon-based capacitor does not include the substrate 100 , that is, the semi-finished device structure obtained is as shown in FIG2(D), since reverse deep trenches 205 are formed between adjacent upper electrode structures 200 , the lower electrode structure 300 can be prepared using a method similar to that used to form the upper electrode structure 200 .

[0037] Specifically, in this embodiment, first, dielectric material layers and electrode material layers are alternately stacked in sequence at the bottom of the upper electrode structure 200 to obtain a lower electrode structure, wherein a chemical vapor deposition process or a physical vapor deposition process can be used to sequentially deposit dielectric materials and electrode materials in the reverse deep trench 205, thereby sequentially forming a third dielectric material layer, a third electrode material layer, a fourth dielectric material layer and a fourth electrode material layer in the reverse deep trench 205; the third dielectric material layer, the third electrode material layer, the fourth dielectric material layer and the fourth electrode material layer constitute the lower electrode structure 300.

[0038] The materials of the third dielectric material layer and the fourth dielectric material layer may be the same or different, and may be the same or different from the materials of the first dielectric material layer 201 or the second dielectric material layer 203; the materials of the third electrode material layer and the fourth electrode material layer may be the same or different, and may be the same or different from the materials of the first electrode material layer 202 and the second electrode material layer 204. This application does not impose any restrictions on this.

[0039] Then, the surface of the lower electrode structure 300 can be planarized by using a process such as chemical mechanical polishing to obtain a silicon-based capacitor.

[0040] In this way, since the substrate 100 is completely removed, a reverse deep trench 205 is formed between adjacent upper electrode structures 200. Therefore, the lower electrode structure 300 can be formed in the reverse deep trench 205 using the same process as the upper electrode structure 200, thereby effectively expanding the capacitance area while ensuring the stability of the device structure, and obtaining a high-efficiency silicon-based capacitor that meets the needs of high-frequency scenarios.

[0041] In practical applications, the manufacturing method of the silicon-based capacitor provided in this embodiment can reasonably adjust the material and thickness of each dielectric material layer and electrode material layer according to actual needs when preparing the upper electrode structure 200 and the lower electrode structure 300, so as to obtain the best capacitor performance.

[0042] Furthermore, in the manufacturing method of silicon-based capacitors provided in this embodiment, since the substrate 100 is almost completely removed, both single-sided and double-sided silicon-based capacitors can be manufactured using inexpensive, wafer-quality silicon substrates at the beginning of the process, reducing process costs. In particular, for double-sided silicon-based capacitors, the manufacturing method of silicon-based capacitors provided in this embodiment eliminates the need for expensive, highly doped silicon substrates, thus offering significant cost advantages. Furthermore, since more compatible metal electrode materials can be stacked, the resistance can be significantly reduced compared to the original highly doped silicon substrate, thereby improving device energy efficiency.

[0043] Furthermore, the manufacturing method of the silicon-based capacitor provided in this embodiment can reduce or even eliminate the subsequent back metallization process, thereby effectively reducing the process difficulty and production cost, which can not only improve performance and reduce costs, but also improve production yield.

[0044] Based on the manufacturing method of the silicon-based capacitor provided in this embodiment, this embodiment further provides a silicon-based capacitor, wherein the silicon-based capacitor includes a lower electrode structure and an upper electrode structure arranged in sequence from bottom to top.

[0045] Specifically, in a specific embodiment, if Figure 3As shown, a substrate 100 is located between the lower electrode structure 300 and the upper electrode structure 200. The substrate 100 is also located between two adjacent upper electrode structures 200 to ensure the structural stability of the upper electrode structures 200. The thickness of the substrate 100 between the lower electrode structure 300 and the upper electrode structure 200 is greater than or equal to 0 and is relatively thin, thereby effectively reducing the overall thickness of the silicon-based capacitor.

[0046] In another specific embodiment, Figure 4 As shown, there is no substrate 100 between the lower electrode structure 300 and the upper electrode structure 200. An inverted deep trench is formed between two adjacent upper electrode structures 200, and dielectric material layers and electrode material layers are alternately stacked in the inverted deep trench to form the lower electrode structure 300. Filling the inverted deep trench with the lower electrode structure 300 not only improves the stability of the device structure but also effectively increases the capacitance area, resulting in a highly efficient silicon-based capacitor that meets the requirements of high-frequency scenarios.

[0047] Furthermore, in this embodiment, the upper electrode structure 200 includes dielectric material layers and electrode material layers that are alternately stacked.

[0048] In practical applications, the material and thickness of each dielectric material layer and electrode material layer in the upper electrode structure 200 and the lower electrode structure 300 can be reasonably adjusted according to actual conditions to obtain optimal capacitor performance.

[0049] The silicon-based capacitor provided in this embodiment has a thinner device thickness and better high-frequency performance, and solves the problem of how to effectively reduce the thickness of the silicon-based capacitor while ensuring high-frequency performance.

[0050] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0051] The silicon-based capacitor and its manufacturing method provided in this embodiment include: providing a silicon-based capacitor basic device, the silicon-based capacitor basic device including a substrate having a groove and an upper electrode structure located within the groove; using a wet etching process to reduce the substrate of the silicon-based capacitor basic device to obtain a semi-finished device; and forming a lower electrode structure on the side of the semi-finished device facing away from the upper electrode structure to obtain a silicon-based capacitor. Reducing the substrate thickness through the wet etching process can avoid stress issues while reducing the substrate thickness, ensuring the stability of the device structure. At the same time, the lower electrode structure formed on the back of the semi-finished device provides high-frequency performance, solving the problem of how to effectively reduce the thickness of the silicon-based capacitor while ensuring high-frequency performance.

[0052] The above description is only a description of the preferred embodiments of the present invention and does not limit the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A method for manufacturing a silicon-based capacitor, characterized in that: include: A silicon-based capacitor basic device is provided, wherein the silicon-based capacitor basic device includes a substrate having a trench and an upper electrode structure located in the trench; Using a wet etching process, the substrate of the silicon-based capacitor basic device is removed to obtain a semi-finished device; A lower electrode structure is formed on a side of the semi-finished device facing away from the upper electrode structure to obtain a silicon-based capacitor.

2. The method for manufacturing a silicon-based capacitor according to claim 1, wherein: The upper electrode structure includes a dielectric material layer and an electrode material layer formed by alternating stacking.

3. The method for manufacturing a silicon-based capacitor according to claim 1, wherein: The semi-finished device still has a substrate, and the thickness of the substrate at the bottom of the trench is greater than or equal to 0 and less than the thickness of the substrate at the trench in the silicon-based capacitor basic device.

4. The method for manufacturing a silicon-based capacitor according to claim 3, wherein: The method for forming a lower electrode structure on a side of a semi-finished device away from the upper electrode structure to obtain a silicon-based capacitor includes: A metal electrode layer is formed on the bottom of the substrate of the semi-finished device to obtain a silicon-based capacitor.

5. The method for manufacturing a silicon-based capacitor according to claim 1, wherein: The method of using a wet etching process to remove the substrate of a silicon-based capacitor basic device to obtain a semi-finished device includes: The wet etching process is used in conjunction with the bonding / debonding process to completely remove the substrate of the silicon-based capacitor basic device to obtain a semi-finished device.

6. The method for manufacturing a silicon-based capacitor according to claim 5, wherein: The method for forming a lower electrode structure on a side of a semi-finished device away from the upper electrode structure to obtain a silicon-based capacitor includes: Sequentially and alternately stacking dielectric material layers and electrode material layers at the bottom of the upper electrode structure to obtain a lower electrode structure; The surface of the lower electrode structure is planarized to obtain a silicon-based capacitor.

7. A silicon-based capacitor manufactured by the manufacturing method according to any one of claims 1 to 6, characterized in that: The silicon-based capacitor includes a lower electrode structure and an upper electrode structure arranged in sequence from bottom to top.

8. The silicon-based capacitor according to claim 7, wherein: There is a substrate between the lower electrode structure and the upper electrode structure; the thickness of the substrate is greater than or equal to 0.

9. The silicon-based capacitor according to claim 8, characterized in that When the silicon-based capacitor includes a substrate, the lower electrode structure is a metal electrode layer; when the silicon-based capacitor does not include a substrate, the lower electrode structure includes a dielectric material layer and an electrode material layer formed by staggered stacking.

10. The silicon-based capacitor according to claim 7, wherein: The upper electrode structure includes a dielectric material layer and an electrode material layer formed by alternating stacking.

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