Image sensing device

Abstract

The invention relates to an image sensing device. The image sensing device includes: a semiconductor substrate; a plurality of unit pixels supported by the semiconductor substrate and arranged in a first direction and a second direction intersecting the first direction to form a pixel array, a plurality of unit pixels each including a photoelectric conversion element configured to convert light incident on the photoelectric conversion element into photocharges, and a plurality of floating diffusion regions disposed above the photoelectric conversion element to receive and store the photocharges; and a plurality of transfer gates supported by the semiconductor substrate and disposed between adjacent unit pixels, and configured to isolate the adjacent unit pixels from each other, and transfer photocharges generated by the photoelectric conversion element to the plurality of floating diffusion regions.

Description

Technical Field

[0001] The technologies and implementations disclosed in this patent document generally relate to image sensing devices capable of sensing the distance to a target object. Background Art

[0002] Image sensing devices are devices used to capture optical images by converting light into electrical signals using photosensitive semiconductor materials that react to light. With the development of the automotive, medical, computer, and communications industries, the demand for high-performance image sensing devices is increasing in various fields such as smartphones, digital cameras, game consoles, the Internet of Things (IoT), robotics, security cameras, and medical micro-cameras.

[0003] In order to acquire a three-dimensional (3D) image using an image sensing device, information about the distance (or depth) between a target object and the image sensing device is required.

[0004] There has been development and research on the use of image sensors to measure range and depth (i.e., the distance to the target object). For example, the demand for technology for measuring range and depth using image sensors has been rapidly increasing in various devices such as security devices, medical devices, automobiles, game consoles, virtual reality (VR) / augmented reality (AR) devices, mobile devices, etc. The methods for measuring distance (or depth) information using one or more image sensors are mainly divided into triangulation, time of flight (TOF) and interferometry. Among the above-mentioned depth measurement methods, the time of flight (TOF) method has become popular due to its wide range of applications, high processing speed and cost advantages. Summary of the Invention

[0005] Various embodiments of the disclosed technology relate to an indirect TOF (Time of Flight) image sensing device capable of more efficiently transferring photocharges.

[0006] According to an embodiment of the disclosed technology, an image sensing device may include: a semiconductor substrate; a plurality of unit pixels supported by the semiconductor substrate and arranged in a first direction and a second direction intersecting the first direction to form a pixel array, each unit pixel including a photoelectric conversion element configured to convert light incident on the photoelectric conversion element into photocharges, and a plurality of floating diffusion regions arranged above the photoelectric conversion element to receive and store the photocharges; and a plurality of transfer gates supported by the semiconductor substrate and arranged between adjacent unit pixels, and configured to isolate the adjacent unit pixels from each other and transfer the photocharges generated by the photoelectric conversion element to the plurality of floating diffusion regions.

[0007] According to another embodiment of the disclosed technology, an image sensing device may include: a plurality of unit pixels, each unit pixel including a photoelectric conversion element configured to generate photocharges through photoelectric conversion of incident light, and a plurality of floating diffusion regions configured to receive the photocharges and store the received photocharges; and a plurality of transfer gates, the plurality of transfer gates being arranged in a substrate and surrounding each of the plurality of unit pixels and isolating each unit pixel from adjacent unit pixels, and the plurality of transfer gates being configured to transfer the photocharges generated by the photoelectric conversion element to the plurality of floating diffusion regions based on a plurality of demodulation control signals having different phases from each other.

[0008] It is to be understood that both the foregoing general description and the following detailed description of the disclosed technology are illustrative and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The foregoing and other features and advantageous aspects of the disclosed technology will become apparent with reference to the following detailed description when considered in conjunction with the accompanying drawings.

[0010] Figure 1 is a schematic diagram illustrating an example of an image sensing device according to an embodiment of the disclosed technology.

[0011] Figure 2 It shows Figure 1 A plan view of an example structure of a pixel array is shown.

[0012] Figure 3A is a diagram showing an embodiment of the disclosed technology. Figure 2 1 is a cross-sectional view of an example of a pixel array taken along line AA′ shown in FIG.

[0013] Figure 3B is a diagram showing an embodiment of the disclosed technology. Figure 2 0 is a cross-sectional view of an example of a pixel array taken along line BB′ shown in FIG.

[0014] Figure 4 is a circuit diagram illustrating an example circuit configuration of a pixel transistor formed in each unit pixel.

[0015] Figure 5 It shows that Figure 2 A timing diagram illustrating an example of the operation of an image sensing device of the structure.

[0016] Figure 6 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology.

[0017] Figure 7A is shown along Figure 60 is a cross-sectional view of an example of a pixel array taken along line XX′ shown in FIG.

[0018] Figure 7B is shown along Figure 6 0 is a cross-sectional view of an example of a pixel array taken along line YY′ shown in FIG.

[0019] Figure 8 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology.

[0020] Figure 9A It shows that Figure 8 A timing diagram showing an example of the operation of an image sensing device of the structure.

[0021] Figure 9B It shows Figure 8 Figure 4 shows the calculation of the phase difference between the modulated light and the incident light in the structure.

[0022] Figure 10 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology. DETAILED DESCRIPTION

[0023] This patent document provides implementations and examples of image sensing devices capable of detecting the distance to a target object, which can be used to substantially solve one or more technical problems or engineering problems and alleviate limitations or shortcomings encountered in some other image sensing devices. Some implementations of the disclosed technology provide examples of indirect TOF (time of flight) image sensing devices that can more efficiently transfer photocharges. Recognizing the above problems, the disclosed technology provides various implementations of indirect TOF image sensing devices that can more efficiently transfer photocharges generated in their substrates.

[0024] Reference will now be made in detail to specific embodiments, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. In the following description, detailed descriptions of related known configurations or functions incorporated herein will be omitted to avoid obscuring the subject matter.

[0025] Hereinafter, various embodiments will be described with reference to the accompanying drawings. However, it should be understood that the disclosed technology is not limited to specific embodiments, but includes various modifications, equivalents, and / or alternatives to the embodiments. Embodiments of the disclosed technology can provide various effects that can be directly or indirectly realized through the disclosed technology.

[0026] Figure 1 is a block diagram illustrating an example of an image sensing device ISD according to some implementations of the disclosed technology.

[0027] Reference Figure 1 , the image sensing device ISD can use the time-of-flight (TOF) method to measure the distance to the target object 1. The TOF method can be mainly divided into a direct TOF method and an indirect TOF method. After light has been emitted from a light source to the target object 1, the direct TOF method can measure the length of time in which the light is reflected from the target object 1 and returns to the image sensing device ISD, so that the direct TOF method can use the measured length of time to calculate the distance to the target object 1. The indirect TOF method can emit modulated light to the target object 1, can sense the light reflected from the target object 1, can calculate the phase difference between the modulated light and the reflected light, and can thereby indirectly measure the distance between the image sensing device ISD and the target object 1. Although the image sensing device ISD based on some implementations of the disclosed technology is designed to use the indirect TOF method, the scope or spirit of the disclosed technology is not limited thereto. In addition, the target object 1 does not only refer to an independent object, but can also refer to a scene captured by the image sensing device ISD.

[0028] The image sensing device ISD may include a light source 100 , a lens module 200 , a pixel array 300 , and a control block 400 .

[0029] The light source 100 may emit light toward the target object 1 upon receiving a modulated light signal (MLS) from the control block 400. The light source 100 may be a laser diode (LD) or a light emitting diode (LED) for emitting infrared (IR) light or visible light, or may be any one of a near-infrared laser (NIR), a point light source, a monochromatic light source combined with a white light lamp or a monochromator, and a combination of other laser sources. Although for ease of description, Figure 1 Only one light source 100 is shown, but the scope or spirit of the disclosed technology is not limited thereto, and a plurality of light sources may also be arranged near the lens module 200 .

[0030] The lens module 200 can collect light reflected from the target object 1 and can allow the collected light to be focused on the unit pixel (PX) of the pixel array 30. For example, the lens module 200 may include a focusing lens having a surface formed of glass or plastic or another cylindrical optical element having a surface formed of glass or plastic. The lens module 200 may include a plurality of lenses arranged to focus on the optical axis.

[0031] The pixel array 300 may include unit pixels arranged continuously in a two-dimensional (2D) matrix structure, in which the unit pixels are arranged along a column direction and a row direction perpendicular to the column direction. The unit pixels may be supported by a semiconductor substrate, for example, formed above a semiconductor substrate. Each unit pixel may convert incident light received through the lens module 200 into an electrical signal corresponding to the amount of incident light, and thus may output a pixel signal using the electrical signal. In this case, the pixel signal may be a signal indicating the distance to the target object 1. A photogate may be formed between adjacent unit pixels to transfer the photoelectrically converted photocharge to the floating diffusion region. The following will refer to Figure 2 The structure and operation of pixel array 300 are described with reference to the accompanying drawings.

[0032] The control block 400 can control the light source 100 to emit light to the target object 1, can process each pixel signal corresponding to the light reflected from the target object 1 by driving the unit pixel of the pixel array 300, and can use the processed result to measure the distance to the surface of the target object 1.

[0033] The control block 400 may include a row driver 410 , a demodulation driver 420 , a light source driver 430 , a timing controller (TC) 440 , and a readout circuit 450 .

[0034] For ease of description, the row driver 410 and the demodulation driver 420 may be collectively referred to as a control circuit.

[0035] The control circuit can drive the unit pixels of the pixel array 300 in response to the timing signals generated by the timing controller 440. The control circuit can generate a control signal capable of selecting and controlling at least one row line among the plurality of row lines. The control signal may include a demodulation control signal for driving a transfer gate, a reset signal for controlling a reset transistor, a boost signal for providing additional electrostatic capacitance, a select signal for controlling a select transistor, and the like. Although the row driver 410 and the demodulation driver 420 according to some implementations of the disclosed technology are configured independently of each other, the row driver 410 and the demodulation driver 420 according to some other implementations of the disclosed technology may also be implemented as a single component.

[0036] The light source driver 430 may generate a modulated light signal MLS capable of driving the light source 100 in response to a control signal from the timing controller 440. The modulated light signal MLS may be a signal modulated by a predetermined frequency.

[0037] The timing controller 440 may generate timing signals to control the row driver 410 , the demodulation driver 420 , the light source driver 430 , and the readout circuit 450 .

[0038] The readout circuit 450 can process the pixel signals received from the pixel array 300 under the control of the timing controller 440, and thus can generate pixel data in the form of digital signals. To this end, the readout circuit 450 may include a correlated double sampler (CDS) circuit for performing correlated double sampling (CDS) on the pixel signals generated from the pixel array 300. In addition, the readout circuit 450 may include an analog-to-digital converter (ADC) for converting the output signal of the CDS circuit into a digital signal. In addition, the readout circuit 450 may include a buffer circuit that temporarily stores the pixel data generated from the analog-to-digital converter (ADC) and outputs the pixel data under the control of the timing controller 440.

[0039] The light source 100 can emit light modulated by a predetermined frequency (i.e., modulated light) toward the target object 1. The image sensing device ISD can sense the modulated light (i.e., incident light) reflected from the target object 1, and can thereby generate depth information for each unit pixel (PX). A time delay based on the distance between the image sensing device ISD and each target object 1 may occur between the modulated light and the incident light. The time delay can be represented by a phase difference between a signal generated by the image sensing device and a modulated light signal MLS that controls the light source 100. An image processor (not shown) can calculate the phase difference generated in the output signal of the image sensing device, and can thereby generate a depth image including depth information for each unit pixel (PX).

[0040] Figure 2 It shows Figure 1 A plan view of an example structure of a pixel array is shown. Figure 3A is a diagram showing an embodiment of the disclosed technology. Figure 2 1 is a cross-sectional view of an example of a pixel array taken along line AA′ shown in FIG. Figure 3B is a diagram showing an embodiment of the disclosed technology. Figure 2 0 is a cross-sectional view of an example of a pixel array taken along line BB′ shown in FIG. Figure 4 is a circuit diagram illustrating an example circuit configuration of a pixel transistor formed in each unit pixel.

[0041] Reference Figure 2 、 Figure 3A 、 Figure 3B and Figure 4 , the pixel array 300 may include a substrate 310 , a photoelectric conversion element 320 , a transfer gate ( 330A, 330B), a floating diffusion region (FD_A, FD_B), and a pixel transistor 340 .

[0042] The substrate 310 may include a semiconductor substrate, for example, a P-type semiconductor substrate. The substrate 310 may include a first surface (for example, a rear surface) on which light is incident and a second surface (for example, a front surface) including the pixel transistor 340 formed thereon while facing the first surface or opposite to the first surface. Figure 3A and Figure 3B , the bottom surface of the substrate 310 may be the first surface, and the top surface of the substrate 310 may be the second surface.

[0043] A P-type well region may be formed from the second surface of the substrate 310 to a predetermined depth, and a device isolation structure (ISO) may be formed in the well region for isolating the floating diffusion region (FD_A, FD_B) from the pixel transistor 340. The device isolation structure (ISO) may include a shallow trench isolation (STI) structure in which an insulating material is buried in a trench in which the second surface of the substrate 310 is etched to a predetermined depth.

[0044] The photoelectric conversion element 320 supported by the substrate 310 may be Figure 3A In the example shown in FIG, the photoelectric conversion element 320 is formed in the substrate 310 and can generate and accumulate photocharges by photoelectric conversion of incident light. Each photoelectric conversion element 320 may include N-type impurities. According to an embodiment, the photoelectric conversion element 320 may be formed by stacking a plurality of doped regions. In this case, N + A lower doping region may be formed by implanting N-type ions, and an upper doping region may be formed by implanting N-type ions. Each photoelectric conversion element 320 may be arranged to occupy as large an area as possible to increase a fill factor indicating light reception (Rx) efficiency.

[0045] One or more photoelectric conversion elements 320 may be formed for each unit pixel (PX). In the example device disclosed herein, one photoelectric conversion element 320 is shown in each unit pixel (PX). In some implementations, as Figure 2 As shown, the region defined by the four transfer gates (330A, 330B) may be a unit pixel (PX) region. Figure 2 In the example shown, transfer gates 330A and 330B are provided on four sides of the unit pixel (PX).

[0046] The unit pixels (PX) and the transfer gates (330A, 330B) may be alternately formed in a first direction (eg, X-axis direction) and a second direction (eg, Y-axis direction) like chess pieces on a chessboard. Figure 2In an example, the transfer gate 330A and the transfer gate 330B are arranged on different sides of the unit pixel along the first direction and the second direction. For example, when viewed in a plane, each of the unit pixel (PX) and the transfer gates (330A, 330B) can have a rectangular shape with the same area (i.e., the same horizontal cross-sectional area). One of the transfer gates (330A, 330B) can be formed between unit pixels (PX) adjacent to each other in the first direction and the second direction. In some implementations, the transfer gates (330A, 330B) can be arranged to be interleaved with the unit pixels in the first direction and the second direction. For example, along the first direction, if the transfer gate 330A is arranged on the left side of the unit pixel (PX), the transfer gate 330B is arranged on the right side of the unit pixel (PX). Along the second direction, if the transfer gate 330A is arranged on the upper side of the unit pixel (PX), the transfer gate 330B is arranged on the bottom side of the unit pixel (PX).

[0047] The transfer gates (330A, 330B) can operate based on the demodulated control signal to alternately transfer or transmit the photocharges (electrons) generated by the photoelectric conversion element 320 to the floating diffusion regions (FD_A, FD_B). For example, for each unit pixel (PX), the two transfer gates 330A and the two transfer gates 330B can operate alternately, so that the two transfer gates 330A can transfer or transmit the photocharges generated by the photoelectric conversion element 320 to the floating diffusion region FD_A, and the two transfer gates 330B can transfer or transmit the photocharges generated by the photoelectric conversion element 320 to the floating diffusion region FD_B.

[0048] In addition to transferring photocharges, the transfer gates (330A, 330B) may also be formed and constructed to surround each photoelectric conversion element 320 within the substrate 310, thereby physically isolating the photoelectric conversion elements 320 of adjacent unit pixels (PX) from each other. Thus, each transfer gate is a dual-function circuit element that is used to transfer photocharges and provide isolation or a barrier between adjacent unit pixels. For example, each of the transfer gates (330A, 330B) may be formed to have a horizontal cross-section having a rectangular shape, and the corner (or edge) regions of the transfer gates that are adjacent to each other in a diagonal direction (e.g., the XY direction and the -XY direction) may be arranged to contact each other so that each unit pixel (PX) may be formed to be surrounded by four transfer gates (330A, 330B). In Figure 2 In the example of FIG. 5 , four transfer gates including two transfer gates 330A and two transfer gates 330B are disposed to surround the unit pixel (PX).

[0049] In some implementations, for each unit pixel (PX), two transfer gates 330A adjacent to each other in a first diagonal direction (e.g., XY direction) can operate together based on a demodulation control signal (CSa) to transfer photocharges generated by the photoelectric conversion element 320 to the floating diffusion region (FD_A). Furthermore, two transfer gates 330B adjacent to each other in the first diagonal direction and parallel to the transfer gates 330A can operate together based on a demodulation control signal (CSb) to transfer photocharges generated by the photoelectric conversion element 320 to the floating diffusion region (FD_B).

[0050] Each of the transfer gates (330A, 330B) may be formed in a square column shape penetrating the substrate 310. For example, the transfer gate 330A may include a stacked structure in which an insulating material 332a and a conductive material 334a are stacked in a trench etched from the second surface (front surface) of the substrate 310, and the transfer gate 330B may include a stacked structure in which an insulating material 332b and a conductive material 334b are stacked in a trench etched from the second surface (front surface) of the substrate 310. Each of the insulating materials (332a, 332b) may include an oxide layer, and each of the conductive materials (334a, 334b) may include polysilicon doped with conductive impurities.

[0051] In this manner, the transfer gates (330A, 330B) can be extended to a position close to the bottom surface of the substrate 310 and can be formed to surround the photoelectric conversion element 320, so that photocharges generated from a deeper lower region of the photoelectric conversion element 320 can also be transferred to the floating diffusion regions (FD_A, FD_B), thereby preventing such photocharges from entering the floating diffusion regions of adjacent unit pixels and thus reducing or preventing undesirable crosstalk between adjacent pixel regions (PX). Although Figure 3A and Figure 3B 3 is a cross-sectional view showing an example of transfer gates 330A and 330B formed to penetrate substrate 310, but other implementations are possible. For example, it should be noted that transfer gates (330A, 330B) may extend to a position close to the bottom surface of substrate 310 without penetrating substrate 310.

[0052] As from Figure 2As can be seen, the transfer gates 330A receiving the demodulation control signal (CSa) can be continuously arranged on a first diagonal line in a first diagonal direction, and the transfer gates 330B receiving the demodulation control signal (CSb) can be continuously arranged on a second diagonal line in the first diagonal direction, and the second diagonal line is parallel to the first diagonal line along which the transfer gates 300A are arranged. In an example, the transfer gates 330A and the transfer gates 330B can be alternately arranged in a second diagonal direction (e.g., -XY direction). For example, the transfer gates 330A and the transfer gates 330B can be alternately arranged on a third diagonal line that intersects the first diagonal line and the second diagonal line. Figure 2 The arrangement of transfer gates 330A and 330B shown is only an example, and other implementations are possible. Figure 2 Differently, the transfer gates 330A and 330B may be arranged alternately in a first diagonal direction, the transfer gates 330A may be arranged continuously on a line along a second diagonal direction, and the transfer gates 330B may be arranged continuously on another line along the second diagonal direction and parallel to the line along which the transfer gates 330A are arranged.

[0053] The floating diffusion regions (FD_A, FD_B) may be formed in the upper portion of the substrate 310 so as to contact the second surface (front surface) of the substrate 310. The floating diffusion region FD_A may be disposed in contact with the transfer gate 330A at a corner region where the two surfaces of each unit pixel (PX) meet. The floating diffusion region FD_B may be disposed in contact with the transfer gate 330B at a corner region where the two surfaces of each unit pixel (PX) meet. For example, the floating diffusion regions FD_A and FD_B may be located in two corner regions facing each other among the four corner regions of the unit pixel (PX). In an example, one floating diffusion region FD_A and one floating diffusion region FD_B may be located in two corner regions facing each other among the four corner regions of the unit pixel (PX). In this case, the floating diffusion region FD_A may be located in one corner region in contact with two transfer gates 330A, and the floating diffusion region FD_B may be located in a corner region in contact with two transfer gates 330B.

[0054] The floating diffusion regions FD_A adjacent to each other in the second diagonal direction may be isolated from each other by the transfer gate 330A, and the floating diffusion regions FD_B adjacent to each other in the second diagonal direction may be isolated from each other by the transfer gate 330B. The floating diffusion regions (FD_A, FD_B) may be doped with a high concentration of N-type (N + ) impurities.

[0055] The pixel transistor 340 may include a transistor for outputting a pixel signal corresponding to the photocharge stored in the floating diffusion region (FD_A, FD_B). For example, the pixel transistor 340 may include a reset transistor (RX1, RX2), a source follower transistor (DX1, DX2), and a select transistor (SX1, SX2).

[0056] The source / drain regions of the reset transistors (RX1, RX2) can be connected to the power supply voltage (VDD) node and the floating diffusion regions (FD_A, FD_B), and the reset transistors (RX1, RX2) can initialize the floating diffusion regions (FD_A, FD_B) based on the reset signals (RS1, RS2) applied to their gate regions. In more detail, the source / drain regions of the reset transistor RX1 can be connected to the power supply voltage (VDD) node and the floating diffusion region FD_A, and the source / drain regions of the reset transistor RX2 can be connected to the power supply voltage (VDD) node and the floating diffusion region FD_B. Respectively, the source / drain regions of the source follower transistors (DX1, DX2) can be connected to the power supply voltage (VDD) node and the select transistors (SX1, SX2), and the gate regions of the source follower transistors (DX1, DX2) can be connected to the floating diffusion regions (FD_A, FD_B). In more detail, the source / drain region of the source follower transistor DX1 can be connected to the power supply voltage (VDD) node and the selection transistor SX1, and the source / drain region of the source follower transistor DX2 can be connected to the power supply voltage (VDD) node and the selection transistor SX2. The source follower transistor DX1 can generate and output a pixel signal corresponding to the magnitude of the voltage generated by the photocharge accumulated in the floating diffusion area FD_A. The source follower transistor DX2 can generate and output a pixel signal corresponding to the magnitude of the voltage generated by the photocharge accumulated in the floating diffusion area FD_B. The source / drain region of the selection transistors (SX1, SX2) can be connected to the source follower transistor (DX) and the output node (OUT), and the selection transistors (SX1, SX2) can output the pixel signal output from the source follower transistors (DX1, DX2) to the output node (OUT1, OUT2) based on the selection signal (SS1, SS2) applied to its gate terminal. More specifically, the selection transistor SX1 can output the pixel signal output from the source follower transistor DX1 to the output node OUT1 based on the selection signal SS1 applied to its gate terminal, and the selection transistor SX2 can output the pixel signal output from the source follower transistor DX2 to the output node OUT1 based on the selection signal SS2 applied to its gate terminal.

[0057] Figure 5 It shows that Figure 2A timing diagram illustrating an example of the operation of an image sensing device of the structure.

[0058] In more detail, Figure 5 Modulated light (ML), incident light (IL), and first and second demodulation control signals (CSa, CSb) are exemplarily shown.

[0059] Reference Figure 5 , the modulated light (ML) may refer to light emitted by the light source 100 controlled by the control block 400 toward the target object 1. The modulated light (ML) may be generated to alternately have a high-level portion (i.e., a period in which light is emitted) and a low-level portion (i.e., a period in which no light is emitted).

[0060] The incident light (IL) may refer to light incident on the substrate to generate electron-hole pairs through photoelectric conversion. The incident light (IL) may have a phase difference (θ1) that varies with the distance between the image sensing device ISD and the target object 1.

[0061] The level of each of the modulated light (ML) and the incident light (IL) may refer to the intensity of light.

[0062] When electrons generated by the incident light (IL) are captured, each of the first demodulation control signal (CSa) and the second demodulation control signal (CSb) can alternately have a deactivation voltage (L) indicating a low level and an activation voltage (H) indicating a high level. For example, the first demodulation control signal (CSa) can be used as a signal for operating the transfer gate 330A and can have the same phase as the modulated light (ML). In addition, the second demodulation control signal (CSb) can be used as a signal for operating the transfer gate 330B and can have a phase difference of 180° (π) relative to the modulated light (ML). In some implementations, for ease of description, it is assumed that there is no phase difference between the modulated light signal MLS that generates the modulated light (ML) and the modulated light (ML), so that the modulated light signal MLS and the modulated light (ML) can have the same phase.

[0063] In the first period PR1, the first demodulation control signal (CSa) may have an activation voltage (H), and the second demodulation control signal (CSb) may have a deactivation voltage (L). Therefore, electrons generated by the incident light (IL) received in the first period PR1 may be captured in the floating diffusion region FD_A through the transfer gate 330A. In this case, the electrons captured in the floating diffusion region FD_A during the first period PR1 may be hereinafter referred to as "Q(0)".

[0064] In the second period PR2, the first demodulation control signal (CSa) may have a deactivation voltage (L), and the second demodulation control signal (CSb) may have an activation voltage (H). Therefore, electrons generated by the incident light (IL) received in the second period PR2 may be captured in the floating diffusion region FD_B through the transfer gate 330B. In this case, the electrons captured in the floating diffusion region FD_B during the second period PR2 may be hereinafter represented as "Q(π)".

[0065] Electrons generated by incident light (IL) having a phase difference (θ1) that varies with the distance between the image sensing device ISD and the target object 1 can be captured in the floating diffusion region FD_A through the transfer gate 330A in the first period PR1, and can be captured in the floating diffusion region FD_B through the transfer gate 330B in the second period PR2.

[0066] The total charge generated by the incident light (IL) can be defined as the sum of Q(0) and Q(π), and Q(0) and Q(π) can vary depending on the phase difference (θ1). As the phase difference (θ1) increases, Q(π) can increase linearly and Q(0) can decrease linearly. Therefore, the phase difference (θ1) can be calculated based on the ratio between Q(0) and Q(π).

[0067] For example, the phase difference (θ1) can be calculated as presented by the following Equation 1.

[0068] [Formula 1]

[0069]

[0070] An image processor (not shown) may calculate the ratio between Q(0) and Q(π) for each unit pixel, may calculate the phase difference (θ1) based on the calculated ratio, and thereby may obtain the distance between the image sensing device ISD and the target object 1 .

[0071] Figure 6 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology. Figure 7A is shown along Figure 6 0 is a cross-sectional view of an example of a pixel array taken along line XX′ shown in FIG. Figure 7B is shown along Figure 6 0 is a cross-sectional view of an example of a pixel array taken along line YY′ shown in FIG.

[0072] exist Figure 6 、 Figure 7A and Figure 7B In, with Figure 2 、 Figure 3A and Figure 3BThe same constituent elements are denoted by the same reference numerals, and thus, detailed descriptions thereof will be omitted herein for ease of description.

[0073] Reference Figure 6 、 Figure 7A and Figure 7B In this embodiment, the components of the transfer gate (330A', 330B') are structurally similar to those described above. Figure 2 、 Figure 3A and Figure 3B The transfer gates (330A, 330B) shown in FIG. 5 are different.

[0074] In such Figure 6 、 Figure 7A and Figure 7B In the example shown, transfer gates 330A' and 330B' have the same Figure 2 、 Figure 3A and Figure 3B The shapes shown in the examples shown are different shapes. Figure 6 、 Figure 7A and Figure 7B , the transfer gate 330A′ may include a recessed gate 330Ra and a planar gate 330Pa, and the transfer gate 330B′ may include a recessed gate 330Rb and a planar gate 330Pb.

[0075] Each of the recessed gates (330Ra, 330Rb) may be formed in a square column shape penetrating the substrate 310. The recessed gate 330Ra may include a stacked structure in which an insulating material 332a and a conductive material 334a are stacked in a groove etched from the second surface (front surface) of the substrate 310, so that the stacked structure can penetrate the substrate 310. The recessed gate 330Rb may include a stacked structure in which an insulating material 332b and a conductive material 334b are stacked in a groove etched from the second surface (front surface) of the substrate 310, so that the stacked structure can penetrate the substrate 310. For example, the recessed gates 330Ra and 330Rb may be similar to the above-mentioned Figure 2 、 Figure 3A and Figure 3B The transfer gates 330A and 330B in the pixel array 300 are formed in the same structure. In an example, the recessed gates 330Ra and 330Rb may be formed at the same positions as the transfer gates 330A and 330B in the pixel array 300.

[0076] The planar gates 330Pa and 330Pb may be connected to the top surfaces of the respective recessed gates 330Ra and 330Rb and may partially extend to the pixel region (PX). For example, when viewed in a plane, each of the planar gates 330Pa and 330Pb may be formed in a cross ("+") shape extending from the center of the top surface of each of the recessed gates 330Ra and 330Rb toward four adjacent pixel regions (PX). For example, each of the planar gates 330Pa and 330Pb has a portion disposed above the pixel region (PX). Although each of the recessed gates 330Ra and 330Rb is disposed on the side of the photoelectric conversion element 320 of the corresponding pixel region (PX), each of the planar gates 330Pa and 330Pb has a portion disposed above the recessed gates 330Ra and 330Rb and another portion disposed above the photoelectric conversion element 320 of the corresponding pixel region (PX). The planar gate 330Pa may protrude from each surface of the recessed gate 330Ra to the pixel region (PX) by a preset length corresponding to the length of the floating diffusion region FD_A, and the planar gate 330Pb may protrude from each surface of the recessed gate 330Rb to the pixel region (PX) by a preset length corresponding to the length of the floating diffusion region FD_B.

[0077] Planar gate 330Pa may include insulating material 336a and conductive material 338a, and planar gate 330Pb may include insulating material 336b and conductive material 338b. Insulating material 336a may be formed to extend from insulating material 332a to the top surface of substrate 310. Insulating material 336b may be formed to extend from insulating material 332b to the top surface of substrate 310. Each of insulating materials 336a and 336b may include an oxide layer. Conductive material 338a may be formed over insulating material 336a while contacting the top surface of conductive material 334a of recessed gate 330Ra. Conductive material 338b may be formed over insulating material 336b while contacting the top surface of conductive material 334b of recessed gate 330Rb. Each of conductive materials 338a and 338b may include polysilicon doped with conductive impurities.

[0078] As described above, in the transfer gates 330A' and 330B', the recessed gates 330Ra and 330Rb may be formed to penetrate the substrate 310 and may transfer photocharges generated in the deeper lower region of the photoelectric conversion element 320 to the floating diffusion regions FD_A and FD_B. Furthermore, the planar gates 330Pa and 330Pb may be formed to extend to the top surface of the substrate 310 in the pixel region (PX) to surround the floating diffusion regions FD_A and FD_B, thereby also applying a potential to the top surface of the substrate 310. Consequently, photocharges may be more efficiently transferred to the floating diffusion regions FD_A and FD_B.

[0079] Figure 8 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology.

[0080] With the above Figure 2 Compared with the implementation method, Figure 8 This implementation method is similar to Figure 2 The embodiments of the present invention differ in terms of a floating diffusion region (FD_A, FD_B, FD_C, FD_D) formed in each unit pixel (PX).

[0081] Each unit pixel (PX) may be surrounded by four transfer gates (330A, 330B, 330C, 330D). The four transfer gates 330A, 330B, 330C, 330D may isolate one unit pixel from other unit pixels. Furthermore, each unit pixel (PX) may include four floating diffusion regions (FD_A, FD_B, FD_C, FD_D). The transfer gates (330A, 330B, 330C, 330D) may operate independently based on four demodulation control signals having different phases.

[0082] The floating diffusion regions (FD_A, FD_B, FD_C, FD_D) may be arranged in a one-to-one correspondence with the transfer gates (330A, 330B, 330C, 330D). The floating diffusion regions (FD_A, FD_B, FD_C, FD_D) may be located on each side surface of the unit pixel (PX) while being in contact with the side surfaces of the transfer gates (330A, 330B, 330C, 330D). The floating diffusion regions (FD_A, FD_B, FD_C, FD_D) may be formed in an upper portion of the semiconductor substrate, as described above. Figure 3A and Figure 3B As shown in . Figure 3A and Figure 3B Unlike the example shown in , the floating diffusion regions (FD_A, FD_B, FD_C, FD_D) may be in contact with central portions of side surfaces of corresponding transfer gates (330A, 330B, 330C, 330D) in the upper portion of the semiconductor substrate. Figure 8 In the example, the remaining components except the floating diffusion area (FD_A, FD_B, FD_C, FD_D) can be connected with Figure 2 、 Figure 3A and Figure 3B Therefore, for the sake of brevity, detailed descriptions of the remaining components except for the floating diffusion region (FD_A, FD_B, FD_C, FD_D) will be omitted herein.

[0083] Figure 9A It shows that Figure 8 A timing diagram illustrating an example of the operation of an image sensing device of the structure. Figure 9B It shows Figure 8 Figure 4 shows the calculation of the phase difference between the modulated light and the incident light in the structure.

[0084] Reference Figure 9A , shows the modulated light (ML), incident light (IL) and demodulation control signals (CSa, CSb, CSc, CSd). Figure 9A The modulated light (ML) and incident light (IL) shown in Figure 5 The modulated light (ML) and the incident light (IL) described in are substantially the same, and therefore, for convenience of description, a detailed description thereof will be omitted herein.

[0085] The incident light (IL) may have a phase difference (θ2) that varies with the distance between the image sensing device ISD and the target object 1 .

[0086] When electrons generated by the incident light (IL) are captured, the demodulation control signals (CSa, CSb, CSc, CSd) may alternately have a deactivation voltage (L) indicating a low level and an activation voltage (H) indicating a high level. For example, the first demodulation control signal (CSa) may be used as a signal for operating the transfer gate 330A and may have the same phase as the modulated light (ML) (i.e., a phase difference of 0°). The second demodulation control signal (CSb) may be used as a signal for operating the transfer gate 330B and may have a phase difference of 180 degrees (π) relative to the modulated light (ML). The third demodulation control signal (CSc) may be used as a signal for operating the transfer gate 330C and may have a phase difference of 90 degrees (π / 2) relative to the modulated light (ML). The fourth demodulation control signal (CSd) may be used as a signal for operating the transfer gate 330D and may have a phase difference of 270 degrees (3π / 2) relative to the modulated light (ML).

[0087] In the first period PR1, the first demodulation control signal (CSa) may have an activation voltage, and electrons generated by incident light (IL) received in the first period PR1 may be captured in the floating diffusion region FD_A through the transfer gate 330A. In this case, the electrons captured in the floating diffusion region FD_A in the first period PR1 may be hereinafter referred to as "Q(0)".

[0088] In the second period PR2, the second demodulation control signal (CSb) may have an activation voltage, and electrons generated by the incident light (IL) received in the second period PR2 may be captured in the floating diffusion region FD_B through the transfer gate 330B. In this case, the electrons captured in the floating diffusion region FD_B in the second period PR2 may be hereinafter represented as "Q(π)".

[0089] In the third period PR3, the third demodulation control signal (CSc) may have an activation voltage, and electrons generated by the incident light (IL) received in the third period PR3 may be captured in the floating diffusion region FD_C through the transfer gate 330C. In this case, the electrons captured in the floating diffusion region FD_C in the third period PR3 may be hereinafter represented as "Q(π / 2)".

[0090] In the fourth period PR4, the fourth demodulation control signal (CSd) may have an activation voltage, and electrons generated by the incident light (IL) received in the fourth period PR4 may be captured in the floating diffusion region FD_D through the transfer gate 330D. In this case, the electrons captured in the floating diffusion region FD_D in the fourth period PR4 may be hereinafter represented as "Q(3π / 2)".

[0091] Electrons generated by incident light (IL) having a phase difference (θ2) that varies with the distance between the image sensing device ISD and the target object 1 can be captured in the floating diffusion area FD_A in the first period PR1, can be captured in the floating diffusion area FD_B in the second period PR2, can be captured in the floating diffusion area FD_C in the third period PR3, or can be captured in the floating diffusion area FD_D in the fourth period PR4.

[0092] Reference Figure 9B , a graph showing the relationship between the phase difference (θ2) and the detected electrons Q(0), Q(π / 2), Q(π), and Q(3π / 2) is shown. Figure 9B In the diagram, the Y-axis may represent the difference in the amount of charge, and the X-axis may represent the phase difference.

[0093] For ease of description, it is assumed that electrons generated by incident light (IL) incident on the pixel group are captured while being divided into a first period PR1 and a second period PR2 or a third period PR3 and a fourth period PR4, and that the amount of charge captured in the first period PR1 and the second period PR2 is equal to the amount of charge captured in the third period PR3 and the fourth period PR4. That is, the total charge generated by the incident light (IL) can be defined as the sum of Q(0) and Q(π) or the sum of Q(π / 2) and Q(3π / 2).

[0094] In addition, the absolute value of the difference between Q(0) and Q(π) will be defined as ΔQ(0)=|Q(0)-Q(π)| below, and the absolute value of the difference between Q(π / 2) and Q(3π / 2) will be defined as ΔQ(π / 2)=|Q(π / 2)-Q(3π / 2)| below. Since the first demodulation control signal (CSa) for obtaining Q(0) and the second demodulation control signal (CSb) for obtaining Q(π) have a phase difference of 90° relative to the third demodulation control signal (CSc) for obtaining Q(π / 2) and the fourth demodulation control signal (CSd) for obtaining Q(3π / 2), the sum of ΔQ(0) and ΔQ(π / 2) can have a constant value (i.e., the total amount of electrons).

[0095] For the sum of ΔQ(0) and ΔQ(π / 2) having a constant value, ΔQ(0) and ΔQ(π / 2) are changed in accordance with the phase difference (θ2). Figure 9B In the figure. That is, as the phase difference (θ2) increases, ΔQ(0) linearly decreases in the period when the phase difference (θ2) is in the range of 0 to π, and then linearly increases in the period when the phase difference (θ2) is in the range of π to 2π. ΔQ(π / 2) can linearly increase in the period when the phase difference (θ2) is in the range of 0 to π / 2, can linearly decrease in the period when the phase difference (θ2) is in the range of π / 2 to 3π / 2, and can linearly increase in the period when the phase difference (θ2) is in the range of 3π / 2 to 2π. Therefore, the phase difference can be calculated based on the ratio relationship between ΔQ(0) and ΔQ(π / 2).

[0096] For example, the phase difference (θ2) can be calculated as presented by the following Equation 2.

[0097] [Formula 2]

[0098]

[0099] An image processor (not shown) can calculate ΔQ(0) and ΔQ(π / 2) based on image data corresponding to Q(0), Q(π), Q(π / 2) and Q(3π / 2), and can calculate the phase difference by calculating the ratio between ΔQ(0) and ΔQ(π / 2), and thereby obtain the distance between the image sensing device (ISD) and the target object 1.

[0100] As shown in this embodiment, according to the four-phase modulation method, the phase difference can be calculated using differential values such as ΔQ(0) and ΔQ(π / 2). The component caused by background noise included in each of Q(0), Q(π), Q(π / 2), and Q(3π / 2) can be removed (or eliminated), thereby more accurately calculating the distance to the target object. In addition, since the image sensing device can simultaneously obtain Q(0), Q(π), Q(π / 2), and Q(3π / 2) with only a single image capture, the distance calculation speed can be increased, and the distance to an object moving at high speed can be precisely calculated with higher accuracy.

[0101] Figure 10 is a plan view showing an example structure of a pixel array according to another embodiment of the disclosed technology.

[0102] Reference Figure 10 Each unit pixel (PX) may include a photoelectric conversion element and may be formed to be surrounded by four transfer gates (330A", 330B") including two transfer gates 330A" and two transfer gates 330B". The transfer gates 330A" and 330B" surrounding the unit pixel (PX) can isolate the unit pixel (PX) from adjacent unit pixels.

[0103] Each of the transfer gates 330A" and 330B" may have a rectangular horizontal cross-section and may be formed in a square column shape penetrating the substrate. Figure 3A and Figure 3B Transfer gates 330A and 330B are shown in the same manner, Figure 10 The transfer gates 330A" and 330B" shown may include a stacked structure in which an insulating material and a conductive material are stacked in a trench etched from the second surface (front surface) of the substrate.

[0104] The transfer gates (330A", 330B") may be configured such that corner regions of the transfer gates (330A", 330B") are connected to each other, and the long axis sides of the transfer gates (330A", 330B") are in contact with the unit pixel (PX), so that the transfer gates (330A", 330B") may be formed to surround the unit pixel (PX). The transfer gates (330A", 330B") may be located between adjacent unit pixels (PX) in the first direction and the second direction. At this time, the transfer gates 330A" and the transfer gates 330B" may be alternately arranged in the first direction and the second direction.

[0105] The transfer gates 330A" and 330B" can operate based on the demodulation control signal to transfer the photocharges (electrons) generated by the photoelectric conversion element to the floating diffusion areas FD_A and FD_B. For example, for each unit pixel (PX), the two transfer gates 330A" can operate according to the first demodulation control signal to transfer the photocharges generated by the photoelectric conversion element to the floating diffusion area FD_A. The two transfer gates 330B" can operate according to the second demodulation control signal to transfer the photocharges generated by the photoelectric conversion element to the floating diffusion area FD_B. At this time, it can be like Figure 5 The demodulation control signals (CSa, CSb) shown activate both the first demodulation control signal and the second demodulation control signal.

[0106] The floating diffusion region FD_A may be positioned to contact the corner region of the transfer gate 330A″ within each pixel region (PX), and the floating diffusion region FD_B may be positioned to contact the corner region of the transfer gate 330B″ within each pixel region (PX). For example, the floating diffusion regions FD_A and FD_B may be located in two corner regions facing each other among the four corner regions of each unit pixel (PX). At this time, the floating diffusion region FD_A may be positioned in the corner region adjacent to the two transfer gates 330A″, and the floating diffusion region FD_B may be positioned in the corner region adjacent to the two transfer gates 330B″.

[0107] As is apparent from the above description, an indirect TOF image sensing device based on some implementations of the disclosed technology can more efficiently transfer photocharges generated in its substrate.

[0108] The embodiments of the disclosed technology can provide various effects that can be directly or indirectly recognized through the above-mentioned patent documents.

[0109] Although a number of illustrative embodiments have been described, it should be understood that various modifications or enhancements to the disclosed embodiments and / or other embodiments may be devised based on what is described and / or illustrated in this patent document.

[0110] CROSS-REFERENCE TO RELATED APPLICATIONS

[0111] This patent document claims priority to and the benefit of Korean Patent Application No. 10-2024-0019196, filed on February 7, 2024, which is hereby incorporated by reference in its entirety as a part of the disclosure of this patent document.

Claims

1. An image sensing device, comprising: semiconductor substrates; a plurality of unit pixels supported by the semiconductor substrate and arranged in a first direction and a second direction intersecting the first direction to form a pixel array, each unit pixel including a photoelectric conversion element and a plurality of floating diffusion regions, the photoelectric conversion element converting light incident thereto into photocharges, and the plurality of floating diffusion regions being disposed above the photoelectric conversion element to receive and store the photocharges; as well as A plurality of transfer gates are supported by the semiconductor substrate and disposed between adjacent unit pixels, and the plurality of transfer gates isolate the adjacent unit pixels from each other and transfer the photocharges generated by the photoelectric conversion element to the plurality of floating diffusion regions.

2. The image sensing device according to claim 1, wherein Each of the plurality of transfer gates has a horizontal cross-section in a rectangular shape, and corner regions of adjacent transfer gates arranged in a diagonal direction between the first direction and the second direction contact each other.

3. The image sensing device according to claim 2, wherein: The plurality of transfer gates are formed to penetrate the semiconductor substrate.

4. The image sensing device according to claim 2, wherein: The plurality of transfer gates include: a first transfer gate formed to be in contact with a first side surface of the unit pixel; a second transfer gate formed in contact with a second side surface opposite to the first side surface; a third transfer gate formed in contact with a third side surface and having a corner portion in contact with a corner portion of the first transfer gate and a corner portion of the second transfer gate, the third side surface being in contact with each of the first side surface and the second side surface; A fourth transfer gate is formed in contact with a fourth side surface opposite to the third side surface and has a corner portion in contact with a corner portion of the first transfer gate and a corner portion of the second transfer gate.

5. The image sensing device according to claim 4, wherein: The first transfer gate and the third transfer gate operate based on a first demodulation control signal; and The second transfer gate and the fourth transfer gate operate based on a second demodulation control signal having a phase difference with respect to the first demodulation control signal.

6. The image sensing device according to claim 5, wherein: The plurality of floating diffusion regions include: a first floating diffusion region disposed in contact with side surfaces of the first transfer gate and the third transfer gate at a corner region where the first side surface and the third side surface meet each other; and A second floating diffusion region is provided to contact a side surface of the second transfer gate and a side surface of the fourth transfer gate at a corner region where the second side surface and the fourth side surface meet each other.

7. The image sensing device according to claim 4, wherein: The first to fourth transfer gates independently operate based on first to fourth demodulation control signals having different phases, respectively.

8. The image sensing device according to claim 7, wherein: Each of the plurality of unit pixels includes: a first floating diffusion region disposed in contact with a side surface of the first transfer gate; a second floating diffusion region disposed in contact with a side surface of the second transfer gate; a third floating diffusion region disposed in contact with a side surface of the third transfer gate; and A fourth floating diffusion region is provided to be in contact with a side surface of the fourth transfer gate.

9. The image sensing device according to claim 1, wherein: Each of the plurality of transfer gates comprises: a recessed gate formed to penetrate the semiconductor substrate; and A planar gate is connected to a top surface of the recessed gate and extends to be disposed above an adjacent unit pixel.

10. The image sensing device according to claim 9, wherein: When viewed in plane, the planar gate has a cross shape.

11. The image sensing device according to claim 1, wherein: One of the plurality of unit pixels is surrounded by four transfer gates connected to each other and isolated from adjacent unit pixels, the four transfer gates having corner regions in contact with each other.

12. An image sensing device, comprising: a plurality of unit pixels, each unit pixel including a photoelectric conversion element and a plurality of floating diffusion regions, the photoelectric conversion element generating photocharges by photoelectric conversion of incident light, and the plurality of floating diffusion regions receiving and storing the received photocharges; as well as a plurality of transfer gates disposed in a substrate and surrounding each of the plurality of unit pixels and isolating each unit pixel from adjacent unit pixels, the plurality of transfer gates transferring the photocharges generated by the photoelectric conversion element to the plurality of floating diffusion regions based on a plurality of demodulation control signals having different phases from each other.

13. The image sensing device according to claim 12, wherein: Each of the plurality of transfer gates and each of the plurality of unit pixels has a square shape having the same horizontal cross-sectional area.

14. The image sensing device according to claim 13, wherein: The plurality of floating diffusion regions are located in two corner regions facing each other among four corner regions of each of the plurality of unit pixels.

15. The image sensing device according to claim 13, wherein: The plurality of floating diffusion regions are positioned at a side surface of each of the plurality of unit pixels.

16. The image sensing device according to claim 12, wherein: Each of the plurality of transfer gates comprises: a recessed gate disposed in the substrate; and A planar gate is connected to a top surface of the recessed gate and extends to be disposed above an adjacent unit pixel.

17. The image sensing device according to claim 16, wherein: When viewed in plane, the planar gate has a cross shape.

18. The image sensing device according to claim 12, wherein: When viewed in plane, corner regions of the plurality of transfer gates are connected to each other, and long sides of the plurality of transfer gates are in contact with the unit pixel.

19. The image sensing device according to claim 12, wherein: The plurality of transfer gates are formed to penetrate the substrate.

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