Photoelectric co-packaging device and preparation method thereof

Abstract

The invention discloses a photoelectric co-packaging device and a preparation method thereof. The photoelectric co-packaging device comprises a diamond adapter plate, wherein the diamond adapter plate comprises a first surface and a second surface which are opposite to each other; a first through hole and a second through hole which penetrate through the first surface and the second surface are formed in the diamond adapter plate; the first through hole and the second through hole are arranged independently; a core layer and a wrapping layer wrapping the outer wall of the core layer are arranged in the first through hole, the diamond optical waveguide through hole is formed, and the refractive index of the core layer is larger than that of the wrapping layer; the diamond through hole and the second through hole are filled with conductive metal to form a diamond through hole, and the diamond through hole is electrically connected with the diamond adapter plate. The diamond adapter plate serves as a carrier of an electric module and a carrier of an optical module at the same time, a diamond through hole (TDV) and a diamond optical waveguide through hole (OTDV) are integrated in the diamond adapter plate, and a basis is provided for efficient conversion of photoelectric signals. Meanwhile, by means of the ultrahigh heat conduction characteristic of the diamond, the adapter plate can quickly lead out the heat of the chip, so that the heat management capability of the device is remarkably improved.

Description

Technical Field

[0001] The present application relates to the field of optoelectronic integration technology, and in particular, to an optoelectronic co-packaged device and a preparation method thereof. Background Art

[0002] With the rapid development of artificial intelligence, cloud computing, and 5G communications, traditional electronic interconnect technologies are facing the dual challenges of bandwidth limitations and power consumption barriers, making it difficult to meet the demands of high-density data transmission and processing. Optical interconnect technology, with its high bandwidth, low latency, and resistance to electromagnetic interference, has become a key technology for breaking through performance bottlenecks in data centers, high-performance computing (HPC), and communication networks. However, traditional optical modules (such as pluggable optical modules) are limited by their discrete packaging architecture and suffer from large size, high power consumption, and low electro-optical conversion efficiency, making them difficult to meet the high-density, low-power, and ultra-high-bandwidth requirements of next-generation systems.

[0003] Against this backdrop, Co-Packaged Optics (CPO) technology has emerged. By integrating electrical chips (such as application-specific integrated circuits / switch chips ASIC / Switch, electrical interface chips EIC) and optical chips (PIC) into the same package, CPO can not only significantly shorten the electrical-optical signal path, but also significantly improve the data transmission rate and energy efficiency.

[0004] It should be noted that the above statements are only used to provide background technical information related to this application and do not necessarily constitute prior art. Summary of the Invention

[0005] In a first aspect of the present application, the present application provides an optoelectronic co-packaged device, comprising: a diamond adapter plate, the diamond adapter plate comprising a first surface and a second surface opposite to each other; a first through hole and a second through hole penetrating the first surface and the second surface are provided on the diamond adapter plate; the first through hole and the second through hole are independently provided; a diamond optical waveguide through hole, the first through hole being provided with a core layer and a cladding covering an outer wall of the core layer to form the diamond optical waveguide through hole, the refractive index of the core layer being greater than the refractive index of the cladding; a diamond through hole, the second through hole being filled with a conductive metal to form the diamond through hole, the diamond through hole being electrically connected to the diamond adapter plate.

[0006] Therefore, the diamond adapter plate serves as a carrier for both electrical and optical modules, integrating diamond through-hole vias (TDVs) and diamond optical waveguide through-holes (OTDVs) inside, providing a basis for the efficient conversion of optical and electrical signals. At the same time, with the help of the ultra-high thermal conductivity of diamond, the adapter plate can quickly dissipate heat from the chip, thereby significantly improving the thermal management capabilities of the device.

[0007] In some embodiments, the core layer includes one or more of diamond, polymer, germanium-doped silicon dioxide, silicon carbide, silicon, and air; the cladding includes one or more of amorphous diamond, graphitized diamond, metal aluminum and its alloys, metal gold and its alloys, metal silver and its alloys, metal chromium and its alloys, and silicon dioxide; and / or the conductive metal includes one or more of metal copper and its alloys, metal tungsten and its alloys, metal silver and its alloys, metal nickel and its alloys, metal titanium and its alloys, and metal tantalum and its alloys.

[0008] In some embodiments, a redistribution layer is further included, the redistribution layer being located on the first surface and / or the second surface of the diamond adapter plate and electrically connected to the diamond adapter plate. This allows the chip's I / O interfaces to be redistributed to locations suitable for connection with the diamond through-holes, thereby resolving density mismatch issues when connecting the chip's I / O interfaces to external circuits, making the connection between the chip and the diamond adapter plate more convenient and increasing circuit layout flexibility.

[0009] In some embodiments, a horizontal optical waveguide is further included, located on a surface of the redistribution layer away from the diamond adapter plate. This horizontal waveguide enables horizontal transmission of optical signals within the device, reducing loss and distortion during transmission, thereby improving optical signal quality and transmission efficiency. Furthermore, the horizontal waveguide efficiently couples the internal optoelectronic structure with the external optical fiber, providing a flexible interconnection method suitable for various application scenarios.

[0010] In some embodiments, an electrical chip layer and an optical chip layer are further included; the electrical chip layer is located on a side of the redistribution layer away from the diamond adapter plate, and is electrically connected to the redistribution layer and / or the diamond through-hole; the optical chip layer is located on a surface of a side of the redistribution layer away from the diamond adapter plate, and is coupled to the diamond optical waveguide through-hole and / or the horizontal optical waveguide.

[0011] In some embodiments, a laser is further included, and the laser includes an edge-emitting laser and / or a vertical-cavity surface-emitting laser; wherein the edge-emitting laser is located on a side surface of the redistribution layer away from the diamond adapter plate and is coupled to the horizontal optical waveguide; the vertical-cavity surface-emitting laser is located on a side surface of the diamond adapter plate away from the optical chip layer and is coupled to the diamond optical waveguide via. Thus, the coupling connection between the edge-emitting laser and the horizontal optical waveguide supports horizontal transmission of optical signals, and the coupling connection between the vertical-cavity surface-emitting laser and the diamond optical waveguide via supports vertical transmission of optical signals. This flexible optical interconnection method can adapt to different application scenarios and needs.

[0012] In some embodiments, a heat dissipation module is further included, comprising a microfluidic channel embedded within the diamond adapter plate and / or a microfluidic assembly disposed on the first and / or second surfaces of the diamond adapter plate. Thus, the microfluidic channel and / or microfluidic assembly can effectively dissipate heat generated by the optical and electronic chips during operation, reducing the impact of thermal stress on device performance, thereby improving the thermal stability and reliability of the entire device.

[0013] In a second aspect, the present application provides a method for preparing an optoelectronic co-packaged device, comprising preparing the aforementioned diamond optical waveguide via. The method for preparing the aforementioned diamond optical waveguide via comprises: disposing a core layer and a cladding layer covering an outer wall of the core layer within the first via to form the diamond optical waveguide via. Thus, by disposing the core layer and the cladding layer within the first via of the diamond adapter plate to form the diamond optical waveguide via, an optical signal can propagate within the core layer while being confined within the core layer by the cladding layer, thereby reducing transmission loss of the optical signal.

[0014] In some embodiments, the core layer is positioned on the surface of the diamond adapter plate; the diamond adapter plate surrounding the outer area of the core layer is subjected to femtosecond laser processing to form the cladding; one end of the core layer is located on the first surface of the diamond adapter plate, and the other end of the core layer is located on the second surface.

[0015] In some embodiments, the diamond adapter plate is provided with the first through hole extending through the first surface and the second surface; a reflective metal is deposited on the inner wall of the first through hole to form the cladding; the reflective metal includes one or more of metal aluminum and its alloys, metal gold and its alloys, metal silver and its alloys, and metal chromium and its alloys; and / or, silicon dioxide is deposited on the inner wall of the first through hole to form the cladding; the area within the cladding is filled with one or more of polymer, germanium-doped silicon dioxide, silicon carbide, and silicon to form the core layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0017] Figure 1 It is a schematic structural diagram of an optoelectronic co-packaged device in one embodiment of the present application.

[0018] Figure 2 Schematic diagram of the structure of a diamond optical waveguide hole in one embodiment of the present application.

[0019] Figure 3 It is a schematic structural diagram of a diamond optical waveguide via in another embodiment of the present application.

[0020] Figure 4 It is a schematic structural diagram of a diamond optical waveguide via in another embodiment of the present application.

[0021] Figure 5 Schematic diagram of the structure of a horizontal optical waveguide in one embodiment of the present application.

[0022] Description of reference numerals:

[0023] 11. Diamond adapter plate; 111. First surface; 112. Second surface; 12. Diamond optical waveguide via; 121. Core layer; 122. Cladding layer; 13. Diamond via; 14. First redistribution layer; 15. Second redistribution layer; 16. ASIC / Switch; 17. EIC; 18. Horizontal optical waveguide; 181. Upper cladding layer; 182. Horizontal optical waveguide core layer; 183. Lower cladding layer; 19. PIC; 20. Laser; 21. Microfluidic channel; 22. Package substrate; 23. PCB board. DETAILED DESCRIPTION

[0024] Below, an embodiment of an optoelectronic co-packaged device and its preparation method of the present application is specifically disclosed in detail with appropriate reference to the accompanying drawings. However, there may be cases where unnecessary detailed descriptions are omitted. For example, there may be cases where detailed descriptions of well-known matters and repeated descriptions of actually the same structure are omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate the understanding of those skilled in the art. In addition, the drawings and the following description are provided for those skilled in the art to fully understand the present application and are not intended to limit the subject matter described in the claims.

[0025] " scope " disclosed in the application is limited in the form of lower limit and upper limit, and given range is limited by selecting a lower limit and an upper limit, and the selected lower limit and upper limit define the boundary of special range. The scope limited in this way can be to include end value or not include end value, and can be arbitrarily combined, that is, any lower limit can form a scope with any upper limit combination. For example, if the scope of 60-120 and 80-110 is listed for specific parameters, it is understood that the scope of 60-110 and 80-120 is also expected. In addition, if the minimum range value 1 and 2 listed, and if the maximum range value 3,4 and 5 are listed, then the following scope can all be expected: 1-3, 1-4, 1-5, 2-3, 2-4 and 2-5. In this application, unless otherwise specified, the numerical range " ab " represents the abbreviation of any real number combination between a and b, wherein a and b are all real numbers. For example, a numerical range of "0-5" indicates that all real numbers between "0-5" are listed herein, and "0-5" is simply an abbreviation for these numerical combinations. Furthermore, when a parameter is expressed as an integer ≥ 2, this is equivalent to disclosing that the parameter is, for example, an integer of 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0026] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0027] Unless otherwise specified, all technical features and optional technical features of this application can be combined with each other to form a new technical solution.

[0028] Unless otherwise defined, all technical and scientific terms used in this application have the same meanings as those commonly understood by technicians in the technical field to which this application belongs; the terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit this application; unless otherwise specified, the numerical values of the various parameters mentioned in this application can be measured using various measurement methods commonly used in the art (for example, they can be tested according to the methods given in the embodiments of this application).

[0029] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly specifying the quantity of the technical features indicated. "First feature" and "second feature" may include one or more of the features.

[0030] In the description of this application, "A and / or B" may include the case of A alone, the case of B alone, or any of the cases of A and B, where A and B are only used for example, and may be any technical feature connected by "and / or" in this application.

[0031] CPO technology mainly includes two technical paths: 2.5D packaging and 3D packaging. Among them, 2.5D packaging is achieved by flip-chipping the electrical chip (EIC) and the optical chip (PIC) side by side on the interposer, and interconnecting the PIC and EIC through the metal on the interposer; the bottom of the interposer is then electrically connected to the packaging substrate 22 or the printed circuit board (PCB), so that a system architecture for optoelectronic collaboration can be constructed. Compared with 2.5D packaging, 3D packaging adopts a three-dimensional stacking integration mode, and stacks the optical chip and the electrical chip in three dimensions through vertical interconnection technologies such as through silicon vias (TSV) and micro-bumps; this architecture has excellent signal integrity in high-frequency signal transmission due to its shorter interconnection distance and higher interconnection density, while having lower power consumption performance; in addition, this architecture also has higher system integration and a more compact packaging form, making it a current research hotspot and future core development direction of CPO technology.

[0032] In the CPO architecture, the adapter board serves as the core carrier for the collaborative work of the electrical chip (ASIC or EIC) and the optical chip (PIC), and undertakes multiple functions such as electrical signal interconnection, optical signal routing and thermal management.

[0033] Commonly used silicon adapter boards are based on mature silicon-based semiconductor processes (such as complementary metal oxide semiconductor processes), utilizing through-silicon vias (TSVs) and redistribution layers (RDLs) to construct high-density electrical interconnect networks. Simultaneously, silicon photonics technology has successfully achieved monolithic integration of core optical components such as optical modulators and detectors, providing technical support for the construction of large-scale optical interconnect networks. However, the dielectric loss of silicon materials (dielectric loss tangent tanδ≈0.01) results in significant signal attenuation and crosstalk in high-frequency bands such as millimeter waves or terahertz frequencies, limiting the bandwidth expansion capabilities of high-frequency signals. Silicon materials also exhibit nonlinear losses such as two-photon absorption in the communications band (1550nm), further reducing the transmission efficiency of optical signals.

[0034] Glass adapter plates offer high transparency in the communications band, supporting low-loss optical waveguide transmission and efficient fiber-to-chip coupling, making them ideal for long-distance optical signal interconnection scenarios. Glass has significantly lower dielectric loss (tanδ≈0.001) than silicon, exhibiting lower signal attenuation and crosstalk during high-frequency signal transmission, making it an ideal carrier for high-frequency electrical interconnection.

[0035] However, in the CPO architecture, the high-density integration of electronic and optical chips produces significant thermal effects. The high-speed signal processing of the electronic chip is accompanied by Joule losses, while the photoelectric conversion process of the optical chip is subject to quantum efficiency limitations. These two factors together lead to a significant increase in heat flux density per unit area. Silicon-based adapter plates (with a thermal conductivity of approximately 145W / (m·K)) and glass-based adapter plates (with a thermal conductivity of only 1.1W / (m·K)) have poor thermal conductivity, making it difficult to address the complex thermal management issues that arise in optoelectronic co-sealing scenarios.

[0036] Based on this, in a first aspect of the present application, the present application provides an optoelectronic co-packaged device, comprising: a diamond adapter plate 11, the diamond adapter plate 11 comprising a first surface 111 and a second surface 112 relative to each other; a first through hole and a second through hole penetrating the first surface 111 and the second surface 112 are provided on the diamond adapter plate 11; the first through hole and the second through hole are independently provided; a diamond optical waveguide via 12, wherein a core layer 121 and a cladding 122 covering the outer wall of the core layer 121 are provided in the first through hole to form the diamond optical waveguide via 12, the refractive index of the core layer 121 being greater than the refractive index of the cladding 122; a diamond through hole 13, wherein the second through hole is filled with a conductive metal to form the diamond through hole 13, and the diamond through hole 13 is electrically connected to the diamond adapter plate 11.

[0037] The diamond adapter plate 11 serves as a carrier for both the electrical module and the optical module, integrating diamond through-holes 13 (TDV) and diamond optical waveguide through-holes 12 (OTDV) inside, providing a basis for the efficient conversion of optoelectronic signals. At the same time, with the help of the ultra-high thermal conductivity of diamond, the adapter plate can quickly dissipate chip heat, thereby significantly improving the thermal management capabilities of the device.

[0038] The structure and connection relationship of the optoelectronic co-packaged device based on the diamond adapter plate 11 are further described below.

[0039] In some embodiments, combined Figure 1 The optoelectronic co-packaged device includes a diamond adapter plate 11 .

[0040] Diamond is a wide bandgap material that combines ultra-high hardness, ultra-high thermal conductivity, low dielectric constant, and a wide optical transparency window. The diamond adapter plate 11 has the following advantages when used in CPO technology:

[0041] (1) With the ultra-high thermal conductivity of diamond (thermal conductivity coefficient of about 2000W / (m·K)), the diamond adapter plate 11 can quickly conduct the Joule heat generated by the operation of the electronic chip, effectively reduce the chip junction temperature, and thus improve the long-term operation reliability of the system; at the same time, the diamond adapter plate 11 can be adapted to kilowatt-level optical communication modules (such as laser radar, supercomputing optical interconnection system, etc.), meeting the needs of high-power application scenarios.

[0042] (2) Diamond’s low dielectric constant (ε≈5.7) and ultra-low dielectric loss (tanδ≈0.0001) properties enable the diamond adapter plate 11 to be adapted to 112Gbps and above serializer / deserializer high-speed channels. Compared with silicon-based (tanδ≈0.01) and glass-based (tanδ≈0.001) materials, the diamond adapter plate 11 can reduce signal attenuation and crosstalk levels by 1-2 orders of magnitude, thereby significantly improving the integrity and bandwidth expansion capabilities of high-frequency signals.

[0043] (3) The high breakdown field strength (>10MV / cm) of diamond provides a carrier for the coordinated integration of high-voltage drive circuits and high-power lasers, reducing the design limitations caused by the insufficient voltage resistance of traditional materials. At the same time, the wide optical transparency window of diamond (covering the ultraviolet to far infrared bands), especially the extremely low loss characteristics in the 1310nm / 1550nm communication band, can use the diamond adapter plate 11 to directly construct a low-loss optical waveguide network, thereby simplifying the optical interconnection architecture and optimizing the optical signal transmission efficiency.

[0044] (4) The ultra-high hardness of diamond allows the preparation of vertical grating couplers through femtosecond laser direct writing or precision cutting processes, which can enable efficient coupling of optical signals in three-dimensional space. At the same time, combined with the high-precision advantages of material processing, the number of inter-layer optical signal couplings and coupling losses can be greatly reduced.

[0045] In some embodiments, the diamond adapter plate 11 includes a first surface 111 and a second surface 112 facing each other. The diamond adapter plate 11 is provided with a first through-hole and a second through-hole extending through the first surface 111 and the second surface 112. The first through-hole and the second through-hole are provided independently of each other. Thus, the first through-hole and the second through-hole are used for transmitting optical and electrical signals, respectively. This allows for efficient optoelectronic signal interconnection within a limited space within an optoelectronic co-packaged device, improving device integration and performance.

[0046] As an example, Figure 1 and Figure 2 As shown, the first surface 111 and the second surface 112 are arranged opposite to each other along a first direction, and the central axes of the first through hole and the second through hole are independently parallel to the first direction.

[0047] In some embodiments, the optoelectronic co-packaged device further includes a diamond through-hole 13 . The second through-hole is filled with a conductive metal to form the diamond through-hole 13 . The diamond through-hole 13 is electrically connected to the diamond adapter plate 11 .

[0048] As a result, the diamond through-holes 13 create vertical conductive channels that enable efficient electrical interconnection between different layers, thereby supporting high-frequency electrical signal transmission while reducing losses and crosstalk during signal transmission. The design of the diamond through-holes 13 enables optoelectronic co-packaged devices to form higher-density multi-layer electrical interconnections within a limited space, thereby improving device integration and supporting complex circuit design and functional integration. Furthermore, the conductive metal in the diamond through-holes 13 can quickly conduct heat generated by the electronic chip through the diamond adapter plate 11, effectively alleviating the problem of localized heat accumulation caused by high-density integration.

[0049] In some embodiments, the conductive metal includes one or more of copper and its alloys, tungsten and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, and tantalum and its alloys.

[0050] In some embodiments, the optoelectronic co-packaged device further includes a redistribution layer, which is located on the first surface 111 and / or the second surface 112 of the diamond adapter plate 11 and is electrically connected to the diamond adapter plate 11 .

[0051] Therefore, the redistribution layer can redistribute the I / O interface of the chip to a position suitable for connection with the diamond through-hole 13, thereby solving the density mismatch problem when the chip I / O interface is connected to the external circuit, making the connection between the chip and the diamond adapter plate 11 more convenient, and improving the flexibility of the circuit layout; at the same time, the redistribution layer can provide more wiring space, shorten the electrical signal transmission path, reduce the loss and delay of electrical signal transmission, and thus improve the electrical performance; in addition, the electrical connection between the redistribution layer and the diamond adapter plate 11 improves the reliability of the electrical connection between the chip and the diamond adapter plate 11, thereby improving the stability and reliability of the entire device.

[0052] As an example, Figure 1 and Figure 2 As shown, a first redistribution layer 14 is provided on the first surface 111 of the diamond adapter plate 11 , and a second redistribution layer 15 is provided on the second surface 112 of the diamond adapter plate 11 . Both the first redistribution layer 14 and the second redistribution layer 15 are electrically connected to the diamond adapter plate 11 .

[0053] The diamond through-holes 13 and the redistribution layer together construct an electrical signal transmission channel of the optoelectronic co-packaged device to complete the transmission of electrical signals in the vertical direction (defined as the first direction) and the horizontal direction (defined as the direction perpendicular to the first direction).

[0054] In some embodiments, the optoelectronic co-packaged device further includes an electrical chip layer; the electrical chip layer is located on a side of the redistribution layer away from the diamond adapter plate 11 and is electrically connected to the redistribution layer and / or the diamond through-hole 13 .

[0055] The electrical chip layer serves as the core processing unit, with the application-specific integrated circuit / switch chip (ASIC / Switch) responsible for complex logic operations and signal processing, and the electrical interface chip (EIC) responsible for receiving and transmitting electrical signals. Furthermore, the electrical connection between the electrical chip layer, the redistribution layer, and the diamond vias 13 creates an efficient electrical interconnect structure, thereby supporting high-frequency electrical signal transmission while reducing loss and crosstalk, and improving signal integrity. The electrical chip layer can support multiple functions such as signal processing, data conversion, and control logic, making it suitable for diverse application scenarios such as lidar and supercomputing optical interconnects.

[0056] As an example, Figure 1 As shown, an ASIC / Switch 16 and an EIC 17 are provided on a side of the first redistribution layer 14 away from the diamond adapter plate 11 , and both the ASIC / Switch 16 and the EIC 17 are electrically connected to the first redistribution layer 14 .

[0057] In some embodiments, the optoelectronic co-packaged device further includes a diamond optical waveguide via 12, wherein a core layer 121 and a cladding layer 122 covering the outer wall of the core layer 121 are disposed within the first via, forming the diamond optical waveguide via 12, and the refractive index of the core layer 121 is greater than the refractive index of the cladding layer 122. Thus, in the optoelectronic co-packaged device, optical elements with different functions (e.g., lasers, modulators, detectors, etc.) are typically distributed in different layers; the diamond optical waveguide via 12 can support vertical optical coupling between optical elements in different layers. For example, the diamond optical waveguide via 12 can vertically couple an optical signal emitted by a bottom layer laser to an upper layer modulator. The optical signal can propagate in the core layer 121, while being confined within the core layer 121 by the cladding layer 122, thereby reducing the transmission loss of the optical signal.

[0058] In some embodiments, the core layer 121 includes one or more of diamond, polymer, germanium-doped silicon dioxide, silicon carbide, silicon, and air; the cladding 122 includes one or more of amorphous diamond, graphitized diamond, metal aluminum and its alloys, metal gold and its alloys, metal silver and its alloys, metal chromium and its alloys, and silicon dioxide.

[0059] As an example, Figure 2 As shown, the core layer 121 may include diamond, and the cladding layer 122 may include amorphized diamond and / or graphitized diamond.

[0060] As an example, Figure 3 As shown, the core layer 121 may include one or more of polymer, germanium-doped silicon dioxide, silicon carbide, and silicon, and the cladding layer 122 may include silicon dioxide.

[0061] As an example, Figure 4As shown, the core layer 121 may include air, and the cladding layer 122 may include one or more of metal aluminum and its alloys, metal gold and its alloys, metal silver and its alloys, and metal chromium and its alloys.

[0062] In some embodiments, the diamond optical waveguide via 12 may be circular or square. For example, a circular diamond optical waveguide via 12 can reduce stress concentration and the risk of material fatigue, thereby enhancing the reliability and lifespan of the via. For example, a square diamond optical waveguide via 12 can provide more stable and reliable optical coupling and reduce optical signal loss.

[0063] In some embodiments, the optoelectronic co-packaged device further includes a horizontal optical waveguide 18, which is located on a surface of the redistribution layer away from the diamond adapter plate 11. Thus, the horizontal optical waveguide 18 enables horizontal transmission of optical signals within the device, reducing loss and distortion of optical signals during transmission, thereby improving optical signal quality and transmission efficiency. Furthermore, the horizontal optical waveguide 18 can efficiently couple the internal optoelectronic structure with the external optical fiber, providing a flexible interconnection method suitable for different application scenarios.

[0064] As an example, Figure 1 As shown, a horizontal optical waveguide 18 is provided on a surface of the first redistribution layer 14 away from the diamond adapter plate 11 .

[0065] The diamond optical waveguide via 12 and the horizontal optical waveguide 18 together construct an optical signal transmission channel of the optoelectronic co-packaged device to complete the transmission of the optical signal in the vertical direction (defined as the first direction) and the horizontal direction (defined as the direction perpendicular to the first direction).

[0066] In some embodiments, the horizontal optical waveguide 18 includes one or more of a silicon-based optical waveguide, a polymer optical waveguide, a glass optical waveguide, and a lithium niobate optical waveguide.

[0067] In some embodiments, the optoelectronic co-packaged device further includes an optical chip layer, which is located on a surface of the redistribution layer away from the diamond adapter plate 11 and is coupled to the diamond optical waveguide via 12 and / or the horizontal optical waveguide 18 .

[0068] The optical chip layer serves as the core optical processing unit, integrating multiple optical functions such as optical modulation, optical detection, and optical amplification with photonic integrated circuits (PICs) to achieve efficient processing and high-speed transmission of optical signals. The integrated design of the optical chip layer combines the PIC with an optical waveguide structure, enabling the completion of complex optical functions within a limited space, thereby improving the integration of the device. Furthermore, through coupling with diamond optical waveguide vias 12 and horizontal optical waveguides 18, the optical chip layer supports flexible optical interconnection methods, adapting to the application requirements of various high-performance optical communication modules such as lidar and supercomputing optical interconnects, and meeting the requirements of high-bandwidth, low-latency, and high-speed optical communication signal transmission.

[0069] As an example, Figure 1 As shown, a PIC 19 is provided on the side of the first redistribution layer 14 facing away from the diamond adapter plate 11. One end of a horizontal optical waveguide 18 is coupled to the PIC 19, and the other end of the horizontal optical waveguide 18 can be interconnected with an external optical fiber. The side of the PIC 19 facing away from the first redistribution layer 14 is integrated with an EIC 17, and the EIC 17 and PIC 19 are connected via microbumps.

[0070] In some embodiments, the optoelectronic co-packaged device further includes a laser, which includes an edge-emitting laser (EEL) and / or a vertical-cavity surface-emitting laser (VCSEL); wherein the edge-emitting laser is located on a side surface of the redistribution layer away from the diamond adapter plate 11, and is coupled to the horizontal optical waveguide 18; the vertical-cavity surface-emitting laser is located on a side surface of the diamond adapter plate 11 away from the optical chip layer, and is coupled to the diamond optical waveguide through hole 12.

[0071] The EEL has high output power and good beam quality, making it suitable for long-distance optical signal transmission. By coupling with the horizontal optical waveguide 18, the EEL can efficiently couple optical signals into the horizontal optical waveguide 18, enabling horizontal transmission of optical signals. The VCSEL offers the advantages of low power consumption, high integration, and low cost, making it suitable for short-distance optical signal transmission. By coupling with the diamond optical waveguide via 12, the VCSEL can efficiently couple optical signals into the diamond optical waveguide via 12, enabling vertical transmission of optical signals.

[0072] Therefore, the coupling connection between the EEL and the horizontal optical waveguide 18 supports the horizontal transmission of optical signals, and the coupling connection between the VCSEL and the diamond optical waveguide via 12 supports the vertical transmission of optical signals. This flexible optical interconnection method can adapt to different application scenarios and needs.

[0073] As an example, Figure 1 As described above, the laser 20 (VCSEL) is located on a surface of the diamond adapter plate 11 away from the first redistribution layer 14 , and is coupled to the diamond optical waveguide via 12 .

[0074] In some embodiments, the optoelectronic co-packaged device further includes a heat dissipation module, which includes a microfluidic channel 21 embedded within the diamond adapter plate 11 and / or a microfluidic assembly disposed on the first surface 111 and / or the second surface 112 of the diamond adapter plate 11. Thus, the microfluidic channel 21 and / or the microfluidic assembly can effectively dissipate heat generated by the optical and electronic chips during operation, reducing the impact of thermal stress on device performance, thereby improving the thermal stability and reliability of the entire device.

[0075] As an example, Figure 1 As shown, the heat dissipation module includes multiple microfluidic channels 21, which are evenly embedded in the diamond adapter plate 11 along a horizontal direction. This maximizes the heat dissipation generated by the device. It is understood that the microfluidic channels 21 on the diamond adapter plate 11 are independently arranged from the diamond through-holes 13 and the diamond optical waveguide through-holes 12.

[0076] The diamond adapter plate 11 serves as an integrated carrier of the electrical module and the optical module, and simultaneously integrates the redistribution layer, diamond through-hole 13, horizontal optical waveguide 18 and diamond optical waveguide through-hole 12, providing a basis for efficient conversion between optical and electrical signals; at the same time, relying on the ultra-high thermal conductivity of diamond, and integrating efficient heat dissipation paths, to achieve high-performance thermal management functions.

[0077] In some embodiments, as Figure 1 As shown, the optoelectronic co-packaged device further includes a packaging substrate 22 and a PCB board 23. The packaging substrate 22 is located on the side of the second redistribution layer 15 away from the diamond adapter plate 11 and is connected to the second redistribution layer 15 via microbumps; the PCB board 23 is located on the side of the packaging substrate 22 away from the diamond adapter plate 11 and is connected to the packaging substrate 22 via microbumps.

[0078] Therefore, the packaging substrate 22 provides a stable electrical connection platform for the optoelectronic co-packaged device; the PCB board 23 serves as the interface between the optoelectronic co-packaged device and the external system, allowing the device to be connected to external power supply, control signal or data transmission devices.

[0079] In a second aspect of the present application, a method for preparing an optoelectronic co-packaged device is provided, comprising preparing a diamond optical waveguide via 12. The method for preparing the diamond optical waveguide via 12 comprises: disposing a core layer 121 and a cladding layer 122 covering the outer wall of the core layer 121 within a first through hole to form the diamond optical waveguide via 12. Thus, by disposing the core layer 121 and the cladding layer 122 within the first through hole of the diamond adapter plate 11 to form the diamond optical waveguide via 12, an optical signal can propagate in the core layer 121 while being confined within the core layer 121 by the cladding layer 122, thereby reducing transmission loss of the optical signal.

[0080] In some embodiments, as Figure 2 As shown, the position of the core layer 121 is selected on the surface of the diamond adapter plate 11; the diamond adapter plate 11 surrounding the outer area of the core layer 121 is processed by femtosecond laser to form a cladding layer 122; one end of the core layer 121 is located on the first surface 111 of the diamond adapter plate 11, and the other end of the core layer 121 is located on the second surface 112.

[0081] Femtosecond laser treatment induces local amorphization or graphitization inside the diamond through multi-photon absorption and avalanche ionization mechanisms, forming refractive index modulation areas; the diamond crystalline structure in these modulation areas is destroyed by the action of laser energy, resulting in a decrease in the refractive index of the diamond compared to the untreated state; at this time, the original diamond area that has not been laser treated serves as the core layer 121, and the amorphized or graphitized modified area serves as the cladding 122, and the two form a gradient refractive index waveguide structure due to the difference in refractive index.

[0082] Diamond treated with a femtosecond laser can be annealed at high temperatures in an argon atmosphere to eliminate the amorphous carbon phase induced by the femtosecond laser treatment and restore part of the diamond lattice, thereby reducing scattering centers. The modified areas still retain some amorphous or graphitized characteristics, and their refractive index remains lower than that of natural diamond.

[0083] As an example, femtosecond laser processing satisfies at least one of the following parameters:

[0084] The laser wavelength is 800nm or 1030nm;

[0085] Pulse width less than 300fs;

[0086] Repetition frequency is 100kHz-1MHz;

[0087] Focus NA is 0.65-1.4;

[0088] The depth of focus is 20μm-100μm.

[0089] As an example, the pulse width may be 50 fs, 100 fs, 150 fs, 200 fs, 250 fs, 300 fs, etc., or a range consisting of any two of the above values.

[0090] As an example, the repetition frequency may be 100 kHz, 200 kHz, 300 kHz, 400 kHz, 500 kHz, 600 kHz, 700 kHz, 800 kHz, 900 kHz, 1 MHz, etc., or a range consisting of any two of the above values.

[0091] As an example, the focus NA can be 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95, 1, 1.05, 1.1, 1.15, 1.2, 1.25, 1.3, 1.35, 1.4, etc., or a range consisting of any two of the above values.

[0092] As an example, the depth of focus may be 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc., or a range consisting of any two of the above values.

[0093] In some embodiments, the steps prior to femtosecond laser treatment include: cleaning the diamond surface, specifically: selecting type IIa single crystal diamond (type IIa single crystal diamond has a low impurity content and high optical transparency); treating the diamond surface with oxygen plasma to remove residual hydrocarbons on the diamond surface and activate the surface.

[0094] In some embodiments, the power of the oxygen plasma treatment is 10W-200W, and the time of the oxygen plasma treatment is 1 min-20 min.

[0095] As an example, the power of the oxygen plasma treatment can be 10 W, 20 W, 30 W, 40 W, 50 W, 60 W, 70 W, 80 W, 90 W, 100 W, 110 W, 120 W, 130 W, 140 W, 150 W, 160 W, 170 W, 180 W, 190 W, 200 W, etc., or a range consisting of any two of the above values.

[0096] As an example, the time for oxygen plasma treatment can be 1 min, 2 min, 3 min, 4 min, 5 min, 6 min, 7 min, 8 min, 9 min, 10 min, 11 min, 12 min, 13 min, 14 min, 15 min, 16 min, 17 min, 18 min, 19 min, 20 min, etc., or a range consisting of any two of the above values.

[0097] In some embodiments, as Figure 3 As shown, a first through-hole is formed on the diamond adapter plate 11, penetrating the first surface 111 and the second surface 112. Silicon dioxide is deposited on the inner wall of the first through-hole to form a cladding layer 122. The area within the cladding layer 122 is filled with one or more of a polymer, germanium-doped silicon dioxide, silicon carbide, and silicon to form a core layer 121. In this case, the core layer 121 is made of one or more of a polymer, germanium-doped silicon dioxide, silicon carbide, and silicon, while the cladding layer 122 is made of silicon dioxide.

[0098] In some embodiments, as Figure 4As shown, a first through-hole is formed on the diamond adapter plate 11, penetrating the first surface 111 and the second surface 112. A reflective metal is deposited on the inner wall of the first through-hole to form a cladding layer 122. The reflective metal comprises one or more of aluminum and its alloys, gold and its alloys, silver and its alloys, and chromium and its alloys. In this case, the core layer 121 is air, and the cladding layer 122 is one or more of aluminum and its alloys, gold and its alloys, silver and its alloys, and chromium and its alloys.

[0099] In some embodiments, a method for preparing an optoelectronic co-package device further includes preparing a horizontal optical waveguide 18; Figure 5 , the method for preparing the horizontal optical waveguide 18 comprises the following steps:

[0100] S100, performing chemical mechanical polishing on the diamond surface to reduce the roughness of the diamond surface and reduce light scattering loss; then performing oxygen plasma treatment on the diamond surface to enhance the activity of the diamond surface to obtain pre-treated diamond;

[0101] S200, using plasma enhanced chemical vapor deposition (PECVD) to grow a silicon dioxide layer on the pretreated diamond surface to form the lower cladding layer 183; then using low pressure chemical vapor deposition (LPCVD) to deposit a silicon nitride layer on the surface of the silicon dioxide layer;

[0102] S300, coating a photoresist layer on the surface of the silicon nitride layer by spin coating; then defining a waveguide pattern using an electron beam direct writing system, and exposing the photoresist in the non-waveguide area; finally, removing the photoresist in the exposed area using a tetramethylammonium hydroxide solution;

[0103] S400, selectively etching a ridge structure by dry etching or wet etching to form a horizontal optical waveguide core layer 182;

[0104] S500, using PECVD to deposit a 2 μm thick silicon dioxide layer on the surface of the horizontal optical waveguide core layer 182 to form the upper cladding layer 181; performing chemical mechanical polishing on the upper cladding layer 181 to flatten the surface of the upper cladding layer 181; the upper cladding layer 181, the horizontal optical waveguide core layer 182, and the lower cladding layer 183 together constitute the horizontal optical waveguide 18.

[0105] In some embodiments, a method for preparing an optoelectronic co-packaged device further includes preparing a horizontal optical waveguide 18. The method for preparing the horizontal optical waveguide 18 includes:

[0106] A horizontal optical waveguide core layer 182 region is selected within the diamond adapter plate 11, extending horizontally. The upper and lower regions of the horizontal optical waveguide core layer 182 in the vertical direction are subjected to femtosecond laser treatment to form an upper cladding layer 181 and a lower cladding layer 183, respectively. The femtosecond laser treatment induces defects or stress regions in the diamond within the upper cladding layer 181 and the lower cladding layer 183, thereby regulating the refractive index, making the refractive index of both the upper cladding layer 181 and the lower cladding layer 183 lower than that of the horizontal optical waveguide core layer 182. As a result, optical signals can propagate horizontally within the horizontal optical waveguide core layer 182, while being confined within the horizontal optical waveguide core layer 182 by the upper cladding layer 181 and the lower cladding layer 183, thereby reducing transmission loss of the optical signal.

[0107] As an example, femtosecond laser processing satisfies at least one of the following parameters:

[0108] The laser wavelength is 800nm or 1030nm;

[0109] Pulse width less than 300fs;

[0110] Repetition frequency is 100kHz-1MHz;

[0111] Focus NA is 0.65-1.4;

[0112] The depth of focus is 20μm-100μm.

[0113] As an example, the pulse width may be 50 fs, 100 fs, 150 fs, 200 fs, 250 fs, 300 fs, etc., or a range consisting of any two of the above values.

[0114] As an example, the repetition frequency may be 100 kHz, 200 kHz, 300 kHz, 400 kHz, 500 kHz, 600 kHz, 700 kHz, 800 kHz, 900 kHz, 1 MHz, etc., or a range consisting of any two of the above values.

[0115] As an example, the focus NA can be 0.65, 0.7, 0.75, 0.8, 0.85, 0.9, 0.95, 1, 1.05, 1.1, 1.15, 1.2, 1.25, 1.3, 1.35, 1.4, etc., or a range consisting of any two of the above values.

[0116] As an example, the depth of focus may be 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, etc., or a range consisting of any two of the above values.

[0117] It should be noted that the present application is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and any embodiments having substantially the same structure and effect as the technical concept within the scope of the present application are all included in the technical scope of the present application. In addition, without departing from the scope of the present application, any other embodiments that can be conceived by those skilled in the art and that combine some of the constituent elements in the embodiments are also included in the scope of the present application.

Claims

1. An optoelectronic co-packaged device, characterized in that: include: A diamond adapter plate, the diamond adapter plate comprising a first surface and a second surface opposite to each other; a first through hole and a second through hole penetrating the first surface and the second surface are provided on the diamond adapter plate; the first through hole and the second through hole are provided independently of each other; A diamond optical waveguide via hole, wherein a core layer and a cladding layer covering an outer wall of the core layer are provided in the first through hole to form the diamond optical waveguide via hole, and the refractive index of the core layer is greater than the refractive index of the cladding layer; A diamond through hole, wherein the second through hole is filled with a conductive metal to form the diamond through hole, and the diamond through hole is electrically connected to the diamond adapter plate.

2. The optoelectronic co-packaged device according to claim 1, characterized in that: The core layer includes one or more of diamond, polymer, germanium-doped silicon dioxide, silicon carbide, silicon, and air; the cladding layer includes one or more of amorphous diamond, graphitized diamond, metal aluminum and its alloys, metal gold and its alloys, metal silver and its alloys, metal chromium and its alloys, and silicon dioxide; and / or, The conductive metal includes one or more of copper and its alloys, tungsten and its alloys, silver and its alloys, nickel and its alloys, titanium and its alloys, and tantalum and its alloys.

3. The optoelectronic co-packaged device according to claim 1 or 2, characterized in that: It also includes a redistribution layer, which is located on the first surface and / or the second surface of the diamond adapter plate and is electrically connected to the diamond adapter plate.

4. The optoelectronic co-packaged device according to claim 3, characterized in that: It also includes a horizontal optical waveguide, which is located on a side surface of the redistribution layer away from the diamond adapter plate.

5. The optoelectronic co-packaged device according to claim 4, characterized in that: Also includes an electrical chip layer and an optical chip layer; The electric chip layer is located on a side of the redistribution layer away from the diamond adapter plate and is electrically connected to the redistribution layer and / or the diamond through-hole; The optical chip layer is located on a surface of the redistribution layer away from the diamond adapter plate, and is coupled to the diamond optical waveguide via and / or the horizontal optical waveguide.

6. The optoelectronic co-packaged device according to claim 5, characterized in that: Also included is a laser, wherein the laser includes an edge emitting laser and / or a vertical cavity surface emitting laser; wherein, The edge emitting laser is located on a side surface of the redistribution layer away from the diamond adapter plate and is coupled to the horizontal optical waveguide; The vertical cavity surface emitting laser is located on a side surface of the diamond adapter plate away from the optical chip layer, and is coupled to the diamond optical waveguide through hole.

7. The optoelectronic co-packaged device according to claim 1, characterized in that: It also includes a heat dissipation module, which includes a micro-fluidic channel embedded in the diamond adapter plate and / or includes a micro-jet component arranged on the first surface and / or the second surface of the diamond adapter plate.

8. A method for preparing the optoelectronic co-packaged device according to any one of claims 1 to 7, characterized in that: The method comprises preparing the diamond optical waveguide via hole; The method for preparing the diamond light waveguide via comprises: arranging a core layer and a cladding layer covering an outer wall of the core layer in the first via to form the diamond light waveguide via.

9. The method according to claim 8, characterized in that Selecting the core layer position on the surface of the diamond adapter plate; The diamond adapter plate surrounding the outer area of the core layer is subjected to femtosecond laser processing to form the cladding layer; one end of the core layer is located on the first surface of the diamond adapter plate, and the other end of the core layer is located on the second surface.

10. The method according to claim 8, characterized in that The diamond adapter plate is provided with a first through hole penetrating the first surface and the second surface; Depositing a reflective metal on the inner wall of the first through hole to form the cladding; the reflective metal includes one or more of aluminum and its alloys, gold and its alloys, silver and its alloys, and chromium and its alloys; and / or, Silicon dioxide is deposited on the inner wall of the first through hole to form the cladding; and one or more of polymer, germanium-doped silicon dioxide, silicon carbide, and silicon are filled in the region within the cladding to form the core layer.

Images