Method and system for accelerating inter-process communication of microkernel by using memory tag extension and medium
By allocating tagged memory to applications and system services, using the memory tag extension feature to achieve isolated memory domains and execution domains, and conducting inter-process communication in the library operating system or kernel module form, and using fast channels to achieve cross-service interaction, solving the problem of low communication efficiency between micro-kernels on the ARM architecture, achieving efficient and secure communication.
Patent Information
- Application Number
- CN202510706542.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-29
- Publication Date
- 2025-08-12
AI Technical Summary
The existing microkernel interprocess communication has high performance overhead in the ARM architecture, especially due to multiple address space switching and privilege level switching, it is difficult to improve efficiency while ensuring security and isolation.
By allocating tagged memory to applications and system services, using memory tag extension features to achieve isolated memory domains and execution domains, and conducting inter-process communication in the library operating system or kernel module form, and using fast channels to achieve cross-service interaction.
It significantly reduces the latency of communication between microkernel processes, improves communication efficiency, and ensures the security and isolation of the system, reducing the overhead of address space switching and privilege-level switching.
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Figure CN120469824A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of operating systems, and in particular to a method, system and medium for accelerating inter-microkernel communication by utilizing memory tag extension. Background Art
[0002] Microkernel operating systems move most system services to user-mode processes, retaining only critical core functionality within the microkernel. Applications access these system services by initiating inter-process communication (IPC) requests. This architecture improves system security and reliability because each system service runs in an independent process, and an abnormality in one service does not affect the normal operation of other services or the microkernel. However, traditional microkernel IPC mechanisms typically involve multiple address space switches and privilege level transitions, resulting in high performance overhead.
[0003] Existing methods for optimizing inter-process communication in microkernels primarily focus on the software level, such as improving efficiency by passing parameters in registers and avoiding scheduling. However, these methods still have significant overhead. While some hardware-based improvement methods can accelerate context switching and permission checks, they often require hardware modifications and are difficult to apply directly on existing platforms. Furthermore, existing designs based on emerging hardware features are mostly targeted at the x86 architecture, while the ARM architecture lacks the corresponding hardware features to effectively reduce inter-process communication latency. Therefore, how to leverage new hardware features on the ARM architecture to accelerate microkernel inter-process communication while ensuring system security and isolation is a question worth studying. Summary of the Invention
[0004] In response to the above technical problems, the present invention provides a method, system and medium for accelerating inter-microkernel process communication using memory tag extension, which significantly reduces the delay of inter-microkernel process communication while ensuring effective isolation and security.
[0005] A first aspect of the present invention provides a method for accelerating microkernel inter-process communication using memory tag extensions, comprising: Allocate memory for applications and system services and tag the allocated memory; Implementing isolated memory domains and execution domains based on the tags; Leverage memory tagging extensions for inter-process communication in a library operating system or kernel module form factor; and Enable cross-service interactions through fast channels.
[0006] In a possible implementation, allocating memory to the application and system services and labeling the allocated memory includes: Utilize the memory tagging function provided by the Memory Tagging Extension to add a 4-bit tag to each 16-byte memory area; The tag is stored in the upper 4 bits of the pointer.
[0007] In a possible implementation, the method further includes: When accessing memory, automatically check whether the label of the pointer matches the label of the memory; If there is a mismatch, access is blocked and the illegal access attempt is logged.
[0008] In a possible implementation, performing inter-process communication using the memory tag extension feature in a library operating system form includes: Package the application and the system services it requires in the same address space; The memory tagging extension feature is used to provide different memory domains for applications and system services within a process.
[0009] In one possible implementation, performing inter-process communication using the memory tag extension feature in a kernel module form includes: Run system services in kernel mode; Use the memory tag extension feature to ensure isolation between system services and the microkernel.
[0010] In one possible implementation, implementing cross-service interaction through a fast channel includes: Create a fast channel for inter-process communication connections; The fast channel is used to establish a shared memory for two system services.
[0011] In a possible implementation, the method further includes: When accessing shared memory, disable the memory tag extension function by setting the SCTLR_EL1 register; At the end of the access, reset the SCTLR_EL1 register to enable the memory tag extension function.
[0012] In a possible implementation, the method further includes: Log illegal memory access attempts; Perform security responses based on recorded illegal access attempts.
[0013] A second aspect of the present invention provides a system for accelerating microkernel inter-process communication using memory tag extensions, comprising: The memory allocation module is used to allocate memory to applications and system services and to label the allocated memory; An isolation implementation module, configured to implement isolated memory domains and execution domains based on the tags; Communication module for inter-process communication using memory tag extensions in the form of a library operating system or kernel module; Fast channel module, used to achieve cross-service interaction.
[0014] According to a third aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a computer, the method according to the first aspect of the embodiment of the present invention is executed.
[0015] In summary, compared with the prior art, the present invention has at least one of the following beneficial technical effects: 1. By using the memory tag extension feature to implement a memory allocator, different tags are added when allocating memory to different applications and system services, providing isolated memory domains and execution domains, ensuring that memory operations between applications and system services do not interfere with each other; 2. Supports accelerated inter-process communication in both library operating system and kernel module forms, reducing the number of privilege level switches and address space switches during inter-process communication, greatly improving the efficiency of inter-process communication; 3. A "fast channel" for cross-service interaction is implemented, enabling applications and different system services to securely access shared memory by flexibly controlling the opening and closing of memory tag extensions. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 This is a flowchart of an embodiment of a method for accelerating inter-microkernel process communication according to the present invention.
[0017] Figure 2 Flowchart of an embodiment of a method for accelerating microkernel inter-process communication according to the present invention.
[0018] Figure 3 A schematic diagram of an embodiment of a method for accelerating inter-microkernel process communication according to the present invention.
[0019] Figure 4 A topology diagram of an embodiment of the method for accelerating inter-microkernel process communication according to the present invention.
[0020] Figure 5 A topology diagram of another embodiment of the method for accelerating inter-microkernel process communication according to the present invention.
[0021] Figure 6 FIG. 1 is a schematic structural diagram of an embodiment of a system for accelerating inter-microkernel process communication according to the present invention. DETAILED DESCRIPTION
[0022] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.
[0023] It should be understood that the terms "first," "second," and "third," etc. in the claims, specifications, and drawings of the present disclosure are used to distinguish different objects rather than to describe a specific order. The terms "include" and "comprising" used in the specifications and claims of the present disclosure indicate the presence of the described features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or their collections. It should also be understood that the terms used in this disclosure specification are for the purpose of describing specific embodiments only and are not intended to limit the present disclosure.
[0024] Reference Figure 1 An embodiment of the present invention discloses a method for accelerating inter-microkernel process communication using memory tag extension, which includes the following steps.
[0025] S1 allocates memory for applications and system services and tags the allocated memory.
[0026] When allocating memory for applications and system services, the system service colored memory allocator uses the memory tag extension technology to add a 4-bit tag to each 16-byte memory area. Figure 2 The working process of the system service colored memory allocator is as follows: when applications and system services start or need memory resources, the system service colored memory allocator allocates memory for them; according to the differences between applications and system services, the memory tag function provided by the memory tag extension is used to add a 4-bit tag to each 16-byte memory area; the high 4 bits of the pointer obtained by the application and system service store the corresponding tag.
[0027] S2, implementing isolated memory domains and execution domains based on the tags.
[0028] When applications and system services use pointers to access memory, the hardware automatically checks whether the pointer's key value matches the memory tag. If not, the access is blocked and the illegal access attempt is logged. This step ensures that memory operations between applications and system services do not interfere with each other.
[0029] S3, uses the memory tag extension feature for inter-process communication in the form of a library operating system or kernel module.
[0030] In the library operating system model, applications and their required system services are packaged together and run in the same address space. In the kernel module model, system services run in kernel state, sharing the kernel address space with the microkernel. Both models reduce the number of privilege level switches and address space switches during inter-process communication, significantly reducing the time overhead of inter-process communication.
[0031] S4, enables cross-service interaction through fast channels.
[0032] When a system service requests an inter-process communication connection, the microkernel creates a dedicated fast channel for that connection. Inter-service communication supports establishing shared memory between two system services when the Memory Tagging Extensions feature is enabled. When accessing shared memory, system services use the interface provided by the fast channel. In the fast channel implementation code, the Memory Tagging Extensions feature is disabled before accessing shared memory and re-enabled afterward to ensure the security of subsequent memory operations.
[0033] The embodiment of the present invention provides a method for accelerating inter-process communication of a microkernel using memory tag extensions. By allocating tagged memory to applications and system services, isolated memory domains and execution domains are implemented. At the same time, the memory tag extension feature is utilized in the form of a library operating system or kernel module for inter-process communication, and cross-service interaction is achieved through a fast channel. Thus, on the basis of ensuring system security and isolation, the inter-process communication efficiency of the microkernel operating system is significantly improved, the overhead of address space switching and privilege level switching is reduced, and a new solution is provided for performance optimization of the microkernel architecture on the ARM platform.
[0034] In some embodiments, the system service colored memory allocator utilizes the Memory Tagging Extension (MTE) technology to allocate and tag memory for applications and system services. Specifically, the system service colored memory allocator uses the memory tagging functionality provided by the MTE to assign a 4-bit tag to each 16-byte memory region. This tagging mechanism enables different applications and system services to have isolated memory domains.
[0035] During memory allocation, the system service colored memory allocator stores the allocated tag in the upper 4 bits of the pointer. This design allows the pointer itself to carry the tag information of the memory area, facilitating subsequent memory access checks.
[0036] Reference Figure 3, the figure shows the memory allocation and label matching of different system services. The figure shows the memory allocation status of five system services. System service 1, system service 3 and system service 5 each have a piece of memory with a matching label, and the key value stored on their pointers matches the memory label, so they can access their respective memory areas normally. The memory originally allocated by system service 2 has been released and reallocated to system service 3, resulting in the pointer key value of system service 2 not matching the current memory label. System service 4 attempts to access a memory domain that does not belong to it, and its pointer key value also does not match the target memory label.
[0037] During memory access, the hardware automatically checks whether the pointer's key value matches the memory region's tag. If a mismatch is detected, the access is blocked and the illegal access attempt is logged. This mechanism effectively prevents use-after-free errors such as those in System Service 2 and attempts by System Service 4 to access unauthorized memory, thereby ensuring the security and isolation of memory operations.
[0038] Through this memory marking and checking mechanism, memory isolation of different applications and system services can be achieved at the hardware level, improving the security of the microkernel operating system while laying the foundation for efficient inter-process communication.
[0039] In some implementations, a pointer's tag is automatically checked to ensure it matches the memory's tag during memory access. Specifically, when an application or system service attempts to access memory, the hardware automatically compares the tag stored in the pointer's top four bits with the tag of the target memory region. This automatic check mechanism requires no additional software overhead and effectively ensures the security of memory access.
[0040] If a mismatch between the pointer tag and the memory tag is detected, the access operation is immediately blocked. Simultaneously, the illegal access attempt is recorded, including information such as the time of access, the source process, and the target memory address. This record facilitates subsequent security analysis and system optimization.
[0041] Continue to refer to Figure 3 ,The pointer tags of system services 1, 3, and 5 match the tags of their respective memory regions, so they can access the memory normally.,However, the access operations of system services 2 and 4 are blocked because their pointer tags do not match the tags of the target memory regions.
[0042] System Service 2 attempted to access a memory area that had already been freed and reallocated to System Service 3, causing the pointer tag to be inconsistent with the current memory tag. This situation typically occurs when using freed memory, and the automatic checking mechanism can effectively prevent security issues caused by such errors.
[0043] System service 4 attempts to access a memory region that it does not own; its pointer tag does not match the target memory tag. This behavior could be a malicious attack attempt or an out-of-bounds access caused by a program logic error. In either case, the illegal access is blocked and the relevant information is logged for further analysis.
[0044] This automatic checking and blocking mechanism enables memory isolation between different applications and system services at the hardware level, effectively improving the security of the microkernel operating system. Furthermore, because the checking process is automatically performed by hardware, the impact on system performance is minimal, providing a solid security foundation for efficient inter-process communication.
[0045] In some embodiments, memory tag extensions are used for inter-process communication in a library operating system configuration. Figure 4 The figure shows the architecture of a library operating system. In this form, applications and the system services they require are packaged in the same address space. This design eliminates the need for traditional system call interfaces when applications initiate communication with system services, thus avoiding privilege level and address space switching, significantly reducing communication overhead between applications and system services, and between system services themselves.
[0046] Although applications and system services share the same address space, the system still uses memory tagging to extend the hardware feature to provide different memory domains for applications and system services within a process. This mechanism ensures that memory access between different components is secure and controlled, and only components with appropriate permissions can access the corresponding memory resources.
[0047] Specifically, each application and system service is assigned a uniquely tagged memory region. When an application or system service attempts to access memory, the hardware automatically checks whether the tag in the access request matches the tag of the target memory region. If the tags do not match, access is blocked and the illegal attempt is logged.
[0048] This design maintains efficient inter-process communication while also safeguarding system security and isolation. Applications cannot directly access the private memory of system services, and vice versa. Furthermore, the memory of different system services is isolated from each other, preventing failures or malicious behavior in one service from affecting other services.
[0049] In this way, the library operating system fully utilizes the Memory Tagging Extensions feature to achieve efficient inter-process communication and strict memory isolation within a single address space. This architecture retains the security advantages of a microkernel while significantly improving system performance, opening up new possibilities for the application of microkernel operating systems on ARM platforms.
[0050] In some embodiments, a kernel module is used to utilize the memory tag extension feature for inter-process communication. Figure 5 The figure shows the kernel module architecture. In this form, system services run in kernel mode rather than traditional user mode. This design allows system services to share the kernel address space with the microkernel, eliminating privilege level switching and address space switching during inter-process communication, significantly reducing communication overhead.
[0051] In the kernel module model, the original microkernel only performs the most critical tasks, such as scheduling, inter-process communication, and other basic functions. System services are loaded into kernel space as kernel modules and run at the same privilege level as the microkernel. This architecture allows system services to directly access kernel resources without going through the traditional system call interface, thereby improving the execution efficiency of system services.
[0052] Although system services run in kernel mode, the system still utilizes memory tagging extensions to ensure isolation between system services and the microkernel. Specifically, each system service and microkernel is allocated a uniquely tagged memory region. When a system service or microkernel attempts to access memory, the hardware automatically checks whether the tag in the access request matches the tag of the target memory region.
[0053] This memory isolation mechanism ensures that even when sharing the kernel address space, memory access between different system services, and between system services and the microkernel, remains controlled and secure. The failure or abnormal behavior of one system service will not directly affect the normal operation of other system services or the microkernel, thus maintaining the overall stability and security of the system.
[0054] When system services need to interact with the microkernel or other system services, they do so through predefined interfaces and shared memory regions. These interfaces and shared regions are specially designed to allow controlled cross-domain access while still maintaining the overall memory isolation strategy.
[0055] In this way, the kernel module form factor fully utilizes the Memory Tagging Extensions feature to achieve efficient inter-process communication and strict memory isolation within the shared kernel address space. This architecture retains the modularity and isolation advantages of the microkernel while significantly improving system performance, opening up new possibilities for the application of microkernel operating systems on the ARM platform.
[0056] In some implementations, cross-service interaction is achieved through a fast channel, which is a mechanism specifically used for inter-process communication to improve the efficiency and security of communication between system services.
[0057] When two system services need to establish an inter-process communication connection, a dedicated fast channel is created for that connection. This fast channel provides a dedicated communication channel for the two system services, avoiding interference with other services and improving communication efficiency and security.
[0058] A key feature of FastChannel is the establishment of shared memory between two system services. Shared memory allows system services to exchange data directly without going through complex message-passing mechanisms. This significantly reduces the overhead of data copying and transmission, improving the efficiency of inter-process communication.
[0059] In the library operating system form, such as Figure 4 As shown, Fast Channel is implemented within the same address space. The system allocates a shared memory area for the two system services that need to communicate and uses the Memory Tagging Extensions feature to set special access permissions for this area. This ensures that only the two system services using Fast Channel can access this shared memory, maintaining overall system security.
[0060] In kernel module form, such as Figure 5 As shown in Figure 2, the fast channel is implemented in kernel space. The system allocates shared memory in kernel space and uses memory tagging extensions to control access permissions. This approach allows system services to efficiently exchange data directly in kernel space while maintaining the necessary isolation.
[0061] The use of fast channels simplifies communication between system services. When a system service needs to communicate with another, it uses the interface provided by the fast channel to access shared memory. This process does not require privilege level switching or complex system calls, significantly reducing communication latency.
[0062] Cross-service interaction via the fast channel significantly improves the efficiency of inter-process communication while ensuring security and isolation. This mechanism provides an efficient and secure inter-service communication method for microkernel operating systems, helping to improve the performance and reliability of the entire system.
[0063] In some implementations, the system controls the on / off of the Memory Tag Extension function by setting the SCTLR_EL1 register when accessing shared memory. SCTLR_EL1 is a system control register in the ARM architecture used to manage the first exception level, which contains bits that control the Memory Tag Extension function.
[0064] When a system service needs to access shared memory, it first disables Memory Tagging Extensions (MTEs) by setting the SCTLR_EL1 register. This is accomplished by modifying a specific bit in the SCTLR_EL1 register. With MTEs disabled, system services can access shared memory without the restrictions of memory tag checking, enabling efficient data exchange.
[0065] After the shared memory access is completed, the SCTLR_EL1 register is reset to enable the Memory Tag Extension feature. This step restores the normal memory protection mechanism and ensures that subsequent memory operations are still protected by the Memory Tag Extension feature.
[0066] This dynamic control of memory tagging extensions allows for temporary relaxation of memory access restrictions when needed, while maintaining strict memory protections most of the time. This design provides flexibility and performance optimization for specific scenarios while ensuring overall system security.
[0067] Throughout system operation, the SCTLR_EL1 register setup is managed by the fast-path module. The fast-path module automatically sets the register when a system service requests shared memory access and restores the register setup after the access completes. This automated process ensures tight integration of Memory Tagging Extension control with shared memory access, reducing the potential for human error.
[0068] This mechanism enables efficient access to shared memory while maintaining overall memory security. This approach provides an effective way to balance performance and security for microkernel operating systems, and is particularly suitable for scenarios requiring frequent inter-process communication.
[0069] In some embodiments, the system records illegal memory access attempts and performs a security response based on the records. When it is detected that the tag of the memory access request does not match the tag of the target memory area, the access is considered an illegal attempt and recorded.
[0070] The records include the timestamp of the access, the process or service identifier that initiated the access, the target memory address, the access type (read / write), and mismatched tag information. These detailed records facilitate subsequent security analysis and system optimization.
[0071] The system sets up a dedicated buffer in the memory controller to store these records. When the buffer reaches a preset threshold or periodically checks, the system transfers the records to persistent storage for long-term storage and analysis.
[0072] Reference Figure 3This figure shows the memory access behavior of different system services. The access attempts by System Service 2 and System Service 4 were identified as illegal by the system. For System Service 2, the system recorded its attempt to access a memory area that had been freed and reallocated to System Service 3. For System Service 4, the system recorded its attempt to access a memory domain that did not belong to it. These records contain the detailed information described above and provide a basis for subsequent analysis.
[0073] Based on the recorded illegal access attempts, a series of security response measures are executed: 1. Real-time alerts: When illegal access is detected, an alert is immediately sent to the administrator or security module, including key access information; 2. Access restriction: Implement temporary or permanent access restrictions on processes or services that frequently experience illegal access to prevent potential malicious behavior; 3. Resource isolation: Isolate suspicious processes or services into restricted execution environments, limiting their access to system resources; 4. Dynamic Adjustment: Dynamically adjusts memory allocation strategies and tag allocation mechanisms based on illegal access patterns to enhance overall system security. 5. Automatic analysis: Use machine learning algorithms to analyze illegal access records and identify potential security vulnerabilities or attack patterns; 6. Security patches: Based on analysis results, automatically generate or recommend security patches to fix software defects that may lead to unauthorized access. 7. Audit tracking: Maintain detailed audit logs to record the implementation of all security response measures to facilitate subsequent security audits and compliance checks.
[0074] This recording and response mechanism not only enables timely detection and prevention of illegal memory access, but also enables continuous improvement of security policies, enhancing the overall security and reliability of the system. This approach provides a proactive security protection mechanism for microkernel operating systems, effectively addressing potential memory security threats.
[0075] Reference Figure 6 The present invention also discloses a system for accelerating inter-process communication in a microkernel using memory tag extensions, including a memory allocation module 1, an isolation implementation module 2, a communication module 3, and a fast channel module 4. These modules work together to implement an efficient and secure inter-process communication mechanism.
[0076] Memory allocation module 1 is responsible for allocating memory for applications and system services and tagging the allocated memory. Memory allocation module 1 utilizes the ARM architecture's Memory Tagging Extensions technology to assign a 4-bit tag to each 16-byte memory region during memory allocation. These tags are stored in the upper 4 bits of a pointer and are used for subsequent memory access control.
[0077] Isolation Implementation Module 2 implements isolated memory and execution domains based on the tags assigned by Memory Allocation Module 1. Isolation Implementation Module 2 checks at the hardware level whether the tags in the memory access request match the tags of the target memory region. If a mismatch is detected, Isolation Implementation Module 2 blocks the access and logs the illegal access attempt, ensuring that memory operations between different applications and system services do not interfere with each other.
[0078] Communication module 3 utilizes the Memory Tag Extension feature for inter-process communication in either a library operating system or kernel module form. In the library operating system form, communication module 3 packages applications and their required system services into the same address space, reducing privilege level switching and address space switching during inter-process communication. In the kernel module form, communication module 3 runs system services in kernel mode, sharing kernel address space with the microkernel, further reducing communication overhead.
[0079] Fast Channel Module 4 enables cross-service interaction. When a system service requests an inter-process communication connection, Fast Channel Module 4 creates a dedicated fast channel for that connection. Fast Channel Module 4 supports the establishment of shared memory between two system services when the Memory Tagging Extensions feature is enabled, and provides an interface for accessing this shared memory.
[0080] During system operation, memory allocation module 1, isolation implementation module 2, communication module 3, and fast channel module 4 work closely together. Memory allocation module 1 allocates tagged memory to applications and system services. Isolation implementation module 2 uses these tags to maintain memory isolation. Communication module 3 uses this isolation mechanism to achieve efficient inter-process communication. Fast channel module 4 builds on this to provide more flexible cross-service interaction capabilities.
[0081] The system provided by the embodiment of the present invention for accelerating inter-process communication of microkernels by using memory tag extensions realizes an efficient and secure inter-process communication mechanism through the collaborative work of memory allocation module 1, isolation implementation module 2, communication module 3 and fast channel module 4. The system uses the memory tag extension technology of the ARM architecture to label memory allocation, realizes memory isolation at the hardware level, and supports inter-process communication in the form of library operating system and kernel module at the same time, greatly reducing the overhead of privilege level switching and address space switching. In addition, the system also provides a fast channel mechanism, so that cross-service interaction can be carried out efficiently between system services. This design not only significantly improves the inter-process communication efficiency of the microkernel operating system, but also ensures the security and isolation of the system, and provides an innovative solution for the performance optimization of the microkernel architecture on the ARM platform.
[0082] The embodiment of the present invention also discloses a readable storage medium.
[0083] A readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in any one of the above embodiments.
[0084] It is understood that computer-readable storage media may include any entity or device capable of carrying a computer program, recording media, USB flash drives, removable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), and software distribution media. A computer program includes computer program code. Computer program code may be in source code form, object code form, an executable file, or some intermediate form. Computer-readable storage media may include any entity or device capable of carrying a computer program code, recording media, USB flash drives, removable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), and software distribution media.
[0085] In certain embodiments of the present invention, an electronic device may include a controller or processor. The controller is a single-chip microcomputer chip that integrates a processor, memory, a communication module, and the like. The processor may refer to the processor contained in the controller. The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), off-the-shelf programmable gate arrays (FPGAs), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and the like.
[0086] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing a specific logical function or process step, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention pertain.
[0087] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0088] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A method for accelerating microkernel inter-process communication using memory tag extension, characterized in that: include: Allocate memory for applications and system services and tag the allocated memory; Implementing isolated memory domains and execution domains based on the tags; Use memory tagging extensions for inter-process communication in a library operating system or kernel module form factor; as well as Enable cross-service interactions through fast channels.
2. The method for accelerating microkernel inter-process communication according to claim 1, wherein: Allocating memory to applications and system services and tagging the allocated memory includes: Utilize the memory tagging function provided by the Memory Tagging Extension to add a 4-bit tag to each 16-byte memory area; The tag is stored in the upper 4 bits of the pointer.
3. The method for accelerating microkernel inter-process communication according to claim 2, characterized in that: Also includes: When accessing memory, automatically check whether the label of the pointer matches the label of the memory; If there is a mismatch, access is blocked and the illegal access attempt is logged.
4. The method for accelerating microkernel inter-process communication according to claim 1, wherein: The method of using memory tag extensions to perform inter-process communication in a library operating system form includes: Package the application and the system services it requires in the same address space; The memory tagging extension feature is used to provide different memory domains for applications and system services within a process.
5. The method for accelerating microkernel inter-process communication according to claim 1, wherein: The method of using the memory tag extension feature to perform inter-process communication in the kernel module form includes: Run system services in kernel mode; Use the memory tag extension feature to ensure isolation between system services and the microkernel.
6. The method for accelerating microkernel inter-process communication according to claim 1, characterized in that: Implementing cross-service interaction through the fast channel includes: Create a fast channel for inter-process communication connections; The fast channel is used to establish a shared memory for two system services.
7. The method for accelerating microkernel inter-process communication according to claim 6, characterized in that: Also includes: When accessing shared memory, disable the memory tag extension function by setting the SCTLR_EL1 register; At the end of the access, reset the SCTLR_EL1 register to enable the memory tag extension function.
8. The method for accelerating microkernel inter-process communication according to claim 1, wherein: Also includes: Log illegal memory access attempts; Perform security responses based on recorded illegal access attempts.
9. A system for accelerating microkernel inter-process communication using memory tag extensions, characterized in that: The system comprises: The memory allocation module is used to allocate memory to applications and system services and to label the allocated memory; An isolation implementation module, configured to implement isolated memory domains and execution domains based on the tags; Communication module for inter-process communication using memory tag extensions in the form of a library operating system or kernel module; Fast channel module, used to achieve cross-service interaction.
10. A computer-readable storage medium, characterized in that A computer program is stored thereon, and when the computer program is run by a computer, the method for accelerating microkernel inter-process communication according to any one of claims 1 to 8 is executed.