Design optimization method of radio frequency power amplifier

Abstract

The invention discloses a design optimization method of a radio frequency power amplifier, and relates to the technical field of design optimization. The method comprises the following steps: collecting the working frequency and the circuit topological structure of the radio frequency power amplifier, establishing a digital twin simulation model, and generating an initial impedance value; simulation performance indexes of the amplifier under the input signal are obtained through simulation; matching network parameters are adjusted according to a dynamic reconstruction matching network algorithm, and a dynamic optimization impedance set is generated; controlling the tunable element to reconstruct the actual impedance value of the radio frequency power amplifier, and collecting the actual performance index of the output signal; comparing an error between the simulation performance index and the actual performance index, and if the error exceeds a preset error threshold, iteratively updating a parasitic parameter of the digital twinborn model; and if the error is within the threshold value, locking the actual impedance value as the optimal configuration, and amplifying and outputting the input signal. The working efficiency of the radio frequency power amplifier is improved.

Description

Technical Field

[0001] The present application relates to the technical field of design optimization, and in particular to a design optimization method for a radio frequency power amplifier. Background Art

[0002] RF power amplifiers are an important component of various wireless transmitters. In the transmitter's front-end circuit, the RF signal power generated by the modulated oscillator circuit is very small and needs to pass through a series of amplification and buffering stages, intermediate amplification stages, and final power amplification stages to obtain sufficient RF power before it can be fed to the antenna for radiation. In modern wireless communications, RF equipment is quite common, and RF power amplifiers play a vital role in these devices. Therefore, optimizing the design of RF power amplifiers is conducive to improving the quality of wireless communications. However, existing RF power amplifiers have parasitic parameters during operation. Parasitic parameters refer to non-essential elements present in electronic components or circuits. These parameters can have an adverse effect on the normal operation of the components or circuits. Parasitic parameters can lead to reduced efficiency, signal distortion, and stability issues, affecting the efficiency of RF power amplifiers. Summary of the Invention

[0003] The object of the present invention is to provide a design optimization method for a radio frequency power amplifier to solve the problems raised in the above background technology.

[0004] This application provides a design optimization method for a radio frequency power amplifier, which adopts the following technical solutions:

[0005] Collect the operating frequency and circuit topology of the RF power amplifier, establish a digital twin simulation model, and generate the initial impedance value based on the digital twin simulation model;

[0006] Loading the input signal into the digital twin simulation model to simulate and obtain the simulation performance index of the amplifier under the input signal;

[0007] Taking the initial impedance value as the search starting point, combined with the dynamic reconstruction matching network algorithm, the matching network parameters are iteratively adjusted within the preset impedance range to generate a dynamically optimized impedance set;

[0008] Based on the dynamically optimized impedance set, controlling the tunable element to reconstruct the actual impedance value of the radio frequency power amplifier and collecting actual performance indicators of the output signal;

[0009] Compare the simulated performance indicators with the actual performance indicators to determine whether the error exceeds the preset error threshold. If the error exceeds the error threshold, iteratively update the parasitic parameters of the digital twin simulation model;

[0010] If the error is within the threshold, the actual impedance value is locked as the optimal configuration, and the optimal configuration is fixed to the RF power amplifier to amplify the input signal and output the target power signal.

[0011] Preferably, the steps of collecting the operating frequency and circuit topology of the radio frequency power amplifier, establishing a digital twin simulation model, and generating an initial impedance value according to the digital twin simulation model are specifically as follows:

[0012] Obtain the operating frequency band and circuit topology of the RF power amplifier, establish a physical model of the RF power amplifier using 3D electromagnetic simulation software, and extract parasitic parameters;

[0013] Import parasitic parameters into a circuit simulation tool, build a digital twin simulation model, set up a load-pull test environment in the digital twin model, scan the output impedance plane, select the impedance region that meets the preset standard, and obtain a set of candidate initial impedance values;

[0014] Taking power matching as the optimization goal, a genetic algorithm is used to screen the impedance value that meets the preset requirements from the candidate initial impedance value set to generate the initial impedance value.

[0015] Preferably, the steps of importing parasitic parameters into a circuit simulation tool, building a digital twin simulation model, setting a load pull test environment in the digital twin model, scanning the output impedance plane, selecting an impedance region that meets a preset standard, and obtaining a set of candidate initial impedance values are specifically as follows:

[0016] Insert a programmable impedance tuner module into the digital twin model, dynamically adjust the adjustment resolution of the reflection coefficient based on an adaptive step size algorithm, and set the load-pull test environment based on the adjustment resolution;

[0017] Perform a load-pull test according to the load-pull test environment, and obtain an impedance plane based on the test results;

[0018] The distributed simulation task is deployed using the cloud computing platform, the impedance plane is divided into multiple sub-areas, and each sub-area is assigned an independent computing node for parallel simulation;

[0019] Collect the performance indicators of each impedance point in real time and form the corresponding impedance-performance mapping curve;

[0020] Set performance screening criteria and use the impedance-performance mapping curve to screen the impedance region that meets the performance screening criteria;

[0021] Search the impedance points that meet the preset conditions from the impedance area to form a candidate initial impedance set.

[0022] Preferably, the step of dynamically adjusting the resolution of the reflection coefficient according to the adaptive step size algorithm is specifically as follows:

[0023] Setting an initial load reflection coefficient and extracting the real part R and the imaginary part I of the complex form of the initial load reflection coefficient;

[0024] The resolution of the grid division in the scanning range is recorded as the step size, and the initial step size Δ0 is set;

[0025] According to the gradient threshold formula Calculate the gradient threshold G th , where N is the baseline efficiency threshold, is the derivative of the rate of change of the PAE with respect to the reflection coefficient;

[0026] The power added efficiency formula is: Among them, P out is the RF output power, P in is the RF input power, P DC is the DC input power;

[0027] The real part directional gradient formula is:

[0028]

[0029] Among them G R is the real part directional gradient, PAE(R+Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient increases by an initial step size and the imaginary part remains unchanged, and PAE(R-Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient decreases by an initial step size and the imaginary part remains unchanged;

[0030] The formula for the imaginary direction gradient is:

[0031]

[0032] Among them, G I is the imaginary part gradient, PAE(R, I+Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient increases by an initial step size and the real part remains unchanged, and PAE(R, I-Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient decreases by an initial step size and the real part remains unchanged;

[0033] According to the total gradient formula Calculate the total gradient G, combined with the gradient threshold G th Get the real-time step size Δ new , as the adjustment resolution of the reflection coefficient, the real-time step equation is:

[0034]

[0035] Preferably, the step of taking power matching as the optimization goal and using a genetic algorithm to screen an impedance value that meets preset requirements from a set of candidate initial impedance values to generate the initial impedance value is specifically as follows:

[0036] Establish a fitness function to calculate the candidate initial impedance value set {Z1, Z2, Z3…Z N The fitness F(Z) of each candidate initial impedance value in};

[0037] Calculate the source reflection coefficient Γ for each impedance S and the load end reflection coefficient Γ L , the calculation formulas are: Where Z0 is the system characteristic impedance, Z L is the load impedance;

[0038] The fitness function is: The impedance value whose fitness F(Z) reaches the preset fitness threshold is selected as the initial impedance population;

[0039] The parent impedance is selected from the initial impedance population according to the roulette wheel selection mechanism. After crossover mutation of the parent impedance, the impedance value with the highest fitness is selected as the initial impedance value.

[0040] Preferably, the step of loading the input signal into the digital twin simulation model and simulating to obtain the simulation performance index of the amplifier under the input signal is specifically as follows:

[0041] Collecting actual parameters of an actual radio frequency power amplifier, loading the input signal into the digital twin simulation model, and configuring the model parameters to be synchronized with the actual parameters;

[0042] Start the simulation, collect node data of the internal nodes of the RF power amplifier in real time, capture the transient response and steady-state response time series data, and obtain simulation data;

[0043] The simulated performance index values of the amplifier under the input signal are calculated based on the simulation data.

[0044] Preferably, the step of using the initial impedance value as the search starting point, combining the dynamic reconstruction matching network algorithm, iteratively adjusting the matching network parameters within the preset impedance range, and generating the dynamically optimized impedance set is specifically as follows:

[0045] Based on the simulation performance indicators output by the digital twin model and the preset performance indicator threshold, determine whether to trigger the dynamic reconstruction matching network algorithm;

[0046] If the dynamic reconstruction matching network algorithm is triggered, the impedance range is set with the initial impedance value as the search starting point;

[0047] Iteratively adjust the matching network parameters within the impedance range so that the output impedance Zout Approaching target impedance Z target ;

[0048] The digital twin model verifies the adjusted matching network parameters in real time, detects circuit stability and thermal distribution, and determines whether the circuit is stable. If the circuit is unstable, the matching network parameters are iteratively adjusted again.

[0049] If the circuit is stable, the impedance value that reaches the preset fitness threshold is selected according to the fitness function to generate a dynamic optimized impedance set {Z y1 , Z y2 , Z y3 …Z yN}.

[0050] Preferably, the matching network parameters are iteratively adjusted within the impedance range so that the output impedance Z out Approaching target impedance Z target The steps are as follows:

[0051] The target impedance formula is: Z targ et =argmin(|Γ S Γ L |+λ·|P loss |), where P loss is the matching network loss power, λ is the weight factor;

[0052] Matching network loss power P loss The calculation formula is: loss =|I out | 2 DR, where I out To match the current at the output of the network, DR is the parasitic resistance.

[0053] Preferably, the steps of verifying the adjusted matching network parameters in real time through the digital twin model, detecting the circuit stability and thermal distribution state, and determining whether the circuit is stable are specifically as follows:

[0054] The stability factor K is calculated based on the stability function, which is:

[0055]

[0056] When K>1, it is judged that the circuit has no self-oscillation and the circuit meets the first stability condition;

[0057] Calculate the transistor junction temperature T j , the transistor junction temperature calculation formula is: T j =T c +P j ·rR j , where T cis the transistor package surface temperature, P j is the transistor power dissipation, rR j Thermal resistance from junction to ambient;

[0058] Set the transistor junction temperature threshold T max , if T j ≤T max , then the thermal distribution is judged to be qualified and the circuit meets the second stability condition;

[0059] If the circuit satisfies both the first stability condition and the second stability condition, the circuit is determined to be stable; otherwise, the circuit is determined to be unstable.

[0060] Preferably, the step of controlling the tunable element to reconstruct the actual impedance value of the radio frequency power amplifier based on the dynamically optimized impedance set and collecting the actual performance index of the output signal is specifically:

[0061] Based on the dynamically optimized impedance set, obtaining application requirements, and selecting an optimal impedance from the dynamically optimized impedance set according to the application requirements;

[0062] Construct a tunable element array, integrate it into the output stage of the RF power amplifier, dynamically adjust the tunable elements, adjust the actual output impedance of the RF power amplifier to be consistent with the optimal impedance, and obtain the actual impedance value;

[0063] Collect real-time working data of the RF power amplifier and obtain actual performance indicators of the RF power amplifier based on the real-time working data.

[0064] In summary, this application includes at least one of the following beneficial technical effects:

[0065] 1. By adopting digital twin simulation technology and a dynamic impedance matching strategy, we successfully achieved intelligent design and significant optimization of RF power amplifier performance. The dynamic matching network can adjust impedance parameters in real time, effectively reducing reflection loss and nonlinear distortion, while significantly improving output power and operating efficiency. The introduction of the digital twin model replaces the traditional trial-and-error design method, significantly reducing the cost of physical experiments and debugging cycles. In addition, the dynamically reconfigured matching network has excellent adaptability, capable of meeting the diverse needs of different frequencies and signal modulations, not only expanding the application range of RF power amplifiers, but also further improving their operating efficiency.

[0066] 2. Extracting parasitic parameters (such as lead inductance and distributed capacitance) through three-dimensional electromagnetic simulation solves the model inaccuracy problem caused by traditional circuit simulation ignoring high-frequency parasitic effects, reducing the error between the digital twin simulation model and the actual physical device. Combining load pull and genetic algorithms, the optimal impedance point can be quickly screened in a virtual environment, avoiding the time-consuming problems of traditional trial-and-error experiments and shortening the R&D cycle. In addition, by introducing an adaptive step size algorithm, not only the accuracy is improved, but also the speed is increased, which increases the speed of design optimization simulation of RF power amplifiers.

[0067] 3. The dynamic reconstruction matching network algorithm significantly improves the efficiency, linearity, and multi-scenario adaptability of the RF power amplifier (PA) by adjusting the impedance matching state in real time. This technology combines intelligent control mechanisms and tunable components to dynamically reconstruct the matching network parameters so that the output impedance always approaches the target impedance. Dynamic adjustment of the output impedance improves power added efficiency and reduces harmonic distortion (THD). Through thermal distribution state detection, device overheating or self-oscillation caused by impedance mismatch is avoided. Combining the K factor and the junction temperature threshold, the final stability conclusion is output. Double verification ensures long-term and reliable operation of the circuit, improving the stability and reliability of the design optimization simulation of the RF power amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 It is a schematic diagram of the specific steps of an embodiment of a design optimization method for a radio frequency power amplifier of the present invention. DETAILED DESCRIPTION

[0069] Below is a combination of the embodiments and Figure 1 The present invention will be described in further detail, but the embodiments of the present invention are not limited thereto.

[0070] The present invention discloses a design optimization method for a radio frequency power amplifier, which specifically comprises the following steps:

[0071] Step S1: collect the operating frequency and circuit topology of the radio frequency power amplifier, establish a digital twin simulation model, and generate an initial impedance value based on the digital twin simulation model.

[0072] Step S2: Load the input signal into the digital twin simulation model to simulate and obtain the simulation performance index of the amplifier under the input signal.

[0073] Step S3, using the initial impedance value as the search starting point, combining with the dynamic reconstruction matching network algorithm, iteratively adjusting the matching network parameters within the preset impedance range to generate a dynamically optimized impedance set.

[0074] Step S4: Based on the dynamically optimized impedance set, the tunable element is controlled to reconstruct the actual impedance value of the radio frequency power amplifier, and the actual performance index of the output signal is collected.

[0075] Step S5: compare the simulation performance index with the actual performance index to determine whether the error exceeds the preset error threshold. If the error exceeds the error threshold, the parasitic parameters of the digital twin simulation model are iteratively updated.

[0076] Define error thresholds for key performance indicators (such as third-order intermodulation distortion (IMD3), power-added efficiency (PAE), and gain error). For example, set the IMD3 threshold to -40dBc. Use an analog-to-digital converter (ADC) to collect spectrum, power, and efficiency data of the actual output signal and compare them item by item with the simulation results of the digital twin model. Use a least-squares error algorithm or a weighted error algorithm to calculate the overall error value and determine whether it exceeds the preset threshold. Performance indicators include, but are not limited to, power gain, bandwidth, and linearity. Parasitic parameters include lead inductance, distributed capacitance, and package parasitic resistance. For example, if the actual output power is lower than the simulated value, increase the simulated value of the drain lead inductance in the model and recalculate the impedance matching network. By comparing simulation with actual performance, identify errors in parasitic parameters (such as distributed capacitance and lead inductance) and reversely update the digital twin model. This improves model accuracy, ensures the reliability of subsequent optimization processes, and forms a closed-loop correction mechanism.

[0077] Step S6: If the error is within the threshold, the actual impedance value is locked as the optimal configuration, the optimal configuration is fixed to the RF power amplifier, the input signal is amplified, and the target power signal is output.

[0078] The optimal value from the dynamically optimized impedance set is written to an FPGA or microcontroller register using a tunable element (such as a varactor diode or MEMS switch). Non-volatile memory (such as EEPROM) is used to store the optimal impedance parameters to ensure that the configuration is not lost after a power outage. When fixing the impedance of high-frequency circuits, the capacitor / inductor values in the matching network are fixed through laser trimming or solder jumpers. Reducing the complexity of dynamic adjustments while ensuring performance can improve the stability of RF power amplifier operation.

[0079] In practical applications, digital twin simulation and dynamic impedance matching technology have enabled intelligent design optimization of RF power amplifier performance. The dynamic matching network adjusts impedance in real time, reducing reflection loss and nonlinear distortion, and optimizing output power and efficiency. The digital twin model replaces traditional trial-and-error design, reducing physical experimentation costs and debugging time. Dynamically reconfiguring the matching network adapts to varying frequencies and signal modulation requirements, expanding its application range and improving the efficiency of RF power amplifiers.

[0080] The steps for collecting the operating frequency and circuit topology of the RF power amplifier, establishing a digital twin simulation model, and generating the initial impedance value based on the digital twin simulation model are as follows:

[0081] Step S11 , obtaining the operating frequency band and circuit topology of the radio frequency power amplifier, establishing a physical model of the radio frequency power amplifier through three-dimensional electromagnetic simulation software, and extracting parasitic parameters.

[0082] ANSYS Q3D Extractor can be used to perform 3D modeling of the RF power amplifier's packaging structure and bond wires. Finite Element Method (FEM) can be used to extract parasitic parameters from the equivalent circuit network. These parameters directly affect the impedance matching and stability of high-frequency circuits. For example, drain lead inductance and gate distributed capacitance can introduce resonance points, leading to power rollback or self-excitation. Electromagnetic field simulations based on physical models can accurately capture the near-field effects of structures such as microstrip lines and vias, addressing the shortcomings of traditional SPICE models.

[0083] In step S12, the parasitic parameters are imported into a circuit simulation tool, a digital twin simulation model is built, a load pull test environment is set in the digital twin model, the output impedance plane is scanned, and an impedance area that meets the preset standard is selected to obtain a set of candidate initial impedance values.

[0084] In step S13, with power matching as the optimization goal, a genetic algorithm is used to select an impedance value that meets the preset requirements from the candidate initial impedance value set to generate an initial impedance value.

[0085] In practical applications, the extraction of parasitic parameters (such as lead inductance and distributed capacitance) through three-dimensional electromagnetic simulation solves the model inaccuracy problem caused by traditional circuit simulation ignoring high-frequency parasitic effects, thereby reducing the error between the digital twin simulation model and the actual physical device. Combining load pull with genetic algorithms, the optimal impedance point can be quickly screened in a virtual environment, avoiding the time-consuming problems of traditional trial-and-error experiments and shortening the R&D cycle. Genetic algorithm optimization based on power matching objectives balances multiple indicators such as efficiency, linearity, and bandwidth, increasing output power added efficiency by 15%-20% and suppressing harmonic distortion.

[0086] The steps for importing parasitic parameters into a circuit simulation tool, building a digital twin simulation model, setting up a load-pull test environment in the digital twin model, scanning the output impedance plane, selecting impedance regions that meet preset standards, and obtaining a set of candidate initial impedance values are as follows:

[0087] Step S121: insert a programmable impedance tuner module into the digital twin model, dynamically adjust the adjustment resolution of the reflection coefficient according to the adaptive step size algorithm, and set the load pull test environment according to the adjustment resolution.

[0088] Integrating programmable impedance tuners (such as MEMS switch arrays or varactor diode matrices) into digital twin models and dynamically adjusting the resolution of the reflection coefficient using an adaptive step-size algorithm can effectively reduce time waste in load-pull test environments. This avoids overfitting or missed detection issues caused by traditional fixed step-size methods, for example, achieving high-precision matching near the resonance point.

[0089] Step S122 , performing a load-pull test according to the load-pull test environment, and obtaining an impedance plane according to the test results.

[0090] For example, use Keysight ADS software to set up a load-pull environment, sweep the frequency range from 2.4 to 5 GHz (10 MHz step size), compensate for 0.5 nH lead inductance and 0.2 pF distributed capacitance. Generate a Smith chart impedance plane and mark the high-efficiency region with PAE > 45% (real part 10 to 20 Ω, imaginary part -5 j to +5 j).

[0091] Step S123: deploying distributed simulation tasks using a cloud computing platform, dividing the impedance plane into multiple sub-areas, and allocating independent computing nodes to each sub-area for parallel simulation.

[0092] Divide the impedance plane into gridded subregions (e.g., 10×10), and perform parallel simulations using a cloud computing cluster. For example, schedule 100 compute nodes based on a Kubernetes cluster, assigning each node a 4-core vCPU to process a subregion (e.g., 20% of resources in the 2.4-3 GHz frequency band). Use Docker containers to encapsulate ADS simulation tasks, and synchronize data between nodes using the gRPC protocol.

[0093] Step S124 , collecting the performance index of each impedance point in real time and forming a corresponding impedance-performance mapping curve.

[0094] The performance indicators (gain, PAE, THD) of each impedance point are collected in real time, a multi-dimensional database is constructed and a continuous curve is fitted.

[0095] Step S125 , setting performance screening criteria, and screening impedance regions that meet the performance screening criteria in combination with the impedance-performance mapping curve.

[0096] Set dynamic screening criteria (such as PAE>45%, THD<-40dBc) and lock candidate areas through clustering algorithms.

[0097] Step S126: searching the impedance region for impedance points that meet preset conditions to form a candidate initial impedance set.

[0098] Balance efficiency and bandwidth. For example, set the real part range and imaginary part range of the impedance point, select impedance points whose real and imaginary parts meet the range as candidate initial impedance points, and form a set.

[0099] In actual application, the programmable impedance tuner module and adaptive step size algorithm are used to dynamically adjust the reflection coefficient resolution to solve the local optimal trap problem caused by the traditional fixed step size. The cloud computing platform is used to perform distributed parallel simulation of the impedance plane, which reduces the single simulation time from hours to minutes and supports rapid screening of millions of impedance points. Based on the impedance-performance mapping curve, dynamic screening standards (such as PAE>45%, THD<-40dBc) are set to achieve collaborative optimization of multiple indicators such as efficiency, linearity, and bandwidth. By dynamically dividing the impedance sub-areas, it adapts to the impedance matching requirements of high-frequency / wideband scenarios such as 5G multi-band and millimeter waves, and expands the adaptability of the RF front-end.

[0100] The steps for dynamically adjusting the resolution of the reflection coefficient according to the adaptive step size algorithm are as follows:

[0101] Step S1211 : setting an initial load reflection coefficient, and extracting the real part R and the imaginary part I in the complex form of the initial load reflection coefficient.

[0102] For example, in the digital twin model, the initial reflection coefficient is set to 0.5+j0.3 (corresponding to impedance Z = 50Ω). The real part R = 0.5 and the imaginary part I = 0.3 are extracted as the reference points for subsequent gradient calculations.

[0103] Step S1212: record the resolution of the grid division in the scanning range as the step size, and set the initial step size Δ0.

[0104] The initial step size needs to cover the critical area of the impedance plane (such as the center area of the Smith chart).

[0105] Step S1213, according to the gradient threshold formula Calculate the gradient threshold G th , where N is the baseline efficiency threshold, is the derivative of the rate of change of the PAE with respect to the reflection coefficient.

[0106] The gradient threshold is used to determine whether the current region requires a refinement or coarsening step size, dynamically adjusting the resolution. For example, if the baseline efficiency threshold is 60%, the current PAE = 55%, and the derivative of the PAE with respect to the rate of change of the reflectance is 0.1, then the gradient threshold is 0.5.

[0107] In step S1214, the power added efficiency formula is: Among them, P out is the RF output power, P in is the RF input power, P DC is the DC input power.

[0108] Quantifying amplifier efficiency provides an optimization target for gradient calculation. PAE directly reflects energy conversion efficiency and is the core indicator for matching network optimization.

[0109] Step S1215: the real part directional gradient formula is:

[0110]

[0111] Among them G R is the real part directional gradient, PAE(R+Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient increases by an initial step size and the imaginary part remains unchanged, and PAE(R-Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient decreases by an initial step size and the imaginary part remains unchanged.

[0112] Evaluate the impact of real part changes on PAE and guide the direction of impedance adjustment. A positive gradient indicates that increasing the real part can improve efficiency, while conversely, the real part needs to be reduced.

[0113] Step S1216: the imaginary direction gradient formula is:

[0114]

[0115] Among them, G I is the imaginary part gradient, PAE(R, I+Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient increases by an initial step size and the real part remains unchanged, and PAE(R, I-Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient decreases by an initial step size and the real part remains unchanged.

[0116] Evaluate the impact of the imaginary part change on PAE and determine the adjustment direction of the imaginary part. The imaginary part gradient and the real part gradient jointly determine the total gradient direction and step size strategy.

[0117] Step S1217, according to the total gradient formula Calculate the total gradient G, combined with the gradient threshold G th Get the real-time step size Δ new , as the adjustment resolution of the reflection coefficient, the real-time step equation is:

[0118]

[0119] In actual application, the reflection coefficient resolution is dynamically adjusted through an adaptive step-size algorithm, achieving precise tuning and efficiency optimization of the impedance matching network of the radio frequency power amplifier (RFPA). The step size is automatically adjusted according to the gradient sensitivity (e.g., 0.05Ω in the high-sensitivity area and 0.2Ω in the low-sensitivity area), solving the problems of local optimality or computational redundancy caused by the traditional fixed step size. With power added efficiency (PAE) as the optimization goal, combined with gradient threshold judgment, PAE is improved while suppressing harmonic distortion (THD<-40dBc). The gradient directional search quickly converges to the optimal impedance point, shortening the matching network tuning time. The real and imaginary gradients are combined to dynamically adjust the step size to optimize the search efficiency. Refining the step size in the high-gradient area improves accuracy, while coarsening the step size in the low-gradient area accelerates the search.

[0120] Taking power matching as the optimization goal, a genetic algorithm is used to screen the impedance value that meets the preset requirements from the candidate initial impedance value set, and the steps for generating the initial impedance value are as follows:

[0121] Step S131: Establish a fitness function to calculate the candidate initial impedance value set {Z1, Z2, Z3...Z N The fitness F(Z) of each candidate initial impedance value in}.

[0122] Step S132, calculate the source end reflection coefficient Γ of each impedance s and the load end reflection coefficient Γ L , the calculation formulas are: Where Z0 is the system characteristic impedance, Z L is the load impedance.

[0123] Step S133, the fitness function is: The impedance value whose fitness F(Z) reaches the preset fitness threshold is selected as the initial impedance population.

[0124] Step S134: selecting a parent impedance from the initial impedance population according to a roulette wheel selection mechanism, performing crossover mutation on the parent impedance, and selecting the impedance value with the highest fitness as the initial impedance value.

[0125] By probabilistically selecting individuals with high fitness, we can generate better offspring impedances. We simulate the natural evolution process, avoid local optimality, and achieve global search. For example, the candidate impedance set is {50Ω, 75Ω, 100Ω}, and the corresponding fitness is F(50) = 0.8, F(75) = 1.06, and F(100) = 0.5. The total fitness = 0.8 + 1.06 + 0.5 = 2.36, and the individual probabilities are P(50) = 0.8 / 2.36≈34%, P(75) = 1.06 / 2.36≈45%, and P(100) = 0.5 / 2.36≈21%. Generate a random number (such as 0.5), which falls within the 45% interval (corresponding to 75Ω), and select it as parent 1. Generate a random number again (such as 0.8), which falls within the 21% interval (corresponding to 100Ω), and select it as parent 2. Parent impedance: 75Ω (binary: 1001011) and 100Ω (binary: 1100100).

[0126] Random intersection point (such as the 4th position):

[0127] Generation 1: 1000100 → 1000100 (68Ω)

[0128] Generation 2: 1101011 → 1101011 (107Ω)

[0129] Mutation operation (non-uniform mutation):

[0130] The third bit of offspring 1 (68Ω) randomly mutates from 100 to 101, becoming 72Ω.

[0131] Sub-generation 2 (107Ω) maintains the original value.

[0132] Fitness screening:

[0133] Calculate offspring fitness:

[0134] F(72)=1 / |1-(0.18×0.22)| 2 ≈1.15

[0135] F(107)=1 / |1-(0.36×0.03)| 2 ≈1.12

[0136] The offspring with the highest fitness (72Ω, F=1.15) was selected to join the new generation population.

[0137] In practical applications, a genetic algorithm and reflection coefficient-driven impedance matching optimization have enabled rapid design and performance improvement of radio frequency power amplifier (RFPA) impedance networks. By combining the source and load reflection coefficients, power transfer efficiency and standing wave ratio are balanced, resulting in improved output power added efficiency. The genetic algorithm's crossover and mutation operations avoid the local optimums typically encountered by traditional trial-and-error methods, allowing for a wider impedance matching range. A roulette wheel selection mechanism is used to select parent impedances, reducing ineffective searches and shortening optimization time.

[0138] The steps for loading the input signal into the digital twin simulation model and simulating the amplifier's performance under the input signal are as follows:

[0139] Step S21: collect the actual parameters of the actual RF power amplifier, load the input signal into the digital twin simulation model, and configure the model parameters to be synchronized with the actual parameters.

[0140] Step S22 , starting the simulation operation, collecting node data of internal nodes of the RF power amplifier in real time, capturing transient response and steady-state response time series data, and obtaining simulation data.

[0141] For example, starting an ADS transient simulation, setting the sampling rate to 10GSa / s, inserting a probe at the drain node, and capturing current overshoot peak values of 2.3A (steady-state value 1.8A), rise time 1.2ns, output power 38.2dBm, and efficiency 43%. Simulation data can be customized based on user needs and can include current, voltage, and other data.

[0142] Step S23: Calculate the simulation performance index value of the amplifier under the input signal based on the simulation data.

[0143] Different simulation performance indicators have their corresponding performance indicator calculation methods. For example, when the input power is 30dBm, the gain is Gain = 38.2dBm - 30dBm = 8.2dB, and the power added efficiency is calculated by The third-order intermodulation product -25dBc is calculated and extracted by FFT.

[0144] In practical applications, digital twin technology enables simultaneous virtual and real-world simulation of RF power amplifiers, addressing the low efficiency and high cost of traditional physical debugging. Real-time mapping of PA parameters such as bias voltage and load impedance to the twin model improves simulation accuracy. Full lifecycle optimization captures transient response characteristics (such as rise time and overshoot) and predicts the risk of thermal failure of the power amplifier. Virtual debugging replaces physical experiments, shortening the R&D cycle.

[0145] The steps for generating a dynamically optimized impedance set by iteratively adjusting the matching network parameters within a preset impedance range using the initial impedance value as the search starting point and combining it with the dynamic reconstruction matching network algorithm are as follows:

[0146] Step S31: Based on the simulation performance indicators output by the digital twin model and the preset performance indicator threshold, determine whether to trigger the dynamic reconstruction matching network algorithm.

[0147] Based on the simulated performance indicators and the preset threshold, the system determines whether to initiate impedance optimization. This avoids ineffective tuning and triggers the algorithm only when performance falls short of the target, saving computing power. For example, if the digital twin model shows PAE = 35% (threshold = 40%) and gain G = 8dB (threshold = 10dB), the performance threshold has not been met, triggering the dynamic matching network reconstruction algorithm.

[0148] Step S32: If the dynamic reconstruction matching network algorithm is triggered, the impedance range is set with the initial impedance value as the search starting point.

[0149] Using the initial impedance value as the search starting point and defining the tuning range, you can limit the search space and accelerate convergence (e.g., narrowing the search from the full impedance plane to a local sensitive area).

[0150] Step S33, iteratively adjust the matching network parameters within the impedance range to make the output impedance Z out Approaching target impedance Z target .

[0151] In step S34, the adjusted matching network parameters are verified in real time through the digital twin model, the circuit stability and thermal distribution status are detected, and whether the circuit is stable is determined. If the circuit is unstable, the matching network parameters are iteratively adjusted again.

[0152] By using digital twin models to detect whether the circuit is stable, hardware damage can be avoided and long-term reliable operation can be ensured.

[0153] Step S35: If the circuit is stable, the impedance value whose F(Z) reaches the preset fitness threshold is selected according to the fitness function to generate a dynamic optimized impedance set {Z y1 , Z y2 , Z y3 …Z yN}.

[0154] In practical applications, a digital twin model and a dynamically reconfigured matching network algorithm enable closed-loop optimization of RF power amplifier (PA) impedance parameters, improving circuit stability and performance. Dynamically adjust the output impedance to increase power-added efficiency and reduce harmonic distortion (THD). Thermal distribution status detection prevents device overheating or self-oscillation caused by impedance mismatch. This replaces traditional trial-and-error methods, shortening the matching network design cycle. When the circuit is stable, impedance values that meet a preset fitness threshold are selected based on actual conditions, providing multiple sets of alternative impedances to adapt to dynamic environments (such as temperature drift and frequency band switching).

[0155] Iteratively adjust the matching network parameters within the impedance range so that the output impedance Z out Approaching target impedance Z target The steps are as follows:

[0156] Step S331, the target impedance formula is: Z targ et =argmin(|Γ S Γ L |+λ·|P l |), where P loss is the matching network loss power, and λ is the weight factor.

[0157] Define the optimization objective to balance the weight relationship between reflection coefficient and power loss. By minimizing |Γ S Γ L |+λ·|P loss |, achieving the best compromise between efficiency and stability. A vector network analyzer (VNA) can be used to measure the source end reflection coefficient. The arg min function is a minimum value solver, primarily used to find the minimum value of a set of numbers.

[0158] Step S332, matching network loss power P loss The calculation formula is: loss =|I out | 2 DR, where I out To match the current at the output of the network, DR is the parasitic resistance.

[0159] Quantifying the energy loss of the matching network provides a data basis for optimization. Reducing loss can improve overall efficiency. You can use a current probe to measure the matching network output current and an LCR meter to measure the parasitic resistance.

[0160] In actual use, by iteratively adjusting the matching network parameters, the output impedance is brought close to the target impedance, maximizing power transmission efficiency and minimizing losses. By balancing the reflection coefficient and power loss, the power amplifier efficiency is improved. Parasitic oscillations and thermal failure risks caused by impedance mismatch are suppressed, and dynamic weight factor adjustment is supported to adapt to different frequency bands and power level requirements. In scenarios such as 5G base stations and millimeter-wave radars, matching network losses can be reduced. Simulation accuracy errors can be reduced through closed-loop calibration of virtual and real data. For example, PAE is optimized in the 3.5GHz band to reduce losses. Γ S =0.5,Γ L =0.6,λ=0.8,I out =2A, DR = 0.5Ω, then Z targ et =argmin(|0.5×0.6|+0.8·|2 2×0.5|)=arg min(1.9). A genetic algorithm search locked in a target impedance of 48+j2Ω, improving PAE from 40% to 46%. Furthermore, in the 28 GHz band, temperature rise was suppressed, reducing it from 25°C to 18°C when the target impedance was 52-j3Ω.

[0161] The digital twin model is used to verify the adjusted matching network parameters in real time, detect circuit stability and thermal distribution, and determine whether the circuit is stable. The specific steps are as follows:

[0162] Step S341: Calculate the stability factor K based on the stability function. The stability function is:

[0163]

[0164] When K>1, it is determined that the circuit has no self-oscillation and the circuit meets the first stability condition.

[0165] The stability factor K is used to determine whether the circuit may self-oscillate (K>1 indicates stability) to avoid circuit instability caused by reflection coefficient mismatch.

[0166] Step S342, calculate the transistor junction temperature T j , the transistor junction temperature calculation formula is: T j =T c +P j ·rR j , where T c is the transistor package surface temperature, P j is the transistor power dissipation, rR j Thermal resistance from junction to ambient.

[0167] Junction-to-ambient thermal resistance refers to the total resistance required for heat transfer from the transistor's internal junction region to the surrounding environment. It quantifies transistor thermal distribution and helps prevent performance degradation or burnout due to overheating. Junction temperature is a key indicator of device lifespan and reliability. Thermistors can be used to measure the surface temperature of transistor packages, power consumption can be measured with a power meter, and thermal resistance can be found in the transistor's data sheet.

[0168] Step S343, setting the transistor junction temperature threshold T max , if T j ≤T max , then the thermal distribution is judged to be qualified and the circuit meets the second stability condition.

[0169] Step S344: If the circuit satisfies both the first stability condition and the second stability condition, the circuit is determined to be stable; otherwise, the circuit is determined to be unstable.

[0170] In practical applications, the digital twin model verifies matching network parameters in real time, monitors circuit stability and thermal distribution, and ensures reliable operation of the RF power amplifier. By dually assessing the stability factor and junction temperature, circuit self-oscillation and overheating failure are avoided. This reduces the risk of device damage caused by self-oscillation and extends the amplifier's lifespan through optimized thermal distribution.

[0171] The steps of controlling the tunable element to reconstruct the actual impedance value of the RF power amplifier based on the dynamically optimized impedance set and collecting the actual performance index of the output signal are as follows:

[0172] Step S41: Based on the dynamically optimized impedance set, application requirements are obtained, and the optimal impedance is selected from the dynamically optimized impedance set according to the application requirements.

[0173] The optimal impedance is selected from the dynamic optimization set based on application requirements (such as efficiency or linearity priority), avoiding blind tuning and ensuring that the target impedance matches the application scenario. For example, if a 5G base station PA needs to achieve high efficiency in the 3.5 GHz frequency band, the impedance with the highest PAE is selected as the optimal impedance.

[0174] Step S42: construct a tunable element array, integrate it into the output stage of the RF power amplifier, dynamically adjust the tunable elements, adjust the actual output impedance of the RF power amplifier to be consistent with the optimal impedance, and obtain the actual impedance value.

[0175] Adjusting the PA output impedance to the target value through tunable components (such as MEMS switches and varactor diodes) achieves precise impedance matching and suppresses reflection loss. For example, the tunable matching network topology is a π-type network (two tunable capacitors c1 and c2, and one tunable inductor L), with an optimal impedance of Z = 47 + j1Ω. Calculate the matching network parameters: At 3.5 GHz (ω = 2π × 3.5e9), we obtain c1 = 2.1 pF, L = 3.5 nH, and c2 = 1.8 pF, where J is the imaginary unit. Using the FPGA to control the varactor diode bias voltage, we adjust c1 and c2 to the target values.

[0176] Step S43: collecting real-time operating data of the radio frequency power amplifier, and obtaining actual performance indicators of the radio frequency power amplifier according to the real-time operating data.

[0177] Measure the actual performance (efficiency, linearity, stability) of the tuned RF power amplifier to verify the optimization effect. Closed-loop feedback ensures the reliability of the tuning results and supports dynamic re-optimization.

[0178] In practice, the dynamic optimization of impedance sets and tunable element arrays allows real-time adjustment of the RF power amplifier's output impedance, achieving coordinated optimization of efficiency, linearity, and stability. The optimal impedance is selected based on application requirements (such as frequency band and power level) to adapt to multiple 5G / 6G scenarios.

[0179] The above are all preferred embodiments of the present application, and are not intended to limit the scope of protection of the present application. Therefore, any equivalent changes made based on the structure, shape, and principle of the present application should be included in the scope of protection of the present application.

Claims

1. A design optimization method for a radio frequency power amplifier, characterized in that: The following steps are involved: Collect the operating frequency and circuit topology of the RF power amplifier, establish a digital twin simulation model, and generate the initial impedance value based on the digital twin simulation model; Loading the input signal into the digital twin simulation model to simulate and obtain the simulation performance index of the amplifier under the input signal; Taking the initial impedance value as the search starting point, combined with the dynamic reconstruction matching network algorithm, the matching network parameters are iteratively adjusted within the preset impedance range to generate a dynamically optimized impedance set; Based on the dynamically optimized impedance set, controlling the tunable element to reconstruct the actual impedance value of the radio frequency power amplifier and collecting actual performance indicators of the output signal; Compare the simulated performance indicators with the actual performance indicators to determine whether the error exceeds the preset error threshold. If the error exceeds the error threshold, iteratively update the parasitic parameters of the digital twin simulation model; If the error is within the threshold, the actual impedance value is locked as the optimal configuration, and the optimal configuration is fixed to the RF power amplifier to amplify the input signal and output the target power signal.

2. The design optimization method of a radio frequency power amplifier according to claim 1, characterized in that: The steps of collecting the operating frequency and circuit topology of the radio frequency power amplifier, establishing a digital twin simulation model, and generating an initial impedance value according to the digital twin simulation model are specifically as follows: Obtain the operating frequency band and circuit topology of the RF power amplifier, establish a physical model of the RF power amplifier using 3D electromagnetic simulation software, and extract parasitic parameters; Import parasitic parameters into a circuit simulation tool, build a digital twin simulation model, set up a load-pull test environment in the digital twin model, scan the output impedance plane, select the impedance region that meets the preset standard, and obtain a set of candidate initial impedance values; Taking power matching as the optimization goal, a genetic algorithm is used to screen the impedance value that meets the preset requirements from the candidate initial impedance value set to generate the initial impedance value.

3. The design optimization method of a radio frequency power amplifier according to claim 2, characterized in that: The steps of importing parasitic parameters into a circuit simulation tool, building a digital twin simulation model, setting a load pull test environment in the digital twin model, scanning the output impedance plane, selecting an impedance region that meets a preset standard, and obtaining a set of candidate initial impedance values are specifically as follows: Insert a programmable impedance tuner module into the digital twin model, dynamically adjust the adjustment resolution of the reflection coefficient based on an adaptive step size algorithm, and set the load-pull test environment based on the adjustment resolution; Perform a load-pull test according to the load-pull test environment, and obtain an impedance plane based on the test results; The distributed simulation task is deployed using the cloud computing platform, the impedance plane is divided into multiple sub-areas, and each sub-area is assigned an independent computing node for parallel simulation; Collect the performance indicators of each impedance point in real time and form the corresponding impedance-performance mapping curve; Set performance screening criteria and use the impedance-performance mapping curve to screen the impedance region that meets the performance screening criteria; Search the impedance points that meet the preset conditions from the impedance area to form a candidate initial impedance set.

4. The design optimization method of a radio frequency power amplifier according to claim 3, characterized in that: The step of dynamically adjusting the resolution of the reflection coefficient according to the adaptive step size algorithm is specifically as follows: Setting an initial load reflection coefficient and extracting the real part R and the imaginary part I of the complex form of the initial load reflection coefficient; The resolution of the grid division in the scanning range is recorded as the step size, and the initial step size Δ0 is set; According to the gradient threshold formula Calculate the gradient threshold G th , where N is the baseline efficiency threshold, is the derivative of the rate of change of the PAE with respect to the reflection coefficient; The power added efficiency formula is: Among them, P out is the RF output power, P in is the RF input power, P DC is the DC input power; The real part directional gradient formula is: Among them G R is the real part directional gradient, PAE(R+Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient increases by an initial step size and the imaginary part remains unchanged, and PAE(R-Δ0, I) represents the power added efficiency value calculated under the condition that the real part of the reflection coefficient decreases by an initial step size and the imaginary part remains unchanged; The formula for the imaginary direction gradient is: Among them, G l is the imaginary part gradient, PAE(R, I+Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient increases by an initial step size and the real part remains unchanged, and PAE(R, I-Δ0) represents the power added efficiency value calculated under the condition that the imaginary part of the reflection coefficient decreases by an initial step size and the real part remains unchanged; According to the total gradient formula Calculate the total gradient G, combined with the gradient threshold G th Get the real-time step size Δ new , as the adjustment resolution of the reflection coefficient, the real-time step equation is:

5. The design optimization method of a radio frequency power amplifier according to claim 2, characterized in that: The step of using a genetic algorithm to select an impedance value that meets preset requirements from a set of candidate initial impedance values with power matching as the optimization goal and generating the initial impedance value is specifically as follows: Establish a fitness function to calculate the candidate initial impedance value set {Z1, Z2, Z3…Z N The fitness F(Z) of each candidate initial impedance value in}; Calculate the source reflection coefficient Γ for each impedance S and the load end reflection coefficient Γ L , the calculation formulas are: Where Z0 is the system characteristic impedance, Z L is the load impedance; The fitness function is: The impedance value whose fitness F(Z) reaches the preset fitness threshold is selected as the initial impedance population; The parent impedance is selected from the initial impedance population according to the roulette wheel selection mechanism. After crossover mutation of the parent impedance, the impedance value with the highest fitness is selected as the initial impedance value.

6. The design optimization method of a radio frequency power amplifier according to claim 1, characterized in that: The step of loading the input signal into the digital twin simulation model and simulating to obtain the simulation performance index of the amplifier under the input signal is specifically as follows: Collecting actual parameters of an actual radio frequency power amplifier, loading the input signal into the digital twin simulation model, and configuring the model parameters to be synchronized with the actual parameters; Start the simulation, collect node data of the internal nodes of the RF power amplifier in real time, capture the transient response and steady-state response time series data, and obtain simulation data; The simulated performance index values of the amplifier under the input signal are calculated based on the simulation data.

7. The design optimization method of a radio frequency power amplifier according to claim 1, characterized in that: The steps of using the initial impedance value as the search starting point, combining the dynamic reconstruction matching network algorithm, iteratively adjusting the matching network parameters within the preset impedance range, and generating a dynamically optimized impedance set are specifically as follows: Based on the simulation performance indicators output by the digital twin model and the preset performance indicator threshold, determine whether to trigger the dynamic reconstruction matching network algorithm; If the dynamic reconstruction matching network algorithm is triggered, the impedance range is set with the initial impedance value as the search starting point; Iteratively adjust the matching network parameters within the impedance range so that the output impedance Z out Approaching target impedance Z target ; The digital twin model verifies the adjusted matching network parameters in real time, detects circuit stability and thermal distribution, and determines whether the circuit is stable. If the circuit is unstable, the matching network parameters are iteratively adjusted again. If the circuit is stable, the impedance value that reaches the preset fitness threshold is selected according to the fitness function to generate a dynamic optimized impedance set {Z y1 , Z y2 , Z y3 …Z yN }.

8. The design optimization method of a radio frequency power amplifier according to claim 7, characterized in that: The matching network parameters are iteratively adjusted within the impedance range so that the output impedance Z out Approaching target impedance Z target The steps are as follows: The target impedance formula is: Z target =argmin(|Γ S Γ L |+λ·|P loss |), where P loss is the matching network loss power, λ is the weight factor; Matching network loss power P loss The calculation formula is: loss =|I out | 2 DR, where I out To match the current at the output of the network, DR is the parasitic resistance.

9. The design optimization method of a radio frequency power amplifier according to claim 7, characterized in that: The steps of verifying the adjusted matching network parameters in real time through the digital twin model, detecting the circuit stability and thermal distribution state, and determining whether the circuit is stable are specifically as follows: The stability factor K is calculated based on the stability function, which is: When K>1, it is judged that the circuit has no self-oscillation and the circuit meets the first stability condition; Calculate the transistor junction temperature T j , the transistor junction temperature calculation formula is: T j =T c +P j ·rR j , where T c is the transistor package surface temperature, P j is the transistor power dissipation, rR j Thermal resistance from junction to ambient; Set the transistor junction temperature threshold T max , if T j ≤T max , then the thermal distribution is judged to be qualified and the circuit meets the second stability condition; If the circuit satisfies both the first stability condition and the second stability condition, the circuit is determined to be stable; otherwise, the circuit is determined to be unstable.

10. The design optimization method of a radio frequency power amplifier according to claim 7, characterized in that: The step of controlling the tunable element to reconstruct the actual impedance value of the RF power amplifier based on the dynamically optimized impedance set and collecting the actual performance index of the output signal is specifically as follows: Based on the dynamically optimized impedance set, obtaining application requirements, and selecting an optimal impedance from the dynamically optimized impedance set according to the application requirements; Construct a tunable element array, integrate it into the output stage of the RF power amplifier, dynamically adjust the tunable elements, adjust the actual output impedance of the RF power amplifier to be consistent with the optimal impedance, and obtain the actual impedance value; Collect real-time working data of the RF power amplifier and obtain actual performance indicators of the RF power amplifier based on the real-time working data.

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