Anti-error logic checking and comparing method and system based on graphical interface

Abstract

The invention discloses an anti-error logic check comparison method and system based on a graphical interface, and belongs to the technical field of substation automation of an electric power system. The method specifically comprises the following steps: triggering automatic or manual anti-error logic checking of monitoring system equipment from an anti-error logic display interface, and modifying and perfecting the anti-error logic which does not pass in an anti-error logic checking result according to a set checking prompt and an anti-error requirement; triggering anti-error logic comparison of the monitoring system equipment from an anti-error logic display interface, reading anti-error logic passing full checking of the monitoring system equipment, and comparing the anti-error logic with anti-error logic in anti-error logic files of the called measurement and control device and the independent anti-error host; inconsistent anti-error logic in the anti-error logic comparison result is modified to be consistent, and anti-error logic check comparison based on the graphical interface is achieved. According to the invention, the workload of the anti-error logic verification work in the transformer substation is reduced, the working efficiency in the transformer substation is improved, and the correctness and consistency of the anti-error logic in the transformer substation are ensured.

Description

Technical Field

[0001] The present invention belongs to the technical field of power system substation automation, and more specifically, relates to a method and system for error-proof logic verification and comparison based on a graphical interface. Background Art

[0002] The error-prevention logic rules for substation monitoring systems are typically manually edited or shared by engineering personnel across the monitoring system, independent five-protection host computers, and measurement and control devices, based on substation design requirements. This editing process is labor-intensive and tedious, prone to errors, and the verification of error-prevention logic is highly complex. Therefore, after editing, the error-prevention logic must be verified for both correctness and consistency. Because error-prevention logic is complex and difficult to read, the current manual verification method for error-prevention logic not only places high demands on verification personnel, but also often fails to detect errors in the error-prevention logic, making it difficult to ensure the reliability of verification results and inefficient. Summary of the Invention

[0003] In order to solve the deficiencies in the prior art, the present invention provides a method and system for checking and comparing anti-error logic based on a graphical interface, which automatically or manually checks the anti-error logic, compares it horizontally with the anti-error logic file of the independent five-protection host, and compares it vertically with the logic of the measurement and control device, which not only ensures the correctness of the anti-error logic, but also ensures the consistency of the logic on all sides within the station. It can not only effectively improve the work efficiency of the anti-error logic verification work, but also ensure the reliability of the verification results.

[0004] The present invention adopts the following technical solutions.

[0005] A first aspect of the present invention provides a graphical interface-based error-proof logic verification and comparison method, comprising:

[0006] Trigger the anti-error logic check of the monitoring system equipment from the anti-error logic display interface to obtain the anti-error logic check result;

[0007] The error prevention logic verification results are displayed on the error prevention logic display interface, and the error prevention logic that fails in the error prevention logic verification results is manually modified to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that passes the full verification of the monitoring system equipment;

[0008] Trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host;

[0009] The error prevention logic comparison results are displayed on the error prevention logic display interface, and the inconsistent error prevention logic in the error prevention logic comparison results are modified to be consistent, so as to realize the error prevention logic verification and comparison based on the graphical interface.

[0010] Preferably, the anti-error logic check of the monitoring system equipment triggered from the anti-error logic display interface is an automatic anti-error logic check, which specifically includes:

[0011] Read all anti-error devices of the monitoring system;

[0012] Read the logic of a single device among all the anti-error devices in the monitoring system;

[0013] Verify the logic of each device in all anti-error devices of the monitoring system and mark the verification results;

[0014] All anti-error devices in the monitoring system are calibrated cyclically until the anti-error logic calibration of all devices is completed.

[0015] Preferably, the checking of the logic of a single device among all error prevention devices in the monitoring system and marking the checking result specifically includes:

[0016] Determine whether the logic of a single device is empty;

[0017] If the result of the logic empty judgment is empty, the logic of the single device is marked as empty on the anti-error logic display interface. If it is not empty, determine whether the logic of the single device contains the open / close operation logic;

[0018] If the judgment result of whether the opening / closing operation logic is included is that the opening / closing operation logic is missing, the logic of the individual device is marked as missing opening logic / missing closing logic on the anti-error logic display interface. If the logic of the individual device includes opening / closing operation logic, the opening / closing operation logic is verified, and according to the verification result, the logic of the individual device is marked accordingly on the anti-error logic display interface.

[0019] Preferably, if the logic of a single device includes an on / off operation logic, the on / off operation logic is verified, and according to the verification result, the logic of the single device is marked accordingly on the anti-error logic display interface, specifically including:

[0020] Read a line of open / close operation logic;

[0021] Determine whether the logic of the opening / closing operation violates the error prevention rules;

[0022] If the error prevention rule is violated, the logic of the single device is marked as a logical error on the error prevention logic display interface. If it is not violated, the open / close operation logic is positively verified to determine whether the current logic is satisfied, and a corresponding mark is made on the display interface.

[0023] Preferably, the forward logic verification of the open / close operation logic is performed to determine whether the current logic is satisfied and a corresponding mark is made on the display interface, specifically including:

[0024] Determine whether the logic of a single device contains multiple open / close operation logics. If it contains multiple open / close operation logics, set all other logics except the one with the same operation direction as this logic as unsatisfied;

[0025] Perform forward logic verification on the open / close operation logic. Set the value of each logic device according to the status of the logic devices involved in the open / close operation logic. After the setting is completed, determine whether the current open / close operation logic is satisfied. If the final logic is not satisfied or a certain participating logic is not satisfied, it will be judged as a forward logic verification failure, and the forward logic judgment result will be obtained;

[0026] If the forward logic judgment result is not satisfied, it will be marked as a configuration error on the display interface. If the forward logic verification is satisfied, reverse logic verification will be performed. According to the order of the logical devices involved in the device anti-error logic, the numbers will be automatically set in sequence to make them not meet the configuration rules. Check whether the current device logic is judged as not meeting the logic. If it is judged as not meeting the logic, it will be marked as a configuration error on the display interface.

[0027] Preferably, manually modifying the error prevention logic that failed the error prevention logic verification result to pass the verification according to the set verification prompt and error prevention requirements specifically includes:

[0028] Automatic verification manually modifies the anti-error logic based on the marked results after verification. Manually modify the anti-error logic that has not passed the verification to be consistent with the anti-error logic of the monitoring system. Manually mark the anti-error logic verification as passed on the anti-error logic interface until all anti-error logic verifications have passed.

[0029] Manual verification is performed to modify the anti-error logic according to the verification results. After manually modifying all failed anti-error logic to be consistent with expectations, the device anti-error logic verification is manually marked as passed on the anti-error logic interface.

[0030] Preferably, the anti-error logic that has passed the full calibration of the reading monitoring system equipment is compared with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host, specifically including:

[0031] Summoning the error prevention logic files of the measurement and control device and the independent error prevention host, and performing data object encapsulation on the error prevention logic in the error prevention logic file to obtain a data encapsulation result;

[0032] According to the data encapsulation result, the operation logic of the corresponding device in the anti-error logic that has passed the full calibration of the monitoring system equipment is read and encapsulated to obtain the encapsulation result of the corresponding device;

[0033] The data encapsulation result is compared with the encapsulation result of the corresponding device to obtain an error-proof logic comparison result.

[0034] Preferably, modifying inconsistent error prevention logic in the error prevention logic comparison result to make it consistent specifically includes:

[0035] Adjust the anti-error logic in the monitoring system, measurement and control device and independent anti-error host to be consistent, and call the latest anti-error logic file generated by the measurement and control and independent anti-error host in real time from the measurement and control device and independent anti-error host to compare with the anti-error logic of the monitoring system.

[0036] A second aspect of the present invention provides a system for error-proof logic verification and comparison based on a graphical interface, which runs the error-proof logic verification and comparison method based on a graphical interface described in the first aspect, including:

[0037] Anti-error logic check module: used to trigger the anti-error logic check of the monitoring system equipment from the anti-error logic display interface and obtain the anti-error logic check result;

[0038] Verification modification module: used to display the error prevention logic verification results on the error prevention logic display interface, and manually modify the error prevention logic that failed the error prevention logic verification results to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that has passed the full verification of the monitoring system equipment;

[0039] Anti-error logic comparison module: used to trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host;

[0040] Comparison and modification module: used to display the error prevention logic comparison results on the error prevention logic display interface, and modify the inconsistent error prevention logic in the error prevention logic comparison results to make them consistent, so as to realize error prevention logic verification and comparison based on the graphical interface.

[0041] Preferably, the error prevention logic display interface specifically includes:

[0042] Display the built-in error prevention logic of the monitoring system in the form of tables or graphics;

[0043] Real-time display of error prevention logic verification results and error prevention logic comparison results.

[0044] Compared with the prior art, the beneficial effects of the present invention include at least: the present invention provides a graphical interface-based anti-error logic verification and comparison method and system, which automatically or manually verifies the anti-error logic. In the present invention, the anti-error logic verification environment only needs to monitor the system host itself, and can automatically verify the correctness of the built-in anti-error logic configuration of the monitoring system, and compare the consistency of the anti-error logic with the measurement and control device and the independent anti-error host, and display the comparison results in real time, which not only ensures the correctness of the anti-error logic, but also ensures the consistency of the logic of the independent anti-error host, measurement and control device and monitoring system side in the station. It can not only effectively reduce the workload of the anti-error logic verification work in the substation, reduce the work difficulty of the staff, and improve the work efficiency of the anti-error logic verification work, so that the substation anti-error logic verification work can be completed quickly and reliably, and the reliability of the verification results is guaranteed. It also realizes the verification of the correctness and consistency of the anti-error logic in an automatic manner, and improves the operating efficiency and reliability of the anti-error logic verification work of the substation monitoring system. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 Schematic diagram of the structure of a graphical interface-based error-proofing logic checking method provided in accordance with an embodiment of the present invention;

[0046] Figure 2 This is a schematic diagram of the process of an automatic error-proof logic verification method based on a graphical interface provided in accordance with an embodiment of the present invention;

[0047] Figure 3 This is a schematic diagram of the process of a manual error prevention logic verification method based on a graphical interface provided in accordance with an embodiment of the present invention;

[0048] Figure 4 It is a schematic diagram of the process of a graphical interface-based error-proof logic comparison method provided in accordance with an embodiment of the present invention. DETAILED DESCRIPTION

[0049] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. The described embodiments are only part of the embodiments of the present invention, not all of them. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0050] like Figure 1 As shown, embodiment 1 of the present invention provides a method for error-proof logic verification and comparison based on a graphical interface, comprising the following steps:

[0051] Step 1: If Figure 2As shown, the automatic or manual anti-error logic check of the monitoring system equipment is triggered from the anti-error logic display interface, and the anti-error logic check result is displayed on the anti-error logic display interface.

[0052] In a preferred but non-limiting embodiment of the present invention, the error prevention logic display interface specifically includes:

[0053] The built-in error prevention logic of the monitoring system displayed on the error prevention logic display interface is stored in the form of a string;

[0054] The display mode of the error prevention logic display interface is table or graph;

[0055] The error prevention logic display interface identifies and distinguishes the error prevention logic that has passed the verification and the error prevention logic that has not passed the verification, as well as the reasons;

[0056] The error prevention logic display interface initiates the error prevention logic verification process and displays the error prevention logic verification results in real time;

[0057] The error prevention logic display interface initiates the error prevention logic comparison process and displays the error prevention logic comparison results in real time;

[0058] The anti-error logic display interface is used to edit and monitor the built-in anti-error logic.

[0059] The anti-error logic verification module is used to verify the anti-error logic. There are two modes: one is the automatic mode, which automatically verifies the logic of each anti-error device according to the built-in rules; the other is the manual mode, which manually sets the device status and verifies the anti-error logic in combination with interface observation, with the automatic mode being the main mode.

[0060] In a preferred but non-limiting embodiment of the present invention, the automatic or manual error prevention logic check of the monitoring system equipment is triggered from the error prevention logic display interface, wherein, Figure 2 As shown, trigger the automatic error prevention logic check of the monitoring system equipment from the error prevention logic display interface, specifically including:

[0061] Read all the anti-error devices of the monitoring system, as shown below:

[0062] 27, 2Q58 line switch,

[0063] 28, 2Q58 line positive female switch, P28.0&P27.0&P29.0&P31.0&P32.0&P22.0

[0064] 29, 2Q58 line auxiliary mother switch, P29.0&P27.1&P28.0&P31.0&P32.0+P29.1&P27.0&S10.0

[0065] 30, 2Q58 line switch, P27.0&P31.0&P32.0&P33.0

[0066] 31, 2Q58 line switch bus side grounding switch, P28.0&P29.0&P30.0

[0067] 32, 2Q58 line switch line side grounding switch, P28.0&P29.0&P30.0

[0068] 33, 2Q58 line grounding switch, P30.0&P130.0&P131.1

[0069] Among them, the first column is the device ID; the second column is the device name; the third column is the device anti-error logic.

[0070] The logic for reading a single device is as follows:

[0071] "29, 2Q58 line auxiliary mother switch P29.0&P27.1&P28.0&P31.0&P32.0+P29.1&P27.0&S10.0", where "P" represents the primary device; "S" represents the secondary device; "29" in "P29.0" represents the device ID, "." is a separator, "0" represents the logical state is open, on the contrary, if it is "1", it means closed; "+" represents the logical OR separator.

[0072] Verifying the logic of individual devices within the monitoring system's entire error prevention system includes two specific verification methods: configuration rule verification and rule verification. The configuration rule verification includes determining whether the logic of an individual device is empty, determining whether the logic of an individual device contains split / close operation logic, and performing forward and reverse logic verification. The rule verification includes verifying whether the logic violates error prevention rules. When verifying the device's error prevention logic, verification is performed separately for split and close logic; the error prevention logic verification results are visually marked; and the results are categorized according to the marked results based on the built-in verification rules.

[0073] Verify the logic of each device in all anti-error devices of the monitoring system and mark the verification results.

[0074] Further preferably, the logic of a single device among all error prevention devices in the monitoring system is checked and the check result is marked, specifically including:

[0075] Determine whether the logic of a single device is empty. If it is empty, mark the single device as (logic is empty) on the anti-error logic display interface;

[0076] Taking "27, 2Q58 line switch" as an example, the logic rule of this device is empty, so the single device is marked as (logic is empty) on the anti-error logic display interface.

[0077] If it is not empty, determine whether the logic of the single device contains the open / close operation logic. If the open / close operation logic is missing, it will be marked as (missing open logic / missing close logic) on the display interface.

[0078] For example, in a logic expression for "28, 2Q58 line positive female switch, P28.0 & P27.0 & P29.0 & P31.0 & P32.0 & P22.0," if the device is also included in the logic, it indicates the opposite operation to the device's logical state. In this expression, only the close logic is programmed for the device, so it is marked as (missing close logic) on the display interface.

[0079] If the logic of a single device includes open / close operation logic, verify the open / close operation logic; and based on the verification results, mark the logic of the single device accordingly on the error prevention logic display interface, including:

[0080] ①Read a break / close operation logic

[0081] Taking "29, 2Q58 line auxiliary mother switch, P29.0&P27.1&P28.0&P31.0&P32.0+P29.1&P27.0&S10.0" as an example, its combined operation logic is analyzed as "P29.0&P27.1&P28.0&P31.0&P32.0".

[0082] ② Verify whether the logic violates the error prevention rules

[0083] Anti-error rules include: preventing the disconnector from opening and closing under load; preventing the grounding wire (grounding switch) from being hung under power; and preventing the circuit breaker from being closed with the grounding wire (grounding switch) connected.

[0084] In this logic, the device with ID 27 is a switch. Closing the auxiliary main switch while the switch is in the closed position violates the error prevention rule "Prevent opening and closing of the disconnector under load." The error prevention device logic of "29, 2Q58" is an error. The error is related to the device with ID 27 in the logic, so it is marked as (Logic Error) on the display interface.

[0085] ③Forward logic verification

[0086] If there are multiple on / off logics, all logics except those with the same operation direction as the current logic must be set to "unsatisfied." Specifically, when verifying the error prevention logic, first obtain all the on / off logics. For example, if there are five on / off logics, they are in an OR relationship, meaning that satisfying any one of them will operate the device. Any on / off logic contains an indefinite number of conditions, which are in an AND relationship. Failure to satisfy any one condition will cause the entire on / off logic to fail. This is used to test whether all the conditions in the logic are correct. If not, it indicates that the associated information within the conditions is missing. For example, a device can have multiple on / off logics. The one currently being verified is referred to as "this logic," while the remaining on / off logics are collectively referred to as "other logics." This logic and other logics encompass any on / off logic in the current error prevention device logic and the remaining on / off logic in the current error prevention device logic. Device operations are divided into two categories: combined operations and separate operations. The logical direction refers to the combined operation logic and separate operation logic. The combined operation logic indicates the conditions that need to be met before the operation can be executed, and the same applies to the separate operation logic.

[0087] According to the status of the devices involved in the logic, each device is set. After the setting is completed, it is judged whether the current operation logic is satisfied. If, during the judgment process, the final logic is not satisfied or the status of a participating device is not satisfied, it is marked as (configuration error) on the display interface; the setting status is specified in the operation logic. Taking P28.0 as an example, the 0 after the decimal point indicates that the device should be set to 0 to meet its conditions. It needs to be set to 0 during forward logic verification and set to 1 during reverse logic verification.

[0088] Set the status of devices 29, 27, 28, 31, and 32 to 0, and determine whether the closing operation of device 29 is satisfied. If so, the operation is successful. If not, it may be caused by reasons such as missing association points, and the display interface will be marked as (configuration error). For example, device 1 needs to be closed, and its closing logic is that devices 2, 3, and 4 are all in the closed state. At this time, the device status of simulated devices 2, 3, and 4 is closed. If the final calculated operation logic is not satisfied or the device status setting is unsuccessful, it is determined to be a configuration error.

[0089] ④Reverse logic verification

[0090] When the error prevention logic in the previous step is satisfied, the numbers are automatically set in sequence according to the order of the logical devices involved in the error prevention logic of the device, so that they do not meet the configuration rules. Check whether the current device logic is judged as not meeting the logic. If not, it will be marked as (configuration error) on the display interface.

[0091] In the forward logic satisfaction state, the states of devices 29, 27, 28, 31, and 32 are set to 1 in sequence to determine whether the operation of device 29 is satisfied. If so, it passes. If not, it is marked as (configuration error) on the display interface.

[0092] ⑤ If the above problems are not found, it will be marked as (verification passed) on the display interface.

[0093] ⑥ Repeat the above steps and cyclically calibrate all anti-error devices in the monitoring system until the anti-error logic calibration of all devices is completed.

[0094] It is worth noting that the error-proofing logic in the existing technology has a lot of content and is difficult to read. The current manual review error-proofing logic verification method not only has high requirements for verification personnel, but also often fails to find errors in the error-proofing logic, making it difficult to ensure the reliability of the verification results and having low efficiency. The present invention automatically verifies the error-proofing logic. The error-proofing logic verification environment only needs to monitor the system host itself, and can automatically verify the correctness of the built-in error-proofing logic configuration of the monitoring system. Automatically verifying the correctness of the error-proofing logic can not only effectively reduce the workload of error-proofing logic verification work in the substation and reduce the work difficulty of the staff, but also improve the work efficiency of the error-proofing logic verification work, so that the error-proofing logic verification work of the substation can be completed quickly and reliably.

[0095] In a preferred but non-limiting embodiment of the present invention, the automatic or manual anti-error logic check of the monitoring system equipment is triggered from the anti-error logic display interface to obtain the anti-error logic check result, wherein the manual anti-error logic check of the monitoring system equipment is triggered from the anti-error logic display interface, such as Figure 3 As shown, specifically including:

[0096] Select an anti-error logic and set the logic devices involved in the anti-error logic. The anti-error logic display interface displays the simulation results in real time to check whether the anti-error logic results are consistent with expectations. If they are consistent, mark the verification as passed on the display interface. If not, modify the anti-error logic based on the results.

[0097] Further preferably, taking "P28.0&P27.0&P29.0&P31.0&P32.0&P22.0" as an example, select an anti-error device sub-operation logic; the status of each anti-error device in the manual setting logic is 1 or 0, and the anti-error logic result is checked on the anti-error logic display interface to be consistent with the expectation. If it is inconsistent, modify the anti-error logic and select an anti-error device combined operation logic, taking "P28.1&P27.0" as an example.

[0098] Step 2: Display the error prevention logic verification results on the error prevention logic display interface, and manually modify the error prevention logic that failed the error prevention logic verification results to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that has passed the full verification of the monitoring system equipment.

[0099] In a preferred but non-limiting embodiment of the present invention, manually modifying the error prevention logic that failed the error prevention logic verification result to pass the verification according to the set verification prompt and error prevention requirements specifically includes:

[0100] Automatic verification is performed based on the marking results after verification. The anti-error logic that has not passed is manually modified to be consistent with the anti-error logic of the monitoring system. The anti-error logic verification is manually marked as passed on the anti-error logic interface until all anti-error logic verifications are passed. The set verification prompt is verified based on the mark on the display interface in step 1.

[0101] Further preferably, the modified example is as follows;

[0102] 27, 2Q58 line switch, A0.0

[0103] 28, 2Q58 line positive female switch, P28.0&P27.0&P29.0&P31.0&P32.0&P22.0+P28.1&P27.0

[0104] 29, 2Q58 line auxiliary mother switch, P29.0&P27.0&P28.0&P31.0&P32.0+P29.1&P27.0&S10.0

[0105] 30, 2Q58 line switch, P27.0&P31.0&P32.0&P33.0

[0106] 31, 2Q58 line switch bus side grounding switch, P28.0&P29.0&P30.0

[0107] 32, 2Q58 line switch line side grounding switch, P28.0&P29.0&P30.0

[0108] 33, 2Q58 line grounding switch, P30.0&P130.0&P131.1

[0109] 1) A0.0 means no error prevention logic;

[0110] 2) When there is no operating device itself in the device logic, it is a general logic of separation and combination.

[0111] Repeat the above process until all error prevention logic checks are passed.

[0112] In a preferred but non-limiting embodiment of the present invention, the manual error prevention logic check of the monitoring system equipment is triggered from the error prevention logic display interface, and the error prevention logic that fails the check is modified to pass the check. The specific steps include:

[0113] Manual verification is performed to modify the anti-error logic according to the verification results. After manually modifying all failed anti-error logic to be consistent with expectations, the device anti-error logic verification is manually marked as passed on the anti-error logic interface.

[0114] Step 3: Trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host.

[0115] In a preferred but non-limiting embodiment of the present invention, Figure 4 FIG. 1 is a flow chart of a method and system for preventing error logic comparison based on a graphical interface of the present invention, which specifically includes the following steps:

[0116] Convert error-proofing logic in multiple different formats into error-proofing logic objects in the same format.

[0117] The logic files of the summoned measurement and control devices are stored in binary or text format;

[0118] The loaded independent five-defense host logic file is stored in text format;

[0119] The error-proof logic comparison results are displayed visually.

[0120] In a preferred but non-limiting embodiment of the present invention, the anti-error logic of the reading monitoring system device that has passed the full calibration is compared with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host, specifically including:

[0121] The error prevention logic files of the measurement and control device and the independent error prevention host are summoned, and the error prevention logic in the error prevention logic file is encapsulated as a data object to obtain a data encapsulation result.

[0122] Further preferably, the anti-error logic in the anti-error logic file of the called measurement and control device and the independent anti-error host is as follows;

[0123] "202-1DCTRL {Combined operation}: ((2026=0)&(3026=0)&(50312=0)&(50321=0))"

[0124] "2Q58 line circuit breaker L: 2Q58 line switch = 0, 2Q58 line switch bus side grounding circuit breaker = 0, 2Q58 line switch line side grounding circuit breaker = 0, 2Q58 line line grounding circuit breaker = 0"

[0125] In the first type of logic content, "202-1D" represents the anti-error device, "close operation" is the operation direction, and "((2026=0)&(3026=0)&(50312=0)&(50321=0))" is the operation logic.

[0126] In the second type of logic content, "2Q58 line circuit breaker" represents the anti-error device, "L" is the operation direction, and "2Q58 line switch = 0, 2Q58 line switch bus side grounding switch = 0, 2Q58 line switch line side grounding switch = 0, 2Q58 line line grounding switch = 0" is the operation logic.

[0127] Further preferably, the data object encapsulation of the error prevention logic in the error prevention logic file specifically includes:

[0128] Taking "202-1DCTRL{combined operation}: ((2026=0)&(3026=0)&(50312=0)&(50321=0))" as an example, this logical data is analyzed and the encapsulated data object is obtained.

[0129] The data object structure is as follows

[0130] Data Object {

[0131] 202-1D device; / / device name

[0132] Close; / / Operation direction

[0133] List: 2026 logical object, 3026 logical object, 50312 logical object, 50321 logical object

[0134] AND / / Logical relationship

[0135] }

[0136] The logical object structure is as follows:

[0137] Logical Object {

[0138] 2026; / / Device name

[0139] 0; / / Device status

[0140] }

[0141] According to the data encapsulation result, the operation logic of the corresponding device in the anti-error logic that has passed the full calibration of the monitoring system equipment is read and encapsulated to obtain the corresponding device encapsulation result.

[0142] The data encapsulation result is compared with the encapsulation result of the corresponding device to generate a comparison result, and the anti-error logic comparison result is displayed on the anti-error logic display interface to realize the anti-error logic verification and comparison based on the graphical interface.

[0143] Further preferably, the data object includes a logical object, and after the logical objects in the data object are compared one by one, the comparison of the data objects is completed.

[0144] The comparison is repeated in a loop until all logic comparisons are completed, and the anti-error logic comparison results are displayed on the anti-error logic display interface. According to the comparison results, after manual confirmation, the logic on each side is adjusted. Adjusting the logic on each side specifically includes: adjusting the anti-error logic in the monitoring system, measurement and control device and independent anti-error host to be consistent, and calling the latest anti-error logic file generated by the measurement and control and independent anti-error host from the measurement and control device and independent anti-error host in real time to compare with the anti-error logic of the monitoring system.

[0145] Repeat the above process until the comparison is completely consistent or can be manually confirmed to be inconsistent.

[0146] It is worth noting that manual editing or sharing on the monitoring system, independent five-protection host, and measurement and control device is labor-intensive and cumbersome, prone to errors, and the anti-error logic verification work is highly complex. Therefore, after the anti-error editing is completed, the anti-error logic needs to be verified from the two aspects of correctness and consistency. The present invention automatically checks and compares the anti-error logic, and can automatically verify the correctness of the built-in anti-error logic configuration of the monitoring system and the consistency comparison with the measurement and control device and the independent anti-error host anti-error logic, and display the comparison results in real time, which not only ensures the correctness of the anti-error logic, but also ensures the consistency of the logic of the independent anti-error host, measurement and control device and monitoring system side in the station, and realizes the verification of the correctness and consistency of the anti-error logic in an automatic manner, thereby improving the operating efficiency and reliability of the anti-error logic verification work of the substation monitoring system.

[0147] like Figure 1 As shown, embodiment 2 of the present invention provides a graphical interface-based error prevention logic verification and comparison system, which runs the graphical interface-based error prevention logic verification and comparison method described in embodiment 1, including:

[0148] Anti-error logic check module: used to trigger the anti-error logic check of the monitoring system equipment from the anti-error logic display interface and obtain the anti-error logic check result;

[0149] Verification modification module: used to display the error prevention logic verification results on the error prevention logic display interface, and manually modify the error prevention logic that failed the error prevention logic verification results to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that has passed the full verification of the monitoring system equipment;

[0150] Anti-error logic comparison module: used to trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host;

[0151] Comparison and modification module: used to display the error prevention logic comparison results on the error prevention logic display interface, and modify the inconsistent error prevention logic in the error prevention logic comparison results to make them consistent, so as to realize error prevention logic verification and comparison based on the graphical interface.

[0152] The anti-error logic display interface is used to read the built-in anti-error logic of the monitoring system and display it in the form of a table or graph. In the anti-error logic display interface, you can initiate the anti-error verification process and display the verification results, or you can initiate the anti-error logic comparison process and display the comparison results. At the same time, it provides anti-error logic editing means to modify errors found in the verification process. The anti-error configuration of the monitoring can be modified in the interface. After the modification, the modified anti-error logic is used for verification or comparison; the anti-error logic verification module is used to verify the anti-error logic. The module has built-in anti-error verification rules, which can automatically perform anti-error logic verification, and can also be combined with the interface to perform manual verification and verification of the anti-error logic; the anti-error logic comparison module is used to perform logical consistency comparison between the built-in anti-error logic of the monitoring system and the anti-error logic of the independent five-protection host and the anti-error logic of the measurement and control device;

[0153] The anti-error logic display interface is used to display the built-in anti-error logic of the monitoring system in the form of tables or graphics; it can initiate the anti-error logic verification process and identify and display the verification results, and can also initiate the anti-error logic consistency comparison process and display the comparison results. At the same time, it provides anti-error logic editing methods for correcting discovered verification errors.

[0154] Compared with the prior art, the beneficial effects of the present invention include at least: the present invention provides a graphical interface-based anti-error logic verification and comparison method and system, which automatically or manually verifies the anti-error logic. In the present invention, the anti-error logic verification environment only needs to monitor the system host itself, and can automatically verify the correctness of the built-in anti-error logic configuration of the monitoring system, and compare the consistency of the anti-error logic with the measurement and control device and the independent anti-error host, and display the comparison results in real time, which not only ensures the correctness of the anti-error logic, but also ensures the consistency of the logic of the independent anti-error host, measurement and control device and monitoring system side in the station. It can not only effectively reduce the workload of the anti-error logic verification work in the substation, reduce the work difficulty of the staff, and improve the work efficiency of the anti-error logic verification work, so that the substation anti-error logic verification work can be completed quickly and reliably, and the reliability of the verification results is guaranteed. It also realizes the verification of the correctness and consistency of the anti-error logic in an automatic manner, and improves the operating efficiency and reliability of the anti-error logic verification work of the substation monitoring system.

[0155] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A graphical interface-based error-proof logic verification and comparison method, characterized by: Trigger the anti-error logic check of the monitoring system equipment from the anti-error logic display interface to obtain the anti-error logic check result; The error prevention logic verification results are displayed on the error prevention logic display interface, and the error prevention logic that fails in the error prevention logic verification results is manually modified to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that passes the full verification of the monitoring system equipment; Trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host; The error prevention logic comparison results are displayed on the error prevention logic display interface, and the inconsistent error prevention logic in the error prevention logic comparison results are modified to be consistent, so as to realize the error prevention logic verification and comparison based on the graphical interface.

2. The method for error-proof logic verification and comparison based on a graphical interface according to claim 1, characterized in that: The anti-error logic check of the monitoring system equipment triggered from the anti-error logic display interface is an automatic anti-error logic check, specifically including: Read all anti-error devices of the monitoring system; Read the logic of a single device among all the anti-error devices in the monitoring system; Verify the logic of each device in all anti-error devices of the monitoring system and mark the verification results; All anti-error devices in the monitoring system are calibrated cyclically until the anti-error logic calibration of all devices is completed.

3. The method for error-proof logic verification and comparison based on a graphical interface according to claim 2, characterized in that: The logic of a single device in all error prevention devices of the monitoring system is verified and the verification results are marked, specifically including: Determine whether the logic of a single device is empty; If the result of the logic empty judgment is empty, the logic of the single device is marked as empty on the anti-error logic display interface. If it is not empty, determine whether the logic of the single device contains the open / close operation logic; If the judgment result of whether the opening / closing operation logic is included is that the opening / closing operation logic is missing, the logic of the individual device is marked as missing opening logic / missing closing logic on the anti-error logic display interface. If the logic of the individual device includes opening / closing operation logic, the opening / closing operation logic is verified, and according to the verification result, the logic of the individual device is marked accordingly on the anti-error logic display interface.

4. The method for error-proof logic verification and comparison based on a graphical interface according to claim 3, characterized in that: If the logic of a single device includes an opening / closing operation logic, the opening / closing operation logic is verified, and according to the verification result, the logic of the single device is marked accordingly on the anti-error logic display interface, specifically including: Read a line of open / close operation logic; Determine whether the logic of the opening / closing operation violates the error prevention rules; If the error prevention rule is violated, the logic of the single device is marked as a logical error on the error prevention logic display interface. If it is not violated, the open / close operation logic is positively verified to determine whether the current logic is satisfied, and a corresponding mark is made on the display interface.

5. The method for error-proof logic verification and comparison based on a graphical interface according to claim 4, characterized in that: The forward logic verification of the open / close operation logic is performed to determine whether the current logic is satisfied and to mark the corresponding information on the display interface, specifically including: Determine whether the logic of a single device contains multiple open / close operation logics. If it contains multiple open / close operation logics, set all other logics except the one with the same operation direction as this logic as unsatisfied; Perform forward logic verification on the open / close operation logic. Set the value of each logic device according to the status of the logic devices involved in the open / close operation logic. After the setting is completed, determine whether the current open / close operation logic is satisfied. If the final logic is not satisfied or a certain participating logic is not satisfied, it will be judged as a forward logic verification failure, and the forward logic judgment result will be obtained; If the forward logic judgment result is not satisfied, it will be marked as a configuration error on the display interface. If the forward logic verification is satisfied, reverse logic verification will be performed. According to the order of the logical devices involved in the device anti-error logic, the numbers will be automatically set in sequence to make them not meet the configuration rules. Check whether the current device logic is judged as not meeting the logic. If it is judged as not meeting the logic, it will be marked as a configuration error on the display interface.

6. The method for error-proof logic verification and comparison based on a graphical interface according to claim 1, characterized in that: Manually modifying the failed error prevention logic in the error prevention logic verification result to pass the verification according to the set verification prompts and error prevention requirements specifically includes: Automatic verification manually modifies the anti-error logic based on the marked results after verification. Manually modify the anti-error logic that has not passed the verification to be consistent with the anti-error logic of the monitoring system. Manually mark the anti-error logic verification as passed on the anti-error logic interface until all anti-error logic verifications have passed. Manual verification is performed to modify the anti-error logic according to the verification results. After manually modifying all failed anti-error logic to be consistent with expectations, the device anti-error logic verification is manually marked as passed on the anti-error logic interface.

7. The method for error-proof logic verification and comparison based on a graphical interface according to claim 1, characterized in that: The anti-error logic of the reading monitoring system equipment that has passed the full calibration is compared with the anti-error logic in the anti-error logic file of the called measurement and control device and the independent anti-error host, specifically including: Summoning the error prevention logic files of the measurement and control device and the independent error prevention host, and performing data object encapsulation on the error prevention logic in the error prevention logic file to obtain a data encapsulation result; According to the data encapsulation result, the operation logic of the corresponding device in the anti-error logic that has passed the full calibration of the monitoring system equipment is read and encapsulated to obtain the encapsulation result of the corresponding device; The data encapsulation result is compared with the encapsulation result of the corresponding device to obtain an error-proof logic comparison result.

8. The method for error-proof logic verification and comparison based on a graphical interface according to claim 1, characterized in that: The step of modifying inconsistent error prevention logic in the error prevention logic comparison result to be consistent specifically includes: Adjust the anti-error logic in the monitoring system, measurement and control device and independent anti-error host to be consistent, and call the latest anti-error logic file generated by the measurement and control and independent anti-error host in real time from the measurement and control device and independent anti-error host to compare with the anti-error logic of the monitoring system.

9. A system for preventing error logic verification and comparison based on a graphical interface, which runs a method for preventing error logic verification and comparison based on a graphical interface according to any one of claims 1 to 8, characterized in that: Anti-error logic check module: used to trigger the anti-error logic check of the monitoring system equipment from the anti-error logic display interface and obtain the anti-error logic check result; Verification modification module: used to display the error prevention logic verification results on the error prevention logic display interface, and manually modify the error prevention logic that failed the error prevention logic verification results to pass the verification according to the set verification prompts and error prevention requirements, so as to obtain the error prevention logic that has passed the full verification of the monitoring system equipment; Anti-error logic comparison module: used to trigger the anti-error logic comparison of the monitoring system equipment from the anti-error logic display interface, read the anti-error logic that has passed the full calibration of the monitoring system equipment, and compare it with the anti-error logic in the anti-error logic file of the summoned measurement and control device and the independent anti-error host; Comparison and modification module: used to display the error prevention logic comparison results on the error prevention logic display interface, and modify the inconsistent error prevention logic in the error prevention logic comparison results to make them consistent, so as to realize error prevention logic verification and comparison based on the graphical interface.

10. The graphical interface-based error-proof logic verification and comparison system according to claim 9, characterized in that: The error prevention logic display interface specifically includes: Display the built-in error prevention logic of the monitoring system in the form of tables or graphics; Real-time display of error prevention logic verification results and error prevention logic comparison results.

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