Surge suppression device

Abstract

A surge suppression device disclosed by the present invention comprises a field effect transistor, a main control chip and an overvoltage and undervoltage protection circuit, a first electrode of the field effect transistor, a first end of the overvoltage and undervoltage protection circuit and a power supply input end are coupled to a first node, and a second electrode of the field effect transistor is connected with a power supply output end. A control electrode of the field effect transistor is connected with a first control end of the main control chip, a second end of the overvoltage and undervoltage protection circuit is grounded, and a third end of the overvoltage and undervoltage protection circuit is connected with a detection end of the main control chip; and the main control chip is used for detecting the voltage of the overvoltage and undervoltage protection circuit through the detection end, and controlling the field effect transistor to be switched on or switched off through the first control end according to the detection result of the detection end.

Description

Technical Field

[0001] The present invention relates to the field of aviation electronic engineering, and more particularly to a surge suppression device. Background Art

[0002] Surge suppressors are used to suppress surges in aircraft power supply voltages. Traditional surge suppressors utilize multiple discrete components, resulting in complex circuitry and weak voltage suppression capabilities. These devices may fail in the face of prolonged overvoltage conditions. Their relatively high clamping voltages leave the protected devices exposed to high voltages. In high-speed circuits, surge suppressors have a long response time, making them ineffective in protecting downstream devices. Furthermore, their bulky design prevents them from providing overcurrent and short-circuit protection. Summary of the Invention

[0003] The present invention provides a surge suppression device to solve at least one of the problems existing in the prior art.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] The present invention provides a surge suppression device, comprising a field effect transistor, a main control chip and an over-voltage and under-voltage protection circuit.

[0006] The first electrode of the field effect transistor, the first end of the over-voltage / under-voltage protection circuit, and the power supply input end are coupled to a first node, the second electrode of the field effect transistor is connected to the power supply output end, the control electrode of the field effect transistor is connected to the first control end of the main control chip, the second end of the second end of the over-voltage / under-voltage protection circuit is grounded, and the third end of the over-voltage / under-voltage protection circuit is connected to the detection end of the main control chip;

[0007] The main control chip is used to detect the voltage of the over-voltage and under-voltage protection circuit through the detection end, and control the field effect transistor to be turned on or off through the first control end according to the detection result of the detection end.

[0008] Optionally, the overvoltage and undervoltage protection circuit includes a first resistor and a second resistor, and the detection terminal includes an overvoltage detection terminal.

[0009] The first end of the first resistor is connected to the first node, the second end of the first resistor, the first end of the second resistor, and the overvoltage detection terminal are coupled to a fourth node, the second end of the second resistor is grounded, and the first resistor and the second resistor form an overvoltage protection circuit;

[0010] The main control chip is used to determine whether the voltage of the overvoltage detection end is higher than a first preset voltage threshold. If the voltage of the overvoltage detection end is higher than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

[0011] Optionally, the over-voltage and under-voltage protection circuit further includes a third resistor, a fourth resistor and a fifth resistor, and the detection terminal further includes an under-voltage detection terminal, wherein:

[0012] A first end of the third resistor is connected to the first node, a second end of the third resistor, a first end of the fourth resistor, and the undervoltage detection terminal are coupled to a third node, a second end of the fourth resistor is connected to a first end of a fifth resistor, a second end of the fifth resistor is grounded, and the third resistor, the fourth resistor, and the fifth resistor constitute an undervoltage protection circuit;

[0013] The main control chip is used to determine whether the voltage of the undervoltage detection end is lower than a first preset voltage threshold. If the voltage of the undervoltage detection end is lower than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

[0014] Optionally, the device further includes an overcurrent protection circuit, and the main control chip further includes an output voltage detection terminal and a current detection input terminal.

[0015] The first terminal of the overcurrent protection circuit, the current detection input terminal and the second electrode of the field effect transistor are coupled to a sixth node, and the second terminal of the overcurrent protection circuit, the output voltage detection terminal and the power supply output terminal are coupled to a second node;

[0016] The main control chip is used to detect the voltage drop value between the output voltage detection terminal and the current detection input terminal, and control the conduction degree of the field effect transistor through the first control terminal according to the voltage drop value.

[0017] Optionally, the main control chip is used to determine whether the voltage drop value between the output voltage detection terminal and the current detection input terminal is higher than a first preset voltage drop threshold. If the voltage drop value is higher than the first preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0018] Optionally, the main control chip is also used to determine whether the voltage drop between the output voltage detection terminal and the current detection input terminal is lower than a second preset voltage drop threshold. If the voltage drop value is lower than the second preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0019] Optionally, the device further includes a clamping circuit, and the main control chip further includes a feedback terminal.

[0020] A first end of the clamping circuit is connected to the feedback end, a second end of the clamping circuit is connected to the power supply output end, and a third end of the clamping circuit is grounded;

[0021] The main control chip is used to determine whether the voltage of the feedback terminal is higher than a second preset voltage threshold. If the voltage of the feedback terminal is higher than the second preset voltage threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0022] Optionally, the device further includes a fault shutdown circuit, and the main control chip further includes a fault timer input terminal.

[0023] A first terminal of the fault shutdown circuit is connected to the fault timer input terminal, and a second terminal of the fault shutdown circuit is grounded;

[0024] The main control chip is used to detect the capacitance value of the fault timer input terminal, and control the turn-off time of the field effect transistor through the first control terminal according to the detection result of the fault timer input terminal.

[0025] Optionally, the main control chip uses an SM4363MP chip.

[0026] Optionally, the field effect transistor is of MOSFET type.

[0027] The beneficial effects of the present invention are as follows:

[0028] The present invention connects the overvoltage and undervoltage protection circuit to the main control chip, which is connected to the field effect transistor. The voltage of the overvoltage and undervoltage protection circuit is detected by the detection end of the main control chip. According to the detection result of the detection end, the field effect transistor is controlled to be turned on or off by the first control end of the main control chip, thereby realizing the overvoltage protection and undervoltage protection functions of the surge suppression device. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0030] Figure 1 FIG. 1 is a schematic diagram showing the circuit structure of the surge suppression device of this embodiment. DETAILED DESCRIPTION

[0031] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the following detailed description is illustrative rather than restrictive and should not be used to limit the scope of protection of the present invention.

[0032] An embodiment of the present disclosure provides a surge suppression device, including a field effect transistor, a main control chip, and an over-voltage and under-voltage protection circuit.

[0033] The first electrode of the field effect transistor, the first end of the over-voltage / under-voltage protection circuit, and the power supply input end are coupled to a first node, the second electrode of the field effect transistor is connected to the power supply output end, the control electrode of the field effect transistor is connected to the first control end of the main control chip, the second end of the second end of the over-voltage / under-voltage protection circuit is grounded, and the third end of the over-voltage / under-voltage protection circuit is connected to the detection end of the main control chip;

[0034] The main control chip is used to detect the voltage of the over-voltage and under-voltage protection circuit through the detection end, and control the field effect transistor to be turned on or off through the first control end according to the detection result of the detection end.

[0035] The surge suppression device provided in this embodiment uses a detection terminal of the main control chip to detect the voltage value after the over- and under-voltage protection circuit divides the power supply input voltage. Based on the detection result of the detection terminal, the first control terminal controls the conduction or cutoff of the field-effect transistor to achieve overvoltage protection or undervoltage protection for the surge suppression device. The surge suppression device in this embodiment has a simple circuit and a small size, which improves the reliability of surge suppression.

[0036] In a specific example, for example Figure 1 The surge suppression device shown includes a main control chip 100, an over-voltage and under-voltage protection circuit 101 and a field effect transistor V1, wherein:

[0037] The first end of the over / undervoltage protection circuit 101, the first electrode of the field effect transistor V1 and the power supply input end are coupled to the first node A. The over / undervoltage protection circuit 101 receives the power supply input voltage through the first end, the second end of the over / undervoltage protection circuit 101 is grounded, the third end of the over / undervoltage protection circuit 101 is connected to the detection end of the main control chip 100, and the control electrode of the field effect transistor V1 is connected to the first control end GATE of the main control chip 100; the voltage of the over / undervoltage protection circuit 101 is detected by the detection end of the main control chip 100, and the field effect transistor V1 is controlled to be turned on or off through the first control end GATE according to the detection result of the detection end, so as to realize overvoltage protection and undervoltage protection of the surge suppression device and avoid overvoltage damage and undervoltage phenomenon of the device.

[0038] In a possible implementation, the overvoltage and undervoltage protection circuit includes a first resistor and a second resistor, and the detection terminal includes an overvoltage detection terminal.

[0039] The first end of the first resistor is connected to the first node, the second end of the first resistor, the first end of the second resistor, and the overvoltage detection terminal are coupled to a fourth node, the second end of the second resistor is grounded, and the first resistor and the second resistor form an overvoltage protection circuit;

[0040] The main control chip is used to determine whether the voltage of the overvoltage detection end is higher than a first preset voltage threshold. If the voltage of the overvoltage detection end is higher than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

[0041] Continuing with the previous example, for example Figure 1 As shown, the overvoltage and undervoltage protection circuit 101 includes a first resistor R1 and a second resistor R2, and the detection terminal includes an overvoltage detection terminal OV. The first end of the first resistor R1 is connected to the first node A to receive the power supply input voltage. The second end of the first resistor R1, the first end of the second resistor R2, and the overvoltage detection terminal OV are coupled to a fourth node D, and the second end of the second resistor R2 is grounded. The first resistor R1 and the second resistor R2 constitute an overvoltage protection circuit. The power supply input voltage is divided and controlled by the first resistor R1 and the second resistor R2 to obtain a first voltage, which is used as the voltage of the overvoltage detection terminal OV. The main control chip 100 is used to determine whether the voltage of the overvoltage detection terminal OV is higher than a first preset voltage threshold. According to the detection result of the overvoltage detection terminal OV, the first control terminal GATE is used to control the conduction or cutoff of the field effect transistor V1. In this example, the first preset voltage threshold of the overvoltage detection terminal OV of the main control chip 100 is set to 1.275V. The main control chip 100 detects whether the voltage of the overvoltage detection terminal OV is higher than 1.275V. Based on the detection result of the overvoltage detection terminal OV, the main control chip 100 controls the field effect transistor V1 to be turned on or off via the first control terminal GATE. Specifically, if the main control chip 100 detects that the voltage of the overvoltage detection terminal OV is higher than 1.275V, the first control terminal GATE is used to control the field effect transistor V1 to be turned off to achieve overvoltage protection. If the main control chip 100 detects that the voltage of the overvoltage detection terminal OV is lower than 1.275V, the first control terminal GATE is used to control the field effect diode V1 to be turned on.

[0042] The first resistor R1 and the second resistor R2 are both resistors with adjustable resistance. The first resistor R1 and the second resistor R2 in the over-voltage and under-voltage protection circuit are used to divide the power supply input voltage to prevent the device from experiencing overvoltage.

[0043] In a possible implementation, the over-voltage and under-voltage protection circuit further includes a third resistor, a fourth resistor, and a fifth resistor, and the detection terminal further includes an under-voltage detection terminal, wherein:

[0044] A first end of the third resistor is connected to the first node, a second end of the third resistor, a first end of the fourth resistor, and the undervoltage detection terminal are coupled to a third node, a second end of the fourth resistor is connected to a first end of a fifth resistor, a second end of the fifth resistor is grounded, and the third resistor, the fourth resistor, and the fifth resistor constitute an undervoltage protection circuit;

[0045] The main control chip is used to determine whether the voltage of the undervoltage detection end is lower than a first preset voltage threshold. If the voltage of the undervoltage detection end is lower than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

[0046] Continuing with the previous example, for example Figure 1 As shown, a first end of the third resistor R3 is connected to the power supply input terminal to receive the power supply input voltage. A second end of the third resistor R3, an undervoltage detection terminal UV of the main control chip 100, and a first end of the fourth resistor R4 are coupled to a third node C. A second end of the fourth resistor R4 is connected to a first end of a fifth resistor R5, a second end of the fifth resistor R5 is grounded, a first end of a third capacitor C3, a first end of the fourth resistor R4, and a second end of the third resistor R3 are coupled to the third node C, and a second end of the third capacitor C3 is grounded. The third resistor R3, the fourth resistor R4, and the fifth resistor R5 are used to divide the power supply input voltage to prevent undervoltage in the device.

[0047] In this example, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are all adjustable resistors. The third resistor R3, the fourth resistor R4, and the fifth resistor R5 are used to divide the power input voltage to obtain a second voltage, which serves as the pin voltage of the undervoltage detection terminal UV of the main control chip 100. In this example, the first preset voltage threshold of the undervoltage detection terminal UV of the main control chip 100 is set to 1.275V. The main control chip 100 detects whether the pin voltage of the undervoltage detection terminal UV is higher than 1.275V. Based on the detection result of the undervoltage detection terminal UV, the main control chip 100 controls the voltage of the first control terminal GATE, thereby controlling the conduction or cutoff of the field effect transistor V1 to achieve undervoltage protection. Specifically, the main control chip 100 detects the pin voltage of the under-voltage detection terminal UV. According to the detection result that the pin voltage of the under-voltage detection terminal UV is lower than 1.275V, the main control chip 100 controls the voltage of the first control terminal GATE to control the field effect transistor V1 to be cut off, thereby realizing under-voltage protection; according to the detection result that the pin voltage of the under-voltage detection terminal UV is higher than 1.275V, the main control chip 100 controls the voltage of the first control terminal GATE to control the field effect transistor V1 to be turned on.

[0048] In this example, the surge suppression device implements overvoltage protection through the overvoltage and undervoltage protection circuit and the overvoltage detection end of the main control chip 100, and implements undervoltage protection through the overvoltage and undervoltage protection circuit and the undervoltage detection end of the main control chip 100; in this example, the first to fifth resistors serve as voltage-dividing resistors with adjustable resistance values to perform voltage-dividing control on the power supply input voltage, which is beneficial for subsequent circuits to monitor the voltage. By selecting appropriate resistance values of the voltage-dividing resistors, the first preset voltage thresholds of overvoltage protection and undervoltage protection can be accurately set, thereby protecting the load equipment; this example can also adapt to different operating voltage ranges by adjusting the voltage-dividing ratio to provide stable protection for the circuit.

[0049] In a possible implementation, the device further includes an overcurrent protection circuit, and the main control chip further includes an output voltage detection terminal and a current detection input terminal.

[0050] The first terminal of the overcurrent protection circuit, the current detection input terminal and the second electrode of the field effect transistor are coupled to a sixth node, and the second terminal of the overcurrent protection circuit, the output voltage detection terminal and the power supply output terminal are coupled to a second node;

[0051] The main control chip is used to detect the voltage drop value between the output voltage detection terminal and the current detection input terminal, and control the conduction degree of the field effect transistor through the first control terminal according to the voltage drop value.

[0052] The overcurrent protection circuit includes a sixth resistor, a first end of the sixth resistor, a second electrode of the field effect transistor, and the current detection input terminal are coupled to a sixth node, and a second end of the sixth resistor, the output voltage detection terminal, and the power supply output terminal are coupled to a second node;

[0053] The main control chip is used to determine whether the voltage drop value between the output voltage detection terminal and the current detection input terminal is higher than a first preset voltage drop threshold. If the voltage drop value is higher than the first preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0054] Continuing with the previous example, for example Figure 1As shown, the first end of the overcurrent protection circuit 102 is connected to the current detection input terminal SNS, and the second end of the overcurrent protection circuit 102 is connected to the output voltage detection terminal OUT; the overcurrent protection circuit 102 includes a sixth resistor R6, the first end of the sixth resistor R6, the current detection input terminal SNS of the main control chip 100 and the second electrode of the field effect transistor V1 are coupled to the sixth node F, the second end of the sixth resistor R6, the output voltage detection terminal OUT of the main control chip 100 and the power supply output terminal are coupled to the second node B, the current across the sixth resistor R6 serves as the current between the output voltage detection terminal OUT and the current detection input terminal SNS, that is, the voltage drop value across the sixth resistor R6 serves as the voltage drop value between the output voltage detection terminal OUT and the current detection input terminal.

[0055] In this example, the main control chip 100 detects whether the voltage drop between the output voltage detection terminal OUT and the current detection input terminal is greater than a first preset voltage drop threshold. If the voltage drop is greater than the first preset voltage drop threshold, the first control terminal GATE controls the conduction level of the field-effect transistor V1 to implement overcurrent protection. Specifically, the first preset voltage drop threshold across the sixth resistor R6 is set to 50mV. The main control chip 100 detects the voltage drop across the sixth resistor R6. If the voltage drop across the sixth resistor R6 is greater than 50mV, it is determined that the circuit is overcurrent. In this case, the first control terminal GATE of the main control chip 100 controls the conduction level of the field-effect transistor V1 to implement overcurrent protection.

[0056] In this example, the overcurrent protection circuit 102 is connected to the main control chip 100, and the voltage drop across the sixth resistor R6 is detected by the main control chip 100. According to the detection result of the voltage drop across the sixth resistor R6, the conduction degree of the field effect transistor V1 is controlled by the pin voltage of the first control terminal GATE to achieve overcurrent protection.

[0057] In one possible implementation, the main control chip is also used to determine whether the voltage drop between the output voltage detection terminal and the current detection input terminal is lower than a second preset voltage drop threshold. If the voltage drop value is lower than the second preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0058] Continuing with the previous example, for example Figure 1As shown, the main control chip 100 detects whether the voltage drop between the output voltage detection terminal OUT and the current detection input terminal SNS is less than a second preset voltage drop threshold. If it is less than the second preset voltage drop threshold, it is determined that the circuit is short-circuited. Based on the detection result of the voltage drop between the output voltage detection terminal OUT and the current detection input terminal SNS, the main control chip 100 controls the pin voltage of the first control terminal GATE to control the conduction degree of the field effect transistor V1 to achieve short-circuit protection. Specifically, the second preset voltage drop threshold across the sixth resistor R6 is set to 25mV. The main control chip 100 detects the voltage drop across the sixth resistor R6. Based on the detection result that the voltage drop across the sixth resistor R6 is less than 25mV and the voltage of the output voltage detection terminal OUT is less than 50mV, it is determined that the circuit is short-circuited. The voltage drop across the sixth resistor R6 is limited by the pin voltage of the first control terminal GATE of the main control chip 100 to achieve short-circuit protection.

[0059] In a possible implementation, the device further includes a clamping circuit, and the main control chip further includes a feedback terminal.

[0060] A first end of the clamping circuit is connected to the feedback end, a second end of the clamping circuit is connected to the power supply output end, and a third end of the clamping circuit is grounded;

[0061] The main control chip is used to determine whether the voltage of the feedback terminal is higher than a second preset voltage threshold. If the voltage of the feedback terminal is higher than the second preset voltage threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

[0062] Continuing with the previous example, for example Figure 1 As shown, the first end of the clamp circuit 103 is connected to the feedback end FB of the main control chip for dividing the output voltage; the second end of the clamp circuit 103 is connected to the power supply output end, and the third end of the clamp circuit 103 is grounded.

[0063] The clamping circuit 103 includes a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. A first end of the seventh resistor R7 is connected to the power supply output terminal, a second end of the seventh resistor R7 is connected to the first end of the eighth resistor R8, a second end of the eighth resistor R8, a first end of the ninth resistor R9, and a feedback terminal FB are coupled to a fifth node E, and a second end of the ninth resistor R9 is grounded. The seventh resistor R7 and the eighth resistor R8 are connected in series to maintain a stable current through the seventh and eighth resistors R7 and R8, protecting downstream devices from damage caused by current fluctuations.

[0064] In this example, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are all adjustable resistors. The seventh resistor R7, the eighth resistor R8, and the ninth resistor R9 are used to divide the power supply output voltage to obtain a third voltage, which serves as the pin voltage of the feedback terminal FB of the main control chip 100. In this example, the second preset voltage threshold is set to 1.275V. The main control chip 100 detects whether the pin voltage of the feedback terminal FB is higher than the second preset voltage threshold. Based on the detection result of the feedback terminal, the conduction degree of the field-effect transistor V1 is controlled through the first control terminal GATE, thereby controlling the output voltage value. Specifically, based on the detection result that the main control chip 100 detects that the pin voltage of the feedback terminal FB is higher than 1.275V, the pin voltage of the first control terminal GATE is controlled to control the conduction degree of the field-effect transistor V1, so that the output voltage of the field-effect transistor V1 is lower than a preset value, thereby preventing damage to devices or components in the circuit due to excessive voltage. The preset value is the maximum voltage value that the subsequent device can withstand.

[0065] In this example, the seventh, eighth, and ninth resistors are all voltage-dividing resistors for the power supply output voltage, which clamp the output voltage to prevent damage to equipment in the circuit, protect the detection device, and improve circuit stability. This example connects the clamping circuit to the main control chip to divide the output voltage to prevent excessive output voltage from damaging subsequent equipment. This example uses non-contact measurement voltage clamping technology to improve safety during the voltage measurement process.

[0066] In a possible implementation, the device further includes a fault shutdown circuit, and the main control chip further includes a fault timer input terminal.

[0067] A first terminal of the fault shutdown circuit is connected to the fault timer input terminal, and a second terminal of the fault shutdown circuit is grounded;

[0068] The fault shutdown circuit includes a first capacitor and a second capacitor, wherein a first terminal of the first capacitor, a first terminal of the second capacitor, and the fault timer input terminal are coupled to a seventh node, a second terminal of the first capacitor and a second terminal of the second capacitor are grounded, and the first capacitor and the second capacitor constitute a fault shutdown circuit;

[0069] The main control chip is used to detect the capacitance value of the fault timer input terminal, and control the turn-off time of the field effect transistor through the first control terminal according to the detection result of the fault timer input terminal.

[0070] Continuing with the previous example, for example Figure 1As shown, the first end of the fault shutdown circuit 104 is connected to the fault timer input terminal TMR of the main control chip 100, and the second end of the fault shutdown circuit 104 is grounded; the fault shutdown circuit 104 is used to control the turn-off time and cooling time of the field effect transistor V1 in the main control chip 100 in the case of an overvoltage surge to avoid overload operation of the device.

[0071] The fault shutdown circuit 104 includes a first capacitor C1 and a second capacitor C2. The first end of the first capacitor C1, the first end of the second capacitor C2, and the fault timer input terminal TMR are coupled to a seventh node G. The second end of the first capacitor C1 and the second end of the second capacitor C2 are both grounded. The first capacitor C1 and the second capacitor C2 are connected in parallel to increase the capacitance, eliminate power supply interference, and ensure the stability of the fault timer input terminal TMR signal.

[0072] Specifically, the fault shutdown circuit controls the off-time of field-effect transistor V1 by configuring the capacitor at the fault timer input terminal TMR of the main control chip 100. The main control chip 100 includes an internal TMR timer. By adjusting the TMR timer, the off-time of field-effect transistor V1 during an overvoltage surge is limited. A cool-down time is set based on the off-time of field-effect transistor V1. When the output voltage of the control device is lower than a preset value, the surge time setting must take into account the safe operating area of field-effect transistor V1. After the set time has expired, field-effect transistor V1 is turned off, and the field-effect transistor enters a cooling state.

[0073] If an overvoltage surge occurs, the TMR timer charges the first and second capacitors C1 and C2 via the fault timer input TMR of the main control chip 100, using a current that varies as a function of VDS to charge the capacitors from 0.5V to 1.275V. At this point, the voltage reaches the reference voltage of the main control chip 100, and the main control chip 100 issues a warning signal to shut down the field-effect transistor V1. However, the field-effect transistor V1 does not shut down. The current is adjusted to 6μA according to the TMR timer, and the capacitors are charged to 1.375V. At this point, the voltage reaches the cutoff voltage of the field-effect transistor V1, and the field-effect transistor V1 shuts down. The total time from the start of output regulation to the shutdown of the field-effect transistor V1 is t = CTMR * (0.0775 / ITMR + 100mv / 6uA). The total time from the start of output regulation to the shutdown is obtained by adjusting the capacitance value.

[0074] This example uses a capacitor with a CTMR of 14.7μF and an ITMR of 50*(80-35) / 75=30μA. Using the above formula, the total time t from the start of output regulation to V1 shutdown is 590ms. Using the cooldown time formula (TCOOL=CTMR*0.875V / 2uA), the cooldown time is 6431ms.

[0075] According to the unique properties of the main control chip 100, when the power supply input voltage is 36V ≤ Vin ≤ 50V, the overvoltage surge lasts for 50ms; when the power supply input voltage is Vin = 60V, the overvoltage surge lasts for 550ms; and when the power supply input voltage is Vin = 80V, the overvoltage surge lasts for 50ms. This example uses a 14.7μF capacitor and sets the current to 30μA, resulting in a 590ms turn-off time for field-effect transistor V1. Therefore, in this example, the power supply will not shut down when the overvoltage surge lasts for 550ms, and power can continue to be output, preventing the device from overloading.

[0076] In this example, the main control chip detects the capacitance value of the fault timer input terminal, and controls the turn-off time of the field effect transistor during an overvoltage surge through the first control terminal according to the detection result of the fault timer input terminal to avoid overload operation of the device.

[0077] In a possible implementation, the main control chip uses an SM4363MP chip.

[0078] Continuing with the previous example, for example Figure 1 As shown, in this example, the main control chip 100 adopts the main control chip model SM4363MP. The first control terminal GATE of the main control chip 100, the first end of the tenth resistor R10, the first end of the eleventh resistor R11, and the anode of the diode V2 are coupled, the second end of the eleventh resistor R11, the cathode of the diode V2, and the first end of the fourth capacitor C4 are coupled, and the second end of the fourth capacitor C4 is grounded.

[0079] In a possible implementation, the field effect transistor is a MOSFET type.

[0080] Continuing with the previous example, for example Figure 1 As shown, the type of the field effect transistor V1 is a MOSFET type.

[0081] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "upper" and "lower" is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. Unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be internal communication between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0082] It should also be noted that, in the description of the present invention, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0083] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. A surge suppression device, characterized in that: Including field effect transistor, main control chip and over-voltage and under-voltage protection circuit, The first electrode of the field effect transistor, the first end of the over-voltage / under-voltage protection circuit, and the power supply input end are coupled to a first node, the second electrode of the field effect transistor is connected to the power supply output end, the control electrode of the field effect transistor is connected to the first control end of the main control chip, the second end of the second end of the over-voltage / under-voltage protection circuit is grounded, and the third end of the over-voltage / under-voltage protection circuit is connected to the detection end of the main control chip; The main control chip is used to detect the voltage of the over-voltage and under-voltage protection circuit through the detection end, and control the field effect transistor to be turned on or off through the first control end according to the detection result of the detection end.

2. The device according to claim 1, characterized in that The over-voltage and under-voltage protection circuit includes a first resistor and a second resistor, and the detection terminal includes an overvoltage detection terminal. The first end of the first resistor is connected to the first node, the second end of the first resistor, the first end of the second resistor, and the overvoltage detection terminal are coupled to a fourth node, the second end of the second resistor is grounded, and the first resistor and the second resistor form an overvoltage protection circuit; The main control chip is used to determine whether the voltage of the overvoltage detection end is higher than a first preset voltage threshold. If the voltage of the overvoltage detection end is higher than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

3. The device according to claim 1, characterized in that The over-voltage and under-voltage protection circuit further includes a third resistor, a fourth resistor and a fifth resistor, and the detection terminal further includes an under-voltage detection terminal. A first end of the third resistor is connected to the first node, a second end of the third resistor, a first end of the fourth resistor, and the undervoltage detection terminal are coupled to a third node, a second end of the fourth resistor is connected to a first end of a fifth resistor, a second end of the fifth resistor is grounded, and the third resistor, the fourth resistor, and the fifth resistor constitute an undervoltage protection circuit; The main control chip is used to determine whether the voltage of the undervoltage detection end is lower than a first preset voltage threshold. If the voltage of the undervoltage detection end is lower than the first preset voltage threshold, the field effect transistor is controlled to be cut off through the first control end.

4. The device according to claim 1, characterized in that The device also includes an overcurrent protection circuit, and the main control chip also includes an output voltage detection terminal and a current detection input terminal. The first terminal of the overcurrent protection circuit, the current detection input terminal and the second electrode of the field effect transistor are coupled to a sixth node, and the second terminal of the overcurrent protection circuit, the output voltage detection terminal and the power supply output terminal are coupled to a second node; The main control chip is used to detect the voltage drop value between the output voltage detection terminal and the current detection input terminal, and control the conduction degree of the field effect transistor through the first control terminal according to the voltage drop value.

5. The device according to claim 4, characterized in that The main control chip is used to determine whether the voltage drop value between the output voltage detection terminal and the current detection input terminal is higher than a first preset voltage drop threshold. If the voltage drop value is higher than the first preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

6. The device according to claim 5, characterized in that The main control chip is also used to determine whether the voltage drop between the output voltage detection terminal and the current detection input terminal is lower than a second preset voltage drop threshold. If the voltage drop value is lower than the second preset voltage drop threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

7. The device according to claim 1, characterized in that The device further includes a clamping circuit, and the main control chip further includes a feedback terminal. A first end of the clamping circuit is connected to the feedback end, a second end of the clamping circuit is connected to the power supply output end, and a third end of the clamping circuit is grounded; The main control chip is used to determine whether the voltage of the feedback terminal is higher than a second preset voltage threshold. If the voltage of the feedback terminal is higher than the second preset voltage threshold, the conduction degree of the field effect transistor is controlled through the first control terminal.

8. The device according to claim 1, characterized in that The device also includes a fault shutdown circuit, and the main control chip also includes a fault timer input terminal. A first terminal of the fault shutdown circuit is connected to the fault timer input terminal, and a second terminal of the fault shutdown circuit is grounded; The main control chip is used to detect the capacitance value of the fault timer input terminal, and control the turn-off time of the field effect transistor through the first control terminal according to the detection result of the fault timer input terminal.

9. The device according to claim 1, characterized in that The main control chip is SM4363MP.

10. The device according to claim 1, characterized in that The type of the field effect transistor is MOSFET.

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