CAN bus transceiver bus common mode voltage detection circuit

Abstract

The present application discloses a CAN bus transceiver bus common-mode voltage detection circuit, which relates to the technical field of integrated circuits. The circuit includes: a sampling module, a comparison module and a logic module; the comparison module is connected to the sampling module and the logic module respectively, and the sampling module is connected to the output circuit of the CAN bus transceiver; the sampling module is used to collect the driving current of the CAN bus transceiver output circuit and send the driving current to the comparison module; the comparison module is used to compare the driving current with a preset reference current and output the comparison result to the logic module; the comparison result includes: the signal state of a high-side current comparison signal and a reverse-side current comparison signal; the logic module is used to determine that the bus common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of the high-side current comparison signal or the reverse-side current comparison signal in the comparison result is a high level, so as to facilitate fault diagnosis and maintenance.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a CAN bus transceiver bus common-mode voltage detection circuit. Background Technology

[0002] Although the CAN bus uses differential-mode voltage to identify and transmit signals, factors such as cable length and distributed parameters, and electromagnetic interference can affect the stability and range of the common-mode voltage. Excessively high or low common-mode voltages can degrade bus system performance, leading to increased bit error rates, reduced transmission distance, and compromised system immunity to interference.

[0003] Existing CAN bus driver circuit structures, such as Figure 1 As shown, the driver module converts the DH and DL voltages into output currents by controlling PMOS MA1 and NMOS MA4, respectively. To achieve positive and negative withstand voltage characteristics for CANH and CANL, the drain of MA1 is connected to the positive terminal of the high-voltage diode DA1, the negative terminal of DA1 is connected to the source of MA2, the gate of MA2 is grounded to GND, and the drain of MA2 is the CANH output terminal of the CAN bus. The positive high voltage of CANH is protected by DA1, and the negative voltage of CANH is isolated by MA2. The drain of NMOS MA4 is connected to the source of NMOS MA3, the gate of MA3 is connected to the power supply VCC, and the drain of MA3 is connected to the negative terminal of the high-voltage diode DA2. The positive terminal of DA2 is the CANL output terminal of the CAN bus. The positive high voltage of CANL is protected by MA3, and the negative voltage of CANL is protected by DA2.

[0004] CAN bus ports are bidirectional ports with both output and input functions. For example... Figure 1 The diagram shows a CAN bus driver circuit, which controls the dominance and recessiveness of the CANH and CANL ports via DH and DL, i.e., differential mode voltage control. Secondly, as an input function, detecting the bus differential voltage to determine bus dominance and recessiveness is one of the basic functions of a CAN bus chip, but it does not detect common-mode voltage anomalies when the bus is dominant. Summary of the Invention

[0005] The main purpose of this application is to provide a CAN bus transceiver bus common-mode voltage detection circuit, which aims to solve the technical problem of not detecting abnormal common-mode voltage when the bus is dominant in the CAN bus driver circuit.

[0006] To achieve the above objectives, this application proposes a CAN bus transceiver common-mode voltage detection circuit, which is applied to a CAN bus transceiver.

[0007] The CAN bus transceiver common-mode voltage detection circuit includes: a sampling module, a comparison module, and a logic module;

[0008] The comparison module is connected to the sampling module and the logic module respectively, and the sampling module is connected to the output circuit of the CAN bus transceiver.

[0009] The sampling module is used to collect the drive current of the output circuit of the CAN bus transceiver and send the drive current to the comparison module;

[0010] The comparison module is used to compare the drive current with a preset reference current and output the comparison result to the logic module; the comparison result includes: the signal status of the high-side current comparison signal and the reverse-side current comparison signal and the line-side current comparison signal;

[0011] The logic module is used to determine the bus output dominance or recessivity of the CAN bus transceiver based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result.

[0012] The logic module is also used to change the signal state of the reverse side current comparison signal in the comparison result from low level to high level when the bus output of the CAN bus transceiver is in a dominant state.

[0013] The logic module is used to determine that the common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of the high-side current comparison signal or the reverse-side current comparison signal is high in the comparison result, so that the COM terminal output of the logic module is high.

[0014] Optionally, the CAN bus transceiver bus common-mode voltage detection circuit further includes: a reference current module;

[0015] The reference current module is connected to the comparison module;

[0016] The reference current module is used to send a reference current signal to the comparison module;

[0017] The comparison module is used to compare the driving current with the preset reference current in the reference current signal and output the comparison result to the logic module.

[0018] Optionally, the sampling module includes: a first sampling unit and a second sampling unit;

[0019] The first sampling unit is connected to the output circuit of the comparison module and the CAN bus transceiver, and the second sampling unit is connected to the output circuit of the comparison module and the CAN bus transceiver.

[0020] The first sampling unit is used to collect the first drive current of the output circuit of the CAN bus transceiver and send the first drive current to the comparison module;

[0021] The second sampling unit is used to collect the second drive current of the output circuit of the CAN bus transceiver and send the second drive current to the comparison module;

[0022] The comparison module is further configured to compare the first drive current, the second drive current and a preset reference current, and output the comparison result to the logic module.

[0023] Optionally, the comparison module includes: a first comparison unit, a second comparison unit, and a third comparison unit;

[0024] The first comparison unit is connected to the sampling module, the second comparison unit, the third comparison unit, and the logic module; the second comparison unit is connected to the sampling module, the first comparison unit, the third comparison unit, and the logic module; and the third comparison unit is connected to the sampling module, the first comparison unit, the second comparison unit, and the logic module.

[0025] The first comparison unit is used to output a comparison result with a high-level high-side current comparison signal to the logic module when the difference between the first driving current and the second driving current is greater than a preset reference current.

[0026] The second comparison unit is used to output a comparison result, in which the reverse side current comparison signal is high, to the logic module when the difference between the second driving current and the first driving current is greater than a preset reference current; the comparison result also includes the signal state of the line-side current comparison signal.

[0027] The third comparison unit is used to output a comparison result, in which the line-side current comparison signal is high, to the logic module when the sum of the first driving current and the second driving current is greater than a preset reference current.

[0028] Optionally, the logic module is further configured to determine that the bus common-mode voltage of the CAN bus transceiver is within a preset normal range when the signal states of the high-side current comparison signal and the reverse-side current comparison signal are low in the comparison result.

[0029] The logic module is also used to determine that the bus output of the CAN bus transceiver is in a dominant state when the signal state of the received line-side current comparison signal is high.

[0030] The logic module is also used to determine that the bus output of the CAN bus transceiver is in a recessive state when the signal state of the received line-side current comparison signal is low.

[0031] Optionally, the first sampling unit includes: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor;

[0032] The gate of the first MOSFET, the gate of the fourth MOSFET, the drain of the fourth MOSFET, and the drain of the fifth MOSFET are respectively connected to the output circuit of the CAN bus transceiver. The drain of the first MOSFET is connected to the power supply, the source of the fifth MOSFET is grounded, the source of the first MOSFET is connected to the source of the second MOSFET, the gate of the second MOSFET is connected to the drain of the second MOSFET and the gate of the third MOSFET, the source of the third MOSFET is connected to the source of the fourth MOSFET, and the drain of the third MOSFET is connected to the gate of the fifth MOSFET and the comparator module.

[0033] Optionally, the second sampling unit includes: a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor;

[0034] The source of the sixth MOS transistor is connected to the power supply, and the gate of the sixth MOS transistor is connected to the drain of the eighth MOS transistor and the comparator module. The drain of the sixth MOS transistor, the source of the seventh MOS transistor, and the source of the eighth MOS transistor are connected to the output circuit of the CAN bus transceiver. The gate of the seventh MOS transistor is connected to the drain of the seventh MOS transistor and the gate of the eighth MOS transistor.

[0035] Optionally, the first comparison unit includes: a ninth MOS transistor, a tenth MOS transistor, and an eleventh MOS transistor;

[0036] The source of the ninth MOS transistor is grounded, the gate of the ninth MOS transistor is connected to the second comparator unit and the sampling module, the drain of the ninth MOS transistor is connected to the drain of the tenth MOS transistor and the drain of the eleventh MOS transistor, the gate of the tenth MOS transistor is connected to the third comparator unit, the source of the tenth MOS transistor and the source of the eleventh MOS transistor are connected to the power supply, and the gate of the eleventh MOS transistor is connected to the second comparator unit and the sampling module.

[0037] Optionally, the second comparison unit includes: a twelfth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET;

[0038] The source of the twelfth MOS transistor is connected to the power supply. The gate of the twelfth MOS transistor is connected to the first comparator unit and the sampling module. The drain of the twelfth MOS transistor is connected to the drain of the thirteenth MOS transistor and the drain of the fourteenth MOS transistor. The source of the thirteenth MOS transistor and the source of the fourteenth MOS transistor are grounded. The gate of the fourteenth MOS transistor is connected to the first comparator unit and the sampling module.

[0039] Optionally, the third comparison unit includes: a fifteenth MOS transistor, a sixteenth MOS transistor, and a seventeenth MOS transistor;

[0040] The source of the fifteenth MOS transistor is connected to the power supply, the gate of the fifteenth MOS transistor is connected to the first comparator unit and the sampling module, the drain of the fifteenth MOS transistor is connected to the drain of the sixteenth MOS transistor and the drain of the seventeenth MOS transistor, and the source of the sixteenth MOS transistor and the source of the seventeenth MOS transistor are grounded.

[0041] One or more technical solutions proposed in this application have at least the following effects:

[0042] This application discloses a CAN bus transceiver common-mode voltage detection circuit, which is applied to a CAN bus transceiver. The CAN bus transceiver common-mode voltage detection circuit includes a sampling module, a comparison module, and a logic module. The comparison module is connected to both the sampling module and the logic module, and the sampling module is connected to the output circuit of the CAN bus transceiver. The sampling module is used to acquire the drive current of the CAN bus transceiver output circuit and send the drive current to the comparison module. The comparison module is used to compare the drive current with a preset reference current and output the comparison result to the logic module. The comparison result includes the signal states of a high-side current comparison signal, a reverse-side current comparison signal, and a line-side current comparison signal. The logic module... The logic module is used to determine the dominance or recessiveness of the CAN bus transceiver's bus output based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result. The logic module is also used to change the signal state of the reverse-side current comparison signal in the comparison result from low to high when the CAN bus transceiver's bus output is in a dominant state. Furthermore, the logic module is used to determine that the CAN bus transceiver's bus common-mode voltage is not within a preset normal range when the signal state of either the high-side or reverse-side current comparison signal in the comparison result is high, thereby ensuring that the COM terminal output of the logic module is high. This allows for timely detection of abnormal bus common-mode voltage, facilitating fault diagnosis and maintenance, improving bus communication reliability, and enhancing the system's anti-interference capability. Attached Figure Description

[0043] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0044] Figure 1 This is a circuit diagram of the output circuit of an existing CAN bus transceiver.

[0045] Figure 2 This is a schematic diagram of the structure of the first embodiment of the CAN bus transceiver bus common-mode voltage detection circuit proposed in this application.

[0046] Figure 3 This is a schematic diagram of the second embodiment of the CAN bus transceiver bus common-mode voltage detection circuit proposed in this application.

[0047] Figure 4 This is a circuit schematic diagram of the second embodiment of the CAN bus transceiver bus common-mode voltage detection circuit proposed in this application.

[0048] Explanation of icon numbers:

[0049] 10: Sampling module; 20: Comparison module; 30: Logic module.

[0050] The purpose, features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0051] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of this application and are not intended to limit this application.

[0052] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0053] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0054] In addition, the descriptions of "first", "second", etc. in this application are for descriptive purposes only and should not be understood as indicating or implying their relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0055] The main solution of this application embodiment is: the sampling module 10 collects the drive current of the CAN bus transceiver output circuit and sends it to the comparison module 20. The comparison module 20 compares the drive current with a preset reference current and outputs the comparison result to the logic module 30. The comparison result includes the signal states of the high-side current comparison signal and the reverse-side current comparison signal. The logic module 30 is used to determine that the bus common-mode voltage of the CAN bus transceiver is not within the preset normal range when the signal state of the high-side current comparison signal or the reverse-side current comparison signal in the comparison result is high.

[0056] This application provides a solution, disclosing a CAN bus transceiver common-mode voltage detection circuit. The circuit is applied to a CAN bus transceiver. The CAN bus transceiver common-mode voltage detection circuit includes: a sampling module 10, a comparison module 20, and a logic module 30. The comparison module 20 is connected to both the sampling module 10 and the logic module 30, and the sampling module 10 is connected to the output circuit of the CAN bus transceiver. The sampling module 10 is used to acquire the drive current of the CAN bus transceiver output circuit and send the drive current to the comparison module 20. The comparison module 20 is used to compare the drive current with a preset reference current and output the comparison result to the logic module 30. The comparison result includes the signal states of the high-side current comparison signal and the reverse-side current comparison signal. The logic module 30 is used to determine the dominance or recessiveness of the CAN bus transceiver's bus output based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result. The logic module 30 is also used to change the signal state of the reverse-side current comparison signal in the comparison result from low to high when the bus output of the CAN bus transceiver is in a dominant state. Furthermore, the logic module 30 is used to determine that the common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of either the high-side or reverse-side current comparison signal in the comparison result is high, so that the COM terminal output of the logic module 30 is high. This allows for timely detection of abnormal common-mode voltage, facilitating fault diagnosis and maintenance, improving bus communication reliability, and enhancing the system's anti-interference capability.

[0057] Based on this, this application provides a CAN bus transceiver bus common-mode voltage detection circuit.

[0058] refer to Figure 2 , Figure 2 This is a schematic diagram of the first embodiment of the CAN bus transceiver bus common-mode voltage detection circuit proposed in this application.

[0059] Considering the issue that the CAN bus driver circuit does not detect abnormal common-mode voltage when the bus is dominant. For example... Figure 2 As shown, the circuit described in this embodiment is applied to a CAN bus transceiver;

[0060] The CAN bus transceiver bus common-mode voltage detection circuit includes: a sampling module 10, a comparison module 20, and a logic module 30;

[0061] The comparison module 20 is connected to the sampling module 10 and the logic module 30 respectively, and the sampling module 10 is connected to the output circuit of the CAN bus transceiver;

[0062] The sampling module 10 is used to collect the drive current of the output circuit of the CAN bus transceiver and send the drive current to the comparison module 20;

[0063] The comparison module 20 is used to compare the driving current with a preset reference current and output the comparison result to the logic module 30; the comparison result includes: the signal status of the high-side current comparison signal and the reverse-side current comparison signal and the line-side current comparison signal;

[0064] The logic module 30 is used to determine the bus output of the CAN bus transceiver based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result.

[0065] The logic module 30 is also used to change the signal state of the reverse side current comparison signal in the comparison result from low level to high level when the bus output of the CAN bus transceiver is in a dominant state.

[0066] The logic module 30 is used to determine that the common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of the high-side current comparison signal or the reverse-side current comparison signal is high in the comparison result, so that the COM terminal output of the logic module 30 is high.

[0067] It should be noted that, as Figure 2 As shown, sampling module 10 includes a CANH current sampling module (first sampling unit) and a CANL current sampling module (second sampling unit). The CANH current sampling module is connected to the drain of the CANH driver transistor MA1 through the HA port, and the HB port is connected to the drain of the sampling transistor MA5 of the CANH driver transistor. The CANH current sampling module processes the signals at points HA and HB, and iH is the output of the CANH current sampling module. The CANL current sampling module is connected to the drain of the CANL driver transistor MA4 through the LA port, and the LB port is connected to the drain of the sampling transistor MA6 of the CANL driver transistor. The CANL current sampling module processes the signals at points LA and LB. iL is the output of the CANL current sampling module, i.e., the driving current in this embodiment is iH and iL. The reference current module generates a (preset) reference current iB. The comparison result is: iH-iL / iL-iH / iL+iH compared with iB, and the signal status of the HSC high-side current comparison signal, RSC reverse-side current comparison signal, and LSC line-side current comparison signal are output to the logic module 30. The CAN bus transceiver's common-mode voltage not being within the preset normal range means that the common-mode voltage is below the lower threshold or above the upper threshold. The preset normal range is the range between the upper and lower thresholds.

[0068] In a specific implementation, the sampling module 10 is used to collect the drive current of the CAN bus transceiver output circuit and send the drive current to the comparison module 20; the comparison module 20 is used to compare the drive current with a preset reference current and output the comparison result to the logic module 30; the comparison result includes: the signal states of the high-side current comparison signal and the reverse-side current comparison signal, and the line-side current comparison signal; the logic module 30 is used to determine the bus of the CAN bus transceiver based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result. The logic module 30 is further configured to change the signal state of the reverse side current comparison signal in the comparison result from low to high when the bus output of the CAN bus transceiver is in a dominant state. The logic module 30 is also configured to determine that the bus common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of the high side current comparison signal or the reverse side current comparison signal in the comparison result is high, so that the COM terminal output of the logic module 30 is high. This enables timely detection of abnormal bus common-mode voltage, facilitating fault diagnosis and maintenance, improving bus communication reliability, and enhancing the system's anti-interference capability.

[0069] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 3 , Figure 3 This is a schematic diagram of the second embodiment of the CAN bus transceiver bus common-mode voltage detection circuit proposed in this application.

[0070] Considering the need to provide a reference current for comparator module 20. For example... Figure 3 As shown, the CAN bus transceiver bus common-mode voltage detection circuit in this embodiment further includes: a reference current module;

[0071] The reference current module is connected to the comparison module 20;

[0072] The reference current module is used to send a reference current signal to the comparison module 20;

[0073] The comparison module 20 is used to compare the driving current with the preset reference current in the reference current signal and output the comparison result to the logic module 30.

[0074] It should be noted that the reference current module generates a (preset) reference current iB.

[0075] In its specific implementation, the reference current module is used to send a reference current signal to the comparison module 20; the comparison module 20 is used to compare the drive current with a preset reference current in the reference current signal and output the comparison result to the logic module 30. This ensures stable circuit operation and accurate judgment. The iB generated by the reference current module is a stable current value, providing a reliable reference standard for subsequent comparison operations. Even under different operating environments and conditions, as long as iB remains stable, the accuracy of the comparison result can be guaranteed, thus ensuring that the entire circuit's judgment of the bus state is accurate, enabling the circuit to operate according to the expected logic and achieve correct detection and control of the bus common-mode voltage and output state. By comparing with iB, the sampled current signal (drive current) can be converted into high and low level signals for subsequent circuit logic processing and control operations. This comparison method based on a fixed reference current can, to a certain extent, eliminate interference from other factors in the circuit, such as component parameter changes and power supply voltage fluctuations, thereby improving the consistency and accuracy of circuit judgment and ensuring the stable operation of the entire system.

[0076] Furthermore, the sampling module 10 includes: a first sampling unit and a second sampling unit;

[0077] The first sampling unit is connected to the output circuit of the comparison module 20 and the CAN bus transceiver, and the second sampling unit is connected to the output circuit of the comparison module 20 and the CAN bus transceiver.

[0078] The first sampling unit is used to collect the first drive current of the output circuit of the CAN bus transceiver and send the first drive current to the comparison module 20;

[0079] The second sampling unit is used to collect the second drive current of the output circuit of the CAN bus transceiver and send the second drive current to the comparison module 20;

[0080] The comparison module 20 is further configured to compare the first driving current and the second driving current with a preset reference current, and output the comparison result to the logic module 30.

[0081] It should be noted that the first sampling unit is the CANH current sampling module, the second sampling unit is the CANL current sampling module, the first driving current is iH, and the second driving current is iL.

[0082] In a specific implementation, the first sampling unit is used to collect the first drive current of the output circuit of the CAN bus transceiver and send the first drive current to the comparison module 20; the second sampling unit is used to collect the second drive current of the output circuit of the CAN bus transceiver and send the second drive current to the comparison module 20; the comparison module 20 is also used to compare the first drive current and the second drive current with a preset reference current and output the comparison result to the logic module 30, thereby realizing the sampling of the drive current of the output circuit of the CAN bus transceiver and the comparison with the preset reference current.

[0083] Furthermore, the comparison module 20 includes: a first comparison unit, a second comparison unit, and a third comparison unit;

[0084] The first comparison unit is connected to the sampling module 10, the second comparison unit, the third comparison unit and the logic module 30; the second comparison unit is connected to the sampling module 10, the first comparison unit, the third comparison unit and the logic module 30; and the third comparison unit is connected to the sampling module 10, the first comparison unit, the second comparison unit and the logic module 30.

[0085] The first comparison unit is used to output a comparison result with a high-level high-side current comparison signal to the logic module 30 when the difference between the first driving current and the second driving current is greater than a preset reference current.

[0086] The second comparison unit is used to output a comparison result, in which the reverse side current comparison signal is high, to the logic module 30 when the difference between the second driving current and the first driving current is greater than a preset reference current; the comparison result also includes the signal state of the line-side current comparison signal.

[0087] The third comparison unit is used to output a comparison result, in which the line-side current comparison signal is high, to the logic module 30 when the sum of the first driving current and the second driving current is greater than a preset reference current.

[0088] It should be noted that the first comparison unit is current comparison 1, which compares iH - iL and the reference current iB, and its output is HSC (high-side current comparison signal). When the bus common-mode voltage is lower than the lower threshold, the CANL current decreases, so iH - iL > iB and HSC is at a high level. The second comparison unit is current comparison 2, which compares iL - iH and the reference current iB, and its output is RSC (reverse-side current comparison signal). When the bus common-mode voltage is higher than the upper threshold, the CANH current decreases, so iL - iH > iB and RSC is at a high level. Under normal circumstances, when the bus common-mode voltage is between the upper threshold and the lower threshold, the CANH and CANL currents are equal, so iH - iL < iB and iL - iH < iB, and both HSC and RSC are at a low level. The third comparison unit is current comparison 3, which compares iL - iH and the reference current iB, and its output is LSC (line-side current comparison signal). When the bus outputs a dominant signal, regardless of the range of the common-mode voltage, one of the bus CANH and CANL ports can normally output a driving current, so iL + iH > iB and LSC outputs a high level, indicating that the bus outputs a dominant signal; when the bus outputs a recessive signal, CANH and CANL are both turned off, iL and iH are zero, so iL + iH < iB and LSC outputs a low level.

[0089] In a specific implementation, the first comparison unit is configured to output a comparison result with the high-side current comparison signal at a high level to the logic module 30 when the difference between the first driving current and the second driving current is greater than a preset reference current; the second comparison unit is configured to output a comparison result with the reverse-side current comparison signal at a high level to the logic module 30 when the difference between the second driving current and the first driving current is greater than a preset reference current; the comparison result further includes: the signal state of the line-side current comparison signal; the third comparison unit is configured to output a comparison result with the line-side current comparison signal at a high level to the logic module 30 when the sum of the first driving current and the second driving current is greater than a preset reference current. Thus, the signal states of the HSC high-side current comparison signal, the RSC reverse-side current comparison signal, and the LSC line-side current comparison signal are determined by the comparison module 20.

[0090] Further, the logic module 30 is further configured to determine that the bus common-mode voltage of the CAN bus transceiver is within a preset normal range when the signal states of the high-side current comparison signal and the reverse-side current comparison signal in the comparison result are at a low level;

[0091] The logic module 30 is further configured to determine that the bus output of the CAN bus transceiver is in a dominant state when receiving that the signal state of the line-side current comparison signal is at a high level;

[0092] The logic module 30 is further configured to determine that the bus output of the CAN bus transceiver is in a recessive state when the signal state of the line-side current comparison signal received is at a low level.

[0093] It should be noted that, as Figure 3 shown, the output terminals of the logic module 30 are COM and LD. The logic module 30 performs a logical combination on the input HSC (high-side current comparison signal), RSC (reverse-side current comparison signal), and LSC (line-side current comparison signal). The output logic can reflect the range of the common-mode voltage and the output dominant / recessive state: when the bus output is dominant, the current comparison 2 (the second comparison unit) outputs RSC as high; at this time, the logic module 30 outputs LD as high, indicating that the bus output is dominant normally. When the common-mode voltage is lower than the preset low threshold, the current comparison 1 (the first comparison unit) outputs HSC as high; when the common-mode voltage is higher than the preset high threshold, the current comparison 2 (the second comparison unit) outputs RSC as high. As long as one of the RSC or HSC signals is at a high level, it means that the bus common-mode voltage is lower than the normal range or higher than the normal range, and COM is high. When the bus output is recessive, CANH and CANL are both turned off, iL and iH are zero, so iL + iH < iB, and the LSC outputs a low level.

[0094] In a specific implementation, the logic module 30 is further configured to determine that the bus common-mode voltage of the CAN bus transceiver is within a preset normal range when the signal states of the high-side current comparison signal and the reverse-side current comparison signal in the comparison result are at low levels; the logic module 30 is further configured to determine that the bus output of the CAN bus transceiver is in a dominant state when the signal state of the line-side current comparison signal received is at a high level; the logic module 30 is further configured to determine that the bus output of the CAN bus transceiver is in a recessive state when the signal state of the line-side current comparison signal received is at a low level, so as to determine the bus output dominant / recessive state through the logical combination of the HSC (high-side current comparison signal), RSC (reverse-side current comparison signal), and LSC (line-side current comparison signal).

[0095] Furthermore, please refer to Figure 4 , Figure 4 which is the circuit schematic diagram of the second embodiment of the bus common-mode voltage detection circuit of the CAN bus transceiver proposed in the embodiment of the present application. Considering collecting the drive current of the output circuit of the CAN bus transceiver through a MOS transistor. As Figure 4 shown, the first sampling unit in this embodiment includes: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor;

[0096] The gate of the first MOSFET, the gate of the fourth MOSFET, the drain of the fourth MOSFET, and the drain of the fifth MOSFET are respectively connected to the output circuit of the CAN bus transceiver. The drain of the first MOSFET is connected to the power supply, the source of the fifth MOSFET is grounded, the source of the first MOSFET is connected to the source of the second MOSFET, the gate of the second MOSFET is connected to the drain of the second MOSFET and the gate of the third MOSFET, the source of the third MOSFET is connected to the source of the fourth MOSFET, and the drain of the third MOSFET is connected to the gate of the fifth MOSFET and the comparator module 20.

[0097] It should be noted that the bus common-mode voltage detection circuit includes a CANH current sampling circuit (first sampling unit), a reference current circuit (reference current module), a CANL current sampling circuit (second sampling unit), a current comparison module circuit (comparison module 20), and a logic circuit (logic module 30). For example... Figure 4 As shown, the bias current Ibias provides bias current to the source-drain branch of MB25 through the current mirror composed of MB24 and MB25. The reference current flowing through the branches of MB1 and MB25 provides bias current to the branches of MB1, MB2, MB5, MB14, MB15, and MB42 through the current mirror. Simultaneously, the bias current of the MB2 branch provides bias current to the branches of MB27, MB28, and MB29 through the current mirror of M26. Meanwhile, the bias current of the MB28 branch provides bias current to the source-drain branch of MB4 through the current mirror of MB3; the bias current of the MB5 branch provides bias current to the branches of MB32, MB33, and MB34 through the current mirror of M31. The reference current flowing through MB15 provides bias current to the source-drain branch of MB39 through the current mirror of MB38.

[0098] It is understandable that the first MOSFET is MB20, the second MOSFET is MB22, the third MOSFET is MB23, the fourth MOSFET is MB21, and the fifth MOSFET is MB30.

[0099] In the specific implementation, regarding the sampling of the CANH drive current (first drive current): MB20, MB22, MB23, MB21, and MB30 form a negative feedback structure (first sampling unit), which allows the HB point voltage to follow the HA point voltage in real time, reducing the influence of the channel length modulation effect of the CANH drive transistor and the sampling transistor, and ensuring the accuracy of the CANH pin drive current sampled by the source-drain branch of MB30. The CANH pin drive current sampled by the source-drain branch of MB30 provides bias current to the source-drain branches of MB35, MB40, and MB41 respectively through a current mirror composed of MB30, MB35, MB40, and MB41. The sampling current of the CANH pin drive current flowing through the source-drain of MB35 and MB10 provides bias current to the source-drain branch of MB11 through a current mirror composed of MB10 and MB11. The sampling current of the CANH pin drive current flowing through the source and drain terminals of MB11 and MB36 provides bias current to the branch where the source and drain terminals of MB37 are located through the current mirror composed of MB36 and MB37.

[0100] Furthermore, the second sampling unit includes: a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor;

[0101] The source of the sixth MOS transistor is connected to the power supply, and the gate of the sixth MOS transistor is connected to the drain of the eighth MOS transistor and the comparator module 20. The drain of the sixth MOS transistor, the source of the seventh MOS transistor, and the source of the eighth MOS transistor are connected to the output circuit of the CAN bus transceiver. The gate of the seventh MOS transistor is connected to the drain of the seventh MOS transistor and the gate of the eighth MOS transistor.

[0102] It is understandable that the sixth MOSFET is MB9, the seventh MOSFET is MB16, and the eighth MOSFET is MB17.

[0103] In the specific implementation, regarding the sampling of the CANL drive current (second drive current): MB9, MB16, and MB17 form a negative feedback structure (second sampling unit), which allows the LB point voltage to follow the LA point voltage in real time, reducing the influence of the channel length modulation effect of the CANL drive transistor and the sampling transistor, and ensuring the accuracy of the CANL pin drive current sampled by the source-drain branch of MB9. The CANL pin drive current sampled by the source-drain branch of MB9 provides bias current to the source-drain branches of MB12, MB13, and MB43 respectively through a current mirror composed of MB9, MB12, MB13, and MB43. The sampling current of the CANL pin drive current flowing through the source-drain of MB12 and MB18 provides bias current to the source-drain branch of MB19 through a current mirror composed of MB18 and MB19.

[0104] Furthermore, the first comparison unit includes: a ninth MOS transistor, a tenth MOS transistor, and an eleventh MOS transistor;

[0105] The source of the ninth MOS transistor is grounded, the gate of the ninth MOS transistor is connected to the second comparator unit and the sampling module 10, the drain of the ninth MOS transistor is connected to the drain of the tenth MOS transistor and the drain of the eleventh MOS transistor, the gate of the tenth MOS transistor is connected to the third comparator unit, the source of the tenth MOS transistor and the source of the eleventh MOS transistor are connected to the power supply, and the gate of the eleventh MOS transistor is connected to the second comparator unit and the sampling module 10.

[0106] It is understandable that the ninth MOSFET is MB41, the tenth MOSFET is MB42, and the eleventh MOSFET is MB43.

[0107] In the specific implementation, MB41, MB42, and MB43 constitute current comparison unit 1 (the first comparison unit). The current flowing through the source-drain branch of PMOS transistor MB42 is the reference current, denoted as IREF_1; the current flowing through the source-drain branch of PMOS transistor MB43 is the sampling current of the CANL pin drive current, denoted as ICANL_1; the current flowing through the source-drain branch of NMOS transistor MB41 is the sampling current of the CANH pin drive current, denoted as ICANH_1. When the bus common-mode voltage is low, the CANL pin current is low, ICANH_1 - ICANL_1 > IREF_1, and the LD pin output is high.

[0108] Furthermore, the second comparison unit includes: a twelfth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET;

[0109] The source of the twelfth MOS transistor is connected to the power supply, the gate of the twelfth MOS transistor is connected to the first comparator unit and the sampling module 10, the drain of the twelfth MOS transistor is connected to the drain of the thirteenth MOS transistor and the drain of the fourteenth MOS transistor, the source of the thirteenth MOS transistor and the source of the fourteenth MOS transistor are grounded, and the gate of the fourteenth MOS transistor is connected to the first comparator unit and the sampling module 10.

[0110] It is understandable that the twelfth MOSFET is MB13, the thirteenth MOSFET is MB39, and the fourteenth MOSFET is MB40.

[0111] In the specific implementation, MB13, MB39, and MB40 constitute current comparison unit 2. The current flowing through the source-drain branch of PMOS transistor MB13 is the sampling current of the CANL drive current, denoted as ICANL_2; the current in the branch of NMOS transistor MB39 is the reference current, denoted as IREF_2; and the current flowing through the source-drain branch of NMOS transistor MB40 is the sampling current of the CANH drive current, denoted as ICANH_2. When the bus common-mode voltage is high, the CANH current is low, ICANL_2 - ICANH_2 > IREF_2, and the LD output is high.

[0112] Furthermore, the third comparison unit includes: a fifteenth MOS transistor, a sixteenth MOS transistor, and a seventeenth MOS transistor;

[0113] The source of the fifteenth MOS transistor is connected to the power supply, the gate of the fifteenth MOS transistor is connected to the first comparison unit and the sampling module 10, the drain of the fifteenth MOS transistor is connected to the drain of the sixteenth MOS transistor and the drain of the seventeenth MOS transistor, and the source of the sixteenth MOS transistor and the source of the seventeenth MOS transistor are grounded.

[0114] It is understandable that the fifteenth MOSFET is MB14, the sixteenth MOSFET is MB19, and the seventeenth MOSFET is MB37.

[0115] In a specific implementation, MB14, MB19, and MB37 form Current Comparison 3 (the third comparison unit). The current flowing through the branch where the source and drain electrodes of PMOS transistor MB14 are located is the reference current, denoted as IREF_3; the current flowing through the branch where the source and drain electrodes of NMOS transistor MB19 are located is the sampled current of the CANL pin driving current, denoted as ICANL_3; the current flowing through the branch where the source and drain electrodes of NMOS transistor MB37 are located is the sampled current of the CANH pin driving current, denoted as ICANH_3. When the circuit operates in the recessive state, there is no current in the bus driving circuit, ICANH_3 + ICANL_3 < IREF_3, and the output of the COM pin is at a low level; when the circuit operates in the dominant state, there is current in the bus driving circuit, ICANH_3 + ICANL_3 > IREF_3, and the output of the COM pin is at a high level.

[0116] The above are only the preferred embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be included in the patent protection scope of the present application by the same token.

Claims

1. A CAN bus transceiver common-mode voltage detection circuit, characterized in that, The circuit is applied to a CAN bus transceiver. The CAN bus transceiver common-mode voltage detection circuit includes: a sampling module, a comparison module, and a logic module; The comparison module is connected to the sampling module and the logic module respectively, and the sampling module is connected to the output circuit of the CAN bus transceiver. The sampling module is used to collect the drive current of the output circuit of the CAN bus transceiver and send the drive current to the comparison module; The comparison module is used to compare the drive current with a preset reference current and output the comparison result to the logic module; the comparison result includes: the signal status of the high-side current comparison signal and the reverse-side current comparison signal and the line-side current comparison signal; The logic module is used to determine the bus output dominance or recessivity of the CAN bus transceiver based on the logical combination of the high-side current comparison signal, the reverse-side current comparison signal, and the line-side current comparison signal in the comparison result. The logic module is also used to change the signal state of the reverse side current comparison signal in the comparison result from low level to high level when the bus output of the CAN bus transceiver is in a dominant state. The logic module is used to determine that the common-mode voltage of the CAN bus transceiver is not within a preset normal range when the signal state of the high-side current comparison signal or the reverse-side current comparison signal is high in the comparison result, so that the COM terminal output of the logic module is high. The logic module is also used to determine that the bus common-mode voltage of the CAN bus transceiver is within a preset normal range when the signal states of the high-side current comparison signal and the reverse-side current comparison signal are low in the comparison result. The logic module is also used to determine that the bus output of the CAN bus transceiver is in a dominant state when the signal state of the received line-side current comparison signal is high. The logic module is also used to determine that the bus output of the CAN bus transceiver is in a recessive state when the signal state of the received line-side current comparison signal is low.

2. The CAN bus transceiver common-mode voltage detection circuit as described in claim 1, characterized in that, The CAN bus transceiver common-mode voltage detection circuit also includes: a reference current module; The reference current module is connected to the comparison module; The reference current module is used to send a reference current signal to the comparison module; The comparison module is used to compare the driving current with the preset reference current in the reference current signal and output the comparison result to the logic module.

3. The CAN bus transceiver common-mode voltage detection circuit as described in claim 1, characterized in that, The sampling module includes: a first sampling unit and a second sampling unit; The first sampling unit is connected to the output circuit of the comparison module and the CAN bus transceiver, and the second sampling unit is connected to the output circuit of the comparison module and the CAN bus transceiver. The first sampling unit is used to collect the first drive current of the output circuit of the CAN bus transceiver and send the first drive current to the comparison module; The second sampling unit is used to collect the second drive current of the output circuit of the CAN bus transceiver and send the second drive current to the comparison module; The comparison module is further configured to compare the first drive current, the second drive current and a preset reference current, and output the comparison result to the logic module.

4. The CAN bus transceiver common-mode voltage detection circuit as described in claim 3, characterized in that, The comparison module includes: a first comparison unit, a second comparison unit, and a third comparison unit; The first comparison unit is connected to the sampling module, the second comparison unit, the third comparison unit, and the logic module; the second comparison unit is connected to the sampling module, the first comparison unit, the third comparison unit, and the logic module; and the third comparison unit is connected to the sampling module, the first comparison unit, the second comparison unit, and the logic module. The first comparison unit is used to output a comparison result with a high-level high-side current comparison signal to the logic module when the difference between the first driving current and the second driving current is greater than a preset reference current. The second comparison unit is used to output a comparison result, in which the reverse side current comparison signal is high, to the logic module when the difference between the second driving current and the first driving current is greater than a preset reference current; the comparison result also includes the signal state of the line-side current comparison signal. The third comparison unit is used to output a comparison result, in which the line-side current comparison signal is high, to the logic module when the sum of the first driving current and the second driving current is greater than a preset reference current.

5. The CAN bus transceiver common-mode voltage detection circuit as described in claim 3, characterized in that, The first sampling unit includes: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; The gate of the first MOSFET, the gate of the fourth MOSFET, the drain of the fourth MOSFET, and the drain of the fifth MOSFET are respectively connected to the output circuit of the CAN bus transceiver. The drain of the first MOSFET is connected to the power supply, the source of the fifth MOSFET is grounded, the source of the first MOSFET is connected to the source of the second MOSFET, the gate of the second MOSFET is connected to the drain of the second MOSFET and the gate of the third MOSFET, the source of the third MOSFET is connected to the source of the fourth MOSFET, and the drain of the third MOSFET is connected to the gate of the fifth MOSFET and the comparator module.

6. The CAN bus transceiver common-mode voltage detection circuit as described in claim 3, characterized in that, The second sampling unit includes: a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor; The source of the sixth MOS transistor is connected to the power supply, and the gate of the sixth MOS transistor is connected to the drain of the eighth MOS transistor and the comparator module. The drain of the sixth MOS transistor, the source of the seventh MOS transistor, and the source of the eighth MOS transistor are connected to the output circuit of the CAN bus transceiver. The gate of the seventh MOS transistor is connected to the drain of the seventh MOS transistor and the gate of the eighth MOS transistor.

7. The CAN bus transceiver common-mode voltage detection circuit as described in claim 4, characterized in that, The first comparison unit includes: a ninth MOSFET, a tenth MOSFET, and an eleventh MOSFET; The source of the ninth MOS transistor is grounded, the gate of the ninth MOS transistor is connected to the second comparator unit and the sampling module, the drain of the ninth MOS transistor is connected to the drain of the tenth MOS transistor and the drain of the eleventh MOS transistor, the gate of the tenth MOS transistor is connected to the third comparator unit, the source of the tenth MOS transistor and the source of the eleventh MOS transistor are connected to the power supply, and the gate of the eleventh MOS transistor is connected to the second comparator unit and the sampling module.

8. The CAN bus transceiver common-mode voltage detection circuit as described in claim 4, characterized in that, The second comparison unit includes: a twelfth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET; The source of the twelfth MOS transistor is connected to the power supply. The gate of the twelfth MOS transistor is connected to the first comparator unit and the sampling module. The drain of the twelfth MOS transistor is connected to the drain of the thirteenth MOS transistor and the drain of the fourteenth MOS transistor. The source of the thirteenth MOS transistor and the source of the fourteenth MOS transistor are grounded. The gate of the fourteenth MOS transistor is connected to the first comparator unit and the sampling module.

9. The CAN bus transceiver common-mode voltage detection circuit as described in claim 4, characterized in that, The third comparison unit includes: a fifteenth MOS transistor, a sixteenth MOS transistor, and a seventeenth MOS transistor; The source of the fifteenth MOS transistor is connected to the power supply, the gate of the fifteenth MOS transistor is connected to the first comparator unit and the sampling module, the drain of the fifteenth MOS transistor is connected to the drain of the sixteenth MOS transistor and the drain of the seventeenth MOS transistor, and the source of the sixteenth MOS transistor and the source of the seventeenth MOS transistor are grounded.

Images