Gallium oxide Schottky diode structure base and preparation method thereof

By designing the trench unit and step-type field plate structure in the gallium oxide epitaxial layer and optimizing the electric field distribution, the electric field concentration problem of gallium oxide Schottky diode is solved, breakdown voltage is improved and the reverse leakage current is reduced, and the performance of power devices with high withstand voltage and low loss is achieved.

CN120475726APending Publication Date: 2025-08-12BEIJING UNIV OF POSTS & TELECOMM
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Patent Information

Application Number
CN202510666888.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-22
Publication Date
2025-08-12

AI Technical Summary

Technical Problem

The existing gallium oxide Schottky diodes have uneven electric field distribution, resulting in too high peak electric field at the anode edge, which easily leads to early breakdown and high reverse leakage current, limiting its application potential in high voltage and high power density scenarios.

Method used

A trench unit is designed in the gallium oxide epitaxial layer and a step-type field plate structure is formed. Schottky contact is formed through the contact between the first metal layer and the gallium oxide epitaxial layer, and the electric field distribution is optimized. The step-type field plate is formed by using the dielectric layer and the metal layer to improve the electric field concentration effect.

Benefits of technology

The breakdown voltage of the gallium oxide Schottky diode is improved, the reverse leakage current is reduced, the reliability and performance of the device is improved, and the advantages of the high breakdown field strength and wide bandgap of gallium oxide are fully utilized.

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Abstract

The invention provides a gallium oxide Schottky diode structure and a preparation method thereof. The gallium oxide Schottky diode structure comprises a gallium oxide substrate, a gallium oxide epitaxial layer, a second metal layer, a first metal layer and a dielectric layer, wherein the gallium oxide epitaxial layer and the second metal layer are formed on two opposite side surfaces of the gallium oxide substrate, and the first metal layer and the dielectric layer are formed on the gallium oxide epitaxial layer. A trench unit is arranged on one side, far away from the first surface, of the gallium oxide epitaxial layer, the first metal layer is formed on the trench unit and is in contact with the exposed gallium oxide epitaxial layer between the trench unit, and the dielectric layer is formed on the exposed gallium oxide epitaxial layer outside the trench unit and forms a stepped field plate structure with the first metal layer. According to the gallium oxide Schottky diode, the stepped field plate structure and Schottky contact formed by contact of the first metal layer and part of the surface of the gallium oxide epitaxial layer are utilized, the effects of improving the electric field concentration effect of an existing gallium oxide Schottky diode are achieved, the breakdown voltage of the gallium oxide Schottky diode is improved, the reverse leakage current is reduced, and the reliability of the gallium oxide Schottky diode is improved. And the performance of the device is further improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor production technology, and in particular to a gallium oxide Schottky diode structure and a preparation method thereof. Background Art

[0002] Among existing power devices, Schottky diodes (SBDs) are the most mature. Because they don't have minority carrier storage issues, these devices are suitable for fast switching. Currently, gallium oxide Schottky diodes primarily utilize a planar Schottky structure. The core process involves directly depositing an anode metal (such as Ni or Pt) onto an n-type gallium oxide substrate to form a Schottky contact, and completing the device fabrication with an ohmic cathode contact on the back.

[0003] Traditional gallium oxide Schottky diodes generally suffer from uneven electric field distribution, resulting in electric field peaks at the anode edge, which can easily cause the device to break down prematurely. This results in the actual breakdown voltage of the gallium oxide Schottky diode being far below the theoretical limit of gallium oxide, and prevents the theoretical advantage of its high Baliga quality factor from being fully converted into actual device performance. Since there is currently no mature and effective P-type doping technology for gallium oxide materials, gallium oxide Schottky diodes cannot be prepared through ion implantation or epitaxial growth of P-type gallium oxide, as with silicon carbide and gallium nitride. This also makes it difficult for gallium oxide Schottky diodes to use junction terminal extension and field limiting ring technologies similar to those used in silicon carbide devices to address electric field crowding. Furthermore, traditional gallium oxide Schottky diodes generally suffer from a significantly increased reverse leakage current, which limits device reliability and thus restricts the application potential of gallium oxide in high-voltage and high-power density scenarios.

[0004] Therefore, how to provide a gallium oxide Schottky diode structure and its preparation method that can improve the electric field distribution near the Schottky junction, reduce the impact of the electric field concentration effect, and further improve the performance of the device without relying on breakthroughs in p-type doping technology of gallium oxide materials has become a technical problem that people in this field urgently need to solve. Summary of the Invention

[0005] The present application aims to solve one of the technical problems in the related art at least to a certain extent.

[0006] To achieve the above objectives, the first embodiment of the present application provides a gallium oxide Schottky diode structure, comprising:

[0007] a gallium oxide substrate comprising a first surface and a second surface opposite to each other;

[0008] A gallium oxide epitaxial layer is formed on the first surface; a trench unit is provided on a side of the gallium oxide epitaxial layer away from the first surface, the trench unit including a plurality of trenches and an insulating filling portion filled in the trenches;

[0009] a first metal layer formed on the epitaxial layer and covering the surface of the epitaxial layer exposed between the trench units, with an edge of the first metal layer located on the trench units;

[0010] a dielectric layer formed on the epitaxial layer and covering the surface of the epitaxial layer exposed outside the first metal layer;

[0011] A second metal layer is formed on the second surface.

[0012] Optionally, the plurality of grooves include peripheral grooves and a plurality of central grooves between the peripheral grooves, and the first metal layer is located on the central grooves and extends to cover the peripheral grooves.

[0013] Optionally, the opening width of the peripheral groove is not less than the opening width of the central groove.

[0014] Optionally, the width of the plurality of grooves is between 1.5 μm and 2.5 μm.

[0015] Optionally, the depth of the plurality of grooves is between 75 nm and 150 nm.

[0016] Optionally, the gallium oxide substrate and the gallium oxide epitaxial layer are composed of N-type doped gallium oxide material, and the doping concentration of the gallium oxide substrate is higher than the doping concentration of the gallium oxide epitaxial layer.

[0017] Optionally, the doping concentration of the gallium oxide substrate is between 1×10 18 cm -3 ~1×10 20 cm -3 The doping concentration of the gallium oxide epitaxial layer is between 1×10 15 cm -3 ~1×10 19 cm -3 between.

[0018] To achieve the above-mentioned purpose, a second embodiment of the present application provides a method for preparing a gallium oxide Schottky diode structure, which is used to form the gallium oxide Schottky diode structure described in any of the above embodiments, comprising:

[0019] providing a gallium oxide substrate;

[0020] forming a gallium oxide epitaxial layer on the gallium oxide substrate;

[0021] forming a trench unit on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate;

[0022] forming a second metal layer on a side of the gallium oxide substrate away from the gallium oxide epitaxial layer;

[0023] A dielectric layer and a first metal layer covering a surface of the epitaxial layer are sequentially formed on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate.

[0024] Optionally, the step of forming a trench unit on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate includes:

[0025] Using an etching process to form a plurality of grooves on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate;

[0026] Insulation material is filled in each of the trenches to form an insulation filling portion.

[0027] Optionally, the step of forming a gallium oxide epitaxial layer on the gallium oxide substrate further includes:

[0028] A high-temperature annealing process is used to perform high-temperature annealing on the gallium oxide epitaxial layer epitaxially deposited on the gallium oxide substrate, and the high-temperature annealing conditions at least include an annealing temperature in the range of 700°C to 900°C, an annealing time in the range of 0.1h to 2h, and an annealing heating rate in the range of ≤10°C / min.

[0029] The gallium oxide Schottky diode structure and the preparation method thereof provided in this application have at least the following beneficial effects:

[0030] The present application provides a gallium oxide Schottky diode structure and a method for preparing the same, comprising a gallium oxide substrate, a gallium oxide epitaxial layer and a second metal layer formed on opposite surfaces of the gallium oxide substrate, and a first metal layer and a dielectric layer formed on the gallium oxide epitaxial layer. A trench unit is provided on the side of the gallium oxide epitaxial layer away from the first surface, the first metal layer is formed on the trench unit and contacts the gallium oxide epitaxial layer exposed between the trench units, and the dielectric layer is formed on the gallium oxide epitaxial layer exposed outside the trench unit and forms a stepped field plate structure with the first metal layer. The present application utilizes the stepped field plate structure and the Schottky contact formed by the first metal layer contacting a portion of the surface of the gallium oxide epitaxial layer to improve the influence of the electric field concentration effect of the existing gallium oxide Schottky diode, thereby increasing the breakdown voltage of the gallium oxide Schottky diode and reducing the magnitude of the reverse leakage current, thereby further improving the performance of the device.

[0031] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0033] Figure 1 Schematic diagram of the cross-sectional structure of a gallium oxide Schottky diode structure according to an embodiment of the present application.

[0034] Figure 2 Schematic diagram of a process for preparing a gallium oxide Schottky diode structure according to an embodiment of the present application.

[0035] 100 Gallium oxide substrate; 200 Gallium oxide epitaxial layer; 300 Trench unit; 310 Trench; 320 Insulation filling portion; 400 Dielectric layer; 500 First metal layer; 600 Second metal layer. DETAILED DESCRIPTION

[0036] The following describes in detail embodiments of the present application, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0037] This application aims to address the premature breakdown of gallium oxide (Ga2O3) Schottky diodes caused by electric field concentration at the anode edge. By designing trench cells in the epitaxial layer to optimize the electric field distribution of the anode metal, this significantly improves device reliability without relying on breakthroughs in p-type doping technology. This structure also effectively reduces reverse leakage current, leveraging the inherent advantages of gallium oxide's ultra-wide bandgap (4.8eV) and high breakdown field strength (8MV / cm), translating the theoretical Baliga figure of merit (greater than 3000) into practical performance and achieving a significant increase in breakdown voltage.

[0038] In addition, based on the low-cost melt growth characteristics of gallium oxide, this application can also provide power device solutions for power electronic systems that have high voltage resistance, low loss and economy. It is particularly suitable for fields such as new energy and rail transportation that have urgent needs for extreme voltage resistance, and promotes wide bandgap semiconductor technology to break through in the direction of high efficiency and high stability.

[0039] According to one aspect of the present application, a gallium oxide Schottky diode structure is provided, such as Figure 1 As shown, it includes a gallium oxide substrate 100, a gallium nitride epitaxial layer formed on the gallium oxide substrate 100, a first metal layer 500 and a dielectric layer 400 formed on the gallium nitride epitaxial layer, and a second metal layer 600 formed on a surface of the gallium nitride substrate facing away from the gallium nitride epitaxial layer.

[0040] The gallium nitride substrate and the gallium nitride epitaxial layer are both composed of N-type doped gallium nitride material, and the N-type doped acceptor element includes Sn and / or Si. In this embodiment, the N-type doped acceptor element in the gallium nitride substrate and the gallium nitride epitaxial layer is Si, and the doping concentration of the N-type doped acceptor element in the gallium nitride substrate is higher than the doping concentration in the gallium nitride epitaxial layer. The doping concentration of the N-type doped acceptor element in the gallium nitride substrate can range from 1×10 18 cm -3 ~1×10 20 cm -3 The preferred concentration is 2×10 16 cm -3 The doping concentration of the N-type doped acceptor element in the GaN epitaxial layer can range from 1×10 15 cm -3 ~1×10 19 cm -3 The preferred concentration is 1×10 19 cm -3 .

[0041] In some embodiments, the gallium oxide substrate 100 is obtained by cutting a bulk crystal formed by a crystal growth from melt method, etc., and the specific size of the gallium oxide substrate 100 is not specifically limited in this application.

[0042] The gallium oxide substrate 100 includes a first surface and a second surface opposite to each other in the thickness direction, namely, an upper surface (corresponding to the first surface) and a lower surface (corresponding to the second surface). The gallium nitride epitaxial layer is formed by epitaxially growing gallium oxide on the first surface of the gallium oxide using a method such as reactive sputtering, PLD, MBE, MOCVD, or HVPE.

[0043] Since the reverse withstand voltage performance of the gallium oxide Schottky diode structure is positively correlated with the film thickness of the gallium nitride epitaxial layer, the present application does not impose any particular limitation on the specific film thickness of the gallium oxide epitaxial layer 200 .

[0044] As an example, the thickness of the gallium nitride epitaxial layer may range from 1 μm to 20 μm. The preferred thickness range of the gallium nitride epitaxial layer is from 7 μm to 15 μm. Furthermore, the specific thickness of the gallium nitride epitaxial layer is preferably 10 μm.

[0045] In some embodiments, a first metal layer 500 is further formed on a surface of the gallium oxide epitaxial layer 200 away from the first surface, and the first metal layer 500 forms a Schottky contact by contacting the surface of the gallium oxide epitaxial layer 200. The thickness of the first metal layer 500 ranges from 30 nm to 50 nm.

[0046] The first metal layer 500 can be a stacked structure composed of any one or more metal materials such as platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), etc., and the stacked structure composed of multiple metal materials includes but is not limited to metal stacks such as Pt / Au, Pt / Al, Pd / Au, Pd / Al, Pt / Ti / Au or Pd / Ti / Au.

[0047] As an example, the first metal layer 500 is a metal stack composed of Ni / Au metal films stacked on each other, wherein the Ni metal film is formed on the surface of the gallium oxide epitaxial layer 200 , and the Au metal film is formed on the Ti metal film.

[0048] In some embodiments, a second metal layer 600 is further formed on the second surface of the gallium oxide substrate 100 away from the gallium oxide epitaxial layer 200. The second metal layer 600 forms an ohmic contact with the heavily doped gallium oxide substrate 100. The thickness of the second metal layer 600 ranges from 30 nm to 50 nm.

[0049] The second metal layer 600 can be a stacked structure composed of any one or more metal materials such as platinum (Pt), palladium (Pd), gold (Au), platinum (Pt) nickel (Ni), etc., and the stacked structure composed of multiple metal materials includes but is not limited to metal stacks such as Pt / Au, Pt / Al, Pd / Au, Pd / Al, Pt / Ti / Au or Pd / Ti / Au.

[0050] As an example, the second metal layer 600 is a metal stack composed of Ni / Au metal films stacked on each other, a Ti metal film is formed on the second surface, and an Au metal film is formed on the Ti metal film.

[0051] In some embodiments, a trench unit 300 is further formed on a side of the gallium oxide epitaxial layer 200 away from the first surface. The trench unit 300 includes a plurality of trenches 310 and an insulating filler 320 filling the trenches. The plurality of trenches extend from the surface of the gallium oxide epitaxial layer 200 along the thickness direction toward a side of the gallium oxide substrate 100 and are spaced apart from each other in a direction perpendicular to the thickness. The bottom of each trench 310 is spaced apart from the gallium oxide substrate 100. The insulating filler 320 fills the interior of each trench 310 and can be composed of an insulating material such as SiO2. Together with the trenches 310, the insulating filler 320 forms the trench unit 300.

[0052] Because the first metal layer 500 is formed on the gallium oxide epitaxial layer 200, specifically on the trench cells 300, and covers the surfaces (mesas) of the gallium oxide epitaxial layer 200 exposed between the spaced trenches 310 in the trench cells 300, the first metal layer 500 forms a Schottky contact by contacting the exposed surfaces of the gallium oxide epitaxial layer 200 between the trench cells 300. Consequently, when a reverse voltage is applied between the first metal layer 500 and the second metal layer 600, the depletion layers between adjacent trenches 310 expand laterally or overlap to form a continuous depletion region, thereby closing the conductive channel between the first metal layer 500 and the second metal layer 600. This avoids the problem of high reverse leakage current during Schottky contact and improves the reverse breakdown voltage of the Schottky diode.

[0053] Furthermore, the plurality of grooves 310 may specifically include peripheral grooves and a plurality of central grooves, and the peripheral grooves are arranged around the circumference of the plurality of central grooves, and the plurality of central grooves may be connected to the peripheral grooves in a direction perpendicular to the extension direction of the grooves 310, or may be spaced apart from the peripheral grooves. The first metal layer 500 is formed on the groove unit 300, covering the surface of the gallium oxide epitaxial layer 200 between the plurality of grooves 310, and extending to the peripheral grooves, covering part of the surface of the peripheral grooves, that is, the edge of the first metal layer 500 is located on the peripheral groove. Thus, when a reverse voltage is applied between the first metal layer 500 and the second metal layer 600, the peripheral grooves can also adjust the electric field distribution near the edge of the first metal layer 500, effectively alleviating or eliminating the problem of edge electric field concentration, and further improving the reverse breakdown voltage of the device.

[0054] As an example, the width of each groove 310 in the groove unit 300 is between 1.5μm and 2.5μm, preferably 2μm, and the depth of the groove 310 is between 75nm and 150nm, preferably 100nm; the spacing between adjacent grooves 310 is between 1μm and 3μm, preferably 2μm.

[0055] It should be noted that the opening width of the peripheral trench is not less than the opening width of the central trench, and the etching depths of different trenches 310 may be the same or different.

[0056] In some embodiments, the dielectric layer 400 is formed on the gallium oxide epitaxial layer 200 , and the dielectric layer 400 is close to the edge of the first metal layer 500 and contacts the edge of the first metal layer 500 , so that the first metal layer 500 and the dielectric layer 400 can jointly cover the surface of the gallium oxide epitaxial layer 200 away from the gallium oxide substrate 100 .

[0057] Because the dielectric layer 400 and the first metal layer 500 are in contact at their edges and are located together on the peripheral trench, the first metal layer 500 and the dielectric layer 400 together form a stepped field plate structure. Compared to other field plate structures, such as multi-layer field plate structures and double field plate structures, the stepped field plate structure is simpler to fabricate and easier to replicate. Furthermore, the stepped field plate structure can further increase the reverse breakdown voltage of the Schottky diode device, improving the device's reliability and performance.

[0058] According to the second aspect of the present application, a method for preparing a gallium oxide Schottky diode structure is also provided, such as Figure 1 and Figure 2 As shown, the gallium oxide Schottky diode structure described in the above embodiment is formed, which specifically includes the following steps:

[0059] S1, providing a gallium oxide substrate 100;

[0060] S2, forming a gallium oxide epitaxial layer 200 on the gallium oxide substrate 100;

[0061] S3, forming a trench unit 300 on a side of the gallium oxide epitaxial layer 200 away from the gallium oxide substrate 100;

[0062] S4, forming a second metal layer 600 on a side of the gallium oxide substrate 100 away from the gallium oxide epitaxial layer 200;

[0063] S5 , a dielectric layer 400 and a first metal layer 500 covering the surface of the epitaxial layer are sequentially formed on a side of the gallium oxide epitaxial layer 200 away from the gallium oxide substrate 100 .

[0064] In some embodiments, the gallium oxide substrate 100 provided in step S1 is a clean gallium oxide substrate 100 that has undergone a cleaning and drying process. The cleaning process includes sequentially rinsing or ultrasonic cleaning with hydrochloric acid, deionized water, acetone solution, ethanol solution, deionized water, and anhydrous ethanol. The drying process includes air-drying the cleaned gallium oxide substrate 100 in a nitrogen environment.

[0065] In step S2 , a gallium oxide epitaxial layer 200 may be formed on the gallium oxide substrate 100 by magnetron sputtering, and after the gallium oxide epitaxial layer 200 is epitaxially formed, a high temperature annealing process is used to perform high temperature annealing on the epitaxially formed gallium oxide epitaxial layer 200 .

[0066] Among them, the high temperature annealing process meets at least any one or more of the following conditions, including setting the ambient gas for high temperature annealing to nitrogen, or setting the temperature range for high temperature annealing to between 700°C and 900°C, or setting the time for high temperature annealing to between 0.1h and 2h, or setting the heating rate for high temperature annealing to ≤10°C / min.

[0067] As an example, the high temperature annealing temperature of the gallium oxide epitaxial layer 200 is preferably 850° C. to 900° C., the heating rate is preferably 6° C. / min to 8° C. / min, and the high temperature annealing time is preferably between 1.5 h and 2 h.

[0068] In step S3, the steps of forming the trench unit 300 include:

[0069] S31, using an etching process to form a plurality of trenches 310 on a side of the gallium oxide epitaxial layer 200 away from the gallium oxide substrate 100;

[0070] S32 , filling each trench 310 with an insulating material to form an insulating filling portion 320 .

[0071] The steps of etching to form the plurality of trenches 310 include: growing a dielectric material on the gallium oxide epitaxial layer 200 using a plasma-enhanced chemical vapor deposition (PECVD) method as an etching mask; then, spin-coating a photoresist on the mask surface, and photolithographically etching a groove pattern on the etching mask using a standard photolithography process to expose a portion of the surface of the gallium oxide epitaxial layer 200; then, etching the gallium oxide epitaxial layer 200 exposed by the groove pattern using an inductively coupled plasma (ICP) etching process to form a plurality of trenches 310 in the gallium oxide epitaxial layer 200; and finally, depositing SiO2 in each trench 310 using a PECVD process to form a trench unit 300.

[0072] In some embodiments, in step S5, the step of forming the dielectric layer 400 and the first metal layer 500 covering the surface of the gallium oxide epitaxial layer 200 includes:

[0073] S51, forming a dielectric layer 400 on the gallium oxide epitaxial layer 200 by a PECVD process, wherein the dielectric layer 400 covers the surface of the gallium oxide epitaxial layer 200 exposed at the periphery of the trench unit 300 and partially covers the peripheral trench of the trench unit 300;

[0074] S52 , using magnetron sputtering to sequentially deposit a Ni metal film and an Au metal film on the portion of the trench unit 300 not covered by the dielectric layer 400 to form a first metal layer 500 , with the edge of the first metal layer 500 abutting against the edge of the dielectric layer 400 .

[0075] In summary, the present application provides a gallium oxide Schottky diode structure and a method for fabricating the same, comprising a gallium oxide substrate 100, a gallium oxide epitaxial layer 200 and a second metal layer 600 formed on opposite surfaces of the gallium oxide substrate 100, and a first metal layer 500 and a dielectric layer 400 formed on the gallium oxide epitaxial layer 200. Trench cells 300 are provided on a side of the gallium oxide epitaxial layer 200 away from the first surface. The first metal layer 500 is formed on the trench cells 300 and contacts the exposed portions of the gallium oxide epitaxial layer 200 between the trench cells 300. The dielectric layer 400 is formed on the exposed portions of the gallium oxide epitaxial layer 200 outside the trench cells 300 and forms a stepped field plate structure with the first metal layer 500. The present application utilizes a stepped field plate structure and a Schottky contact formed by the first metal layer 500 contacting a portion of the surface of the gallium oxide epitaxial layer 200 to improve the influence of the electric field concentration effect of the existing gallium oxide Schottky diode, thereby increasing the breakdown voltage of the gallium oxide Schottky diode and reducing the magnitude of the reverse leakage current, thereby further improving the performance of the device.

[0076] In the descriptions of the foregoing embodiments, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are mutually inconsistent.

[0077] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of such features. Throughout the description of this application, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

Claims

1. A gallium oxide Schottky diode structure, characterized in that: include: a gallium oxide substrate comprising a first surface and a second surface opposite to each other; a gallium oxide epitaxial layer formed on the first surface; A trench unit is provided on a side of the gallium oxide epitaxial layer away from the first surface, wherein the trench unit includes a plurality of trenches and an insulating filling portion filled in the trenches; a first metal layer formed on the epitaxial layer and covering the surface of the epitaxial layer exposed between the trench units, with an edge of the first metal layer located on the trench units; a dielectric layer formed on the epitaxial layer and covering the surface of the epitaxial layer exposed outside the first metal layer; A second metal layer is formed on the second surface.

2. The gallium oxide Schottky diode structure according to claim 1, characterized in that: The plurality of trenches include peripheral trenches and a plurality of central trenches between the peripheral trenches. The first metal layer is located on the central trenches and extends to cover the peripheral trenches.

3. The gallium oxide Schottky diode structure according to claim 2, characterized in that: The opening width of the peripheral groove is not less than the opening width of the central groove.

4. The gallium oxide Schottky diode structure according to any one of claims 1 to 3, characterized in that: The width of the plurality of grooves is between 1.5 μm and 2.5 μm.

5. The gallium oxide Schottky diode structure according to any one of claims 1 to 3, characterized in that: The depth of the plurality of trenches is between 75 nm and 150 nm.

6. The gallium oxide Schottky diode structure according to claim 1, characterized in that: The gallium oxide substrate and the gallium oxide epitaxial layer are composed of N-type doped gallium oxide material, and the doping concentration of the gallium oxide substrate is higher than the doping concentration of the gallium oxide epitaxial layer.

7. The gallium oxide Schottky diode structure according to claim 6, characterized in that: The doping concentration of the gallium oxide substrate is between 1×10 18 cm -3 ~1×10 20 cm -3 The doping concentration of the gallium oxide epitaxial layer is between 1×10 15 cm -3 ~1×10 19 cm -3 between.

8. A method for preparing a gallium oxide Schottky diode structure, for forming the gallium oxide Schottky diode structure according to any one of claims 1 to 7, characterized in that: include: providing a gallium oxide substrate; forming a gallium oxide epitaxial layer on the gallium oxide substrate; forming a trench unit on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate; forming a second metal layer on a side of the gallium oxide substrate away from the gallium oxide epitaxial layer; A dielectric layer and a first metal layer covering a surface of the epitaxial layer are sequentially formed on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate.

9. The method for preparing a gallium oxide Schottky diode structure according to claim 8, wherein: The step of forming a trench unit on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate includes: Using an etching process to form a plurality of grooves on a side of the gallium oxide epitaxial layer away from the gallium oxide substrate; Insulation material is filled in each of the trenches to form an insulation filling portion.

10. The method for preparing a gallium oxide Schottky diode structure according to claim 8, wherein: The step of forming a gallium oxide epitaxial layer on the gallium oxide substrate further includes: A high-temperature annealing process is used to perform high-temperature annealing on the gallium oxide epitaxial layer epitaxially deposited on the gallium oxide substrate, and the high-temperature annealing conditions at least include an annealing temperature in the range of 700°C to 900°C, an annealing time in the range of 0.1h to 2h, and an annealing heating rate in the range of ≤10°C / min.