High-luminous-efficiency bigrid light-emitting diode based on suspended transition metal disulfide and preparation method of high-luminous-efficiency bigrid light-emitting diode

Abstract

The invention discloses a high-luminous-efficiency bigrid light-emitting diode based on suspended transition metal disulfide and a preparation method of the high-luminous-efficiency bigrid light-emitting diode. The high-luminous-efficiency bigrid light-emitting diode comprises a substrate, a grid dielectric layer, a single-layer WSe2 active layer, a pair of bottom grid electrodes and a pair of source and drain electrodes, the pair of bottom gate electrodes are arranged on the substrate, the gate dielectric layer is arranged on the upper surface of the substrate, the single-layer WSe2 active layer is located on the upper surface of the gate dielectric layer, the pair of source and drain electrodes are arranged on the top layer of the single-layer WSe2 active layer, and the single-layer WSe2 active layer is located below a gap between the source and drain electrodes; and etching a groove with a submicron width on the gate dielectric layer and between the pair of bottom gate electrodes, wherein the groove is used for isolating the bottom gate electrodes from the single-layer WSe2 active layer. Benefited from completely isolating the non-radiative recombination process and shielding effect induced by any substrate, the light-emitting diode has excellent light-emitting performance which is far better than that of the same kind. The invention opens up a new path for the efficient LED, and has wide application prospects in the fields of display, optical communication, sensing and the like.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optoelectronic devices, and in particular to a high-luminous-efficiency double-gate light-emitting diode based on suspended transition metal dichalcogenides and a preparation method thereof. Background Art

[0002] Two-dimensional semiconductor materials, with their unique atomic structure and excellent electrical and optical properties, have shown tremendous potential for application in optoelectronic devices. They are expected to enable high-performance, miniaturized, and integrated optoelectronic devices, bringing technological innovations to a variety of fields, including optical communications, display technology, and sensors.

[0003] Transition metal dichalcogenides (TMDCs), a key member of two-dimensional semiconductor materials, have attracted considerable attention in optoelectronic device research. However, in conventional device fabrication, the presence of a substrate adversely affects the luminescence efficiency of TMDCs. Substrate-induced screening effects and the emergence of trap states significantly increase the probability of nonradiative recombination, leading to reduced luminescence efficiency.

[0004] At present, light-emitting diodes based on suspended TMDCs have not been successfully prepared, which has become a key technical problem that needs to be broken through in this field, restricting the development of two-dimensional semiconductor materials in high-efficiency light-emitting devices. Summary of the Invention

[0005] Purpose of the invention: In order to overcome the problem of low luminous efficiency of two-dimensional semiconductor materials in the existing technology, the present invention proposes a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides and a preparation method thereof. By using a suspended monolayer tungsten diselenide (WSe2) as an active material, the performance of the light-emitting diode is improved to meet the needs of practical applications for high-efficiency and stable light-emitting devices.

[0006] Technical solution: In the first aspect, the present invention proposes a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides, comprising: a substrate, a gate dielectric layer, a single-layer WSe2 active layer, a pair of bottom gate electrodes and a pair of source-drain electrodes; the pair of bottom gate electrodes are arranged on the substrate, the gate dielectric layer is placed on the upper surface of the substrate, the single-layer WSe2 active layer is located on the upper surface of the gate dielectric layer, a pair of source-drain electrodes are arranged on the top layer of the single-layer WSe2 active layer, and the single-layer WSe2 active layer is located below the gap between the source-drain electrodes; a trench with a submicron width is etched on the gate dielectric layer and between the pair of bottom gate electrodes, and the trench is used to isolate the bottom gate electrode from the single-layer WSe2 active layer.

[0007] Furthermore, the substrate is made of a material that absorbs light.

[0008] Furthermore, the gate dielectric layer is composed of Al2O3 prepared by ALD.

[0009] In a second aspect, the present invention provides a method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on a suspended transition metal dichalcogenide, comprising the following steps:

[0010] Step 1: Clean the substrate and evenly coat the surface of the cleaned substrate with photoresist, then perform exposure and development according to the designed pattern using photolithography technology to form a pair of bottom gate electrodes;

[0011] Step 2: Perform ALD deposition on the substrate processed in step 1 to deposit a gate dielectric layer;

[0012] Step 3: Using RIE technology, a trench between the two bottom gate electrodes is etched on the substrate where the gate dielectric layer has been deposited;

[0013] Step 4: Fix the WSe2 crystal on a mechanical exfoliation device for exfoliation, and transfer the exfoliated single-layer WSe2 crystal flakes to a substrate;

[0014] Step 5: Align the substrate on which the single-layer WSe2 crystal sheet is located with the substrate processed in step 3, and place them in a dry transfer device to transfer the single-layer WSe2 crystal sheet onto the groove;

[0015] Step 6: Using PMMA as the medium, prepare the source and drain electrode patterns through photolithography and metal deposition processes; transfer the PMMA with the source and drain electrode patterns to the substrate processed in step 5, so that the source and drain electrodes are in direct contact with the single-layer WSe2 crystal sheet to form the source and drain electrodes, and finally place the whole in an annealing furnace to obtain a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides.

[0016] Furthermore, in step 4, the WSe2 crystal has a complete crystal structure and a crystal defect density as low as 10 -6 cm -2 The following WSe2 crystal.

[0017] Furthermore, in step 2, the substrate is a SiO2 / Si substrate with a silicon wafer resistivity in the range of 1-10Ω·cm and an oxide layer thickness of 300nm.

[0018] Furthermore, in step 2, an Al2O3 precursor with a purity greater than 99.99% is used to perform ALD deposition on the substrate processed in step 1 to deposit a gate dielectric layer.

[0019] Furthermore, in step 3, a mixed gas of CF4 and O2 is used as an etching gas, and RIE technology is used to etch a groove between the two bottom gate electrodes on the substrate on which the gate dielectric layer has been deposited; wherein the ratio of the mixed gas of CF4 and O2 is optimized based on the etching selectivity of the gate dielectric layer, the uniformity of the etching rate, and the minimization of damage to the substrate.

[0020] Beneficial effects: Compared with the existing technology, it has the following advantages:

[0021] (1) In response to the problems of low photoluminescence quantum yield of two-dimensional semiconductor materials, complex processes of existing improvement methods, and the influence of substrate on luminescence efficiency, the present invention adopts silicon oxide / silicon (SiO2 / Si) as substrate to provide support and electrical isolation, atomic layer deposition (ALD) of 35nm Al2O3 gate dielectric to precisely control carriers, gold (Au) as electrode material to ensure efficient carrier injection, and electrode spacing of 3μm to optimize electric field distribution. Through mechanical stripping and dry transfer technology, high-quality single-layer tungsten diselenide (WSe2) is precisely suspended above the electrode gap as the core light-emitting area. During preparation, low-defect density WSe2 crystals, specific resistivity substrates, and high-purity precursors and targets are carefully selected. After multiple steps of fine pretreatment, ALD deposition, reactive ion etching (RIE), screening and transfer of single-layer WSe2, and Au electrode preparation and annealing are completed in sequence under precise parameter control. Thanks to the complete isolation of any substrate-induced non-radiative recombination process and shielding effect, the light-emitting diode has excellent luminescence performance, far exceeding its peers.

[0022] (2) The present invention innovatively combines a suspended single-layer WSe2 with a dual-gate structure, simplifying the strategy for improving LED performance and avoiding complex post-processing processes;

[0023] (3) The present invention combines structural and process advantages, providing a new direction for the development of high-efficiency LEDs. It has potential application value in the fields of display, optical communication, sensors, etc., and is expected to promote technological upgrades in related industries. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a schematic structural diagram of a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides proposed by the present invention;

[0025] Figure 2 The false color scanning electron microscope (SEM) image of the device with polymethyl methacrylate (PMMA) on top is shown. The atomically thin monolayer WSe2 is stably suspended over the narrow gap without any damage, which shows that the device structure proposed in this invention is similar to that of the conventional WSe2 device. Figure 1 The schematic diagram in the figure is exactly matched;

[0026] Figure 3The PL spectra of suspended WSe2 and supported WSe2 are used to analyze the luminescence characteristics of suspended WSe2 and supported WSe2, and compare the differences in parameters such as luminescence peak position, intensity, and half-height width between the two.

[0027] Figure 4 The EL spectra of the device of the present invention are shown, showing the electroluminescent characteristics of the dual-gate PS (suspended)-N light-emitting diode under different driving conditions, including the changes in the luminescence peak position, intensity, and EL external quantum efficiency (EQE) with current or voltage, as well as comparison with the EL spectra of other working light-emitting diodes;

[0028] Figure 5 It is the electrical performance of the device of the present invention under different gate voltages, which intuitively reflects the electrical performance of the device under different gate voltage regulation, including rectification characteristics, carrier injection threshold, turn-on voltage, current saturation characteristics, etc., providing an intuitive basis for understanding the electrical working mechanism of the device. DETAILED DESCRIPTION

[0029] The technical solution of the present invention will now be further described with reference to the accompanying drawings and embodiments.

[0030] Example 1:

[0031] like Figure 1 As shown, this embodiment proposes a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides, which mainly includes: a silicon oxide / silicon substrate 4, a gate dielectric layer 6 with a narrow band gap, a single-layer WSe2 active layer 1, a pair of pre-prepared bottom gate electrodes 3 and a pair of source-drain electrodes 2 prepared by transfer, the gate dielectric layer 6 is placed on the upper surface of the silicon oxide / silicon substrate 4, the bottom gate electrode 3 is a pair of electrodes pre-patterned on the silicon oxide / silicon substrate 4, the single-layer WSe2 active layer 1 is located on the upper surface of the gate dielectric layer, and a pair of source-drain electrodes 2 are arranged on the top layer of the single-layer WSe2 active layer 1 as the source and drain.

[0032] The substrate of this embodiment is not limited to silicon oxide / silicon substrate, and any material that absorbs light can be used. The oxide layer thickness of the silicon oxide / silicon substrate 4 used in this embodiment is 300 nm to meet the specific electrical performance requirements of the device.

[0033] The gate dielectric used in this embodiment is Al2O3 prepared by ALD, and Al2O3 is etched with a submicron-wide groove 5 between the bottom gate electrode 3 by reactive ion etching technology, which is used to isolate the bottom gate electrode 3 from the single-layer WSe2 active layer 1 and accurately control the injection and transmission of carriers. In this embodiment, the width of the groove 5 is 1 μm.

[0034] The pair of bottom gate electrodes 3 and the pair of source-drain electrodes 2 used in this embodiment are both gold electrodes, and the distance between the source and the drain is 3 μm to ensure efficient carrier injection and optimize the electric field distribution.

[0035] The single-layer WSe2 active layer 1 of this embodiment is located below the gap between the source and the drain, serving as the core active area of the light-emitting diode. Through mechanical peeling and dry transfer technology, it is made atomically flat and stably suspended, avoiding the negative impact of the substrate and giving full play to its excellent optical and electrical properties.

[0036] TMDCs have a unique atomic structure, which makes their electronic band structure easily tunable, resulting in high carrier mobility and efficient carrier transport. This facilitates the rapid injection and recombination of electrons and holes in light-emitting diodes, improving the device's response speed and luminous efficiency. Furthermore, their atomically thin, two-dimensional nature produces a strong quantum confinement effect, which results in a high degree of overlap between the electron and hole wave functions within the two-dimensional plane, enhancing the exciton binding energy. In suspended monolayer WSe2 structures, freed from substrate constraints, this effect is further emphasized, making excitons more stable and significantly increasing the probability of radiative recombination, leading to a significant improvement in the photoluminescence quantum yield (PLQY). Furthermore, their compatibility with conventional semiconductor processes facilitates device fabrication and integration based on existing semiconductor manufacturing technologies. For example, in this embodiment, the single-layer WSe2 active layer 1 can be precisely constructed in a complex device structure through conventional process means such as mechanical stripping, atomic layer deposition (ALD), photolithography, reactive ion etching (RIE), etc., such as cooperating with the SiO2 / Si substrate, Al2O3 gate dielectric and Au electrode to form a high-performance light-emitting diode, which is conducive to large-scale industrial production.

[0037] Figure 2 A false-color scanning electron microscope (SEM) image of the device with PMMA capping is shown. The atomically thin single-layer WSe2 active layer is stably suspended over the narrow gap without any damage, which shows that the device structure proposed in this embodiment is similar to that of the conventional WSe2 active layer. Figure 1 The diagram in the figure exactly matches.

[0038] Example 2:

[0039] This embodiment proposes a method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on a suspended transition metal dichalcogenide, which mainly includes the following steps:

[0040] Step 1: Select a material with a complete crystal structure and a crystal defect density as low as 10 -6 cm -2 The following high-quality WSe2 crystals were used as raw materials for mechanical exfoliation to obtain high-quality single-layer WSe2 flakes;

[0041] Step 2: Screening SiO2 / Si substrates with a resistivity in the range of 1-10Ω·cm and an oxide layer thickness of 300nm to meet the device electrical performance requirements; specifically, an Al2O3 precursor with a purity greater than 99.99% can be selected for ALD deposition of gate dielectrics, and an Au target with a purity of no less than 99.99% can be selected for electrode preparation;

[0042] Step 3: The SiO2 / Si substrate is ultrasonically cleaned with acetone, ethanol, and deionized water in sequence, with each cleaning step lasting 15 minutes. The substrate is then blown dry in a high-purity nitrogen environment. A photoresist is then evenly coated on the substrate surface, and the substrate is exposed and developed according to the designed pattern using photolithography technology to form a precise photolithographic pattern.

[0043] Step 4: Place the pretreated substrate into the ALD equipment, set the deposition temperature to 200°C, introduce an appropriate amount of Al2O3 precursor gas, such as trimethylaluminum (TMA) and water (H2O), and precisely control the gas flow, pulse time, and reaction cycle. Deposit a uniform Al2O3 gate dielectric film with a thickness of 35nm according to the film thickness requirements. Monitor the temperature, pressure and other parameters of the reaction chamber in real time during the deposition process. It should be noted that the Al2O3 precursor gas intake rate, pulse time, purge time and other parameters are coordinated and optimized to ensure the uniformity and repeatability of each single atomic layer deposition, and the film thickness uniformity error during the deposition process is within ±1nm.

[0044] Step 5: Use RIE technology to etch the gap between the electrodes on the substrate where the gate dielectric has been deposited. The etching gas is a mixture of CF4 and O2. The etching power is set to 100W, and the gas flow rates are CF4 20sccm and O2 5sccm respectively. The etching time is controlled within 30 seconds, and the gap width is precisely controlled to be approximately 1μm. After etching, chemical reagents are used for cleaning and scanning electron microscopy, atomic force microscopy and other means are used to detect the gap size accuracy and surface quality. Among them, the ratio of CF4 and O2 mixed gas is optimized based on the etching selectivity of Al2O3, the uniformity of the etching rate and the minimization of damage to the substrate. During the etching process, ellipsometry, interference microscopy and other means are used to monitor the etching depth and sidewall verticality in real time to ensure the etching quality.

[0045] Step 6: Under an optical microscope, fix a high-quality WSe2 crystal on a mechanical exfoliation device. Use transparent tape to gently stick to the crystal surface, then slowly peel it off. Transfer the exfoliated flakes to a SiO2 / Si substrate. Observe the optical contrast of the flakes under an optical microscope for preliminary screening. Then, use a fluorescence microscope to accurately screen the single-layer WSe2 sample based on characteristics such as fluorescence intensity and peak position, and mark the position.

[0046] Step 7: Align the substrate containing the screened single-layer WSe2 sample with the prepared substrate with an electrode gap, place it in the dry transfer equipment, set the transfer temperature to 80°C, the pressure to 0.5MPa, and the transfer time to 5 minutes, and observe the transfer situation in real time through the equipment's monitoring system to ensure that the single-layer WSe2 is accurately and stably transferred above the electrode gap; the dry transfer equipment used in this step must have high-precision temperature and pressure control functions, with a temperature control accuracy within ±0.5°C and a pressure control accuracy within ±0.05MPa, to ensure that the single-layer WSe2 is not damaged during the transfer process and is accurately positioned.

[0047] Step 8: Using PMMA as the dielectric, Au electrode patterns were fabricated through photolithography and metal deposition. First, photoresist was coated on the PMMA surface, followed by exposure and development to form the electrode pattern. The substrate was then placed in an electron beam evaporator to deposit Au metal to a thickness of 200 nm. After deposition, excess photoresist and metal were removed by lift-off, resulting in a precise Au electrode pattern. The PMMA with the Au electrode pattern was then transferred to a substrate containing a suspended monolayer of WSe2, placing the Au electrodes in direct contact with the WSe2 to form the source and drain electrodes. Finally, the device was placed in an annealing furnace and annealed at 150°C for 30 minutes to strengthen the ohmic contact between the electrodes and the WSe2. Importantly, the photoresist coating thickness uniformity was controlled within ±5%. The photolithography exposure and development parameters were precisely set to ensure submicron-level electrode pattern accuracy. The electron beam evaporation system maintained an evaporation rate accuracy of ±0.05 nm / s, and the thermal evaporation system had a precise temperature control system with a crucible temperature accuracy of ±1°C to ensure high-quality Au electrode fabrication.

[0048] The entire preparation process is carried out in a clean clean room environment, with the ambient temperature strictly controlled at 22±2℃ and the relative humidity maintained at 40%±5%. The clean room is equipped with a high-efficiency air filtration system to ensure that the concentration of pollutants such as dust particles in the air is extremely low, providing a stable and clean environment for the experiment.

[0049] Figure 3 The EL spectrum of the device prepared in this example shows a sharp and intense luminescence peak, whose position is essentially consistent with that in the PL spectrum, further demonstrating the intrinsic connection between the electroluminescence and photoluminescence processes. Compared with the EL spectra of other TMDC-based light-emitting diodes, the device prepared in this example exhibits higher peak intensity and a narrower half-width, indicating higher luminous efficiency and improved monochromaticity, highlighting the advantages of this invention in electroluminescence performance.

[0050] Figure 4The comparison of luminous intensity and luminous efficiency of dual-gate light-emitting diodes based on suspended and conventional WSe2 is demonstrated, among which the performance of suspended devices is more than one order of magnitude higher than that of conventional devices.

[0051] Figure 5 The electrical performance of the device fabricated in this example at various gate voltages is demonstrated. The IV curves exhibit distinct rectification characteristics at these various gate voltages. Under forward bias, the current rapidly increases, indicating that carriers can be effectively injected into the suspended WSe2 region, leading to recombination and luminescence. Under reverse bias, the current is extremely low, demonstrating excellent rectification performance. By analyzing characteristic parameters such as the slope and inflection point of the IV curve, we can gain a deeper understanding of the device's electrical performance and carrier transport mechanisms, providing robust data support for optimizing device performance.

Claims

1. A high-luminous-efficiency dual-gate light-emitting diode based on a suspended transition metal dichalcogenide, characterized by: include: Substrate, gate dielectric layer, single-layer WSe2 active layer, a pair of bottom gate electrodes and a pair of source and drain electrodes; A pair of bottom gate electrodes are provided on the substrate, the gate dielectric layer is provided on the upper surface of the substrate, the single-layer WSe2 active layer is provided on the upper surface of the gate dielectric layer, a pair of source and drain electrodes are provided on the top layer of the single-layer WSe2 active layer, and the single-layer WSe2 active layer is provided below the gap between the source and drain electrodes; A trench with a submicron width is etched on the gate dielectric layer and between a pair of bottom gate electrodes. The trench is used to isolate the bottom gate electrode from the single-layer WSe2 active layer.

2. The high luminous efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenide according to claim 1, characterized in that: The substrate is made of a material that absorbs light.

3. The high luminous efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenide according to claim 1, characterized in that: The gate dielectric layer is made of Al2O3 prepared by ALD.

4. A method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on a suspended transition metal dichalcogenide, characterized by: The following steps are involved: Step 1: Clean the substrate and evenly coat the surface of the cleaned substrate with photoresist, then perform exposure and development according to the designed pattern using photolithography technology to form a pair of bottom gate electrodes; Step 2: Perform ALD deposition on the substrate processed in step 1 to deposit a gate dielectric layer; Step 3: Using RIE technology to etch a trench between the two bottom gate electrodes on the substrate where the gate dielectric layer has been deposited; Step 4: Fix the WSe2 crystal on a mechanical exfoliation device for exfoliation, and transfer the exfoliated single-layer WSe2 crystal flakes to a substrate; Step 5: Align the substrate on which the single-layer WSe2 crystal sheet is located with the substrate processed in step 3, and place them in a dry transfer device to transfer the single-layer WSe2 crystal sheet onto the groove; Step 6: Using PMMA as the medium, prepare the source and drain electrode patterns through photolithography and metal deposition processes; transfer the PMMA with the source and drain electrode patterns to the substrate processed in step 5, so that the source and drain electrodes are in direct contact with the single-layer WSe2 crystal sheet to form the source and drain electrodes, and finally place the whole in an annealing furnace to obtain a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides.

5. The method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides according to claim 4, characterized in that: In step 4, the WSe2 crystal has a complete crystal structure and a crystal defect density as low as 10 -6 cm -2 The following WSe2 crystal.

6. The method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides according to claim 4, characterized in that: In step 2, the substrate is a SiO2 / Si substrate with a silicon wafer resistivity in the range of 1-10Ω·cm and an oxide layer thickness of 300nm.

7. The method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides according to claim 4, characterized in that: In step 2, an Al2O3 precursor with a purity greater than 99.99% is used to perform ALD deposition on the substrate processed in step 1 to deposit a gate dielectric layer.

8. The method for preparing a high-luminous-efficiency dual-gate light-emitting diode based on suspended transition metal dichalcogenides according to claim 4, characterized in that: In step 3, a mixed gas of CF4 and O2 is used as an etching gas, and RIE technology is used to etch a trench between the two bottom gate electrodes on a substrate on which a gate dielectric layer has been deposited. The ratio of the mixed gas of CF4 and O2 is optimized based on the etching selectivity of the gate dielectric layer, the uniformity of the etching rate, and the minimization of damage to the substrate.

Images