Display substrate, display panel and manufacturing method thereof

By setting a release electrode and an isolation structure in the spacer area of the display substrate, the problem of electrostatic shock during the display panel manufacturing process is solved, the manufacturing yield is improved, and the integrity of the display panel is ensured.

CN120475868APending Publication Date: 2025-08-12WUHAN TIANMA MICRO ELECTRONICS CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510715145.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-29
Publication Date
2025-08-12

AI Technical Summary

Technical Problem

How to reduce the problem of electrostatic shock during display panel manufacturing.

Method used

The release electrode and an isolation structure are provided in the spacer area of the display substrate. The release electrode is the same layer and material as the first electrode. The isolation structure fills the opening edge of the release electrode, and is used to preferentially release or absorb static electricity when static electricity occurs, and protect the electrode structure of the display panel area.

Benefits of technology

Improves the manufacturing yield of the display panel, prevents static damage, and ensures the integrity of the display panel.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120475868A_ABST
    Figure CN120475868A_ABST
Patent Text Reader

Abstract

The invention relates to a display substrate, a display panel and a manufacturing method thereof, the display substrate comprises spacer regions arranged around a display panel region, the display substrate comprises a first electrode layer located on one side of a substrate, and the first electrode layer comprises a plurality of first electrodes located in the display panel region and arranged at intervals; the pixel definition layer is located on the side, away from the substrate, of the first electrode layer, the pixel definition layer comprises a pixel definition structure located in the display panel area and a plurality of pixel openings surrounded by the pixel definition structure, and the pixel openings expose the corresponding first electrodes; wherein the first electrode layer further comprises at least one release electrode located in the spacer region, the release electrode is arranged around the at least one display panel region, and the release electrode comprises a plurality of first openings arranged at intervals; the pixel definition layer further comprises a plurality of isolation structures located in the spacer regions, the corresponding first openings are filled with the isolation structures, and the isolation structures cover the edges, at the first openings, of the release electrodes. According to the invention, electrostatic damage can be avoided.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate, a display panel, and a manufacturing method thereof. Background Art

[0002] With the continuous development of display technology, organic light-emitting diode (OLED) display devices have been widely used in many fields such as flat panel displays, flexible displays, automotive displays and solid-state lighting due to their advantages such as wide color gamut, high contrast, energy saving and foldability.

[0003] However, how to reduce electrostatic damage during the display panel manufacturing process is an urgent problem that needs to be solved. Summary of the Invention

[0004] Based on this, it is necessary to provide a display substrate, a display panel and a manufacturing method thereof, aiming to solve the problem of how to reduce electrostatic damage during the display panel manufacturing process.

[0005] In a first aspect, an embodiment of the present application provides a display substrate, comprising a plurality of display panel areas arranged in an array, and spacer areas arranged around the display panel areas, the display substrate comprising:

[0006] substrate;

[0007] a first electrode layer located on one side of the substrate, the first electrode layer comprising a plurality of first electrodes located in the display panel area and spaced apart;

[0008] a pixel definition layer, located on a side of the first electrode layer away from the substrate, the pixel definition layer comprising a pixel definition structure located in the display panel area, and a plurality of pixel openings surrounded by the pixel definition structure, the pixel openings exposing corresponding first electrodes;

[0009] Wherein, the first electrode layer further comprises at least one release electrode located in the spacer area, the release electrode is arranged around at least one display panel area, and the release electrode comprises a plurality of first openings arranged at intervals;

[0010] The pixel definition layer further includes a plurality of isolation structures located in the spacer region. The isolation structures fill the corresponding first openings and cover edges of the release electrodes at the first openings.

[0011] On the second aspect, based on the same application concept, the present application also provides a method for manufacturing a display panel, which can manufacture any of the display substrates described above.

[0012] On the third aspect, based on the same application concept, the embodiment of the present application further provides a display panel, which is manufactured by cutting any one of the display substrates described above.

[0013] In an embodiment of the present application, a display substrate includes a plurality of display panel regions arranged in an array, and spacer regions arranged around the display panel regions; a first electrode layer includes a plurality of first electrodes located in the display panel regions and spaced apart; the first electrode layer also includes at least one release electrode located in the spacer region, the release electrode being disposed around the at least one display panel region and including a plurality of spaced apart first openings; a pixel definition layer also includes a plurality of isolation structures located in the spacer region, the isolation structures filling corresponding first openings and covering edges of the release electrodes at the first openings. Specifically, a release electrode is disposed in the spacer region on at least one side of at least one display panel region, and the release electrode is disposed in the same layer and material as the first electrode; in the display panel region, the pixel openings expose the corresponding first electrode, which is an electrode in a light-emitting device, such as an anode. First, during the display panel manufacturing process, during the evaporation of the luminescent material, when friction between the display substrate and the fine metal mask easily generates static electricity, the edges of the multiple first openings included in the release electrode are equivalent to multiple sharp areas where tip discharge can occur, and the charge density is more likely to concentrate at the edges of the first openings. Therefore, the release electrode can preferentially generate and release static electricity, or the release electrode can absorb static electricity generated in other areas, thereby protecting the electrodes and other structures in the display panel area, thereby ensuring that the display panel is not damaged by static electricity after manufacturing, thereby improving the manufacturing yield of the display panel. Second, during the display panel manufacturing process, during the evaporation of the luminescent material, the first electrode layer is the metal layer closest to the fine metal mask, and static electricity is likely to occur in the first electrode layer. After static electricity occurs on the release electrode included in the first electrode layer, or after the release electrode included in the first electrode layer absorbs static electricity, the release electrode shields and protects other electrodes and other structures between the first electrode layer and the substrate, thereby ensuring that the display panel is not damaged by static electricity after manufacturing, thereby improving the manufacturing yield of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0015] Figure 1 A schematic diagram of the overall structure of a display substrate provided in an embodiment of the present application.

[0016] Figure 2This is a first schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application.

[0017] Figure 3 This is a second schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application.

[0018] Figure 4 This is a third schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application.

[0019] Figure 5 This is a first enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application.

[0020] Figure 6 This is a second enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application.

[0021] Figure 7 This is a third enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application.

[0022] Figure 8 A schematic diagram of a first cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application.

[0023] Figure 9 This is a schematic diagram of a second cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application.

[0024] Figure 10 This is a schematic diagram of a third cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application.

[0025] Figure 11 This is a schematic diagram of a fourth cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application.

[0026] Figure 12 This is a schematic diagram of a first cross-sectional structure of a display panel region in a display substrate provided in an embodiment of the present application.

[0027] Figure 13 A schematic diagram of a display panel provided in an embodiment of the present application.

[0028] Reference numerals: display panel 100; display substrate 1000; substrate 11; first electrode layer 17; pixel definition layer 18; display panel region 100a; spacer region 100b; first electrode 171; pixel definition structure 181; pixel opening 182; release electrode 17s; first opening 17s1; isolation structure 18s; planar layer 16; recess 161; bottom wall 1611; side wall 1612; convex portion 162; first protrusion 17s11; second protrusion 17st; shorting bar CC01; light-emitting device 123; display area AA; non-display area BB; light-emitting material layer 21 ; second electrode layer 22; first power line 17c; first width d1; second width d2; first direction X1; second direction Y2; first insulating layer 12; first metal layer 13; second insulating layer 14; second metal layer 15; first release electrode 17sa; electrostatic ring 101; first connecting structure 102; second release electrode 17sb; first dotted line C1-C1; second dotted line C2-C2; third dotted line C3-C3; fourth dotted line C4-C4; first sub-non-display area BB1; second sub-non-display area BB2; supporting layer 19, supporting column 191; array composite layer 100z. DETAILED DESCRIPTION

[0029] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present application.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.

[0031] When describing positional relationships, unless otherwise specified, when an element such as a layer, film, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Furthermore, when a layer is referred to as being "under" another layer, it can be directly under or one or more intervening elements may also be present. It will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more intervening elements may also be present.

[0032] In the case of using “including,” “having,” and “comprising” described herein, another component may be added unless a clear limiting term such as “only,” “consisting of,” etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as having one number.

[0033] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this application.

[0034] It should also be understood that when interpreting an element, even if not explicitly described, the element is interpreted as including a range of error, which should be within the acceptable deviation range of the specific value determined by those skilled in the art. For example, "approximately," "approximately," or "substantially" can mean within one or more standard deviations, and is not limited here.

[0035] Furthermore, in the specification, the phrase “planar distribution diagram” refers to a drawing when the target portion is viewed from above, and the phrase “cross-sectional diagram” refers to a drawing when a section taken by vertically cutting the target portion is viewed from the side.

[0036] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the elements in the drawings are drawn only as examples and not necessarily according to the true scale.

[0037] It will be apparent to those skilled in the art that various modifications and variations can be made to this application without departing from the spirit or scope of this application. Therefore, this application is intended to cover modifications and variations of this application that fall within the scope of the corresponding claims (technical solutions claimed for protection) and their equivalents. It should be noted that the embodiments provided in the examples of this application may be combined with each other unless there is any inconsistency.

[0038] As mentioned in the background section, static electricity damage during display panel manufacturing is a pressing issue. The inventors discovered that during the luminescent material deposition process, friction between the display substrate and the fine metal mask (FMM) can lead to static electricity, which can damage both the display substrate and the display panel.

[0039] Based on the above technical problems, the inventors have discovered that the display substrate includes multiple display panel areas arranged in an array and spacer areas arranged around the display panel areas; the first electrode layer includes multiple first electrodes located in the display panel areas and spaced apart; the first electrode layer also includes at least one release electrode located in the spacer area, the release electrode being disposed around the at least one display panel area and including multiple spaced apart first openings; the pixel definition layer also includes multiple isolation structures located in the spacer area, the isolation structures filling corresponding first openings and covering the edges of the release electrodes at the first openings. Specifically, the release electrodes are disposed in the spacer area on at least one side of the at least one display panel area, and are disposed in the same layer and material as the first electrodes; in the display panel area, the pixel openings expose the corresponding first electrodes, which are electrodes in the light-emitting device, such as anodes. First, during the display panel manufacturing process, during the evaporation of the luminescent material, when friction between the display substrate and the fine metal mask easily generates static electricity, the edges of the multiple first openings included in the release electrode are equivalent to multiple sharp areas where tip discharge can occur, and the charge density is more likely to concentrate at the edges of the first openings. Therefore, the release electrode can preferentially generate and release static electricity, or the release electrode can absorb static electricity generated in other areas, thereby protecting the electrodes and other structures in the display panel area, thereby ensuring that the display panel is not damaged by static electricity after manufacturing, thereby improving the manufacturing yield of the display panel. Second, during the display panel manufacturing process, during the evaporation of the luminescent material, the first electrode layer is the metal layer closest to the fine metal mask, and static electricity is likely to occur in the first electrode layer. After static electricity occurs on the release electrode included in the first electrode layer, or after the release electrode included in the first electrode layer absorbs static electricity, the release electrode shields and protects other electrodes and other structures between the first electrode layer and the substrate, thereby ensuring that the display panel is not damaged by static electricity after manufacturing, thereby improving the manufacturing yield of the display panel.

[0040] The above is the core concept of this application. The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by ordinary technicians in this field without making any creative work are within the scope of protection of this application.

[0041] See also Figures 1 to 12 . Figure 1 A schematic diagram of the overall structure of a display substrate provided in an embodiment of the present application.

[0042] Figure 2 This is a first schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application. Figure 3 This is a second schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application. Figure 4This is a third schematic diagram of a single display panel area and a peripheral spacer area provided in an embodiment of the present application. Figures 2 to 4 An example is given Figure 1 The structure of a single display panel area and the surrounding spacer area is shown, and the first power line is schematically shown.

[0043] Figure 5 This is a first enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application. Figure 6 This is a second enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application. Figure 7 This is a third enlarged schematic diagram of a release electrode in a display substrate provided in an embodiment of the present application. Figure 5 and Figure 6 Also shown are multiple isolation structures located in the spacer area. Figure 7 The plurality of isolation structures located in the spacer region are not shown.

[0044] Figure 8 A schematic diagram of a first cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application. Figure 9 This is a schematic diagram of a second cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application. Figure 10 This is a schematic diagram of a third cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application. Figure 11 This is a schematic diagram of a fourth cross-sectional structure of a spacer region in a display substrate provided in an embodiment of the present application.

[0045] It should be noted that Figures 8 to 11 A schematic cross-sectional structure diagram perpendicular to the extending direction of the boundary between the display panel region and the spacer region (the extending direction of the boundary of the display panel region), or Figures 8 to 11 is a schematic diagram of a cross-sectional structure perpendicular to the length extension direction of the release electrode, for example Figures 8 to 11 for Figure 2 The schematic diagram of the cross-sectional structure at the first dotted line C1-C1 in FIG. Figures 8 to 11 for Figure 3 Schematic diagram of the cross-sectional structure at the first dotted line C1-C1. Figure 8 、 Figure 10 and Figure 11 Can also be Figure 5 and Figure 6 Schematic diagram of the cross-sectional structure at the third dotted line C3-C3, Figure 9 Can also be Figure 6 Schematic diagram of the cross-sectional structure at the fourth dotted line C4-C4.

[0046] Figure 12 This is a schematic diagram of a first cross-sectional structure of a display panel region in a display substrate provided in an embodiment of the present application. Figure 12is a schematic diagram of a cross-sectional structure perpendicular to the extending direction of the boundary between the display panel area and the spacing area (the extending direction of the boundary of the display panel area), for example Figure 12 for Figure 3 and Figure 4 Schematic diagram of the cross-sectional structure at the second dotted line C2-C2.

[0047] The present application provides a display substrate 1000, which includes a base 11, a first electrode layer 17, and a pixel definition layer 18. The display substrate 1000 includes a plurality of display panel areas 100a arranged in an array, and spacer areas 100b arranged around the display panel areas 100a. The first electrode layer 17 is located on one side of the substrate 11, and the first electrode layer 17 includes a plurality of first electrodes 171 located in the display panel area 100a and arranged at intervals; the pixel definition layer 18 is located on the side of the first electrode layer 17 away from the substrate 11, and the pixel definition layer 18 includes a pixel definition structure 181 located in the display panel area 100a, and a plurality of pixel openings 182 surrounded by the pixel definition structure 181, and the pixel openings 182 expose the corresponding first electrodes 171; wherein, the first electrode layer 17 also includes at least one release electrode 17s located in the spacing area 100b, the release electrode 17s is arranged around at least one display panel area 100a, and the release electrode 17s includes a plurality of first openings 17s1 arranged at intervals; the pixel definition layer 18 also includes a plurality of isolation structures 18s located in the spacing area 100b, the isolation structures 18s fill the corresponding first openings 17s1, and cover the edges of the release electrodes 17s at the first openings 17s1.

[0048] For example, the display substrate 1000 can be understood as a motherboard, a mid-board, or a small board in the display panel manufacturing process. The display substrate 1000 only needs to include a plurality of display panel areas 100a arranged in an array and spacer areas 100b arranged around the display panel areas 100a. During the display panel manufacturing process, the display substrate 1000 can be cut into a plurality of display panels.

[0049] For example, during the manufacturing process of the display panel, after the display substrate 1000 is cut into a plurality of display panels, the spacer region 100 b is separated from the display panel region 100 a , the spacer region 100 b is cut away and removed, and the remaining display panel region 100 a becomes the display panel 100 .

[0050] For example, the first electrode layer 17 is located on one side of the substrate 11 and includes a plurality of first electrodes 171 spaced apart and located in the display panel region 100a. The pixel definition layer 18 is located on a side of the first electrode layer 17 away from the substrate 11 and includes a pixel definition structure 181 located in the display panel region 100a and a plurality of pixel openings 182 surrounded by the pixel definition structure 181. The pixel openings 182 expose corresponding first electrodes 171. Specifically, the first electrode 171 can be either the anode or cathode of the light-emitting device 123, and the subsequent second electrode layer 22 can be the other of the anode and cathode of the light-emitting device 123. In this embodiment of the present application, the first electrode 171 is used as the anode of the light-emitting device 123, and the second electrode layer 22 is used as the cathode.

[0051] For example, the first electrode layer 17 further includes at least one release electrode 17s located in the spacer 100b. The release electrode 17s is arranged around at least one display panel area 100a. That is, the release electrode 17s is arranged in the spacer 100b on at least one side of at least one display panel area 100a.

[0052] For example, the release electrode 17s includes a plurality of first openings 17s1 spaced apart from each other; the pixel definition layer 18 also includes a plurality of isolation structures 18s located in the spacer region 100b. The isolation structures 18s fill the corresponding first openings 17s1 and cover the edges of the release electrode 17s at the first openings 17s1. The electrostatic discharge structure includes a plurality of first openings 17s1 and a plurality of isolation structures 18s, so that in the spacer region 100b, the design of the plurality of isolation structures 18s and the release electrode 17s is similar to or similar to the structure of the pixel definition structure 181 and the first electrode 171 in the display panel region 100a. During the display panel manufacturing process and the light-emitting material evaporation process, it is ensured that static electricity is generated in the electrostatic discharge structure only when static electricity is likely to occur in the display panel region 100a, or static electricity is generated before or absorbs static electricity generated in the display panel region 100a, rather than static electricity being generated in the spacer region 100b during the manufacturing process. This ensures that the electrodes and other structures in the display panel region 100a are better protected.

[0053] For example, in the manufacturing process of the display panel, during the evaporation process of the light-emitting material, the isolation structure 18s contacts the fine metal mask, or the support column 191 introduced later contacts the fine metal mask in the spacer area 100b, thereby ensuring that the friction conditions between the spacer area 100b and the fine metal mask are the same or similar to the friction conditions between the display panel area 100a and the fine metal mask.

[0054] In an embodiment of the present application, the display substrate 1000 includes a plurality of display panel areas 100a arranged in an array, and a spacing area 100b arranged around the display panel area 100a; the first electrode layer 17 includes a plurality of first electrodes 171 located in the display panel area 100a and spaced apart; the first electrode layer 17 also includes at least one release electrode 17s located in the spacing area 100b, the release electrode 17s is arranged around at least one display panel area 100a, and the release electrode 17s includes a plurality of first openings 17s1 spaced apart; the pixel definition layer 18 also includes a plurality of isolation structures 18s located in the spacing area 100b, the isolation structures 18s fill the corresponding first openings 17s1, and cover the edges of the release electrodes 17s at the first openings 17s1. Specifically, a release electrode 17s is provided in the spacer region 100b on at least one side of at least one display panel region 100a. The release electrode 17s is provided in the same layer and material as the first electrode 171. In the display panel region 100a, the pixel opening 182 exposes the corresponding first electrode 171. The first electrode 171 is an electrode in the light-emitting device, for example, the first electrode 171 is an anode. Firstly, during the display panel manufacturing process, during the light-emitting material evaporation process, friction between the display substrate 1000 and the fine metal mask may easily cause static electricity. The edges of the multiple first openings 17s1 included in the release electrode 17s are equivalent to multiple sharp areas where tip discharge can occur. Charge density is more likely to concentrate at the edges of the first openings 17s1. Therefore, the release electrode 17s can preferentially generate and release static electricity, or it can absorb static electricity generated in other areas, thereby protecting the electrodes and other structures in the display panel region 100a. This ensures that the display panel is not damaged by static electricity after manufacturing, thereby improving the manufacturing yield of the display panel. Secondly, in the manufacturing process of the display panel, in the process of evaporating the light-emitting material, the first electrode layer 17 is the metal layer closest to the fine metal mask, and static electricity is likely to occur in the first electrode layer 17. After static electricity occurs on the release electrode 17s included in the first electrode layer 17, or after the release electrode 17s included in the first electrode layer 17 absorbs static electricity, the release electrode 17s shields and protects other electrodes and other structures between the first electrode layer 17 and the substrate 11, thereby ensuring that the display panel is not damaged by static electricity after the display panel is manufactured, and the manufacturing yield of the display panel can be improved.

[0055] In some embodiments, the display panel area 100a includes a display area AA and a non-display area BB surrounding at least a portion of the display area AA. A plurality of first electrodes 171 and a plurality of pixel openings 182 are located in the display area AA. The display substrate 1000 further includes a light-emitting material layer 21 and a second electrode layer 22. The light-emitting material layer 21 is located on a side of the corresponding first electrode 171 away from the substrate 11 and is at least partially located within the corresponding pixel opening 182. The second electrode layer 22 is located on a side of the light-emitting material layer 21 away from the substrate 11. The first electrode layer 17 further includes a first power line 17c located in the non-display area AA. The second electrode layer 22 overlaps the first power line 17c in the non-display area AA. In a direction perpendicular to the extension of the release electrode 17s, the width of the release electrode 17s is greater than the width of the first power line 17c.

[0056] For example, Figures 2 to 4 As shown, the display panel area 100a or the display panel 100 includes a display area AA and a non-display area BB surrounding at least a portion of the display area AA. The non-display area BB can surround one or more sides of the display area AA, which is not limited here. The non-display area BB is the border area of the display panel 100.

[0057] For example, Figure 12 As shown, the display substrate 1000 further includes a light-emitting material layer 21 and a second electrode layer 22. The light-emitting material layer 21 is located on the side of the corresponding first electrode 171 away from the substrate 11 and is at least partially located within the corresponding pixel opening 182. The second electrode layer 22 is located on the side of the light-emitting material layer 21 away from the substrate 11. In other words, the display substrate 1000 or display panel 100 includes a plurality of light-emitting devices 123. The light-emitting devices 123 include the first electrode 171, the light-emitting material layer 21, and the second electrode layer 22, which are sequentially stacked in a direction away from the substrate 11. The structure of the light-emitting devices 123 can be any structure in the prior art and is not limited here.

[0058] For example, Figure 2 and Figure 12 As shown, or as Figure 3 and Figure 12 As shown, or as Figure 4 and Figure 12 As shown, the first electrode layer 17 also includes a first power line 17c located in the non-display area AA, and the second electrode layer 22 is overlapped with the first power line 17c in the non-display area AA; by overlapping the second electrode layer 22 with the first power line 17c in the non-display area AA, the first power signal can be transmitted from the binding area or the driver chip through the first power line 17c to the second electrode layer 22.

[0059] For example, in some embodiments, the second electrode layer 22 is a cathode, and the first power line 17 c transmits a cathode signal (VSS signal), but is not limited thereto.

[0060] For example, Figure 5 and Figure 12 As shown, the width of the release electrode 17s is greater than the width of the first power line 17c in a direction perpendicular to the extension direction of the release electrode 17s. The extension direction of the release electrode 17s is the first direction X1, which is the extension direction of the boundary between the display panel area 100a and the spacer area 100b at the corresponding location, or the extension direction of the boundary of the display panel area 100a. Figures 2 to 4 The first direction X1 at different locations is illustrated.

[0061] For example, Figure 5 and Figure 12 As shown, in the extension direction perpendicular to the release electrode 17s, the width of the release electrode 17s is a first width d1, and the width of the first power line 17c is a second width d2. The first width d1 is greater than the second width d2. During the manufacturing process of the display panel, during the evaporation process of the light-emitting material, when the display substrate 1000 and the fine metal mask rub to generate static electricity, the first width d1 is greater than the second width d2. The spacer area 100b has more metal and a larger area, so static electricity is more likely to occur on the release electrode 17s in the spacer area 100b, rather than static electricity occurring at the display panel area 100a or the first power line 17c, thereby protecting structures such as the first power line 17c in the display panel area 100a.

[0062] In some embodiments, the display panel area 100a includes a display area AA and a non-display area BB surrounding at least a portion of the display area AA. A plurality of first electrodes 171 and a plurality of pixel openings 182 are located in the display area AA. The display substrate 1000 further includes a light-emitting material layer 21 and a second electrode layer 22. The light-emitting material layer 21 is located on a side of the corresponding first electrode 171 away from the substrate 11 and is at least partially located within the corresponding pixel opening 182. The second electrode layer 22 is located on a side of the light-emitting material layer 21 away from the substrate 11. In a plane parallel to the substrate 11, the area ratio of the isolation structure 18s per unit area within the range of the release electrode 17s is greater than the area ratio of the pixel definition structure 181 per unit area of the display area AA.

[0063] For example, compare Figure 5 / Figure 8 and Figure 12 , or compare Figure 5 / Figure 10 and Figure 12On a plane parallel to the substrate 11, the area ratio of the isolation structure 18s per unit area within the release electrode 17s is greater than the area ratio of the pixel definition structure 181 per unit area within the display area AA. This allows for greater contact area between the spacer 100b and the fine metal mask during the display panel manufacturing process, when friction between the display substrate 1000 and the fine metal mask generates static electricity during the luminescent material evaporation process. This allows static electricity to be more easily generated on the release electrode 17s in the spacer 100b rather than on the display panel area 100a or the first power line 17c, thereby protecting structures such as the first power line 17c in the display panel area 100a.

[0064] It should be noted that, in some embodiments, Figure 10 and Figure 12 As shown, the display substrate 1000 further includes a support layer 19 located on the side of the pixel definition layer 18 away from the substrate 11. The support layer 19 includes a plurality of support pillars 191. The plurality of support pillars 191 serve the display panel region 100a and the spacer region 100b. On a plane parallel to the substrate 11, the area of the support pillars 191 per unit area within the release electrode 17s is greater than the area of the support pillars 191 per unit area within the display region AA. This allows static electricity to be more likely to occur on the release electrode 17s in the spacer region 100b during the display panel manufacturing process, rather than on the display panel region 100a or the first power line 17c. This protects structures such as the first power line 17c in the display panel region 100a.

[0065] In some embodiments, the release electrodes 17s are electrically connected to the first power line 17c; and / or the release electrodes 17s are in a grid shape.

[0066] For example, the release electrode 17s is electrically connected to the first power line 17c. When static electricity is generated in the first power line 17c, the static electricity in the first power line 17c can be transferred to the release electrode 17s and released, thereby avoiding damage to the first power line 17c. The release electrode 17s and the first power line 17c can be electrically connected via an electrode or a trace. For example, the release electrode 17s and the first power line 17c can be connected via an electrode or a trace formed by the first electrode layer 17.

[0067] For example, the release electrode 17s is in a grid shape, so that the edges of the multiple first openings 17s1 included in the release electrode 17s are equivalent to including multiple sharp parts where tip discharge can occur, and the charge density is more likely to be concentrated at the edges of the first openings 17s1. Therefore, the release electrode 17s can preferentially generate static electricity and release static electricity, or the release electrode 17s can absorb static electricity generated in other areas.

[0068] In some embodiments, a plurality of isolation structures 18s are arranged at intervals in an extension direction perpendicular to the release electrode 17s; at least one of the plurality of isolation structures 18s arranged at intervals is an island structure; or / and, at least one of the plurality of isolation structures 18s arranged at intervals is a strip structure, and the isolation structures 18s in the strip structure extend around the display panel area 100a.

[0069] For example, Figure 5 As shown, the extension direction perpendicular to the release electrode 17s is the second direction Y2, and multiple isolation structures 18s are arranged at intervals. On a plane parallel to the substrate 11, the release electrodes 17s between adjacent isolation structures 18s can be exposed, and the release electrodes 17s can absorb static electricity at the exposed locations. At the same time, the static electricity release structure includes a plurality of first openings 17s1 and a plurality of isolation structures 18s, so that in the spacing area 100b, the design of the plurality of isolation structures 18s and the release electrode 17s is close to or similar to the structure of the pixel definition structure 181 and the first electrode 171 in the display panel area 100a.

[0070] For example, Figure 6 As shown, at least one of the plurality of spaced-apart isolation structures 18s is in a strip-like structure, and the strip-like isolation structures 18s extend around the display panel region 100a. The extension direction of the strip-like isolation structures 18s can be parallel to the extension direction of the edge of the display panel region 100a, so that the display panel region 100a is surrounded by a first strip-like opening 17s1, which can better concentrate charge at the edge of the first opening 17s1 and better absorb static electricity from other areas.

[0071] In some embodiments, as Figure 11 As shown, the display substrate 1000 also includes a flat layer 16, which is located between the base 11 and the first electrode layer 17. The flat layer 16 includes a plurality of recesses 161, and the recess 161 includes a bottom wall 1611 and a side wall 1612 surrounding the bottom wall 1611. The release electrode 17s is at least partially located on the side wall 1612, and the edge of the first opening 17s1 is at least partially located on the side wall 1612.

[0072] For example, Figure 11 As shown, the flat layer 16 includes a plurality of recesses 161 and a convex portion 162 located between two adjacent recesses 161. That is, in the flat layer 16, the distance between the bottom wall 1611 of the recess 161 and the substrate 11 is smaller than the distance between the surface of the convex portion 162 away from the substrate 11 and the substrate 11. The convex portion 162 corresponds to the first opening 17s1, that is, the orthographic projection of the convex portion 162 on the substrate at least partially overlaps with the orthographic projection of the corresponding first opening 17s1 on the substrate 11. For example, the orthographic projection of the convex portion 162 on the substrate 11 is located within the range of the orthographic projection of the corresponding first opening 17s1 on the substrate.

[0073] For example, Figure 11 As shown, the release electrode 17s is at least partially located on the side wall 1612, and the edge of the first opening 17s1 is at least partially located on the side wall 1612. The edge of the release electrode 17s at the first opening 17s1 forms a tip facing away from the substrate 11, and the first electrode 171 is structured in the display panel area 100a as shown in FIG. Figure 12 As shown, the surface of the flat layer 16 in the display panel area 100a away from the substrate 11 is a flat surface, and the first electrode 171 in the display panel area 100a does not form a pointed end facing away from the substrate 11 at the first opening 17s1. During the manufacturing process of the display panel, during the evaporation process of the light-emitting material, the edge of the release electrode 17s at the first opening 17s1 forms a pointed end facing the fine metal mask, and the charge density is more easily and better concentrated at these pointed edges of the first opening 17s1. Therefore, compared with the display panel area 100a, the release electrode 17s can better and preferentially generate and release static electricity, or the release electrode 17s can better absorb static electricity generated in other areas, thereby better protecting the electrodes and other structures in the display panel area 100a, thereby ensuring that the display panel is not damaged by static electricity after the display panel is manufactured, and improving the manufacturing yield of the display panel.

[0074] In some embodiments, as Figure 7 As shown, on a plane parallel to the substrate 11, at least part of the first opening 17s1 includes a first protrusion 17s11 protruding away from the center of the first opening 17s1; and / or, on a plane parallel to the substrate 11, at least part of the release electrode 17s includes a second protrusion 17st protruding toward the center close to the first opening 17s1.

[0075] For example, Figure 7 As shown, on a plane parallel to the substrate 11, the first opening 17s1 has a first protrusion 17s11 protruding away from the center of the first opening 17s1. The first protrusion 17s11 is formed by the first opening 17s1 being recessed relative to the edges of the first opening 17s1 on both sides, so that the first electrode 171 forms more or sharper sharp portions in the first opening 17s1 or the first protrusion 17s11.

[0076] For example, Figure 7 As shown, on a plane parallel to the substrate 11, the second protrusion 17st of the release electrode 17s protrudes toward the center of the first opening 17s1. The second protrusion 17st is formed by the release electrode 17s protruding from the edge of the first opening 17s1, so that the first electrode 171 forms more or sharper sharp parts in the first opening 17s1 or the second protrusion 17st.

[0077] In some embodiments, as Figures 2 to 4 shown, and Figure 8 As shown, the display substrate 1000 also includes an array composite layer 100z, which is located between the substrate 11 and the first electrode layer 17. The array composite layer 100z includes multiple film layers. The array composite layer 100z includes a shorting bar CC01 located in the spacer area 100b, and the orthographic projection of at least part of the release electrode 17s on the substrate 11 at least partially overlaps with the orthographic projection of the shorting bar CC01 on the substrate 11.

[0078] For example, the shorting bar CC01 is a shorting bar circuit, and the shorting bar CC01 may include Figure 8 The portion consisting of at least one of the first metal layer 13 and the second metal layer 15.

[0079] For example, Figure 8 As shown, the non-display area BB may include a first sub-non-display area BB1 and a second sub-non-display area BB2. The second sub-non-display area BB2 is provided with a plurality of binding terminals (not shown in the figure). The plurality of binding terminals can be bound and connected to the circuit board and / or the driving chip. The short-circuit bar CC01 is usually provided in the second sub-non-display area BB2, but is not limited thereto.

[0080] For example, in the related art, the shorting bar CC01 is not composed of the first electrode layer 17, which makes it easy for static electricity to damage the display substrate during the process of evaporating the light-emitting material, such as static electricity damaging the first electrode 171. Figure 8 As shown, the orthographic projection of at least a portion of the release electrode 17s on the substrate 11 at least partially overlaps with the orthographic projection of the shorting bar CC01 on the substrate 11. This means that the release electrode 17s can prevent static electricity from damaging the first electrode 171 and other structures during the luminescent material deposition process. Furthermore, the orthographic projection of at least a portion of the release electrode 17s on the substrate 11 at least partially overlaps with the orthographic projection of the shorting bar CC01 on the substrate 11, which can reduce the layout area occupied by the release electrode 17s in the display panel 100.

[0081] For example, Figure 8 As shown, the array composite layer 100z includes a first insulating layer 12, a first metal layer 13, a second insulating layer 14, a second metal layer 15, and a planar layer 16, which are sequentially stacked on a substrate 11. A first electrode layer 17 is disposed on a side of the planar layer 16 away from the substrate 11, and a pixel definition layer 18 is disposed on a side of the first electrode layer 17 away from the substrate 11. The first metal layer 13 may include a gate electrode of a thin film transistor, and the second metal layer 15 may include a source electrode and a drain electrode of the thin film transistor, but are not limited thereto.

[0082] In some embodiments, as Figure 1As shown, the first electrode layer 17 includes a plurality of first release electrodes 17sa located in the spacer area 100b, and the display substrate 1000 further includes at least one electrostatic ring 101; the first release electrodes 17sa are arranged around the corresponding display panel area 100a, and at least part of the first release electrodes 17sa are located between two adjacent display panel areas 100a; on a plane parallel to the substrate 11, the electrostatic ring 101 is arranged around the plurality of display panel areas 100a and the plurality of first release electrodes 17sa; wherein, at least part of the adjacent first release electrodes 17sa are electrically connected to each other.

[0083] For example, electrostatic ring 101 is an ESD guard ring. In some embodiments, electrostatic ring 101 is a coil, such as a coil formed from at least one of first metal layer 13 and second metal layer 15. In other embodiments, electrostatic ring 101 is also an electrostatic discharge structure and includes discharge electrodes 17s.

[0084] For example, Figure 1 As shown, at least some adjacent first release electrodes 17sa are electrically connected to each other. For example, some adjacent display panel areas 100a share the same release electrode 17s. For example, two release electrodes 17s surrounding different display panel areas 100a are electrically connected to each other. This interconnection of at least some of the first release electrodes 17sa to form a larger structure can prevent electrostatic shock or damage to the release electrodes 17s.

[0085] In some embodiments, as Figure 1 As shown, the plurality of first release electrodes 17sa surrounded by the electrostatic ring 101 are electrically connected to the corresponding electrostatic ring 101. For example, Figure 1 The first connecting structure 102 is connected, and the first connecting structure 102 can be a wiring or an electrostatic release structure, so that the multiple first release electrodes 17sa surrounded by the electrostatic ring 101 are connected to form a structure with a larger area, which can prevent static electricity from injuring or damaging the release electrode 17s.

[0086] In some embodiments, as Figure 1 As shown, the first electrode layer 17 further includes at least one second release electrode 17sb located in the spacer region 100b, and the electrostatic ring 101 serves as the second release electrode 17sb.

[0087] For example, in some other embodiments, the electrostatic ring 101 is also an electrostatic release structure, and the electrostatic ring 101 also includes a release electrode 17s, which also plays a role in releasing static electricity.

[0088] Based on the same application concept, the present application also provides a method for manufacturing a display panel, which can manufacture any of the above display substrates 1000. The method for manufacturing a display panel includes: step S100, step S200, step S300, step S400, step S500, and step S600.

[0089] S100 , providing a substrate 11 .

[0090] S200 , forming an array composite layer 100 z on one side of the substrate 11 .

[0091] S300 , forming a first electrode layer 17 on a side of the array composite layer 100 z away from the substrate 11 , wherein the first electrode layer 17 includes a plurality of first electrodes 171 and at least one release electrode 17 s .

[0092] S400, a pixel definition layer 18 is formed on a side of the first electrode layer 17 away from the substrate 11, and the pixel definition layer 18 includes a pixel definition structure 181 and an isolation structure 18s to form a display substrate 1000, and the display substrate 1000 includes a plurality of display panel areas 100a, and spacer areas 100b arranged around the display panel areas 100a.

[0093] S500: forming the light-emitting material layer 21 and the second electrode layer 22 of the light-emitting device 123 on the side of the first electrode 171 and the pixel definition layer 18 away from the substrate 11

[0094] S600, comparison Figure 2 and Figure 13 ,like Figure 13 As shown, the display substrate 1000 is cut, the spacer region 100 b is removed, and the display panel region 100 a is retained as the display panel 100 .

[0095] See also Figure 13 , Figure 13 A schematic diagram of a display panel provided in an embodiment of the present application.

[0096] Based on the same application concept, the present application also provides a display panel 100 , which is manufactured by cutting any one of the display substrates 1000 described above.

[0097] For example, the manufacturing method of the display panel and the display panel 100 also have the beneficial effects of the display substrate 1000 in the above embodiment. The similarities can be understood by referring to the above explanation of the display substrate 1000 and will not be repeated below.

[0098] For example, the display panel 100 provided in the embodiment of the present application can be applied to mobile phones, and can also be applied to any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, industrial control equipment, medical display screens, touch interactive terminals, etc. The embodiment of the present application does not specifically limit this.

[0099] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0100] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art could make various modifications and improvements without departing from the spirit of the present application, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A display substrate, characterized in that: The display substrate comprises a plurality of display panel areas arranged in an array, and spacer areas arranged around the display panel areas, the display substrate comprising: substrate; a first electrode layer located on one side of the substrate, the first electrode layer comprising a plurality of first electrodes located in the display panel area and spaced apart; a pixel definition layer, located on a side of the first electrode layer away from the substrate, the pixel definition layer comprising a pixel definition structure located in the display panel area, and a plurality of pixel openings surrounded by the pixel definition structure, the pixel openings exposing corresponding first electrodes; Wherein, the first electrode layer further comprises at least one release electrode located in the spacer area, the release electrode is arranged around at least one display panel area, and the release electrode comprises a plurality of first openings arranged at intervals; The pixel definition layer further includes a plurality of isolation structures located in the spacer region. The isolation structures fill the corresponding first openings and cover edges of the release electrodes at the first openings.

2. The display substrate according to claim 1, wherein: The display panel area includes a display area and a non-display area surrounding at least a portion of the display area, the plurality of first electrodes and the plurality of pixel openings are located in the display area, and the display substrate further includes: a light-emitting material layer, located on a side of the corresponding first electrode away from the substrate, and at least partially located within the corresponding pixel opening; a second electrode layer, located on a side of the light-emitting material layer away from the substrate; Wherein, the first electrode layer further includes a first power line located in the non-display area, and the second electrode layer overlaps the first power line in the non-display area; In a direction perpendicular to the extension direction of the release electrode, the width of the release electrode is greater than the width of the first power line; and / or, On a plane parallel to the substrate, an area ratio of the isolation structure per unit area within the range of the release electrode is greater than an area ratio of the pixel definition structure per unit area of the display region.

3. The display substrate according to claim 1, wherein The release electrode is electrically connected to the first power line; and / or, The release electrode is in a grid shape.

4. The display substrate according to claim 1, wherein In an extension direction perpendicular to the release electrode, a plurality of isolation structures are arranged at intervals; At least one of the plurality of isolation structures arranged at intervals is an island structure; or / and, At least one of the plurality of isolation structures arranged at intervals is in a strip-shaped structure, and the isolation structure in the strip-shaped structure extends around the display panel area.

5. The display substrate according to claim 1, wherein Also includes: A flat layer is located between the substrate and the first electrode layer, the flat layer includes a plurality of recesses, the recess includes a bottom wall and a side wall surrounding the bottom wall, the release electrode is at least partially located on the side wall, and the edge of the first opening is at least partially located on the side wall.

6. The display substrate according to claim 1, wherein: On a plane parallel to the base, at least part of the first opening includes a first protrusion protruding away from the center of the first opening; and / or, On a plane parallel to the substrate, at least a portion of the release electrode includes a second protrusion protruding toward a center close to the first opening.

7. The display substrate according to claim 1, wherein: The display substrate further includes: An array composite layer is located between the substrate and the first electrode layer, the array composite layer includes multiple film layers, the array composite layer includes a shorting bar located in the spacer area, and at least part of the orthographic projection of the release electrode on the substrate overlaps at least partially with the orthographic projection of the shorting bar on the substrate.

8. The display substrate according to claim 1, wherein: The first electrode layer includes a plurality of first release electrodes located in the spacer area, and the display substrate further includes at least one electrostatic ring; The first release electrodes are arranged around corresponding display panel areas, and at least part of the first release electrodes is located between two adjacent display panel areas; On a plane parallel to the substrate, the electrostatic ring is arranged around the plurality of display panel areas and the plurality of the first release electrodes; Wherein, at least some of the adjacent first release electrodes are electrically connected to each other; and / or, The plurality of first release electrodes surrounded by the electrostatic ring are electrically connected to the corresponding electrostatic ring; and / or, The first electrode layer further includes at least one second release electrode located in the spacer area, and the electrostatic ring serves as the second release electrode.

9. A method for manufacturing a display panel, characterized in that: The display substrate according to any one of claims 1 to 8 can be manufactured.

10. A display panel, characterized in that: The display substrate is manufactured by cutting according to any one of claims 1 to 8.