Preparation method of patterned thin film structure

Abstract

The invention provides a preparation method of a patterned thin film structure, and relates to the field of micro device preparation. Before etching, the photoresist pattern and the conductive film layer are formed on the dielectric layer, and the conductive film layer is insensitive to corners, good in step coverage and thickness uniformity and has certain conductivity. Under the condition that the original etching condition is not changed, secondary electrons generated in the etching process can be conducted in time by adding the conductive film layer, are not easy to accumulate on the side wall of the pattern, cannot form a local electric field, can improve the phenomenon of ion aggregation, and can improve the etching efficiency. And a notch formed at the bottom of the side wall due to the bow morphology caused by the high aspect ratio of the side wall of the pattern is eliminated.

Description

Technical Field

[0001] The present invention relates to the field of micro-device preparation, and in particular to a method for preparing a patterned thin film structure. Background Art

[0002] During the dry etching process, an etching focusing effect will occur at the corners at the bottom of the sidewalls of the pattern. As the etching time increases, more material at the corners will be etched away, forming microgrooves. Severe high aspect ratio microgrooves will cause the sidewalls of the microgrooves to form a bow morphology, resulting in abnormal gaps at the bottom of the pattern. When processing MEMS devices, there are special requirements for the morphology obtained after the film layer is patterned. For example, for the special morphology of non-equal height structures, it is necessary to select an etching method with an etching rate of 1:1 to transfer the photoresist pattern 1:1 to the etched material. In the actual process, these conditions greatly limit the adjustable space of the etching process. It is very difficult to meet the special morphology requirements and eliminate the gaps by controlling the etching process parameters. Therefore, it is urgent to design a technical solution that can eliminate the gaps while meeting the special morphology requirements. Summary of the Invention

[0003] One object of the present invention is to provide a method for preparing a patterned thin film structure to solve the technical problem in the prior art that the gap cannot be eliminated under special etching conditions.

[0004] In particular, the present invention provides a method for preparing a patterned thin film structure, comprising the following steps:

[0005] Providing a Si substrate;

[0006] Depositing an etch stop layer and a dielectric layer in sequence on the Si substrate;

[0007] forming a photoresist pattern and a conductive film layer on the dielectric layer;

[0008] The conductive film layer, the photoresist pattern and the dielectric layer are etched using the photoresist pattern as a mask to form a pattern identical to the photoresist pattern on the dielectric layer. The etching rates of the photoresist pattern, the dielectric layer and the conductive film layer are the same.

[0009] Optionally, the step of forming a photoresist pattern and a conductive film layer on the dielectric layer specifically includes:

[0010] Coating photoresist on the dielectric layer and forming the photoresist pattern by photolithography, wherein the photoresist pattern is a non-contour pattern;

[0011] The conductive film layer is deposited on the photoresist pattern and in the area of the dielectric layer where the photoresist pattern is not formed.

[0012] Optionally, the step of forming a photoresist pattern and a conductive film layer on the dielectric layer specifically includes:

[0013] depositing the conductive film layer on the dielectric layer;

[0014] A photoresist is coated on the conductive film layer, and the photoresist pattern is formed by a photolithography process, wherein the photoresist pattern is a non-contour pattern.

[0015] Optionally, the thickness of the conductive film layer accounts for 5%-20% of the thickness of the photoresist pattern.

[0016] Optionally, the step of depositing a conductive film layer on the photoresist pattern and on an area of the dielectric layer where the photoresist pattern is not formed specifically includes:

[0017] A target gas is introduced into the etching chamber and excited into plasma to deposit the conductive film layer on the photoresist pattern and the area of the dielectric layer where the photoresist pattern is not formed. The conductive film layer is a conductive film layer containing carbon fluorine free radicals, and the target gas includes C4F8.

[0018] Optionally, the target gas further includes one or more of CH2F2 and CHF3.

[0019] Optionally, if the target gas includes C4F8 and CH2F2, the flow ratio of C4F8 to CH2F2 is in the range of 2:1-3:1;

[0020] If the target gas includes C4F8 and CHF3, the flow ratio of C4F8 to CHF3 ranges from 2:1 to 4:1.

[0021] If the target gas includes C4F8, CHF3 and CH2F2, the flow ratio of C4F8, CHF3 and CH2F2 ranges from 4:2:1 to 6:3:2.

[0022] Optionally, a target gas is introduced into the etching chamber and excited into plasma, so that in the step of depositing the conductive film layer in the photoresist pattern and the area of the dielectric layer where the photoresist pattern is not formed, a heteroatom gas is introduced to form a conductive film layer co-doped with carbon-fluorine free radicals and heteroatoms.

[0023] Optionally, the heteroatom gas includes one or more of N2, NO and NH3.

[0024] Optionally, the flow ratio of the target gas to the heteroatom gas is in the range of 6:1-10:1.

[0025] The present invention forms a photoresist pattern and a conductive film layer on a dielectric layer before etching. The conductive film layer is insensitive to corners, has good step coverage and thickness uniformity, and has a certain degree of conductivity. Without changing the original etching conditions, the addition of the conductive film layer allows secondary electrons generated during the etching process to be promptly conducted, preventing them from accumulating on the pattern sidewalls and forming local electric fields. This can improve ion aggregation and eliminate gaps at the bottom of the sidewalls caused by bow morphology resulting from the high aspect ratio of the pattern sidewalls.

[0026] Based on the following detailed description of specific embodiments of the present invention in conjunction with the accompanying drawings, those skilled in the art will become more aware of the above and other objects, advantages and features of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Hereinafter, some specific embodiments of the present invention will be described in detail in an exemplary and non-limiting manner with reference to the accompanying drawings. The same reference numerals in the accompanying drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the accompanying drawings:

[0028] Figure 1 This is a schematic structural diagram of a thin film structure before etching in the prior art;

[0029] Figure 2 This is a schematic structural diagram of a thin film structure after a portion of the structure is etched in the prior art;

[0030] Figure 3 This is a schematic structural diagram of a thin film structure after etching in the prior art;

[0031] Figure 4 is a schematic flow chart of a method for preparing a patterned thin film structure according to one embodiment of the present invention;

[0032] Figure 5 is a schematic flow chart of a method for preparing a patterned thin film structure according to another embodiment of the present invention;

[0033] Figure 6 is a schematic structural diagram of a patterned thin film structure according to one embodiment of the present invention;

[0034] Figure 7 is a schematic structural diagram of a patterned thin film structure at the beginning of etching according to one embodiment of the present invention;

[0035] Figure 8 is a schematic structural diagram of a patterned thin film structure after 60% etching according to one embodiment of the present invention;

[0036] Figure 9 is a schematic structural diagram of a patterned thin film structure after 90% etching according to an embodiment of the present invention;

[0037] Figure 10 is a schematic structural diagram of a patterned thin film structure after etching according to one embodiment of the present invention;

[0038] Figure 11 is a schematic flow chart of a method for preparing a patterned thin film structure according to yet another embodiment of the present invention;

[0039] Figure 12 is a schematic structural diagram of a patterned thin film structure according to another embodiment of the present invention.

[0040] Reference numerals:

[0041] 100-patterned thin film structure, 10-Si substrate, 20-etching stop layer, 30-dielectric layer, 40-photoresist pattern, 50-conductive film layer. DETAILED DESCRIPTION

[0042] The following describes embodiments of the present invention in detail, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and are not to be construed as limiting the present invention.

[0043] Figure 1 This is a schematic structural diagram of a thin film structure before etching in the prior art. Figure 2 This is a schematic structural diagram of a thin film structure after a portion of the structure is etched in the prior art. Figure 3 This is a schematic structural diagram of the thin film structure after etching in the prior art. Figures 1 to 3 As shown, in the prior art, the thin film structure includes a Si substrate 10', an etch stop layer 20', a dielectric layer 30' and a photoresist pattern 40' arranged in sequence from bottom to top. A 1:1 etching rate is selected to etch the dielectric layer 30' and the photoresist pattern 40'. Since the dielectric layer 30' is an insulator with poor conductivity, the secondary electrons generated during the etching process are not easily conducted and are more likely to accumulate charges at locations such as the sidewalls, thereby generating a local electric field, causing ion deflection, increasing the ion concentration at the sidewall corners, and causing a more serious micro-groove effect. As the etching depth increases, the micro-groove effect intensifies, forming grooves with a larger depth-to-width ratio. In structures with a high aspect ratio, due to ion scattering, shadow effects, and other reasons, a bow morphology with a concave sidewall of the pattern is easily formed. After the etching is completed, the bow morphology at the micro-groove eventually forms a bottom notch, resulting in pattern abnormalities, thereby affecting product performance. See Figure 3 A notch 31 ′ is formed at the bottom of the sidewall of the dielectric layer 30 ′.

[0044] Figure 4FIG. 1 is a schematic flow chart of a method for preparing a patterned thin film structure 100 according to an embodiment of the present invention. Figure 4 As shown, in a specific embodiment, the method for preparing the patterned thin film structure 100 includes the following steps:

[0045] Step S100, providing a Si substrate 10;

[0046] Step S200 , depositing an etch stop layer 20 and a dielectric layer 30 in sequence on a Si substrate 10 ;

[0047] Step S300, forming a photoresist pattern 40 and a conductive film layer 50 on the dielectric layer 30;

[0048] In step S400, the conductive film layer 50, the photoresist pattern 40 and the dielectric layer 30 are etched using the photoresist pattern 40 as a mask to form a pattern identical to the photoresist pattern 40 on the dielectric layer 30. The etching rates of the photoresist pattern 40, the dielectric layer 30 and the conductive film layer 50 are the same.

[0049] Before etching, this embodiment forms a photoresist pattern 40 and a conductive film layer 50 on the dielectric layer 30. The conductive film layer 50 is insensitive to corners, has good step coverage and thickness uniformity, and has a certain degree of conductivity. Without changing the original etching conditions, by adding the conductive film layer 50, the secondary electrons generated during the etching process can be promptly conducted, are less likely to accumulate on the sidewalls of the pattern, and do not form a local electric field. This can improve the phenomenon of ion aggregation and eliminate the gap formed at the bottom of the sidewall due to the bow morphology caused by the high aspect ratio of the sidewall of the pattern. In addition, this embodiment can complete deposition and etching in the same etching chamber without the need for additional equipment.

[0050] In step S200 , the material of the etch stop layer 20 is Al, AlCu, Ti, TiN, Si or poly, and the dielectric layer 30 can be silicon oxide, silicon nitride, SOG (Spin-On Glass) or FSG (Fluorinated Silicon Dioxide).

[0051] In step S400, the etching ratios of the dielectric layer 30, the conductive film layer 50, and the photoresist pattern 40 are approximately equal, with an etching rate of approximately 1:1:1. In other words, during the etching process, the etching speed is relatively balanced, and the thickness of the photoresist pattern 40 and the etched depth of the dielectric layer 30 maintain a similar ratio, which helps ensure the accuracy of the etched pattern. In addition, after the etching is completed, the photoresist is also etched, so a subsequent stripping step is not required.

[0052] In other embodiments, the conductive film layer 50 can also be formed by spraying or evaporation. However, the spraying material can only be selected from special photoresists, and it is generally difficult to stably achieve a uniform film thickness below 200nm-300nm. While evaporation films offer a wider range of material options, they are more sensitive to high steps and corners, and may have step coverage issues. Therefore, this embodiment uses chemical vapor deposition to add a conductive film layer 50 to avoid the above problems.

[0053] Figure 5 FIG. 1 is a schematic flow chart of a method for preparing a patterned thin film structure 100 according to another embodiment of the present invention. Figure 5 As shown, in one embodiment, step S300 specifically includes:

[0054] Step S310, coating a photoresist on the dielectric layer 30, and forming a photoresist pattern 40 by a photolithography process, wherein the photoresist pattern 40 is a non-contour pattern;

[0055] In step S320 , a conductive film layer 50 is deposited on the photoresist pattern 40 and on the area of the dielectric layer 30 where the photoresist pattern 40 is not formed.

[0056] In step S310 , the photolithography process may be sequentially performing exposure, development, and thermal reflow processing, or sequentially performing grayscale exposure and development processing, thereby forming a non-contour pattern.

[0057] Figure 6 is a schematic structural diagram of a patterned thin film structure 100 according to an embodiment of the present invention, see Figure 6 The conductive film layer 50 covers the photoresist pattern 40 and the area of the dielectric layer 30 that is not shielded by the photoresist.

[0058] In some embodiments, the photoresist pattern 40 includes at least one target pattern with a semicircular cross section. In other embodiments, the photoresist pattern 40 may also be other patterns, which are specifically determined according to design requirements.

[0059] Figure 7 1 is a schematic structural diagram of a patterned thin film structure 100 at the beginning of etching according to an embodiment of the present invention. Figure 8 1 is a schematic structural diagram of a patterned thin film structure 100 after etching 60% according to an embodiment of the present invention. Figure 9 1 is a schematic structural diagram of a patterned thin film structure 100 after 90% etching according to an embodiment of the present invention. Figure 10 FIG is a schematic structural diagram of a patterned thin film structure 100 after etching according to an embodiment of the present invention. Figure 7During the etching process, the ion aggregation caused by charge accumulation is weakened, and the accelerated etching phenomenon at the sidewalls of the pattern is effectively improved. The resulting micro-grooves are shallower and have smoother openings, and are no longer deep trenches with high aspect ratios. Figure 8 As the etching depth increases, the conditions for forming a bow morphology that is concave toward the sidewall are no longer met. Figure 9 and Figure 10 Finally, the photoresist pattern 40 is successfully transferred to the dielectric layer 30 without defects. This embodiment does not require complex pre- and post-processing processes. During the process of etching the conductive film layer 50, the photoresist pattern 40, and the dielectric layer 30 at a preset etching rate, the secondary electrons generated are promptly conducted and are less likely to accumulate on the sidewalls of the pattern, thereby preventing the formation of local electric fields and thus preventing the formation of gaps.

[0060] In some embodiments, the thickness of the conductive film layer 50 accounts for 5%-20% of the thickness of the photoresist pattern 40. For example, it may be 5%, 8%, 10%, 12%, 14%, 16%, 18% or 20%.

[0061] In some embodiments, step S320 specifically includes:

[0062] In step S321, a target gas is introduced into the etching chamber and excited into a plasma to deposit a conductive film layer 50 on the photoresist pattern 40 and the area of the dielectric layer 30 where the photoresist pattern 40 is not formed. The conductive film layer 50 is a conductive film layer 50 containing carbon fluorine free radicals. The target gas includes C4F8. Here, the etching chamber can be an ICP etching chamber, a RIE etching chamber, or an ECR etching chamber. In a preferred embodiment, the etching chamber is an ICP etching chamber.

[0063] Here, the conductive film layer 50 containing carbon fluoride radicals has an etching rate close to that of the photoresist and has a certain conductivity. The carbon fluoride radicals can be polytetrafluoroethylene. C4F8 gas is excited in the etching chamber to form a plasma, decomposing into CFx radicals, which are adsorbed and polymerized on the surface of the photoresist pattern 40, thereby forming a layer of polymer rich in carbon radicals. The properties of this polymer are similar to those of the photoresist. In this embodiment, the flow rate of C4F8 can be adjusted according to the thickness of the conductive film layer 50. The general flow rate range is 5 sccm-100 sccm, for example, 5 sccm, 15 sccm, 25 sccm, 35 sccm, 45 sccm, 55 sccm, 65 sccm, 75 sccm, 85 sccm, 95 sccm, and 100 sccm. The specific value depends on the specific equipment and the required etching characteristics.

[0064] In some embodiments, the target gas further comprises one or more of CH2F2 and CHF3. If the target gas comprises C4F8 and CH2F2, the flow ratio of C4F8 to CH2F2 ranges from 2:1 to 3:1, for example, 2:1, 2.2:1, 2.5:1, 2.8:1, or 3:1. If the target gas comprises C4F8 and CHF3, the flow ratio of C4F8 to CHF3 ranges from 2:1 to 4:1, for example, 2:1, 2.2:1, 2.5:1, 2.8:1, 3:1, 3.2:1, 3.5:1, 3.8:1, or 4:1. If the target gas includes C4F8, CHF3 and CH2F2, the flow ratio of C4F8, CHF3 and CH2F2 ranges from 4:2:1 to 6:3:2, for example, it can be 4:2:1, 4.5:2.25:1.2, 5:2.5:1.5, 5.5:2.8:1.8 or 6:3:2.

[0065] This embodiment adds CH2F2 on the basis of C4F8, which can increase the hydrogen groups in the carbon fluorine skeleton and regulate the polymerization density and conductivity. In addition, the addition of CHF3 can further improve the film density, improve the deposition uniformity, and enhance the thickness consistency in high-depth patterns.

[0066] Figure 11 is a schematic flow chart of a method for preparing a patterned thin film structure 100 according to yet another embodiment of the present invention. Figure 12 FIG is a schematic structural diagram of a patterned thin film structure 100 according to another embodiment of the present invention. Figure 11 and Figure 12 As shown, in another embodiment, step S300 specifically includes:

[0067] Step S310 ′, depositing a conductive film layer 50 on the dielectric layer 30 ;

[0068] In step S320 ′, a photoresist is coated on the conductive film layer 50 , and a photoresist pattern 40 is formed by a photolithography process. The photoresist pattern 40 is a non-contour pattern.

[0069] In this embodiment, photoresist can be applied first to the dielectric layer 30, followed by the conductive film layer 50. Alternatively, the conductive film layer 50 can be deposited first on the dielectric layer 30, followed by the photoresist. In other words, the order in which the photoresist and conductive film layer 50 are prepared is not critical, and both can improve ion aggregation and eliminate gaps at the bottom of the sidewalls due to bow morphology caused by the high aspect ratio of the sidewalls. The specific order can be determined based on actual needs.

[0070] In step S310', a target gas is introduced into the etching chamber and excited into a plasma, thereby depositing a conductive film layer 50 on the dielectric layer 30. The target gas includes C4F8. It can be understood that the deposition method of the conductive film layer 50 is the same in all processes, the only difference being the order in which the conductive film layer 50 and the photoresist are prepared.

[0071] In some embodiments, in step S321 , a heteroatom gas is introduced to form a conductive film layer 50 co-doped with carbon-fluorine radicals and heteroatoms.

[0072] In this embodiment, heteroatom gas is introduced to introduce doping elements during the deposition process, thereby constructing conductive paths or functional groups, thereby improving the conductivity of the conductive film layer 50 .

[0073] In some embodiments, the heteroatom gas includes one or more of N2, NO, and NH3. It can be understood that this embodiment introduces the N element during the deposition process. The electronegativity of the N atom is similar to that of C and F. After introduction, it can form a conjugated structure or n-type conductive behavior, which can improve electron mobility and the conductivity of the entire film layer, which is beneficial to the discharge of secondary electrons during etching and prevents local accumulation to form bows. In addition, the N element will make the surface of the conductive film slightly negatively charged, thereby stabilizing the etching plasma, avoiding discharge "hot spots", and suppressing side etching / depression.

[0074] In some embodiments, the flow ratio of the target gas to the heteroatom gas is in the range of 6:1-10:1, for example, 6:1, 7:1, 8:1, 9:1, or 10:1. It can be understood that a small amount of heteroatom gas introduced during the deposition process has low energy and only adheres to the surface of the conductive film layer 50 without destroying the polymer structure, thereby achieving doping without damaging the film structure.

[0075] Example 1:

[0076] An AlCu layer and a silicon oxide layer are sequentially deposited on a Si substrate 10. A photoresist is then coated on the silicon oxide layer. A photoresist pattern 40 is formed by exposure, development, and thermal reflow. The photoresist pattern 40 is a non-contour pattern. C4F8 gas is then introduced into the ICP etching chamber and excited into a plasma to deposit a conductive film layer 50 on the photoresist pattern 40 and on the areas of the silicon oxide layer where the photoresist pattern 40 is not formed. Figure 6 Finally, the photoresist pattern 40 is used as a mask to etch the conductive film layer 50, the photoresist pattern 40 and the silicon oxide layer at a preset etching rate to form a pattern identical to the photoresist pattern 40 on the silicon oxide layer. The etching rates of the photoresist pattern, the dielectric layer and the conductive film layer are the same.

[0077] Example 2:

[0078] The only difference from Example 1 is:

[0079] CH2F2 gas and CHF3 gas were introduced at the same time as C4F8 gas, and the flow ratio of C4F8 gas, CHF3 gas and CH2F2 gas was 5:2.5:1.5.

[0080] Example 3:

[0081] The only difference from Example 1 is:

[0082] While introducing C4F8 gas, CH2F2 gas, CHF3 gas and NH3 gas were introduced, and the flow ratio of C4F8 gas, CH2F2 gas, CHF3 gas and NH3 gas was 5:2.5:1.5:1.

[0083] Comparative Example 1:

[0084] The only difference from Example 1 is:

[0085] The conductive film layer 50 is not formed.

[0086] Table 1 is a performance comparison table of Example 1, Example 2, Example 3 and Comparative Example 1.

[0087] Table 1

[0088] Example 1 Example 2 Example 3 Comparative Example 1 Film-forming ability medium good excellent none Conductivity generally good excellent none Defect control capabilities Acceptable good No obvious defects Serious defects Film density medium Higher Very high none

[0089] In Table 1, Example 1 uses only C4F8 gas, and can form a basic conductive film layer 50 containing a carbon-fluorine skeleton before etching. Although there is no heteroatom doping, it still has certain sidewall protection and anti-electron accumulation capabilities, the film density is relatively ordinary, and the defect control capability is within an acceptable range. After adding CH2F2 gas and CHF3 gas in Example 2, CH2F2 provides H groups, which improves the electron migration channel of the conductive film layer 50, and CHF3 enhances the film density of the conductive film and improves the plasma deposition uniformity. Although there is no doping of N elements, the overall film quality is significantly better than that of Example 1. After adding NH3 gas on the basis of Example 2, Example 3 further improves the electron mobility, conductivity and film density, and eliminates defects such as bow and notching. Comparative Example 1 does not deposit a conductive film layer 50, and the defects are extremely serious.

[0090] At this point, those skilled in the art will recognize that, although a number of exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications consistent with the principles of the present invention may be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be understood and deemed to cover all such other variations or modifications.

Claims

1. A method for preparing a patterned thin film structure, characterized in that: The following steps are involved: Providing a Si substrate; Depositing an etch stop layer and a dielectric layer in sequence on the Si substrate; forming a photoresist pattern and a conductive film layer on the dielectric layer; The conductive film layer, the photoresist pattern and the dielectric layer are etched using the photoresist pattern as a mask to form a pattern identical to the photoresist pattern on the dielectric layer. The etching rates of the photoresist pattern, the dielectric layer and the conductive film layer are the same.

2. The preparation method according to claim 1, characterized in that The step of forming a photoresist pattern and a conductive film layer on the dielectric layer specifically includes: Coating photoresist on the dielectric layer and forming the photoresist pattern by photolithography, wherein the photoresist pattern is a non-contour pattern; The conductive film layer is deposited on the photoresist pattern and in the area of the dielectric layer where the photoresist pattern is not formed.

3. The preparation method according to claim 1, characterized in that The step of forming a photoresist pattern and a conductive film layer on the dielectric layer specifically includes: depositing the conductive film layer on the dielectric layer; A photoresist is coated on the conductive film layer, and the photoresist pattern is formed by a photolithography process, wherein the photoresist pattern is a non-contour pattern.

4. The preparation method according to claim 1, characterized in that The thickness of the conductive film layer accounts for 5%-20% of the thickness of the photoresist pattern.

5. The preparation method according to claim 2, characterized in that The step of depositing a conductive film layer on the photoresist pattern and on an area of the dielectric layer where the photoresist pattern is not formed specifically includes: A target gas is introduced into the etching chamber and excited into plasma to deposit the conductive film layer on the photoresist pattern and the area of the dielectric layer where the photoresist pattern is not formed. The conductive film layer is a conductive film layer containing carbon fluorine free radicals, and the target gas includes C4F8.

6. The preparation method according to claim 5, characterized in that The target gas also includes one or more of CH2F2 and CHF3.

7. The preparation method according to claim 6, characterized in that If the target gas includes C4F8 and CH2F2, the flow ratio of C4F8 to CH2F2 is in the range of 2:1-3:1; If the target gas includes C4F8 and CHF3, the flow ratio of C4F8 to CHF3 is in the range of 2:1-4:1; If the target gas includes C4F8, CHF3 and CH2F2, the flow ratio of C4F8, CHF3 and CH2F2 ranges from 4:2:1 to 6:3:

2.

8. The preparation method according to any one of claims 5 to 7, characterized in that A target gas is introduced into the etching chamber and excited into plasma, so that during the step of depositing the conductive film layer in the photoresist pattern and the area of the dielectric layer where the photoresist pattern is not formed, a heteroatom gas is introduced to form a conductive film layer co-doped with carbon-fluorine free radicals and heteroatoms.

9. The preparation method according to claim 8, characterized in that The heteroatom gas includes one or more of N2, NO and NH3.

10. The preparation method according to claim 8, characterized in that The flow ratio of the target gas to the heteroatom gas is in the range of 6:1-10:1.

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