Quick response low dropout linear regulator with self-adaptive current control function

Abstract

The invention provides a quick response low dropout linear regulator with current adaptive control. The quick response low dropout linear regulator comprises a first-stage circuit, a second-stage circuit and an output-stage circuit which are connected in sequence, the first-stage circuit is used for comparing a reference voltage VREF1 with a feedback voltage, amplifying a generated error signal and providing a control signal for the subsequent second-stage and output-stage circuits; the second-stage circuit is used for adjusting the output current through the current self-adaptive control circuit according to the load change so as to shorten the loop response time and reduce the output voltage fluctuation during load switching; and the output stage circuit is used for outputting stable voltage to a load and providing required current so as to realize direct driving of the load. By means of three-stage linkage of error accurate amplification, current self-adaptive adjustment and power tube quick response, the voltage stabilizer is at the load jump edge, the voltage fluctuation amplitude is reduced, the recovery time compression is reduced, and the high-speed transient response level can be achieved.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuit design, and in particular relates to a fast-response low-voltage-difference linear regulator with current adaptive control. Background Art

[0002] With the rapid development of technology, portable electronic devices are becoming increasingly important in our daily lives and work, driving the diversification of power supply solutions. Low-dropout linear regulators (LDOs), as a common step-down chip, are widely used in small electronic devices, especially in systems on a chip (SoCs). LDOs are highly favored for their excellent noise performance and ease of integration.

[0003] A typical LDO structure is as follows Figure 1 As shown, the LDO circuit includes the first, second, and output stages. IB1, IB2, and IB3 are current sources, while VREF and VB are reference voltages. MP is the power transistor that supplies current to the output (load). When the load current changes, the entire LDO loop controls the output current of the power transistor by adjusting the voltage at the MP gate (point A).

[0004] When the output switches from heavy load (large output current) to light load (small output current), the loop composed of M11-M15-M21-M22-M23-MP takes a certain amount of time to respond, causing the output voltage VOUT to overshoot. Figure 2 shown.

[0005] The magnitude of the output voltage overshoot is related to the loop's response time. This loop response time is related to the parasitic capacitance at point A and the charge / discharge current at point A. To reduce the output VOUT overshoot voltage, the current in IB3 needs to be increased, which increases the overall LDO's quiescent power consumption and reduces power conversion efficiency. Summary of the Invention

[0006] In order to solve the problems existing in the background technology, the present invention provides a fast-response low-voltage difference linear regulator with current adaptive control, comprising: a first-stage circuit, a second-stage circuit and an output-stage circuit connected in sequence; the first-stage circuit is used to compare a reference voltage VREF1 with a feedback voltage, and amplify the generated error signal to provide a control signal for subsequent second-stage and output-stage circuits; the second-stage circuit is used to adjust the output current according to load changes through a current adaptive control circuit, so as to shorten the loop response time and reduce the output voltage fluctuation during load switching; the output-stage circuit is used to output a stable voltage to the load and provide the required current to achieve direct drive of the load.

[0007] The present invention has at least the following beneficial effects

[0008] By leveraging the three-stage linkage of “precise error amplification → adaptive current regulation → fast power tube response”, the voltage regulator can reduce the voltage fluctuation amplitude and shorten the recovery time under the load jump edge, thereby achieving a fast transient response level. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is a schematic diagram of the circuit structure of a traditional LDO;

[0010] Figure 2 This is a schematic diagram of a traditional LDO experiencing overshoot;

[0011] Figure 3 Schematic diagram of the circuit structure of the present invention;

[0012] Figure 4 Schematic diagram of the simulation of the present invention. DETAILED DESCRIPTION

[0013] The following describes the embodiments of the present invention by means of specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0014] See also Figure 3 The present invention provides a fast-response low-dropout linear regulator with current adaptive control, comprising a first-stage circuit, a second-stage circuit, and an output-stage circuit connected in sequence; the first-stage circuit is used to compare a reference voltage VREF1 with a feedback voltage, and amplify the generated error signal to provide a control signal for subsequent second-stage and output-stage circuits; the second-stage circuit is used to adjust the output current according to load changes through a current adaptive control circuit, so as to shorten the loop response time and reduce the output voltage fluctuation during load switching; the output-stage circuit is used to output a stable voltage to the load and provide the required current to achieve direct drive of the load.

[0015] Preferably, the first-stage circuit includes: a current source IB2 and an N-channel MOS transistor M15; the positive electrode of the current source IB2 is connected to the VIN terminal; the negative electrode of the current source IB2, the control signal input terminal of the second-stage circuit and the drain of M15 are connected to the feedback voltage terminal; a capacitor Cm is connected between the feedback voltage terminal and the output voltage terminal VOUT; the gate of M15 is connected to the reference voltage VREF1; and the source of M15 is connected to the control signal input terminal of the output-stage circuit.

[0016] Preferably, the second-stage circuit includes: a P-channel MOS transistor M21, a resistor R1, and N-channel MOS transistors M22, M23, M24, and M25; the gate of M21 is connected to the control signal input terminal of the second-stage circuit; the source of M21 is connected to the VIN terminal; the drain of M21, the drain of M22, the gate of M22, the gate of M23, and the gate of M24 are connected; the source of M22, the source of M23, and the source of M24 are grounded GND; the drain of M23, one end of the resistor R1, and the gate of M25 are connected; the other end of the resistor R1 and the drain of M25 are connected to the VIN terminal; the source of M25 and the drain of M24 are connected to the regulation control terminal of the output-stage circuit.

[0017] Preferably, the output stage circuit includes: a current source IB1, and P-channel MOS transistors MP and M11; the negative electrode of the current source IB1 is connected to GND; the positive electrode of the current source IB1 and the drain of M11 are connected to the control signal input terminal of the output stage circuit; the gate of M11 is connected to the reference voltage VREF2; the source of M11 and the drain of MP are connected to the output voltage terminal VOUT; the gate of MP is connected to the regulation control terminal of the output stage circuit; and the source of MP is connected to the VIN terminal.

[0018] Preferably, when the output of the fast-response low-dropout linear regulator switches from a heavy load to a light load, the gate charging current of the transistor MP satisfies the formula:

[0019]

[0020] Among them, μ N is the N-type carrier migration velocity, C OX is the gate oxide thickness of transistor M25, V TH is the threshold voltage of transistor M25; W and L are the channel width and length of transistor M25 respectively; V A is the gate voltage of transistor MP before switching; i charge represents the gate current of transistor MP;

[0021] By properly designing the size of M25, a larger gate current i of transistor MP can be obtained. charge , improve the charging capacity of the gate capacitance, shorten the loop response time, and reduce the output voltage fluctuation during load switching.

[0022] Preferably, the static current I of the resistor R1 in the current adaptive control circuit is Q for:

[0023]

[0024] Among them, V GS,MPis the gate-source voltage of the power tube MP; V GS,25 is the gate-source voltage of transistor M25; the quiescent current is reduced by designing the value of resistor R1.

[0025] In this embodiment, the fast response low voltage drop linear regulator of current adaptive control is as follows Figure 3 As shown in the figure, when the output switches from heavy load (large output current) to light load (small output current), the gate charging current i charge It can be calculated as:

[0026]

[0027] Among them, μ N is the N-type carrier migration velocity, C OX is the gate oxide thickness of transistor M25, V TH is the threshold voltage of transistor M25; W and L are the channel width and length of transistor M25 respectively; V A is the gate voltage of transistor MP before switching (voltage at point A); i charge Represents the gate current of transistor MP (the charging current i charge ); By reasonably designing the size of M25, a larger gate current i of transistor MP can be obtained. charge , improve the charging capacity of the gate capacitance, shorten the loop response time, and reduce the output voltage fluctuation during load switching.

[0028] The static current I of the resistor R1 in the current adaptive control circuit at static time Q for:

[0029]

[0030] Among them, V GS,MP is the gate-source voltage of the power tube MP; V GS,25 is the gate-source voltage of transistor M25; the quiescent current can be reduced by designing the value of resistor R1; by designing the value of R1, the quiescent current can be reduced, because V GS,MP It is related to the output current, so the quiescent current of the current adaptive control circuit can also adaptively change with the change of the load current.

[0031] In summary, the current adaptive control circuit achieves high transient charge and discharge capabilities while achieving low quiescent current, shortens the loop response time, and reduces output voltage fluctuations during load switching.

[0032] In order to verify the effect of the present invention, Figure 3 The circuit shown is simulated and verified using a 0.18μm CMOS process. Figure 4The response process of LDOs with and without current adaptive control circuits to transient load changes is demonstrated. When the load current jumps from 1mA to 50mA with an edge time of 300ns, the undershoot voltage of the LDO with current adaptive control circuit drops from 158mV to 26.2mV, and the recovery time is less than 1μs. When the load current jumps from 50mA to 1mA, the overshoot voltage of the LDO with current adaptive control circuit drops from 223.8mV to 34.6mV, and the recovery time is also less than 1μs. In summary, the LDO of the present invention achieves high transient charge and discharge capabilities while achieving low quiescent current, shortens the loop response time, and reduces output voltage fluctuations during load switching.

[0033] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.

Claims

1. A fast response low voltage dropout linear regulator with current adaptive control, characterized in that: It includes a first-stage circuit, a second-stage circuit and an output-stage circuit connected in sequence; the first-stage circuit is used to compare the reference voltage VREF1 with the feedback voltage, and amplify the generated error signal to provide a control signal for the subsequent second-stage and output-stage circuits; the second-stage circuit is used to adjust the output current according to load changes through a current adaptive control circuit to shorten the loop response time and reduce the output voltage fluctuation during load switching; the output-stage circuit is used to output a stable voltage to the load and provide the required current to achieve direct drive of the load.

2. The fast response low dropout linear regulator with current adaptive control according to claim 1, characterized in that: The first-stage circuit includes: a current source IB2 and an N-channel MOS transistor M15; the positive electrode of the current source IB2 is connected to the VIN terminal; the negative electrode of the current source IB2, the control signal input terminal of the second-stage circuit and the drain of M15 are connected to the feedback voltage terminal; a capacitor Cm is connected between the feedback voltage terminal and the output voltage terminal VOUT; the gate of M15 is connected to the reference voltage VREF1; and the source of M15 is connected to the control signal input terminal of the output-stage circuit.

3. The fast response low dropout linear regulator with current adaptive control according to claim 1, characterized in that: The second-stage circuit includes: a P-channel MOS transistor M21, a resistor R1, and N-channel MOS transistors M22, M23, M24, and M25; the gate of M21 is connected to the control signal input terminal of the second-stage circuit; the source of M21 is connected to the VIN terminal; the drain of M21, the drain of M22, the gate of M22, the gate of M23, and the gate of M24 are connected; the source of M22, the source of M23, and the source of M24 are grounded GND; the drain of M23, one end of the resistor R1, and the gate of M25 are connected; the other end of the resistor R1 and the drain of M25 are connected to the VIN terminal; the source of M25 and the drain of M24 are connected to the regulation control terminal of the output-stage circuit.

4. The fast response low voltage dropout linear regulator with current adaptive control according to claim 3, characterized in that: The output stage circuit includes: a current source IB1, and P-channel MOS transistors MP and M11; the negative electrode of the current source IB1 is connected to GND; the positive electrode of the current source IB1 and the drain of M11 are connected to the control signal input terminal of the output stage circuit; the gate of M11 is connected to the reference voltage VREF2; the source of M11 and the drain of MP are connected to the output voltage terminal VOUT; the gate of MP is connected to the regulation control terminal of the output stage circuit; and the source of MP is connected to the VIN terminal.

5. The fast response low voltage dropout linear regulator with current adaptive control according to claim 4, characterized in that: When the output of the fast-response low-dropout linear regulator switches from heavy load to light load, the gate charging current of transistor MP is: Among them, μ N is the N-type carrier migration velocity, C OX is the gate oxide thickness of transistor M25, V TH is the threshold voltage of transistor M25; W and L are the channel width and length of transistor M25 respectively; i charge Represents the gate charging current of transistor MP; V A is the gate voltage of transistor MP before switching. By properly designing the size of M25, a larger gate charging current i can be obtained. charge , improve the charging capacity of the gate capacitance, shorten the loop response time, and reduce the output voltage fluctuation during load switching.

6. The fast response low dropout linear regulator with current adaptive control according to claim 4, characterized in that: The static current I of the resistor R1 in the current adaptive control circuit at static time Q for: Among them, V GS,MP is the gate-source voltage of the power tube MP; V GS,25 is the gate-source voltage of transistor M25; the quiescent current is reduced by designing the value of resistor R1.

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