Solid-state hard drive read and write acceleration method and system based on high-speed interface

Abstract

The present invention relates to the field of solid-state storage technology, and discloses a method and system for accelerating the read and write performance of solid-state hard disks (SSDs) based on a high-speed interface. The method comprises: first obtaining initial interface parameters to determine the read and write bandwidth threshold, analyzing the transmission mode and channel allocation, then analyzing the hierarchical response based on queue status, latency index, and other factors, differentiating read and write scenarios to evaluate the load index and calculate the transmission load value; then optimizing the transmission path and the number of data items and calculating the optimization ratio; and finally reorganizing the topological path, identifying congested nodes, collecting cache vectors, and formulating a read and write differential acceleration strategy. The present invention can improve the read and write speed of SSDs using high-speed interfaces.

Description

Technical Field

[0001] The present invention relates to a solid-state hard disk read and write acceleration method and system based on a high-speed interface, belonging to the technical field of solid-state storage. Background Art

[0002] Solid-state drives (SSDs) are storage devices that use flash memory as their storage medium. They offer advantages such as fast read and write speeds, strong shock resistance, and low power consumption. They are widely used in data centers, high-performance computing, and other fields. However, with the popularization of high-speed interfaces such as PCIe Gen4 / Gen5, the read and write performance of SSDs is limited by factors such as interface protocol overhead and command queue management efficiency, making it difficult to fully utilize the bandwidth potential of high-speed interfaces.

[0003] Currently, static command scheduling or fixed-size read / write cache strategies are mostly used to accelerate SSD reads and writes, and predefined rules are used to improve throughput. However, such methods are difficult to adapt to dynamic load changes and have problems such as high protocol layer latency and insufficient parallelism, resulting in low interface bandwidth utilization (usually less than 70%). In particular, performance degrades significantly in random small data block read and write scenarios. Therefore, a SSD read / write acceleration method based on a high-speed interface is needed to improve the read and write speed of SSDs under high-speed interfaces. Summary of the Invention

[0004] The present invention provides a solid-state hard disk read and write acceleration method and system based on a high-speed interface, the main purpose of which is to improve the read and write speed of the solid-state hard disk under the high-speed interface.

[0005] To achieve the above objectives, the present invention provides a solid-state hard disk read and write acceleration method based on a high-speed interface, comprising:

[0006] Obtaining initial interface parameters of a high-speed interface corresponding to the solid-state drive, determining a read / write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyzing a transmission mode corresponding to the read / write bandwidth threshold, and querying a channel allocation ratio under the transmission mode;

[0007] Analyzing a read / write queue status corresponding to the solid-state drive based on the channel allocation ratio, querying a delay sensitivity index corresponding to the read / write queue status, and detecting a tier response characteristic corresponding to each storage tier in the solid-state drive based on the delay sensitivity index;

[0008] Based on the hierarchical response characteristics, analyzing the read and write scenarios corresponding to the solid-state drive, collecting the read rate and write rate in the read and write scenarios respectively, and comprehensively evaluating the read and write load indexes corresponding to the read and write rates, and calculating the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load indexes;

[0009] determining an optimized transmission path corresponding to the solid-state drive based on the transmission load value, detecting a path delay item corresponding to the optimized transmission path, optimizing an amount of transmitted data items of the solid-state drive during data transmission based on the path delay item, and calculating a transmission optimization ratio corresponding to the amount of transmitted data items;

[0010] Based on the transmission optimization ratio, the data topology path corresponding to the solid-state drive is reorganized, the access congested nodes in the data topology path are identified, and the node cache vectors corresponding to the access congested nodes are collected. Based on the node cache vectors, a read and write differential acceleration strategy for the solid-state drive under a high-speed interface is formulated.

[0011] Optionally, determining a read / write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters includes:

[0012] Querying the interface parameter protocol corresponding to the initial interface parameters;

[0013] parsing a communication support range corresponding to the solid-state drive based on the interface parameter protocol;

[0014] Analyzing the read and write bandwidth extremes corresponding to the solid-state drive according to the communication support range;

[0015] Based on the read / write bandwidth extreme value, setting an actual read / write upper limit corresponding to the solid-state drive;

[0016] Determine a read / write bandwidth threshold corresponding to the solid-state drive based on the actual read / write upper limit.

[0017] Optionally, detecting the tier response characteristics corresponding to each storage tier in the solid-state drive based on the delay sensitivity index includes:

[0018] Analyze the index change trend corresponding to the delay sensitivity index;

[0019] Performing threshold division on the index change trend to obtain a trend change interval;

[0020] Determining, based on the trend change interval, an inter-layer response level corresponding to each storage layer in the solid-state drive;

[0021] Analyzing the layer response characteristics corresponding to the inter-layer response levels;

[0022] Based on the hierarchical response characteristics, hierarchical response features corresponding to each storage hierarchical level in the solid-state drive are detected.

[0023] Optionally, analyzing the read scenario and the write scenario corresponding to the solid-state drive based on the hierarchical response characteristics includes:

[0024] extracting a temporal operation mark from the hierarchical response feature;

[0025] Matching the timing operation mark with the read and write instructions in the solid-state drive to obtain an instruction association set;

[0026] Based on the instruction association set, dividing the read and write operation units corresponding to the solid-state hard disk;

[0027] Extracting high-frequency access nodes in the read-write operation unit;

[0028] Based on the high-frequency access nodes, the read scenarios and write scenarios corresponding to the solid-state drive are analyzed.

[0029] Optionally, calculating the transmission load value of the solid-state drive in a read-write scenario based on the read-write load index includes:

[0030] The following formula is used to calculate the transmission load value of the solid-state drive in the read and write scenarios:

[0031] ;

[0032] in, Indicates the transmission load value of the solid-state drive in the read and write scenarios, represents the sampling time period, Indicates the reading scene weight coefficient, Indicates the number of read operations in the read scenario. Indicates the read operation index in the read scenario. Indicates the The read operation weight corresponding to the read operation, Indicates the The read rate corresponding to the read operation, Indicates the writing scene weight coefficient, Indicates the number of read operations in the write scenario. Indicates the write operation index in the write scenario. Indicates the The write operation weight corresponding to the write operation, Indicates the The write rate of the write operation, represents the read and write load index, Indicates the read and write bandwidth threshold.

[0033] Optionally, determining the optimized transmission path corresponding to the solid-state drive based on the transmission load value includes:

[0034] Dividing the data transmission queue corresponding to the solid-state drive according to the transmission load value;

[0035] Screening a target transmission channel in the data transmission queue that meets a load threshold;

[0036] Querying the channel performance status corresponding to the target transmission channel;

[0037] Analyzing a state optimization factor corresponding to the channel performance state;

[0038] Based on the state optimization factor, an optimized transmission path corresponding to the solid state drive is determined.

[0039] Optionally, optimizing the amount of data items transmitted by the solid-state drive during data transmission based on the path delay item includes:

[0040] Analyzing a data transmission scenario corresponding to the path delay item;

[0041] Querying the scene interaction nodes in the data transmission scene;

[0042] Determining, based on the scenario interaction node, a core transmission link of the solid-state drive during data transmission;

[0043] locating a blocked data item in the core transmission link;

[0044] Based on the blocked data items, the amount of transmission data items of the solid state drive during data transmission is optimized.

[0045] Optionally, calculating the transmission optimization ratio corresponding to the amount of transmitted data items includes:

[0046] The transmission optimization ratio corresponding to the amount of transmitted data items is calculated using the following formula:

[0047] ;

[0048] in, represents the transmission optimization ratio corresponding to the amount of transmitted data items, Indicates the total number of stages of data transmission, Indicates the phase index of data transmission, Indicates the The read and write load index of each stage, Indicates the The actual path delay of data transmission in each stage, represents the average path delay of the entire transmission process, Indicates the The actual data flow transmitted in each stage.

[0049] Optionally, the reorganizing the data topology path corresponding to the solid-state drive based on the transmission optimization ratio includes:

[0050] parsing a data access threshold corresponding to the transmission optimization ratio;

[0051] Based on the data access frequency, traverse the index data blocks in the preset storage partition table;

[0052] Locating candidate storage units in the index data block that meet rate requirements;

[0053] Querying efficient access nodes in the candidate storage units;

[0054] Based on the efficient access node, the data topology path corresponding to the solid state drive is reorganized.

[0055] In order to solve the above problems, the present invention also provides a solid-state hard disk read and write acceleration system based on a high-speed interface, the system comprising:

[0056] A ratio query tool is used to obtain initial interface parameters of the high-speed interface corresponding to the solid-state drive, determine the read and write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyze the transmission mode corresponding to the read and write bandwidth threshold, and query the channel allocation ratio under the transmission mode;

[0057] a feature detection module, configured to analyze a read / write queue status corresponding to the solid-state drive based on the channel allocation ratio, query a delay sensitivity index corresponding to the read / write queue status, and detect a tier response feature corresponding to each storage tier in the solid-state drive based on the delay sensitivity index;

[0058] a load value calculation module, configured to analyze the read and write scenarios corresponding to the solid-state drive based on the hierarchical response characteristics, collect the read rate and write rate in the read and write scenarios respectively, and comprehensively evaluate the read and write load indexes corresponding to the read and write rates, and calculate the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load indexes;

[0059] an optimization ratio calculation module, configured to determine an optimized transmission path corresponding to the solid-state drive based on the transmission load value, detect a path delay item corresponding to the optimized transmission path, optimize an amount of transmitted data items of the solid-state drive during data transmission based on the path delay item, and calculate a transmission optimization ratio corresponding to the amount of transmitted data items;

[0060] A strategy formulation module is used to reorganize the data topology path corresponding to the solid-state drive based on the transmission optimization ratio, identify the access congested nodes in the data topology path, and collect the node cache vectors corresponding to the access congested nodes, and formulate a read and write differential acceleration strategy for the solid-state drive under a high-speed interface based on the node cache vectors.

[0061] Compared with the problems described in the background technology, the present invention can accurately locate the physical layer and protocol layer characteristics of the interface by obtaining the initial interface parameters of the high-speed interface corresponding to the solid-state hard disk, providing a basis for determining the actual available read and write bandwidth threshold, and then optimizing resource scheduling based on the transmission mode and channel allocation rules, laying a data foundation for dynamically adapting the load and improving the interface bandwidth utilization from the bottom layer. The present invention analyzes the read and write queue status corresponding to the solid-state hard disk based on the channel allocation ratio, and queries the delay sensitivity index corresponding to the read and write queue status. It can optimize the queue scheduling strategy according to the channel resource allocation characteristics to avoid queue congestion caused by channel load imbalance, and accurately identify the business scenario's tolerance to delay through the delay sensitivity index, thereby reducing the average response delay and improving the queue parallel processing efficiency. The present invention analyzes the read and write scenarios corresponding to the solid-state hard disk based on the hierarchical response characteristics, and can accurately identify the performance requirement differences under different operating modes (such as the read scenario to Delay-sensitive, write scenarios focus on throughput), and then dynamically adapt the storage layer resource allocation strategy to avoid performance loss caused by read / write load mismatch due to storage layer mismatch, thereby improving the overall read and write efficiency and response speed of the solid-state drive from the scenario dimension. Furthermore, based on the transmission load value, the present invention determines the optimized transmission path corresponding to the solid-state drive, which can accurately anchor the read and write pressure distribution, dynamically adjust the data flow logic, avoid channel congestion, and support intelligent load balancing, allowing the solid-state drive to maintain stable transmission performance in complex scenarios. From the path scheduling level, it optimizes the overall read and write experience and releases storage potential. Finally, based on the transmission optimization ratio, the present invention reorganizes the data topology path corresponding to the solid-state drive. According to the quantitative efficiency improvement index, the link structure and data flow direction can be accurately adjusted to break through the performance bottleneck of the original path. At the same time, it provides direction for continuous iterative optimization of the storage architecture and enhances the data scheduling flexibility and overall transmission efficiency of the solid-state drive from the path reconstruction level. Therefore, the solid-state drive read and write acceleration method and system based on the high-speed interface provided by the embodiment of the present invention can improve the read and write speed of the solid-state drive under the high-speed interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 A flowchart of a method for accelerating read and write operations of a solid-state drive based on a high-speed interface is provided in accordance with an embodiment of the present invention;

[0063] Figure 2 A schematic diagram of the architecture of a read-write differential framework diagram in a solid-state hard disk read-write acceleration method based on a high-speed interface provided by one embodiment of the present invention;

[0064] Figure 3 A schematic diagram of a module for implementing a solid-state drive read / write acceleration system based on a high-speed interface provided by an embodiment of the present invention.

[0065] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION

[0066] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0067] The embodiment of the present application provides a solid-state hard disk read and write acceleration method based on a high-speed interface. The execution subject of the solid-state hard disk read and write acceleration method based on a high-speed interface includes but is not limited to at least one of the electronic devices such as a server, a terminal, etc. that can be configured to execute the method provided by the embodiment of the present application. In other words, the solid-state hard disk read and write acceleration method based on a high-speed interface can be executed by software or hardware installed on a terminal device or a server device. The server includes but is not limited to: a single server, a server cluster, a cloud server or a cloud server cluster, etc.

[0068] Example 1:

[0069] Reference Figure 1 FIG2 is a flow chart of a method for accelerating the read and write of a solid-state hard disk based on a high-speed interface according to an embodiment of the present invention. In this embodiment, the method for accelerating the read and write of a solid-state hard disk based on a high-speed interface includes:

[0070] S1. Obtain initial interface parameters of the high-speed interface corresponding to the solid-state drive, determine the read and write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyze the transmission mode corresponding to the read and write bandwidth threshold, and query the channel allocation ratio under the transmission mode.

[0071] By obtaining the initial interface parameters of the high-speed interface corresponding to the solid-state drive, the present invention can accurately locate the physical layer and protocol layer characteristics of the interface, provide a basis for determining the actual available read and write bandwidth thresholds, and then optimize resource scheduling based on the transmission mode and channel allocation rules, laying a data foundation for dynamically adapting the load and improving the interface bandwidth utilization from the bottom layer.

[0072] Among them, the solid-state drive refers to a storage device that uses flash memory (such as NAND Flash) as a storage medium, which has the advantages of fast reading and writing speeds and strong shock resistance. For example, an NVMe solid-state drive that supports the PCIe Gen4 interface has a theoretical sequential read speed of more than 3500MB / s, which is about 7 times faster than a traditional mechanical hard drive and is often used in high-performance computing or data center scenarios; the high-speed interface refers to a transmission interface with high bandwidth and low latency characteristics, such as PCIe Gen4 / Gen5, USB4, etc. Taking the PCIe Gen5 interface as an example, its single-channel bandwidth reaches 2GB / s, and the total bandwidth can reach 8GB / s under the x4 channel configuration, which can support the solid-state drive to achieve data transmission of several gigabytes per second and meet high-speed storage requirements; the initial interface parameters refer to the basic parameters of the high-speed interface at the physical layer and protocol layer, such as PCIe The initial parameters of the Gen4 interface include a clock frequency of 16 GHz, number of channels (e.g., x4), encoding mode (128b / 130b), TLP packet header size (32 bytes) and maximum payload unit (MTU) of the protocol layer. These parameters directly affect the theoretical bandwidth and actual efficiency of data transmission. Optionally, obtaining the initial interface parameters of the high-speed interface corresponding to the solid-state drive can be achieved by capturing the interface using a protocol analyzer, such as using a Keysight Infiniium oscilloscope in conjunction with a PCIe protocol analysis suite to decode the physical layer signal, thereby obtaining the initial interface parameters.

[0073] Furthermore, the present invention determines the read and write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, which can accurately eliminate the impact of interface protocol overhead (such as PCIe TLP header loss) on the theoretical bandwidth, and obtain a performance benchmark value close to the actual transmission capacity. At the same time, it can dynamically match storage load requirements based on the threshold, laying a data foundation for subsequent optimization of transmission paths and improvement of bandwidth utilization.

[0074] The read / write bandwidth threshold refers to the critical value of the read / write bandwidth for the safe and efficient operation of the solid-state drive, which is set based on the actual read / write upper limit and combined with system load, device life and other requirements. For example, for database scenarios with frequent random reads and writes, setting the read / write bandwidth threshold of the above-mentioned solid-state drive to 5000MB / s can not only ensure performance, but also avoid shortening the flash memory life due to continuous high load.

[0075] As an embodiment of the present invention, determining the read and write bandwidth threshold corresponding to the solid-state hard drive based on the initial interface parameters includes: querying the interface parameter protocol corresponding to the initial interface parameters; parsing the communication support range corresponding to the solid-state hard drive based on the interface parameter protocol; analyzing the read and write bandwidth extreme value corresponding to the solid-state hard drive based on the communication support range; setting the actual read and write upper limit corresponding to the solid-state hard drive based on the read and write bandwidth extreme value; and determining the read and write bandwidth threshold corresponding to the solid-state hard drive based on the actual read and write upper limit.

[0076] The interface parameter protocol refers to a protocol specification that defines high-speed interface data transmission rules, signal interaction mechanisms, and device communication standards. For example, the PCIe protocol specifies the packet format, transport layer protocol (TLP), link layer protocol (DLLP), etc. Taking the PCIe Gen4 protocol as an example, it adopts 128b / 130b encoding. Its encoding rules affect data transmission efficiency and are key protocol parameters to be considered when determining bandwidth. The communication support range refers to the range of data transmission conditions that can achieve stable communication between the solid-state drive and the host based on the interface parameter protocol, covering factors such as rate, data bit width, and transmission mode. For example, a solid-state drive that supports PCIe Gen4x4 has a communication support range that includes a maximum transmission rate of 32GT / s, a 64-bit data bit width, and supports transmission modes such as scatter / gather, which clearly defines the communication capability boundary between devices. The read and write bandwidth extremes refer to the theoretical maximum and minimum read and write bandwidths of the solid-state drive calculated based on the interface protocol and device characteristics under ideal lossless conditions. For example, PCIe Theoretically, a Gen5x4 interface solid-state drive has a maximum read bandwidth of 32GB / s (8GB / s × 4 channels). However, in practice, due to factors such as protocol overhead, the actual bandwidth will be lower than this maximum, which provides a reference boundary for subsequent evaluation. The actual read and write upper limit refers to the maximum read and write bandwidth that the solid-state drive can achieve under stable operating conditions, taking into account actual factors such as interface protocol overhead and device performance loss. For example, a PCIe Gen4 x4 solid-state drive has a theoretical maximum of 6400MB / s. Due to protocol header usage and flash memory erase and write delays, the actual read and write upper limit may drop to 5500MB / s, which is closer to actual operating performance.

[0077] Furthermore, querying the interface parameter protocol corresponding to the initial interface parameters can be implemented by a protocol specification parsing method, such as calling the JEDEC JESD220 standard document to match the register mapping relationship of the NVMe interface, thereby obtaining the interface parameter protocol; parsing the communication support range corresponding to the solid-state drive can be implemented by a link negotiation data analysis method, such as using a Teledyne LeCroy PCIe analyzer to capture the LTSSM state transition sequence during the link training phase, thereby obtaining the communication support range; analyzing the read and write bandwidth extremes corresponding to the solid-state drive can be implemented by a stress testing benchmark method, such as running the FIO performance testing tool in a 128KB sequential read and write mode to obtain the maximum IOPS value, thereby obtaining the read and write bandwidth extremes; setting the actual read and write upper limit corresponding to the solid-state drive can be implemented by a quality of service control method, such as using the Linux cgroup v2 subsystem to set a throttle current limiting policy for the blkio controller, thereby obtaining the actual read and write upper limit; determining the read and write bandwidth threshold corresponding to the solid-state drive can be implemented by a dynamic load evaluation method, such as deploying a Prometheus monitoring system to collect historical IOPS data and applying the 3σ principle to calculate the confidence interval, thereby obtaining the read and write bandwidth threshold.

[0078] By analyzing the transmission mode corresponding to the read / write bandwidth threshold and querying the channel allocation ratio under the transmission mode, the present invention can accurately match data transmission requirements with interface protocol characteristics, dynamically select the optimal transmission mode to reduce protocol overhead, avoid channel congestion and improve parallel transmission efficiency, and provide a quantitative basis for subsequent read / write queue management and delay sensitivity analysis, thereby laying a technical foundation for improving bandwidth utilization from the transport layer infrastructure level.

[0079] Among them, the transmission mode refers to the different protocol specifications and data organization methods adopted by the high-speed interface during the data transmission process, which is used to define the timing, format and interaction logic of data transmission. For example, the PCIe interface supports a mode that can transmit a large amount of data in a continuous clock cycle. For example, when transmitting a 1MB file, the burst transmission mode is completed through a continuous transmission with one address alignment, and the theoretical bandwidth utilization rate can reach more than 90%; it also supports the "scatter / gather" mode, which merges data with discontinuous addresses for transmission, which is suitable for random IO scenarios; the channel allocation ratio refers to the allocation ratio of data transmission resources between multiple physical channels in the high-speed interface, which is used to balance the load of each channel and improve the efficiency of parallel transmission. Taking the Gen4x4 interface as an example, the four physical channels (Lane0-Lane3) can allocate read and write traffic in different proportions, such as 60% for the read channel and 40% for the write channel, or dynamically adjusted to 50%:50% according to the load. When the solid-state drive performs sequential writes, a reasonable channel allocation ratio can make the bandwidth utilization of the four channels reach more than 80%, avoiding single-channel congestion. Optionally, the analysis of the transmission mode corresponding to the read and write bandwidth thresholds can be implemented through a protocol state machine decoding method, such as using an Intel VTune performance analyzer to track the TLP packet type distribution of the PCIe transaction layer to obtain the transmission mode; the query of the channel allocation ratio under the transmission mode can be implemented through a link configuration parsing method, such as reading the LANE_CNT field in the PCIe device capability register exposed by the Linux kernel through the lspci command to obtain the channel allocation ratio.

[0080] S2. Based on the channel allocation ratio, analyze the read and write queue status corresponding to the solid-state drive, query the delay sensitivity index corresponding to the read and write queue status, and based on the delay sensitivity index, detect the level response characteristics corresponding to each storage level in the solid-state drive.

[0081] The present invention analyzes the read and write queue status corresponding to the solid-state drive based on the channel allocation ratio, and queries the delay sensitivity index corresponding to the read and write queue status. It can optimize the queue scheduling strategy according to the channel resource allocation characteristics to avoid queue congestion caused by channel load imbalance, and accurately identify the tolerance of business scenarios to delays through the delay sensitivity index, thereby reducing the average response delay and improving the queue parallel processing efficiency.

[0082] Among them, the read and write queue status refers to the real-time operating status of the read and write command queue inside the solid-state drive, including parameters such as queue depth, command waiting time, empty and full status, and command type distribution. For example, if the read and write queue depth of the NVMe solid-state drive is configured to 64, the current read queue has a backlog of 50 random read commands, with 14 vacancies remaining, and the write queue has a backlog of 30 sequential write commands. The average waiting delay of the queue is 20μs, reflecting that the current read load is higher than the write load. The delay sensitivity index refers to a numerical indicator that quantifies the tolerance of the business scenario to data transmission delay. The higher the value, the more sensitive it is to delay. For example, the database query business of the online trading system requires a response delay of less than 500μs, and its delay sensitivity index is set to 85; and the big data batch backup service allows a delay within 10ms, and the index is set to 30. The index is used to guide the queue scheduling strategy, and prioritizes the allocation of channel resources to high-index services to reduce delays. Optionally, the analysis of the read and write queue status corresponding to the solid-state drive can be implemented through the NVMe protocol monitoring method, such as: using the blktrace tool to capture the IO request queue depth change curve of the block device layer, thereby obtaining the read and write queue status; the query of the delay sensitivity index corresponding to the read and write queue status can be implemented through a percentile statistical algorithm, such as: using the Prometheus monitoring system to collect 99th percentile delay data and applying an exponentially weighted moving average model to obtain a delay sensitivity index.

[0083] Furthermore, based on the delay sensitivity index, the present invention detects the hierarchical response characteristics corresponding to each storage layer in the solid-state drive, and can accurately locate the storage layer adapted for high-delay-sensitive services (such as SLC cache) and the layer adapted for low-delay-sensitive services (such as TLC flash memory), thereby achieving dynamic matching of business requirements and storage characteristics, and improving the overall response efficiency of the solid-state drive from the storage architecture level.

[0084] Among them, the hierarchical response characteristics refer to key performance indicators extracted based on the hierarchical response characteristics, which are used to characterize the responsiveness of the storage hierarchy to the delay sensitivity index. For example, the response characteristics of the SLC hierarchy are low latency (<20μs) and high throughput (>1800MB / s), which is suitable for high-sensitivity index services; the characteristics of the QLC hierarchy are high latency (>100μs) and low throughput (<800MB / s), which is suitable for low-sensitivity index services.

[0085] As an embodiment of the present invention, the layer response characteristics corresponding to each storage layer in the solid-state hard disk are detected based on the delay sensitivity index, including: parsing the exponential change trend corresponding to the delay sensitivity index; performing threshold division on the exponential change trend to obtain a trend change interval; determining the inter-layer response level corresponding to each storage layer in the solid-state hard disk based on the trend change interval; analyzing the layer response characteristics corresponding to the inter-layer response level; and detecting the layer response characteristics corresponding to each storage layer in the solid-state hard disk based on the layer response characteristics.

[0086] Among them, the index change trend refers to the dynamic trend of the delay sensitivity index as the business load, time or data volume changes, reflecting the fluctuation of the business's sensitivity to delay. For example, during the promotion period of an e-commerce platform, the delay sensitivity index of the database query business gradually increased from the usual 70 to a peak of 85, showing an increasing trend with the increase in access volume, indicating that the business's tolerance for delay decreases with the increase in load; the trend change interval refers to the different level intervals obtained after the index change trend is divided by threshold value, which is used to define the range of delay sensitivity. For example, the delay sensitivity index is divided into: >80 is a high sensitivity interval (such as real-time trading system), 50-80 is a medium sensitivity interval (such as video streaming), and <50 is a low sensitivity interval (such as batch data backup). Each interval corresponds to a different storage level. Scheduling strategy; the inter-layer response level refers to the response priority level set for each storage layer of the solid-state drive according to the trend change interval. For example, in the high-sensitivity interval (index > 80), the response level of the SLC cache layer is set to level 1 (highest priority), and the TLC flash memory layer is set to level 2; in the medium-sensitivity interval, the SLC response level is reduced to level 2 and the TLC is increased to level 1, ensuring that resources are tilted towards high-sensitivity services; the layer response characteristics refer to the performance parameters of each storage layer at different latency sensitivity levels, including read and write latency, throughput, IOPS, etc. For example, when the SLC cache layer is at a high response level, the read latency is about 10μs and the throughput is 2000MB / s, while when the TLC flash memory layer is at a medium response level, the read latency is 50μs and the throughput is 1500MB / s, reflecting the performance differences between different layers.

[0087] Furthermore, the analysis of the exponential change trend corresponding to the delay sensitivity index can be achieved through a time series prediction method, such as: using the Facebook Prophet algorithm to perform seasonal decomposition and trend fitting on historical delay data, thereby obtaining an exponential change trend; the threshold division of the exponential change trend can be achieved through a dynamic clustering analysis method, such as: applying the DBSCAN density clustering algorithm to identify the inflection point distribution interval of the delay mutation, thereby obtaining a trend change interval; the determination of the inter-layer response level corresponding to each storage layer in the solid-state drive can be achieved through a storage medium performance calibration method, such as: using the FIO benchmark tool to measure the 4K random read and write delay gradients of the SLC cache, TLC main memory and QLC cold data respectively, thereby obtaining the inter-layer response level; the analysis of the hierarchical response characteristics corresponding to the inter-layer response level can be achieved through a response surface modeling method, such as: constructing a mixed effect model based on R language to quantify the delay elasticity coefficient of each level of storage under different IO pressures, thereby obtaining the hierarchical response characteristics; the detection of the hierarchical response characteristics corresponding to each storage layer in the solid-state drive can be achieved through a hardware performance probe method, such as: through Intel The PCM tool monitors the CacheMiss events and Prefetch hit rate change curves of storage media at all levels to obtain hierarchical response characteristics.

[0088] S3. Based on the hierarchical response characteristics, analyze the read scenarios and write scenarios corresponding to the solid-state drive, collect the read rate and write rate in the read scenario and the write scenario respectively, and comprehensively evaluate the read and write load indexes corresponding to the read rate and the write rate. Based on the read and write load indexes, calculate the transmission load value of the solid-state drive in the read and write scenarios.

[0089] Based on the hierarchical response characteristics, the present invention analyzes the read scenarios and write scenarios corresponding to the solid-state drive, and can accurately identify the differences in performance requirements under different operating modes (such as read scenarios are sensitive to latency, and write scenarios focus on throughput), and then dynamically adapt the storage hierarchical resource allocation strategy to avoid performance loss of read / write loads caused by storage hierarchical mismatch, thereby improving the overall read and write efficiency and response speed of the solid-state drive from the scenario dimension.

[0090] Among them, the read scenario refers to a data access mode dominated by read operations, which has specific access characteristics and performance requirements. For example, the read scenario of online video playback is characterized by sequential reads, large single read volume (such as 4MB / time), and high tolerance for delay (acceptable 50ms delay). Its read instruction ratio is greater than 95%, and the read bandwidth requirement is stable at 200MB / s; the write scenario refers to a data access mode dominated by write operations, which has unique performance sensitivity points. For example, the write scenario of IoT device data collection is characterized by random writes, small single write volume (such as 1KB / time), and sensitivity to delay (requires <10ms). Its write instruction ratio is greater than 80%, the IOPS requirement reaches 10,000 times / second, and high write durability is required.

[0091] As an embodiment of the present invention, the analysis of the read scenarios and write scenarios corresponding to the solid-state drive based on the hierarchical response characteristics includes: extracting the timing operation marks in the hierarchical response characteristics; matching the timing operation marks with the read and write instructions in the solid-state drive to obtain an instruction association set; dividing the read and write operation units corresponding to the solid-state drive based on the instruction association set; extracting high-frequency access nodes in the read and write operation units; and analyzing the read scenarios and write scenarios corresponding to the solid-state drive based on the high-frequency access nodes.

[0092] Among them, the timing operation mark refers to a parameter set used to identify the time characteristics of storage-level operations, including information such as the order of operation execution, time interval, and duration. For example, in the NVMe protocol, the read operation is marked as READ CMD, and its timestamp sequence shows that the interval between two adjacent read commands is 50μs and the duration is 100μs. These marks are used to distinguish the timing characteristics of read and write operations; the instruction association set refers to a mapping relationship set formed by matching the timing operation mark with the read and write instructions, which is used to identify the logical association between instructions. For example, when a WRITE CMD is detected followed by a FLUSH CMD, and the time interval is less than 20μs, the two instructions are associated as a write commit operation group. The association set records such patterned instruction combinations and their frequency of occurrence; the read and write operation unit refers to a minimum operation set with complete business logic divided based on the instruction association set, which contains a continuous read and write instruction sequence, for example, "read index → ​​write data → read check" in a database transaction. A read-write operation unit is formed, which contains 3 read instructions and 1 write instruction. The division of the operation unit is used to analyze the actual storage performance requirements of the business logic; the high-frequency access node refers to the data storage location that is frequently accessed in the read-write operation unit, which usually corresponds to hot data or indexes. For example, the product inventory table of an e-commerce system is accessed 200 times within 100ms, and its storage address 0x1000-0x10FF is a high-frequency access node with an access frequency of 2000 times / second, which is much higher than other data blocks.

[0093] Furthermore, the extraction of timing operation marks in the hierarchical response features can be achieved through an event sequence mining method, such as: applying the PrefixSpan algorithm to perform frequent pattern mining on the storage access log to obtain timing operation marks; the matching of the timing operation marks with the read and write instructions in the solid-state drive can be achieved through an instruction stream association analysis method, such as: using a dynamic time warping algorithm to calculate the similarity matrix between the NVMe command queue and the physical page access sequence to obtain an instruction association set; the division of the read and write operation units corresponding to the solid-state drive can be achieved through an IO request clustering method, such as: using a K-means algorithm based on the LBA access range and time interval features. The requests are grouped to obtain read and write operation units; the extraction of high-frequency access nodes in the read and write operation units can be achieved through a heat statistics algorithm, such as: building an LFU cache elimination policy monitoring model to count the access frequency distribution of each logical block address, so as to obtain high-frequency access nodes; the analysis of the read scenario corresponding to the solid-state drive can be achieved through a read amplification effect modeling method, such as: predicting the effective read throughput change curve under different prefetch strategies based on the Markov chain, so as to obtain a read scenario; the analysis of the write scenario corresponding to the solid-state drive can be achieved through a write stress testing method, such as: simulating the wear balance change trend of the FTL conversion layer under mixed loads through the FIO tool, so as to obtain a write scenario.

[0094] The present invention collects the read rate and write rate in the read scenario and the write scenario respectively, and comprehensively evaluates the read and write load indexes corresponding to the read rate and the write rate. It can accurately quantify the dynamic load characteristics under different operating modes, identify high-frequency and inefficient scenarios such as random small data block reading and writing, lay a data foundation for subsequent transmission load calculation and optimization strategy formulation, and improve the load adaptability and resource utilization of solid-state drives from the performance evaluation level.

[0095] Among them, the read rate refers to the speed at which the solid-state drive reads data from the storage medium per unit time, usually in bytes per second (B / s) or input and output operations per second (IOPS), reflecting the performance of the read operation. For example, if the NVMe solid-state drive with a PCIe Gen4x4 interface has a read rate of up to 3500MB / s in a sequential read scenario, and a read rate of about 700,000IOPS in a 4KB random read scenario, reflecting the difference in read performance in different scenarios; the write rate refers to the speed at which the solid-state drive writes data to the storage medium per unit time, also in bytes per second or IOPS, to measure the efficiency of the write operation. For example, the above-mentioned PCIe The write rate of a Gen4 solid-state drive in a sequential write scenario is 3000MB / s, while the write rate in a 4KB random write scenario is about 200,000 IOPS. Affected by the flash memory erase and write mechanism, the random write rate is usually lower than the sequential write rate. The read-write load index refers to a numerical indicator that quantifies the actual load pressure of the solid-state drive by comprehensively considering factors such as read rate, write rate, data block size, and access mode (random / sequential). For example, if in a database scenario, the read rate is 2000MB / s (sequential read accounts for 60%), the write rate is 1500MB / s (random write accounts for 40%), and the 4KB small data block accounts for 70%, the read-write load index is calculated to be 75. The higher the value, the more stringent the load requirements on performance. The collection of the read rate in the read scenario can be achieved through a storage benchmark test method, such as: using the CrystalDiskMark tool to perform a 128KB sequential read test and recording the average transmission bandwidth to obtain the read rate; the collection of the write rate in the write scenario can be achieved through a persistent stress test method, such as: configuring a 4-thread 64-queue depth random write mode through the fio workload simulator to count the steady-state IOPS, thereby obtaining the write rate; the comprehensive evaluation of the read and write load index corresponding to the read rate and the write rate can be achieved through a hybrid load balancing algorithm, such as: applying the entropy weight method to calculate the weighted comprehensive score of the read / write bandwidth occupancy and delay sensitivity, thereby obtaining the read and write load index.

[0096] Furthermore, the present invention calculates the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load index, and can combine the dynamic load pressure with the interface bandwidth threshold to quantify the degree of resource occupancy during the actual transmission process. At the same time, it provides data support for subsequent optimization of transmission paths and formulation of differential acceleration strategies, thereby improving transmission efficiency and resource utilization under high-speed interfaces from the load quantification level.

[0097] Among them, the transmission load value refers to the operation characteristics, rate and load index under the comprehensive read and write scenarios. It is a quantitative indicator calculated by integration and weighting, reflecting the resource pressure of the solid-state drive when transmitting data within the sampling period. It integrates the dynamic changes of read / write operations and reflects the actual load occupancy of the interface and flash memory channel. It is used to evaluate transmission efficiency and performance bottlenecks. The higher the value, the greater the transmission pressure.

[0098] As an embodiment of the present invention, the calculating, based on the read / write load index, the transmission load value of the solid-state drive in a read / write scenario includes:

[0099] The following formula is used to calculate the transmission load value of the solid-state drive in the read and write scenarios:

[0100] ;

[0101] in, Indicates the transmission load value of the solid-state drive in the read and write scenarios, represents the sampling time period, Indicates the reading scene weight coefficient, Indicates the number of read operations in the read scenario. Indicates the read operation index in the read scenario. Indicates the The read operation weight corresponding to the read operation, Indicates the The read rate corresponding to the read operation, Indicates the writing scene weight coefficient, Indicates the number of read operations in the write scenario. Indicates the write operation index in the write scenario. Indicates the The write operation weight corresponding to the write operation, Indicates the The write rate of the write operation, represents the read and write load index, Indicates the read and write bandwidth threshold.

[0102] Specifically, the sampling time period refers to a selected continuous time interval used to collect dynamic data of read and write operations (such as rate and number of operations). It can be flexibly set according to the business scenario. For example, a short period of 100ms is selected for high-frequency database trading scenarios, and a long period of 1s is selected for monitoring scenarios. The average load within the period is calculated by integration to avoid interference from instantaneous fluctuations and ensure that the result fits the actual continuous load. The read scenario weight coefficient refers to the proportional value that distinguishes the degree of influence of read operations on the overall transmission load (0≤α≤1, and satisfies α+β=1 with the write scenario coefficient β). It is determined by the business type. For read-intensive businesses (such as video streaming), α is close to 1, and for mixed businesses (such as database transactions), α is adjusted according to the proportion of read operations (for example, if read accounts for 60%, α=0.6), which is used to accurately distribute the contribution of read operations to the total load. Weight; The read operation weight refers to the factors affecting the transmission load such as data block size and access mode (random / sequential) in the i-th read operation. For example, a 4KB random read has a higher weight than a 1MB sequential read due to complex addressing. It can be calculated as follows: weight = data block size × access mode coefficient (1.2 for random and 1 for sequential), reflecting the load differences of different read operations and making the correlation between rate and load more accurate. The read rate refers to the speed (bytes / second) at which the solid-state drive reads data from the flash memory per unit time in the i-th read operation. It is affected by the interface bandwidth, flash memory type (TLC / QLC), and data location (inside / outside the SLC cache). , the sequential read rate (such as 3500MB / s) is much higher than the random read rate (such as 2.8MB / s converted from 700,000IOPS), which directly reflects the performance of the read operation; the write scenario weight coefficient refers to the proportional value that distinguishes the degree of influence of the write operation on the overall transmission load (0≤β≤1, and the read scenario coefficient α satisfies α+β=1), which is determined by the proportion of business write operations. For write-intensive businesses (such as log storage), β is close to 1, and mixed businesses are adjusted according to the proportion of write operations (such as β=0.4 if write accounts for 40%), which is used to accurately allocate the contribution weight of write operations to the total load; the write operation weight refers to the data block size, write The impact of the write mechanism (synchronous / asynchronous) on the transmission load is analyzed. For example, a 1KB random write has a higher weight than a 4MB sequential write due to the need to frequently erase flash pages. The weight can be calculated as follows: data block size × write mechanism coefficient (1.5 for synchronous and 1 for asynchronous), reflecting the load differences between different write operations and making the correlation between write rate and load more accurate. The write rate refers to the speed (in bytes / second) at which the SSD writes data to the flash memory per unit time during the jth write operation. Due to the limitations of the flash memory's erase and write lifespan and SLC cache capacity, the sequential write rate (e.g., 3000MB / s) is higher than the random write rate (e.g., 0.000 IOPS converted to 200,000 IOPS).8MB / s), directly reflects write performance and is a core parameter for calculating write load. The read / write bandwidth threshold refers to the maximum sustained transfer bandwidth (in bytes / second) theoretically supported by the SSD interface (such as PCIe and SATA). This is determined by the interface standard and link configuration (e.g., PCIe Gen4 x4 is approximately 5.5GB / s). It reflects the ratio of actual transfer load to the interface limit and helps determine whether a bandwidth bottleneck is approaching.

[0103] S4. Based on the transmission load value, determine the optimized transmission path corresponding to the solid-state hard disk, detect the path delay item corresponding to the optimized transmission path, optimize the amount of transmission data items of the solid-state hard disk during data transmission based on the path delay item, and calculate the transmission optimization ratio corresponding to the transmission data item amount.

[0104] Based on the transmission load value, the present invention determines the optimized transmission path corresponding to the solid-state hard drive, can accurately anchor the read and write pressure distribution, dynamically adjust the data flow logic, avoid channel congestion, and support intelligent load balancing, allowing the solid-state hard drive to maintain stable transmission performance in complex scenarios, optimize the overall read and write experience from the path scheduling level, and release storage potential.

[0105] Among them, the optimized transmission path refers to a more efficient data transmission route planned by combining state optimization factors, integrating load adaptation, high-performance channels and scheduling strategies. For example, channels with high bandwidth redundancy and low latency are selected, combined with queue priority scheduling, so that high-load write tasks take the optimized path, thereby improving overall transmission efficiency, similar to planning the optimal express delivery route.

[0106] As an embodiment of the present invention, determining the optimized transmission path corresponding to the solid-state hard disk based on the transmission load value includes: dividing the data transmission queue corresponding to the solid-state hard disk according to the transmission load value; screening the target transmission channel that meets the load threshold in the data transmission queue; querying the channel performance status corresponding to the target transmission channel; analyzing the state optimization factor corresponding to the channel performance status; and determining the optimized transmission path corresponding to the solid-state hard disk based on the state optimization factor.

[0107] The data transmission queue refers to a task sequence constructed by classifying the load characteristics of the data transmission task (such as read / write type and load size) according to the transmission load value. For example, sequential read tasks with a transmission load value of 10-20 are classified into queue A, and random write tasks with a load value of 20-30 are classified into queue B. , which facilitates targeted scheduling. For example, in database transaction processing, low-load queues for critical businesses can be scheduled first. The target transmission channel refers to the available channels whose transmission load values ​​meet the set threshold (such as the load threshold is set to ≤15) from the channels associated with the data transmission queue. For example, the load value of channel 1 is 12 and the load value of channel 2 is 18. Channel 1 becomes the target transmission channel because it meets the threshold. Similar to video streaming, channels with low load are given priority to ensure smoothness. The channel performance status refers to a comprehensive characterization of the real-time operating indicators (such as bandwidth utilization, delay, and error rate) of the target transmission channel. For example, the channel bandwidth utilization is 60%, the delay is 5ms, and the error rate is 0.1%, which presents its current working capacity, just like the real-time traffic flow, speed, and accident rate on a highway, which reflect the traffic status. The state optimization factor refers to a parameter calculated based on the channel performance status to measure the channel optimization potential, covering bandwidth redundancy (such as bandwidth redundancy of 30%), delay improvement space (such as delay can be reduced by 2ms), etc., to guide the optimization direction.

[0108] Furthermore, the division of the data transmission queue corresponding to the solid-state drive can be achieved through an IO scheduling strategy analysis method, such as: applying the multi-queue topology structure of the Linux kernel blk-mq framework to analyze the request queue depth bound to each CPU core, thereby obtaining a data transmission queue; the screening of the target transmission channel that meets the load threshold in the data transmission queue can be achieved through a dynamic load balancing algorithm, such as: using a weighted polling scheduler combined with queue delay standard deviation calculation to select the channel with the most balanced load, thereby obtaining the target transmission channel; the querying of the channel performance status corresponding to the target transmission channel can be achieved through a hardware performance probe method, such as: reading the persistent bandwidth utilization history data in the controller log page through the NVMe CLI tool, thereby obtaining the channel performance status; the analysis of the state optimization factor corresponding to the channel performance status can be achieved through a multi-objective optimization modeling method, such as: constructing a Pareto front analysis model to quantify the optimal balance point between bandwidth, delay and error rate, thereby obtaining the state optimization factor; the determination of the optimized transmission path corresponding to the solid-state drive can be achieved through a path optimization algorithm, such as: using the Dijkstra shortest path algorithm to calculate the physical block addressing sequence that minimizes the NAND access delay based on the FTL mapping table, thereby obtaining the optimized transmission path.

[0109] By detecting the path delay item corresponding to the optimized transmission path, the present invention can accurately capture the time loss in the transmission link, provide key data for locating performance bottlenecks, and avoid transmission congestion caused by accumulated delays; at the same time, it provides a basis for continuous iterative optimization of the transmission path, ensures efficient data flow from the time dimension, and improves the transmission stability and response speed in the solid-state hard drive reading and writing scenarios.

[0110] Among them, the path delay item refers to the sum of the time losses incurred in each link from the initiation of data transmission to the completion of transmission in the optimized transmission path, covering channel transmission delay, queue scheduling delay, protocol interaction delay, etc. For example, data transmission in the channel takes 30μs, queue waiting for scheduling takes 15μs, and protocol handshake interaction takes 10μs. The cumulative time of these links constitutes the path delay item, which reflects the path transmission efficiency and performance shortcomings. For example, insufficient channel bandwidth will increase transmission delay, and inefficient scheduling algorithm will increase queue delay. Optionally, the detection of the path delay item corresponding to the optimized transmission path can be achieved through a timestamp tracking analysis method, such as using the Linux ftrace tool to capture the timestamp difference of the entire life cycle of IO requests from submission to completion, thereby obtaining the path delay item.

[0111] Furthermore, the present invention optimizes the amount of data items transmitted by the solid-state drive during the data transmission process based on the path delay item, and can dynamically adapt the scale of data transmission by quantifying the time loss of each link, avoiding channel congestion due to excessive data items or scheduling redundancy due to too small a data item amount, providing a quantitative basis for data sharding strategy and batch transmission threshold setting, and enhancing the real-time performance and resource utilization of solid-state drive transmission from the data volume control level.

[0112] The amount of transmitted data items refers to the number or volume of data units actually processed in a single data transmission, which directly affects the load pressure of the transmission path. For example, in a database log scenario, merging the original 1KB scattered write data items into 16KB batch writes (the item volume is increased by 16 times) can reduce the number of transmissions from 1000 times / second to 62.5 times / second, and the total path delay from 800μs to 150μs, significantly improving transmission efficiency.

[0113] As an embodiment of the present invention, the method of optimizing the amount of data items transmitted by the solid-state drive during data transmission based on the path delay item includes: analyzing the data transmission scenario corresponding to the path delay item; querying the scenario interaction node in the data transmission scenario; determining the core transmission link of the solid-state drive during data transmission based on the scenario interaction node; locating the congested data item in the core transmission link; and optimizing the amount of data items transmitted by the solid-state drive during data transmission based on the congested data item.

[0114] Among them, the data transmission scenario refers to the data transmission environment faced by solid-state drives in different business applications, including factors such as transmission mode, data characteristics and performance requirements. For example, the online trading system scenario has high-frequency 4KB random read and write characteristics (100,000 operations per second), requiring a delay of less than 500μs; the video cache scenario is mainly 2MB sequential read (bandwidth requirement 300MB / s), and different scenarios have significant differences in sensitivity to transmission path delays; the scenario interaction node refers to the key hardware or protocol link involved in data flow in the data transmission scenario, which is the basic unit of the transmission path, such as the PCIe interface controller (processing TLP packets), SLC cache layer (temporary storage of hot data), flash channel (performing physical read and write) and other nodes. In the database transaction scenario, data needs to pass through "CPU cache→PCIe There are four interaction nodes: Gen4 interface → NVMe controller → TLC flash memory, with each node contributing approximately 10-50μs of latency. The core transmission link refers to the primary data transmission path from the source to the destination, based on scenario-based interaction nodes. This determines the fundamental framework for transmission efficiency. For example, in the sequential write of large files, the core link is "host memory → PCIe x4 channel → NVMe controller → SLC cache → TLC flash memory chip." The theoretical upper limit of this link's total bandwidth is 5.5GB / s. If a node (such as the SLC cache) has insufficient bandwidth (measured at 3GB / s), it becomes a link bottleneck. Congested data items refer to data units in the core transmission link that significantly increase transmission latency due to a mismatch between data characteristics and link capabilities. For example, a 4KB random write data item, when transmitted on a sequentially optimized link, can experience a single operation latency of up to 200μs due to frequent addressing (compared to 50μs for normal sequential writes). When such data items account for more than 30% of the data, the overall link latency increases by over 50%, creating a congestion effect.

[0115] Furthermore, the analysis of the data transmission scenario corresponding to the path delay item can be achieved through a delay pattern clustering method, such as: applying the K-means algorithm to classify the historical delay data according to the time distribution characteristics, thereby obtaining the data transmission scenario; the query of the scenario interaction node in the data transmission scenario can be achieved through a dependency graph method, such as: constructing a directed acyclic graph model to analyze the access correlation of each LBA range in the NVMe command stream, thereby obtaining the scenario interaction node; the determination of the core transmission link of the solid-state drive during the data transmission process can be achieved through a critical path extraction method, such as: using a dynamic programming algorithm to calculate the delay contribution weight of each link on the FTL mapping table access link, thereby obtaining the core transmission link; the positioning of the congested data items in the core transmission link can be achieved through an abnormal traffic detection method, such as: using the Isolation Forest algorithm to identify abnormal access requests that exceed the 3σ interval in the NAND channel statistics, thereby obtaining the congested data items; the optimization of the amount of transmission data items of the solid-state drive during the data transmission process can be achieved through an adaptive prefetching method, such as: deploying an LSTM neural network to predict future access patterns and dynamically adjust the prefetch window size, thereby obtaining the amount of transmission data items.

[0116] By calculating the transmission optimization ratio corresponding to the amount of transmitted data items, the present invention can accurately quantify the improvement in transmission efficiency before and after the optimization of the data item amount, provide a quantitative benchmark for evaluating the effect of path optimization, and provide data support for transmission parameter tuning that is adaptable to different load scenarios, thereby improving the resource utilization and real-time response capability of solid-state hard drive data transmission from a quantitative analysis level.

[0117] The transmission optimization ratio refers to a quantitative indicator calculated through multi-stage read and write load, path delay, and data flow parameters, reflecting the degree of improvement in transmission efficiency after data item quantity optimization. The formula integrates the load and delay improvement rate of each stage ( ) and data flow modification ( ), comprehensively evaluates the gain of the optimization strategy on transmission performance, the higher the value (such as =1.8), which means that the transmission efficiency is significantly improved after optimization, and is used to verify the actual effect of data item adjustment.

[0118] As an embodiment of the present invention, the calculating the transmission optimization ratio corresponding to the amount of transmitted data items includes:

[0119] The transmission optimization ratio corresponding to the amount of transmitted data items is calculated using the following formula:

[0120] ;

[0121] in, represents the transmission optimization ratio corresponding to the amount of transmitted data items, Indicates the total number of stages of data transmission, Indicates the phase index of data transmission, Indicates the The read and write load index of each stage, Indicates the The actual path delay of data transmission in each stage, represents the average path delay of the entire transmission process, Indicates the The actual data flow transmitted in each stage.

[0122] Specifically, the actual path delay refers to the time delay of data transmission. The actual time loss (in seconds) experienced by data from source to destination during the phase, including the sum of delays in channel transmission, queue scheduling, protocol interaction, etc. For example, in the random write phase (k=2), the actual path delay is =0.5ms, much higher than the sequential read phase =0.1ms, reflecting the difference in path efficiency at different transmission stages; the average path delay refers to the arithmetic mean (in seconds) of the actual path delay at each stage during the entire data transmission process, and the formula is: , for example, 3-phase transmission 、 、 ,but , as a benchmark to measure the deviation of the delay in each stage; the actual data flow refers to the amount of data actually transmitted per unit time in the kth stage of data transmission (unit: bytes / second), which is affected by the size of the data item and the transmission mode (parallel / serial). For example, in the batch write stage (k=1), the actual data flow is affected by the merging of small data items. ; In the scattered read phase (k=3), due to data fragmentation, , used to correct the impact of loads at different stages on the optimization ratio.

[0123] S5. Based on the transmission optimization ratio, reorganize the data topology path corresponding to the solid-state drive, identify the access congested nodes in the data topology path, and collect the node cache vectors corresponding to the access congested nodes. Based on the node cache vectors, formulate a read and write differential acceleration strategy for the solid-state drive under a high-speed interface.

[0124] Based on the transmission optimization ratio, the present invention reorganizes the data topology path corresponding to the solid-state drive. According to the quantified efficiency improvement index, the link structure and data flow can be accurately adjusted to break through the performance bottleneck of the original path. At the same time, it provides direction for continuous iterative optimization of the storage architecture, and enhances the data scheduling flexibility and overall transmission efficiency of the solid-state drive from the path reconstruction level.

[0125] Among them, the data topology path refers to the physical link and logical flow of data transmission reconstructed based on efficient access nodes, covering the hardware path of master control → channel → storage unit, and the logical process of data block addressing → transmission → verification. For example, the reorganized path is "CPU cache → master control → channel 0 → SLC cache page → target data block". Compared with the original path (through the TLC channel), the transmission delay is reduced by 40%, which meets the performance requirements of the transmission optimization ratio.

[0126] As an embodiment of the present invention, the data topology path corresponding to the solid-state hard disk is reorganized based on the transmission optimization ratio, including: parsing the data access threshold corresponding to the transmission optimization ratio; traversing the index data blocks in the preset storage partition table based on the data access frequency; locating the candidate storage units in the index data blocks that meet the rate requirements; querying the efficient access nodes in the candidate storage units; and reorganizing the data topology path corresponding to the solid-state hard disk based on the efficient access nodes.

[0127] Among them, the data access threshold refers to the performance critical value set for data access operations based on the transmission optimization ratio to ensure transmission efficiency, covering the upper limit of access frequency (such as 1000 times per second), the lower limit of delay (such as ≤1ms), etc. For example, when the transmission optimization ratio is required to be increased by 30%, the access threshold of random read operations is set to "frequency ≤5000 times / second and delay ≤0.5ms". If it exceeds the limit, path reorganization is triggered to ensure that data access meets the optimized performance requirements; the preset storage partition table refers to the logical partition mapping table divided according to the physical characteristics of the flash memory (such as SLC cache area, TLC storage area) when the solid-state drive leaves the factory or is initialized, recording the partition capacity (such as SLC partition 10GB, TLC partition 950GB), read and write performance parameters (SLC sequential write rate 3GB / s), etc. For example, in the partition table, "partition A" corresponds to the first 10GB SLC cache area of ​​the flash memory, and "partition B" corresponds to the last 950GB The TLC area is used to quickly locate the data storage location; the index data block refers to the metadata block (usually 4KB-64KB in size) in the storage partition table that records the mapping relationship between the logical address and the physical address of the data. For example, the logical address 0x1000-0x2000 of the file "log.txt" is mapped to the physical address 0x5000-0x6000 through the index data block and stored in the third channel of the TLC partition to help quickly address the actual location of the data; the candidate storage unit refers to the physical storage unit (such as flash memory page) that meets the data access threshold (such as rate ≥2GB / s, delay ≤0.8ms) screened out after traversing the index data block. , channel group), for example, from 5 index blocks, three storage units are selected: unit 1 (channel 1-page 2, rate 2.2GB / s) and unit 2 (channel 3-page 5, rate 2.5GB / s) as the target carriers of data migration or path reorganization; the efficient access node refers to a storage location in the candidate storage unit that has higher access efficiency (such as IOPS ≥ 100,000, latency ≤ 0.3ms) due to hardware characteristics (such as proximity to the main controller, high channel bandwidth) or data distribution (hot data aggregation). For example, the SLC cache page of channel 0 has an access efficiency 5 times higher than that of an ordinary TLC page due to its direct connection to the main controller and no erase delay, and is the core node of the reorganization path.

[0128] Furthermore, the analysis of the data access threshold corresponding to the transmission optimization ratio can be achieved through a dynamic baseline analysis method, such as: using the Holt-Winters triple exponential smoothing algorithm to calculate the seasonal fluctuation upper limit of historical IOPS data, thereby obtaining the data access threshold; the traversal of the index data blocks in the preset storage partition table can be achieved through a B+ tree traversal algorithm, such as: using the index page scanning mechanism of the MySQL storage engine to quickly locate the logical block range of the FTL mapping table, thereby obtaining the index data block; the locating of the candidate storage unit that meets the rate requirement in the index data block can be achieved through a performance screening algorithm, such as: applying a Bloom filter to quickly exclude the physical page address marked by the bad block in the NAND flash memory, thereby obtaining the candidate storage unit; the querying of the efficient access node in the candidate storage unit can be achieved through a heat map analysis method, such as: constructing a two-dimensional Gaussian kernel density estimation model to visualize the LBA access frequency distribution hot spot area, thereby obtaining the efficient access node; the reorganization of the data topology path corresponding to the solid-state drive can be achieved through a graph reconstruction algorithm, such as: performing Delaunay triangulation to optimize the topological connection relationship between the logical block and the physical block in the FTL mapping table, thereby obtaining the data topology path.

[0129] By identifying the access congested nodes in the data topology path and collecting the node cache vectors corresponding to the access congested nodes, the present invention can accurately locate the transmission bottleneck points and prevent the spread of congestion from affecting the overall efficiency; and by quantifying the cache status, it can provide a basis for dynamically adjusting the data scheduling strategy, alleviate node pressure, optimize the transmission stability of the data topology path from the node management and control level, and improve the read and write response capabilities of the solid-state hard disk.

[0130] Among them, the access congestion node refers to a key node in the data topology path where the transmission delay increases sharply and the throughput decreases due to concentrated access requests and excessive data transmission load. For example, a flash memory channel of a solid-state drive normally processes 1,000 data interactions per second. When high-frequency read and write tasks pour in, the interaction exceeds 3,000 times per second. The channel data queues and the transmission is stuck, becoming an access congestion node, which will slow down the overall data transmission process. The node cache vector refers to a multidimensional data set that describes the cache status of the access congested node, including parameters such as cache occupancy, data read and write rate, and cache hit / miss count. Taking the solid-state drive cache node as an example, the vector may be (cache occupancy 75%, Write rate 200MB / s, read rate 150MB / s, cache hits 500 times, misses 100 times), these data can accurately present the node cache operation characteristics and assist in analyzing the cause of congestion. Optionally, the identification of the access congestion node in the data topology path can be achieved through a delay surge detection method, such as: applying a CUSUM control chart algorithm to monitor the time series anomalies of the physical page programming operation, thereby obtaining the access congestion node; the collection of the node cache vector corresponding to the access congestion node can be achieved through a DMA register dump method, such as: using a JTAG debug interface to capture the Descriptor Ring filling status of the DRAM cache management unit, thereby obtaining the node cache vector.

[0131] Furthermore, based on the node cache vector, the present invention formulates a differential acceleration strategy for reading and writing of the solid-state drive under a high-speed interface. It can accurately identify performance bottlenecks by quantifying cache status parameters, provide data support for differentiated acceleration strategies, and dynamically allocate resources based on the cache characteristics of read / write operations, thereby improving the read and write efficiency and response speed of the solid-state drive under high load from the cache level.

[0132] Among them, the read-write differential acceleration strategy refers to a differentiated acceleration scheme formulated based on the differences in cache access characteristics of read / write operations (such as read-side focusing on cache hit rate, write-side focusing on cache write efficiency) combined with node cache vectors (such as occupancy, read and write rate). For example, when the read operation under the PCIe Gen4 interface detects that the cache occupancy is 70% and the number of hits decreases, the strategy automatically prioritizes hot data to the SLC cache area, reducing the read latency from 50μs to 30μs; while the write operation dynamically adjusts the pre-allocation size according to the cache vector, and starts asynchronous batch writing when the cache write rate is less than 2GB / s, thereby increasing the write throughput to 3.2GB / s, and optimizing cache resource utilization through read-write divide-and-conquer. Optionally, the formulation of the read-write differential acceleration strategy of the solid-state drive under the high-speed interface can be implemented through an IO priority scheduling method, such as: using the io.latency controller of the Linux kernel cgroup v2 to assign differentiated weight quotas to read and write requests, thereby obtaining a read-write differential acceleration strategy.

[0133] Specifically, to further understand the execution logic and data flow relationship corresponding to the read-write differential strategy in this solution, please refer to Figure 2 The read-write differential framework diagram provided by Figure 2 As a core architecture diagram of the SLC-TLC hybrid SSD read-write optimization system, it clearly presents the complete link from host-side requests to flash chip data interaction: the input layer focuses on the host-side request queue, covers various read and write tasks, and is the starting point of data flow; the processing layer relies on the SSD controller, through address mapping, data allocation and other functional modules, combined with SLC read cache and write cache management technology, to convert host requests into operations adapted to the flash chip array; the output layer associates the flash chip array to clarify the read and write cache partitions and data storage logic of SLC and TLC. It should be noted that the coordination of the various components in the framework diagram is essentially an abstract distillation of the hybrid SSD read and write differential logic. In actual scenarios, the complexity of data allocation (such as the dynamic scheduling of SLC cache in different business scenarios) and the diversity of technical implementations (the coordinated mechanism of wear leveling, garbage collection and read-write differential) are far greater than Figure 2 This architecture only provides a concise display of the core logic, providing an intuitive reference for understanding the systematic approach of the hybrid SSD read-write differential strategy.

[0134] Compared with the problems described in the background technology, the present invention can accurately locate the physical layer and protocol layer characteristics of the interface by obtaining the initial interface parameters of the high-speed interface corresponding to the solid-state hard disk, providing a basis for determining the actual available read and write bandwidth threshold, and then optimizing resource scheduling based on the transmission mode and channel allocation rules, laying a data foundation for dynamically adapting the load and improving the interface bandwidth utilization from the bottom layer. The present invention analyzes the read and write queue status corresponding to the solid-state hard disk based on the channel allocation ratio, and queries the delay sensitivity index corresponding to the read and write queue status. It can optimize the queue scheduling strategy according to the channel resource allocation characteristics to avoid queue congestion caused by channel load imbalance, and accurately identify the business scenario's tolerance to delay through the delay sensitivity index, thereby reducing the average response delay and improving the queue parallel processing efficiency. The present invention analyzes the read and write scenarios corresponding to the solid-state hard disk based on the hierarchical response characteristics, and can accurately identify the performance requirement differences under different operating modes (such as the read scenario to Delay-sensitive, write scenarios focus on throughput), and then dynamically adapt the storage layer resource allocation strategy to avoid performance loss caused by read / write load mismatch due to storage layer mismatch, thereby improving the overall read and write efficiency and response speed of the solid-state drive from the scenario dimension. Furthermore, based on the transmission load value, the present invention determines the optimized transmission path corresponding to the solid-state drive, which can accurately anchor the read and write pressure distribution, dynamically adjust the data flow logic, avoid channel congestion, and support intelligent load balancing, allowing the solid-state drive to maintain stable transmission performance in complex scenarios. From the path scheduling level, it optimizes the overall read and write experience and releases storage potential. Finally, based on the transmission optimization ratio, the present invention reorganizes the data topology path corresponding to the solid-state drive. According to the quantitative efficiency improvement index, the link structure and data flow direction can be accurately adjusted to break through the performance bottleneck of the original path. At the same time, it provides direction for continuous iterative optimization of the storage architecture and enhances the data scheduling flexibility and overall transmission efficiency of the solid-state drive from the path reconstruction level. Therefore, the solid-state drive read and write acceleration method and system based on the high-speed interface provided by the embodiment of the present invention can improve the read and write speed of the solid-state drive under the high-speed interface.

[0135] Example 2:

[0136] like Figure 3 , which is a functional module diagram of a solid-state hard disk read and write acceleration system based on a high-speed interface of the present invention.

[0137] The high-speed interface-based solid-state drive read / write acceleration system 200 described in the present invention can be installed in an electronic device. Depending on the functionality implemented, the high-speed interface-based solid-state drive read / write acceleration system can include a ratio query tool 201, a feature detection module 202, a load value calculation module 203, an optimization ratio calculation module 204, and a strategy formulation module 205. The modules described in the present invention, also referred to as units, refer to a series of computer program segments that can be executed by an electronic device processor and can perform fixed functions, and are stored in the memory of the electronic device.

[0138] In the embodiment of the present invention, the functions of each module / unit are as follows:

[0139] The ratio query tool 201 is used to obtain initial interface parameters of the high-speed interface corresponding to the solid-state drive, determine the read and write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyze the transmission mode corresponding to the read and write bandwidth threshold, and query the channel allocation ratio under the transmission mode;

[0140] The feature detection module 202 is configured to analyze the read / write queue status corresponding to the solid-state drive based on the channel allocation ratio, query a delay sensitivity index corresponding to the read / write queue status, and detect a tier response feature corresponding to each storage tier in the solid-state drive based on the delay sensitivity index;

[0141] The load value calculation module 203 is used to analyze the read scenario and write scenario corresponding to the solid-state drive based on the hierarchical response characteristics, collect the read rate and write rate in the read scenario and the write scenario respectively, and comprehensively evaluate the read and write load indexes corresponding to the read rate and the write rate, and calculate the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load indexes;

[0142] The optimization ratio calculation module 204 is configured to determine an optimized transmission path corresponding to the solid-state drive based on the transmission load value, detect a path delay item corresponding to the optimized transmission path, optimize the amount of transmitted data items of the solid-state drive during data transmission based on the path delay item, and calculate a transmission optimization ratio corresponding to the amount of transmitted data items;

[0143] The strategy formulation module 205 is used to reorganize the data topology path corresponding to the solid-state drive based on the transmission optimization ratio, identify the access congested nodes in the data topology path, and collect the node cache vectors corresponding to the access congested nodes, and formulate the read and write differential acceleration strategy of the solid-state drive under the high-speed interface based on the node cache vectors.

[0144] In detail, the modules in the high-speed interface-based solid-state hard disk read and write acceleration system 200 described in the embodiment of the present invention are used in the same manner as described above. Figure 1 The same technical means as the solid-state hard disk read and write acceleration method based on a high-speed interface described in , and can produce the same technical effects, will not be repeated here.

[0145] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention.

[0146] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A solid state drive read and write acceleration method based on a high-speed interface, characterized in that: The method comprises: Obtaining initial interface parameters of a high-speed interface corresponding to the solid-state drive, determining a read / write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyzing a transmission mode corresponding to the read / write bandwidth threshold, and querying a channel allocation ratio under the transmission mode; Based on the channel allocation ratio, the read and write queue status corresponding to the solid-state drive is analyzed, and a delay sensitivity index corresponding to the read and write queue status is queried, wherein the delay sensitivity index refers to a numerical indicator that quantifies the tolerance of a business scenario to data transmission delay, and a higher value indicates greater sensitivity to delay. Based on the delay sensitivity index, the layer response characteristics corresponding to each storage layer in the solid-state drive are detected, wherein the layer response characteristics refer to key performance indicators extracted based on the layer response characteristics, and are used to characterize the responsiveness of the storage layer to the delay sensitivity index; Based on the hierarchical response characteristics, analyzing the read and write scenarios corresponding to the solid-state drive, collecting the read rate and write rate in the read and write scenarios respectively, and comprehensively evaluating the read and write load indexes corresponding to the read and write rates, and calculating the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load indexes; determining an optimized transmission path corresponding to the solid-state drive based on the transmission load value, detecting a path delay item corresponding to the optimized transmission path, optimizing an amount of transmitted data items of the solid-state drive during data transmission based on the path delay item, and calculating a transmission optimization ratio corresponding to the amount of transmitted data items; Based on the transmission optimization ratio, the data topology path corresponding to the solid-state drive is reorganized, the access congested nodes in the data topology path are identified, and the node cache vectors corresponding to the access congested nodes are collected, wherein the node cache vector refers to a multidimensional data group that describes the cache status of the access congested nodes. Based on the node cache vector, a read and write differential acceleration strategy for the solid-state drive under a high-speed interface is formulated.

2. A solid state drive read and write acceleration method based on a high-speed interface as claimed in claim 1, characterized in that: The determining, based on the initial interface parameters, a read / write bandwidth threshold corresponding to the solid-state drive includes: Querying the interface parameter protocol corresponding to the initial interface parameters; parsing a communication support range corresponding to the solid-state drive based on the interface parameter protocol; Analyzing the read and write bandwidth extremes corresponding to the solid-state drive according to the communication support range; Based on the read / write bandwidth extreme value, setting an actual read / write upper limit corresponding to the solid-state drive; Determine a read / write bandwidth threshold corresponding to the solid-state drive based on the actual read / write upper limit.

3. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The detecting, based on the delay sensitivity index, the tier response characteristics corresponding to each storage tier in the solid-state drive includes: Analyze the index change trend corresponding to the delay sensitivity index; Performing threshold division on the index change trend to obtain a trend change interval; Determining, based on the trend change interval, an inter-layer response level corresponding to each storage layer in the solid-state drive; Analyzing the layer response characteristics corresponding to the inter-layer response levels; Based on the hierarchical response characteristics, hierarchical response features corresponding to each storage hierarchical level in the solid-state drive are detected.

4. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The analyzing the read scenario and the write scenario corresponding to the solid-state drive based on the hierarchical response characteristics includes: extracting a temporal operation mark from the hierarchical response feature; Matching the timing operation mark with the read and write instructions in the solid-state drive to obtain an instruction association set; Based on the instruction association set, dividing the read and write operation units corresponding to the solid-state hard disk; Extracting high-frequency access nodes in the read-write operation unit; Based on the high-frequency access nodes, the read scenarios and write scenarios corresponding to the solid-state drive are analyzed.

5. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The calculating, based on the read / write load index, a transmission load value of the solid-state drive in a read / write scenario includes: The following formula is used to calculate the transmission load value of the solid-state drive in the read and write scenarios: ； in, Indicates the transmission load value of the solid-state drive in the read and write scenarios, represents the sampling time period, Indicates the reading scene weight coefficient, Indicates the number of read operations in the read scenario. Indicates the read operation index in the read scenario. Indicates the The read operation weight corresponding to the read operation, Indicates the The read rate corresponding to the read operation, Indicates the writing scene weight coefficient, Indicates the number of write operations in the write scenario. Indicates the write operation index in the write scenario. Indicates the The write operation weight corresponding to the write operation, Indicates the The write rate of the write operation, represents the read and write load index, Indicates the read and write bandwidth threshold.

6. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The determining, based on the transmission load value, an optimized transmission path corresponding to the solid-state drive, includes: dividing the data transmission queues corresponding to the solid-state hard disk according to the transmission load value; Screening a target transmission channel in the data transmission queue that meets a load threshold; Querying the channel performance status corresponding to the target transmission channel; Analyzing a state optimization factor corresponding to the channel performance state; Based on the state optimization factor, an optimized transmission path corresponding to the solid state drive is determined.

7. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: Optimizing the amount of data items transmitted by the solid-state drive during data transmission based on the path delay item includes: Analyzing a data transmission scenario corresponding to the path delay item; Querying the scene interaction nodes in the data transmission scene; Determining, based on the scenario interaction node, a core transmission link of the solid-state drive during data transmission; locating a blocked data item in the core transmission link; Based on the blocked data items, the amount of transmission data items of the solid state drive during data transmission is optimized.

8. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The calculating the transmission optimization ratio corresponding to the amount of transmitted data items includes: The transmission optimization ratio corresponding to the amount of transmitted data items is calculated using the following formula: ； in, represents the transmission optimization ratio corresponding to the amount of transmitted data items, Indicates the total number of stages of data transmission, Indicates the phase index of data transmission, Indicates the The read and write load index of each stage, Indicates the The actual path delay of data transmission in each stage, represents the average path delay of the entire transmission process, Indicates the The actual data flow transmitted in each stage.

9. The method for accelerating the reading and writing of a solid-state hard disk based on a high-speed interface according to claim 1, wherein: The reorganizing the data topology path corresponding to the solid-state drive based on the transmission optimization ratio includes: parsing a data access threshold corresponding to the transmission optimization ratio; Based on the data access threshold, traverse the index data blocks in the preset storage partition table; Locating candidate storage units that meet threshold requirements in the index data block; Querying efficient access nodes in the candidate storage units; Based on the efficient access node, the data topology path corresponding to the solid state drive is reorganized.

10. A solid-state hard disk read and write acceleration system based on a high-speed interface, characterized in that: The system comprises: A ratio query tool is used to obtain initial interface parameters of the high-speed interface corresponding to the solid-state drive, determine the read and write bandwidth threshold corresponding to the solid-state drive based on the initial interface parameters, analyze the transmission mode corresponding to the read and write bandwidth threshold, and query the channel allocation ratio under the transmission mode; a feature detection module for analyzing the read and write queue status corresponding to the solid-state drive based on the channel allocation ratio, and querying a delay sensitivity index corresponding to the read and write queue status, wherein the delay sensitivity index refers to a numerical indicator that quantifies the tolerance of a business scenario to data transmission delay, with a higher value indicating greater sensitivity to delay; and based on the delay sensitivity index, detecting a hierarchical response feature corresponding to each storage tier in the solid-state drive, wherein the hierarchical response feature refers to a key performance indicator extracted based on the hierarchical response characteristics, and is used to characterize the responsiveness of the storage tier to the delay sensitivity index; a load value calculation module, configured to analyze the read and write scenarios corresponding to the solid-state drive based on the hierarchical response characteristics, collect the read rate and write rate in the read and write scenarios respectively, and comprehensively evaluate the read and write load indexes corresponding to the read and write rates, and calculate the transmission load value of the solid-state drive in the read and write scenarios based on the read and write load indexes; an optimization ratio calculation module, configured to determine an optimized transmission path corresponding to the solid-state drive based on the transmission load value, detect a path delay item corresponding to the optimized transmission path, optimize an amount of transmitted data items of the solid-state drive during data transmission based on the path delay item, and calculate a transmission optimization ratio corresponding to the amount of transmitted data items; A strategy formulation module is used to reorganize the data topology path corresponding to the solid-state drive based on the transmission optimization ratio, identify the access congested nodes in the data topology path, and collect the node cache vectors corresponding to the access congested nodes, wherein the node cache vector refers to a multidimensional data group that describes the cache status of the access congested node. Based on the node cache vector, a read and write differential acceleration strategy for the solid-state drive under a high-speed interface is formulated.

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