Task processing method and device, equipment, medium and product

Abstract

The embodiment of the invention discloses a task processing method and device, equipment, a medium and a product, and the method comprises the steps: determining the operation state information of at least one register in task state information in a preset register distribution analysis time period; according to the running state information and a preset data bit processing threshold value, whether the register has an over-limit running condition in the processing process or not is determined; and when the register does not have the over-limit operation condition, determining the register as an allocatable register, so as to determine a target allocation register from at least one allocatable register when the at least one task needs to be subjected to register allocation during processing. According to the technical scheme, the problem that register allocation in current task processing is not intelligent enough is solved, the operation state of the register can be analyzed to determine the overrun operation condition of the register so as to determine the allocatable condition of the register, the intelligence of register allocation is improved, and the task processing efficiency is improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of computer technology, and in particular to a task processing method, apparatus, device, medium, and product. Background Art

[0002] Currently, in the task processing process, due to the lack of intelligence in the register number allocation strategy, many obstacles and difficulties arise in task processing, which in turn causes resource waste and low efficiency. Summary of the Invention

[0003] The embodiments of the present invention provide a task processing method, apparatus, device, medium and product, which can be achieved through.

[0004] In a first aspect, an embodiment of the present invention provides a task processing method, the method comprising:

[0005] Obtaining task status information of at least one task in a processing process within a preset register allocation analysis time period;

[0006] determining running state information of at least one register in the task state information;

[0007] Determine whether the register has an over-limit operation condition during the processing process based on the operation status information and the preset data bit processing threshold;

[0008] When the register does not have an over-limit operation condition, the register is determined as an allocatable register, so that when register allocation is required during processing of at least one task, a target allocation register is determined from the at least one allocatable register.

[0009] In a second aspect, an embodiment of the present invention provides a task processing device, the device comprising:

[0010] A task status information acquisition module, configured to acquire task status information of at least one task in a processing process within a preset register allocation analysis time period;

[0011] An operation status information acquisition module, configured to determine the operation status information of at least one register in the task status information;

[0012] An over-limit operation status determination module is used to determine whether a register has an over-limit operation status during processing based on the operation status information and a preset data bit processing threshold;

[0013] The allocable register determination module is used to determine the register as an allocable register when the register does not have an over-limit operation condition, so that when at least one task needs to allocate a register during processing, a target allocation register is determined from the at least one allocable register.

[0014] In a third aspect, an embodiment of the present invention further provides a computer device, comprising:

[0015] one or more processors;

[0016] a memory for storing one or more programs;

[0017] When the one or more programs are executed by one or more processors, the one or more processors implement the task processing method provided by any embodiment of the present invention.

[0018] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the task processing method provided by any embodiment of the present invention.

[0019] In a fifth aspect, an embodiment of the present invention further provides a computer program product, including a computer program, which, when executed by a processor, implements the task processing method provided by any embodiment of the present invention.

[0020] The embodiments of the above invention have the following advantages or beneficial effects:

[0021] An embodiment of the present invention obtains task status information of at least one task during processing within a preset register allocation analysis time period; determines the operating status information of at least one register in the task status information; determines whether the register has an over-limit operating condition during processing based on the operating status information and a preset data bit processing threshold; and when the register does not have an over-limit operating condition, determines the register as an allocatable register, so that when at least one task needs to allocate a register during processing, the target allocation register is determined from the at least one allocatable register. The technical solution of the embodiment of the present invention solves the problem of insufficient intelligence in register allocation in current task processing. By analyzing the operating status of the register, the over-limit operating condition of the register is determined, thereby determining the allocatable condition of the register, thereby improving the intelligence of register allocation and improving task processing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a flowchart of a task processing method provided by an embodiment of the present invention;

[0023] Figure 2 is a flowchart of a task processing method provided by an embodiment of the present invention;

[0024] Figure 3 is a structural diagram of a task processing device provided by an embodiment of the present invention;

[0025] Figure 4It is a structural diagram of a computer device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0027] Figure 1 This is a flowchart of a task processing method provided by an embodiment of the present invention. This embodiment is applicable to task processing scenarios. The method can be executed by a task processing device, which can be implemented in software and / or hardware and integrated into a computer device with application development capabilities.

[0028] like Figure 1 As shown, the task processing method of this embodiment includes the following steps:

[0029] S110: Obtain task status information of at least one task in a processing process within a preset register allocation analysis time period.

[0030] This embodiment is applicable to task processing scenarios within embedded operating systems. Registers are small, yet extremely fast, storage units within a CPU. They are used to temporarily store data and instruction addresses required by the CPU during program execution. For example, during context switching during task processing, register values are crucial for preservation and restoration. Registers can include program counters, stack pointers, and general-purpose registers. This embodiment does not limit register types.

[0031] Task status information may be information related to data processing of the task, and may include register operating status information, task execution stage information, data requirement information, etc. In this embodiment, register operating status information may be acquired by setting at least one target register status acquisition program. Registers may be pre-grouped based on information such as register type, and each register group may be assigned a corresponding target register status acquisition program.

[0032] S120: Determine the running status information of at least one register in the task status information.

[0033] The running state information of at least one register is extracted from the task state information, so that the allocatable state of the register is subsequently determined according to the running state information of the register.

[0034] S130 , determining whether the register has an over-limit operation condition during the processing process according to the operation status information and a preset data bit processing threshold.

[0035] In this embodiment, the operating status information of the register may be the memory resource usage status of the register. A numerical comparison is performed based on the memory resource usage status and a preset data bit processing threshold to determine whether the register is in an over-limit operating state during processing. The preset data bit processing threshold is determined based on the number of bits of binary data that the register can process at one time. For example, for an 8-bit register, the preset data bit processing threshold is 8.

[0036] S140 . When the register does not have an over-limit operation condition, determine the register as an allocatable register, so that when register allocation is required during processing of at least one task, a target allocation register is determined from the at least one allocatable register.

[0037] When registers are not experiencing over-limit conditions, this indicates that the registers are operating stably within their design parameters, without errors or failures due to overheating, abnormal electrical signals, or other issues. During task execution, they can continuously and reliably store and process data, providing a stable hardware foundation for the smooth progress of the task. Internal circuits and logic gates can process data at normal speeds, without any increased delays due to overload. They can quickly respond to task instructions, completing data storage and processing in a timely manner, and meeting the task's real-time requirements.

[0038] On the other hand, the fact that the register does not have an over-limit operating condition indicates that the register has sufficient free capacity or redundant capacity, and there is no situation where the register cannot receive new data due to excessive stored data. It can provide the necessary data temporary storage space for the task and ensure fast access to data during the calculation process.

[0039] Therefore, registers that do not have over-limit operation conditions can be smoothly allocated to tasks that require register allocation without conflicting with other running tasks, ensuring that tasks can use register resources independently and completely, avoiding data loss or errors caused by resource competition.

[0040] The technical solution of this embodiment obtains task status information of at least one task during processing within a preset register allocation analysis time period; determines the operating status information of at least one register in the task status information; determines whether the register has an over-limit operating condition during processing based on the operating status information and a preset data bit processing threshold; and when the register does not have an over-limit operating condition, determines the register as an allocatable register, so that when register allocation is required during processing of at least one task, the target allocation register is determined from the at least one allocatable register. The technical solution of this embodiment of the present invention solves the problem of insufficient intelligence in register allocation in current task processing. By analyzing the operating status of the register, the over-limit operating condition of the register is determined, thereby determining the allocatable condition of the register, thereby improving the intelligence of register allocation and improving task processing efficiency.

[0041] Figure 2 This is a flowchart of a task processing method provided in an embodiment of the present invention. This embodiment, which shares the same inventive concept as the task processing method described in the previous embodiment, further describes the process of determining an out-of-limit operating condition. This method can be executed by a task processing device, which can be implemented in software and / or hardware and integrated into a computer device with application development capabilities.

[0042] like Figure 2 As shown, the task processing method of this embodiment includes the following steps:

[0043] S210: Obtain task status information of at least one task in a processing process within a preset register allocation analysis time period.

[0044] The preset register allocation analysis time period can be determined according to a preset allocation analysis cycle, or it can be triggered based on the frequency of task process switching during task processing. For example, when the frequency of task process switching exceeds a preset task process switching frequency threshold, a register allocation analysis is determined to be necessary, and task status information for at least one task in progress during the preset register allocation analysis time period is obtained. This allows for timely analysis of register status and determination of allocable registers when system data processing pressure is high or tasks are being processed concurrently.

[0045] S220: Determine the running status information of at least one register in the task status information.

[0046] S230: Determine the number of data storage bits occupied by the register according to the operating status information.

[0047] The number of data storage bit occupancy of the register may be the number of bits of binary data stored by the register at each point in time.

[0048] S240 : Subtract a preset data bit processing threshold from the number of data storage bit occupancy to obtain a data storage redundant bit value.

[0049] The preset data bit processing threshold is the maximum number of data bits that the register is preset to store. For example, for 8-bit registers, 16-bit registers, 32-bit registers, and 64-bit registers, the corresponding preset data bit processing thresholds are 8, 16, 32, and 64, respectively.

[0050] A curve showing the change of the occupancy of each register over time can be obtained by fitting the number of occupied data storage bits of the register, wherein the ordinate of the curve is the number of occupied data storage bits, and the abscissa is the time point.

[0051] Based on the preset data bit processing threshold of the register and the curve of the change of the occupancy of each register over time, the number of data storage bit occupancy is subtracted from the preset data bit processing threshold to obtain the curve of the change of the redundant bit value over time. The vertical coordinate of the curve of the change of the redundant bit value over time is the redundant bit value.

[0052] In an optional implementation, when the value of the data storage redundancy bit corresponding to at least one time point in the processing process is negative, it is determined that the register has an over-limit operation condition.

[0053] If the data storage redundancy bit value corresponding to at least one time point in the processing of the register is negative, it means that the register is operating beyond its limit, that is, it stores data that exceeds the preset data bit processing threshold, and the data processing effect is worse than that of the register without exceeding the limit.

[0054] The expression of the change curve of the redundant bit value over time can be:

[0055]

[0056] Among them, G(t) is the expression of the curve of the change of redundant bit value over time, G d is the preset data bit processing threshold of the register, n is the total number of registers, X d (t) i is the expression of the demand-time period variation curve of the i-th register.

[0057] It is understandable that when a process or thread needs to handle a large number of tasks, the data processing requirements for registers will also be higher. Only registers that do not have an over-limit operation condition as allocatable registers may not meet the task processing requirements. Therefore, in this embodiment, among the registers that have an over-limit operation condition, the registers to be verified can be screened according to preset screening conditions, and then the allocatable registers can be determined from the registers to be verified. The preset screening conditions can be screening conditions related to the severity of the over-limit operation condition. For example, the severity of the over-limit operation condition can be determined based on the numerical relationship between the number of task process switching requests and the absolute value of the number of data storage redundancy bits.

[0058] In an optional embodiment, at least one over-limit operation period of a register with an over-limit operation status is determined; the number of task process switching requests received by the register during the over-limit operation period is obtained; the absolute value of the data storage redundancy bit value corresponding to all time points in the over-limit operation period is determined; the difference between the number of task process switching requests and the absolute value is calculated to obtain a numerical comparison result; a register whose numerical comparison results of all over-limit operation periods are positive is determined as a register to be verified; and the register to be verified is determined to be an allocatable register based on the task process switching status in the operation status information of the register to be verified.

[0059] The numerical comparison results of all the over-limit operation time periods in the register are all positive, indicating that in all the over-limit operation time periods, the number of over-limit storage in each over-limit operation time period is always lower than the number of task process switching requests in the over-limit operation time period. This means that although the register has an over-limit operation situation, the system may be more focused on task switching and processing. Although storage resources are tight, they are relatively not idle or ineffectively occupied, and the severity of the over-limit operation situation is low. Therefore, the registers for which the numerical comparison results of all the over-limit operation time periods in the register are all positive can be determined as registers to be verified, and then the registers to be verified can be determined as allocable registers based on the task process switching status from the registers to be verified. The task process switching status can be information related to the data processing efficiency of the register during the task process switching.

[0060] In an optional embodiment, the register to be verified is determined to be an allocatable register based on the task process switching status in the running status information of the register to be verified. This can be done by determining the data processing time of the register to be verified for the task process switching event during the processing process, and determining the average data processing time of the register to be verified for the task process switching event based on the data processing time. When the average data processing time is less than a preset switching event data processing time threshold, the register to be verified is determined to be an allocatable register.

[0061] Task process switching can be context switching, and context switching refers to the process of switching processes or threads by the kernel on the CPU. Specifically, when the time slice of a task (process or thread) is used up or encounters other situations that require suspension of execution, the operating system will save the current state of the task and switch to another task to continue execution. This process of saving and restoring task status is context switching. Context switching is an important basic mechanism in the operating system kernel, involving multiple core modules such as process management, memory management, and interrupt processing. Therefore, this embodiment uses the task process switching status of the register as the basis for determining the allocable register, thereby improving real-time data processing performance, reducing data copying, and fundamentally reducing switching delays when there are too many context switch requests.

[0062] The average data processing time of the register to be verified is less than the preset switching event data processing time threshold, indicating that the register to be verified has good performance in processing task process switching events and can meet the system's requirements for processing speed when processing multiple tasks in parallel.

[0063] Therefore, the register to be verified whose average data processing time is less than the preset switching event data processing time threshold can be determined as an allocatable register, so that when at least one task needs to allocate a register during processing, a target allocation register can be determined from the at least one allocatable register.

[0064] S250: When the data storage redundancy bit values corresponding to all time points in the processing process are all positive, determine that the register does not have an over-limit operation condition.

[0065] In the curve of the change of redundant bit value over time, when the data storage redundant bit values corresponding to all time points in the processing process are all positive, it is determined that the register does not have an over-limit operation condition. The positive redundant bit values indicate that the register always has idle storage bits, can perform data processing well, and can be allocated.

[0066] S260: When the register does not have an over-limit operation condition, determine the register as an allocatable register, so that when register allocation is required during processing of at least one task, a target allocation register is determined from the at least one allocatable register.

[0067] In an optional implementation, while at least one task is being processed, a task process switching request is obtained; an integrity check is performed on the task process switching request through authentication and mobility management services, and if the task process switching request passes the integrity check, the task process switching is performed.

[0068] The authentication and mobility management service can be AMF (Authentication and Mobility Management Function), which can verify the integrity of the task process switching request through the AMF unit. When the AMF unit successfully verifies the integrity of the process switching request, the task process switching is performed according to the process switching request, thereby improving the security of the process switching.

[0069] The technical solution of this embodiment is to obtain task status information of at least one task during the processing within a preset register allocation analysis time period; determine the operating status information of at least one register in the task status information; determine the number of data storage bit occupancy of the register based on the operating status information; subtract a preset data bit processing threshold from the number of data storage bit occupancy to obtain a data storage redundant bit value; when the data storage redundant bit values corresponding to all time points in the processing process are positive, determine that the register does not have an over-limit operating condition; when the register does not have an over-limit operating condition, determine the register as an allocatable register, so that when at least one task needs to perform register allocation during processing, a target allocation register is determined from the at least one allocatable register. The technical solution of the embodiment of the present invention solves the problem that the current register allocation in task processing is not intelligent enough. It can analyze the operating status of the register, determine the over-limit operation status of the register, and thus determine the allocable status of the register, thereby improving the intelligence of register allocation and improving task processing efficiency. In addition, by determining the registers with good data processing performance in task process switching among the registers with over-limit operation as allocable registers, the adaptability of register allocation to task process switching scenarios is fully considered, so that the determined allocable registers can perform good data recovery and preservation in the task process switching scenario, reducing the task process switching delay and improving the system task processing efficiency.

[0070] Figure 3 This is a schematic diagram of the structure of a task processing device provided by an embodiment of the present invention. This embodiment is applicable to task processing scenarios. The task processing device can be implemented by software and / or hardware and integrated into a computer terminal device with application development capabilities.

[0071] like Figure 3 As shown, the task processing device includes: a task status information acquisition module 310 , an operation status information acquisition module 320 , an over-limit operation status determination module 330 and an allocatable register determination module 340 .

[0072] Among them, the task status information acquisition module 310 is used to obtain the task status information of at least one task during the processing process within a preset register allocation analysis time period; the operation status information acquisition module 320 is used to determine the operation status information of at least one register in the task status information; the over-limit operation status determination module 330 is used to determine whether the register has an over-limit operation status during the processing process based on the operation status information and a preset data bit processing threshold; the allocatable register determination module 340 is used to determine the register as an allocatable register when the register does not have an over-limit operation status, so that when at least one task needs to allocate a register during processing, the target allocation register can be determined from the at least one allocatable register.

[0073] The technical solution of this embodiment obtains task status information of at least one task during processing within a preset register allocation analysis time period; determines the operating status information of at least one register in the task status information; determines whether the register has an over-limit operating condition during processing based on the operating status information and a preset data bit processing threshold; and when the register does not have an over-limit operating condition, determines the register as an allocatable register, so that when register allocation is required during processing of at least one task, the target allocation register is determined from the at least one allocatable register. The technical solution of this embodiment of the present invention solves the problem of insufficient intelligence in register allocation in current task processing. By analyzing the operating status of the register, the over-limit operating condition of the register is determined, thereby determining the allocatable condition of the register, thereby improving the intelligence of register allocation and improving task processing efficiency.

[0074] In an optional implementation, the over-limit operating condition determination module 330 is specifically configured to:

[0075] According to the operating status information, the number of data storage bit occupancy of the register is determined; the number of data storage bit occupancy is subtracted from the preset data bit processing threshold to obtain the data storage redundant bit value; when the data storage redundant bit values corresponding to all time points in the processing process are positive, it is determined that the register does not have an over-limit operating condition.

[0076] In an optional implementation, the over-limit operating condition determination module 330 is further configured to:

[0077] When the data storage redundancy bit value corresponding to at least one time point in the processing process is negative, it is determined that the register has an over-limit operation condition.

[0078] In an optional embodiment, the device further comprises:

[0079] An over-limit register analysis module is used to determine at least one over-limit operation period of a register with an over-limit operation status; obtain the number of task process switching requests received by the register during the over-limit operation period; determine the absolute value of the data storage redundancy bit value corresponding to all time points in the over-limit operation period; calculate the difference between the number of task process switching requests and the absolute value to obtain a numerical comparison result; determine a register whose numerical comparison results for all over-limit operation periods are positive as a register to be verified; and determine that the register to be verified is an allocatable register based on the task process switching status in the operation status information of the register to be verified.

[0080] In an optional implementation, the over-limit register analysis module is specifically configured to:

[0081] Determine the data processing time of the register to be verified for the task process switching event during the processing; determine the average data processing time of the register to be verified for the task process switching event based on the data processing time; if the average data processing time is less than the preset switching event data processing time threshold, determine that the register to be verified is an allocable register.

[0082] In an optional embodiment, the device further comprises:

[0083] The task process switching request verification module is used to obtain a task process switching request when at least one task is being processed; perform integrity verification on the task process switching request through authentication and mobility management services, and perform task process switching if the task process switching request passes the integrity verification.

[0084] The task processing device provided by the embodiment of the present invention can execute the task processing method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0085] Figure 4 A schematic structural diagram of a computer device provided in an embodiment of the present invention. Figure 4 A block diagram of an exemplary computer device 12 suitable for use in implementing embodiments of the present invention is shown. Figure 4 The computer device 12 shown is only an example and should not limit the functionality and scope of use of the embodiments of the present invention. The computer device 12 can be any terminal device with computing capabilities, such as an intelligent controller, a server, a mobile phone, or other terminal devices.

[0086] like Figure 4 As shown, computer device 12 is implemented as a general-purpose computing device. Components of computer device 12 may include, but are not limited to, one or more processors or processing units 16, system memory 28, and a bus 18 that connects various system components (including system memory 28 and processing unit 16).

[0087] Bus 18 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, or a local bus using any of a variety of bus architectures. Examples of these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.

[0088] The computer device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by the computer device 12, including volatile and non-volatile media, removable and non-removable media.

[0089] System memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. Computer device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be configured to read and write non-removable, non-volatile magnetic media ( Figure 4 Not shown, often called a "hard drive"). Although Figure 4 Not shown, a magnetic disk drive for reading and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 18 via one or more data media interfaces. System memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of various embodiments of the present invention.

[0090] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in system memory 28. Such program modules 42 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may include an implementation of a network environment. Program modules 42 generally perform the functions and / or methods of the embodiments described herein.

[0091] The computer device 12 may also communicate with one or more external devices 14 (e.g., a keyboard, a pointing device, a display 24, etc.), one or more devices that enable a user to interact with the computer device 12, and / or any device that enables the computer device 12 to communicate with one or more other computing devices (e.g., a network card, a modem, etc.). Such communication may be performed via an input / output (I / O) interface 22. Furthermore, the computer device 12 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 20. As shown, the network adapter 20 communicates with the other modules of the computer device 12 via the bus 18. It should be understood that although Figure 4 Not shown, other hardware and / or software modules may be used in conjunction with the computer device 12, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RFID systems, tape drives, and data backup storage systems.

[0092] The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, such as implementing the task processing method provided in the embodiment of the present invention, which includes:

[0093] Obtaining task status information of at least one task in a processing process within a preset register allocation analysis time period;

[0094] determining running state information of at least one register in the task state information;

[0095] Determining whether the register has an over-limit operation condition during the processing according to the operation status information and a preset data bit processing threshold;

[0096] When the register does not have an overrunning condition, the register is determined as an allocatable register, so that when register allocation is required during processing of the at least one task, a target allocation register is determined from the at least one allocatable register.

[0097] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the program is executed by a processor, the task processing method provided in any embodiment of the present invention is implemented. The method includes:

[0098] Obtaining task status information of at least one task in a processing process within a preset register allocation analysis time period;

[0099] determining running state information of at least one register in the task state information;

[0100] Determining whether the register has an over-limit operation condition during the processing according to the operation status information and a preset data bit processing threshold;

[0101] When the register does not have an overrunning condition, the register is determined as an allocatable register, so that when register allocation is required during processing of the at least one task, a target allocation register is determined from the at least one allocatable register.

[0102] The computer storage medium of the embodiment of the present invention can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to: an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device.

[0103] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0104] Program code embodied on a computer-readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0105] The computer program code for performing the operations of the present invention can be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, Python, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0106] An embodiment of the present invention further provides a computer program product, including a computer program, which, when executed by a processor, implements the task processing method provided in any embodiment of the present application.

[0107] The computer program product, during implementation, may be written in one or more programming languages, or a combination thereof, for performing the operations of the present invention. The programming languages include object-oriented programming languages such as Java, Smalltalk, Python, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0108] Those skilled in the art will appreciate that the modules or steps of the present invention described above can be implemented using a general-purpose computing device. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they can be implemented using program code executable by a computer device, which can then be stored in a storage device and executed by the computing device. Alternatively, they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module. Thus, the present invention is not limited to any specific combination of hardware and software.

[0109] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A task processing method, characterized in that: include: Obtaining task status information of at least one task in a processing process within a preset register allocation analysis time period; determining running state information of at least one register in the task state information; Determining whether the register has an over-limit operation condition during the processing according to the operation status information and a preset data bit processing threshold; When the register does not have an overrunning condition, the register is determined as an allocatable register, so that when register allocation is required during processing of the at least one task, a target allocation register is determined from the at least one allocatable register.

2. The method according to claim 1, characterized in that Determining whether the register has an over-limit operation condition during the processing according to the operation status information and a preset data bit processing threshold includes: Determine the number of data storage bits occupied by the register according to the operating status information; Subtracting a preset data bit processing threshold from the number of data storage bit occupancy to obtain a data storage redundant bit value; When the data storage redundancy bit values corresponding to all time points in the processing process are positive, it is determined that the register does not have an over-limit operation condition.

3. The method according to claim 2, characterized in that Also includes: When the data storage redundancy bit value corresponding to at least one time point in the processing is negative, it is determined that the register has an over-limit operation condition.

4. The method according to claim 3, characterized in that Also includes: determining at least one over-operation period of the register during which an over-operation condition exists; Obtaining the number of task process switching requests received by the register during the overrun period; Determine the absolute value of the data storage redundancy bit value corresponding to all time points during the overrun period; Calculating the difference between the number of task process switching requests and the absolute value to obtain a numerical comparison result; Determine the register whose numerical comparison results of all the over-limit operation time periods in the register are positive as the register to be verified; According to the task process switching status in the running state information of the register to be verified, it is determined that the register to be verified is an allocatable register.

5. The method according to claim 4, characterized in that The step of determining, based on the task process switching status in the running state information of the register to be verified, that the register to be verified is an allocatable register includes: Determining the register to be verified and the data processing time of the task process switching event during the processing; Determining an average data processing time of the register to be verified for the task process switching event according to the data processing time; In a case where the average data processing time is less than a preset switching event data processing time threshold, it is determined that the register to be verified is an allocatable register.

6. The method according to claim 1, characterized in that Also includes: When at least one task is being processed, a task process switching request is obtained; An integrity check is performed on the task process switching request through an authentication and mobility management service, and the task process switching is performed if the task process switching request passes the integrity check.

7. A task processing device, characterized in that: include: A task status information acquisition module, configured to acquire task status information of at least one task in a processing process within a preset register allocation analysis time period; An operation status information acquisition module, configured to determine the operation status information of at least one register in the task status information; an over-limit operation status determination module, configured to determine whether the register has an over-limit operation status during the processing according to the operation status information and a preset data bit processing threshold; The allocatable register determination module is configured to determine the register as an allocatable register when the register does not have an over-limit operation condition, so that when register allocation is required during processing of the at least one task, a target allocation register is determined from the at least one allocatable register.

8. A computer device, characterized in that: The computer device comprises: one or more processors; a memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the task processing method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the task processing method according to any one of claims 1 to 6 is implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the computer program implements the task processing method according to any one of claims 1 to 6.

Images