Chip detection method and device and electronic equipment

Abstract

The invention discloses a chip detection method and apparatus, and an electronic device. The method comprises the steps of collecting a to-be-detected picture corresponding to at least one to-be-detected chip; performing feature extraction on the collected to-be-detected pictures through a deep learning model to obtain corresponding high-dimensional feature vectors; calculating the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to the reference picture; and determining whether the corresponding to-be-detected chip is a normal chip or an abnormal chip according to the similarity. Through the technical scheme provided by the embodiment of the invention, manual participation is reduced, so that the screening efficiency of the to-be-detected chips is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a chip detection method, device, and electronic equipment. Background Art

[0002] Image quality chips may be defective after production. These defects can manifest as white spots on normal displays and unusual flickering on some Chip On Film (COF) displays. Therefore, image quality chips must be inspected after production to prevent defects.

[0003] The current method for testing image quality chips is to test the image quality chip's image. Specifically, during the image test, the entire device is manually lit up for visual observation. Then, the human eye determines whether the image quality chip has a bad image, thereby determining whether the image quality chip is qualified.

[0004] However, the above-mentioned detection method of the image quality chip consumes manpower, resulting in low screening efficiency of the image quality chip. Summary of the Invention

[0005] This application provides a chip detection method, device, and electronic device to solve the problem of low screening efficiency of image quality chips. The specific implementation scheme is as follows:

[0006] In a first aspect, the present application provides a chip detection method, the method comprising:

[0007] Collecting an image to be detected corresponding to at least one chip to be detected;

[0008] Perform feature extraction on the collected images to be detected through a deep learning model to obtain corresponding high-dimensional feature vectors;

[0009] Calculating the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference image;

[0010] According to the similarity, it is determined whether the corresponding chip to be detected is a normal chip or an abnormal chip.

[0011] Through the above-mentioned application embodiment, the feature extraction of the collected image of the chip to be detected is performed through a deep learning model, and then the similarity between the extracted high-dimensional feature vector and the high-dimensional feature reference vector of the reference image is calculated, so as to judge whether the corresponding chip to be detected is abnormal based on the similarity. In this process, there is no need to use manpower to perform detection. Only a deep learning model is required to perform feature extraction, and then the similarity between the extracted high-dimensional feature vector and the high-dimensional feature reference vector is calculated to realize automatic detection of the chip to be detected, thereby reducing manpower consumption, making the detection efficiency of the chip to be detected (i.e., screening efficiency) significantly improved, and at the same time, the detection accuracy of the chip to be detected (i.e., screening accuracy) is also improved.

[0012] In a possible implementation manner, before acquiring the image to be inspected corresponding to at least one chip to be inspected, the method further includes:

[0013] According to a preset strategy, at least one reference image is selected from an image database; wherein the reference image is a normal image output by a normal chip.

[0014] Through the above-mentioned application embodiment, a reference image is selected from the image database according to a preset strategy, and the reference image is a normal image output by a normal chip, so that when the chip to be detected is subsequently detected to be abnormal based on the reference image, as long as the image to be detected of the chip to be detected is different from the reference image, it can be said that the image to be detected is an abnormal image, so that the corresponding chip to be detected can be determined to be an abnormal chip. In this way, the detection of whether the chip to be detected is abnormal can be achieved more efficiently and accurately.

[0015] In a possible implementation, selecting at least one reference image from an image database according to a preset strategy includes:

[0016] According to a random selection strategy, at least one first reference picture is randomly selected from the picture database, and the first reference picture is used as the reference picture.

[0017] Through the above-mentioned application embodiment, the reference image is selected by random selection, thereby avoiding the similarity between the reference image and the image to be detected being lower than the similarity threshold due to problems with the hardware device itself, thereby avoiding false detection of the chip to be detected, and further improving the detection accuracy of the chip to be detected.

[0018] In a possible implementation, selecting at least one reference image from an image database according to a preset strategy includes:

[0019] Prioritizing each image in the image database based on image parameters according to a priority selection strategy;

[0020] At least one second reference picture is selected from the picture database in sequence according to the order of priority, and the second reference picture is used as the reference picture.

[0021] Through the above-mentioned application embodiment, reference images are selected in the order of priority of the images determined by the image parameters, so that the selected reference images can better meet the needs, so that the chip to be detected is tested based on the selected reference images. When the obtained image to be detected is abnormal, the abnormality of the image to be detected can be better highlighted, so that when the similarity is calculated based on the selected reference images in the future, the similarity difference is clearer, which helps to improve the detection accuracy of whether the chip to be detected is abnormal.

[0022] In a possible implementation, extracting features from the collected images to be detected using a deep learning model to obtain corresponding high-dimensional feature vectors includes:

[0023] Performing image preprocessing on each of the collected images to be detected to obtain a corresponding target image;

[0024] The deep learning model is used to extract features from each target image to obtain the corresponding high-dimensional feature vector.

[0025] Through the above-mentioned application embodiment, before the features of the collected pictures to be detected are extracted through the deep learning model, the collected pictures to be detected are first preprocessed, thereby reducing the interference features of the pictures input into the deep learning model, thereby improving the detection accuracy of the chip to be detected.

[0026] In a possible implementation, before calculating the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference picture, the method further includes:

[0027] Performing reference image preprocessing on the collected reference image to obtain a corresponding target reference image;

[0028] The target reference image is subjected to feature extraction through the deep learning model to obtain the corresponding high-dimensional feature reference vector, and the high-dimensional feature reference vector is stored.

[0029] Through the above-mentioned application embodiment, before detecting whether the chip to be detected is abnormal, the reference image collected is first preprocessed, and then the processed target reference image is extracted through the deep learning model to obtain the corresponding high-dimensional feature reference vector, thereby extracting the feature information of the reference image, so as to facilitate the subsequent detection of the chip to be detected based on this feature information (i.e., the high-dimensional feature reference vector). In addition, preprocessing the reference image based on the reference image preprocessing method can reduce the interference features of the image input to the deep learning model, so that the extracted high-dimensional feature reference vector can better represent the feature information of the reference image.

[0030] In a possible implementation, the unified processing of the size and color mode includes adjusting the size of the image to a preset size and adjusting the color mode of the image to a preset color mode.

[0031] Through the above-mentioned application embodiment, it is ensured that all collected images are consistent in size representation and color representation, thereby facilitating better subsequent processing and analysis.

[0032] In a possible implementation, determining, based on the similarity, whether the corresponding chip to be detected is a normal chip or an abnormal chip includes:

[0033] When the reference picture is a normal picture, if it is determined that the similarities of all the pictures to be detected corresponding to the chip to be detected are greater than or equal to a similarity threshold, then the corresponding chip to be detected is determined to be the normal chip;

[0034] If it is determined that any of the similarities of all the images to be detected corresponding to the chip to be detected has a similarity less than the similarity threshold, the corresponding chip to be detected is determined to be the abnormal chip.

[0035] Through the above-mentioned application embodiment, whether the corresponding chip to be detected is abnormal is determined based on the comparison of the similarity of all the images to be detected corresponding to the chip to be detected with the similarity threshold, so that the accuracy and efficiency of determining whether the chip to be detected is a normal chip or an abnormal chip can be further improved.

[0036] In one possible implementation, the method further includes:

[0037] Collecting a data strobe signal value corresponding to at least one of the chips to be detected, and determining a delayed data value according to the data strobe signal value;

[0038] Determining whether the delayed data value exceeds a valid region of the data signal;

[0039] If not, determining that the corresponding chip to be detected is the normal chip;

[0040] If so, it is determined that the corresponding chip to be detected is the abnormal chip.

[0041] Through the above-mentioned application embodiment, the delayed data value determined by the data selection signal value is compared with the valid area of the data signal to determine whether the corresponding chip to be detected is abnormal, so that the accuracy and efficiency of the detection result of whether the chip to be detected is abnormal can be further improved.

[0042] In a possible implementation manner, after determining that the corresponding chip to be detected is a normal chip, the method further includes:

[0043] Sending a first instruction to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in a qualified area based on the first instruction;

[0044] After determining that the corresponding chip to be detected is an abnormal chip, the method further includes:

[0045] A second instruction is sent to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in a non-conforming area based on the second instruction.

[0046] Through the above application embodiment, after determining whether the chip to be detected is abnormal, the chip to be detected is placed in the corresponding area by sending the first instruction / second instruction to the mechanical structure, thereby realizing automatic placement of the chip to be detected.

[0047] In a second aspect, the present application further provides a chip detection system, the device comprising:

[0048] An acquisition module, configured to acquire an image to be detected corresponding to at least one chip to be detected;

[0049] A feature extraction module is used to extract features from the collected images to be detected using a deep learning model to obtain corresponding high-dimensional feature vectors;

[0050] A calculation module, configured to calculate the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference image;

[0051] A processing module is used to determine whether the corresponding chip to be detected is a normal chip or an abnormal chip according to the similarity.

[0052] In a possible implementation, the acquisition module is specifically configured to select at least one reference image from an image database according to a preset strategy before acquiring the image to be detected corresponding to at least one chip to be detected; wherein the reference image is a normal image output by a normal chip.

[0053] In a possible implementation, the acquisition module is further configured to randomly select at least one first reference picture from the picture database according to a random selection strategy, and use the first reference picture as the reference picture.

[0054] In a possible implementation, the acquisition module is further used to prioritize the images in the image database based on image parameters according to a priority selection strategy; select at least one second reference image from the image database in order of priority, and use the second reference image as the reference image.

[0055] In one possible implementation, the feature extraction module is specifically used to perform image preprocessing on each of the collected images to be detected to obtain a corresponding target image; and perform feature extraction on each of the target images through the deep learning model to obtain the corresponding high-dimensional feature vector.

[0056] In one possible embodiment, the device also includes a reference feature extraction module, which is specifically used to perform reference image preprocessing on the collected reference image to obtain a corresponding target reference image; perform feature extraction on the target reference image through the deep learning model to obtain the corresponding high-dimensional feature reference vector, and store the high-dimensional feature reference vector.

[0057] In a possible implementation, the unified processing of the size and color mode includes adjusting the size of the image to a preset size and adjusting the color mode of the image to a preset color mode.

[0058] In a possible implementation, the processing module is specifically used to, when the reference image is a normal image, determine that the corresponding chip to be detected is the normal chip if it is determined that the similarities of all the images to be detected corresponding to the chip to be detected are greater than or equal to a similarity threshold; if it is determined that among the similarities of all the images to be detected corresponding to the chip to be detected, any similarity is less than the similarity threshold, determine that the corresponding chip to be detected is the abnormal chip.

[0059] In one possible embodiment, the device also includes a determination module, which is used to collect the data selection signal value corresponding to at least one of the chips to be detected, and determine the delayed data value based on the data selection signal value; judge whether the delayed data value exceeds the valid area of the data signal; if not, determine that the corresponding chip to be detected is the normal chip; if so, determine that the corresponding chip to be detected is the abnormal chip.

[0060] In a possible implementation, after determining that the corresponding chip to be inspected is a normal chip, the processing module is further configured to send a first instruction to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in a qualified area based on the first instruction;

[0061] After determining that the corresponding chip to be inspected is an abnormal chip, the processing module is further configured to send a second instruction to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in an unqualified area based on the second instruction.

[0062] In a third aspect, the present application provides an electronic device, comprising:

[0063] Memory for storing computer programs;

[0064] The processor is used to implement the above-mentioned chip detection method steps when executing the computer program stored in the memory.

[0065] In a fourth aspect, the present application provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned chip detection method are implemented.

[0066] For each of the above-mentioned aspects from the second to the fourth aspects and the technical effects that may be achieved by each of the aspects, please refer to the above-mentioned description of the technical effects that can be achieved by the first aspect or various possible solutions in the first aspect, and no further details will be given here. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] Figure 1 A schematic diagram of an artificial intelligence main framework provided in an embodiment of the present application;

[0068] Figure 2 A schematic diagram of an application environment provided in an embodiment of the present application;

[0069] Figure 3 A flowchart of a chip detection method provided in an embodiment of the present application;

[0070] Figure 4 A schematic diagram of the overall structure of a detection device for a chip to be detected provided in an embodiment of the present application;

[0071] Figure 5 A schematic diagram of the circuit architecture of the test platform provided in an embodiment of the present application;

[0072] Figure 6 A schematic diagram of a mechanical mechanism for automatically detecting a chip to be detected provided in an embodiment of the present application;

[0073] Figure 7A schematic diagram of a valid area of a delayed data value and a data signal provided in an embodiment of the present application;

[0074] Figure 8 A timing diagram of a read operation provided in an embodiment of the present application;

[0075] Figure 9 A schematic diagram of a chip detection device provided in an embodiment of the present application;

[0076] Figure 10 A schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0077] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail with reference to the accompanying drawings. The specific operating methods in the method embodiments can also be applied to device embodiments or system embodiments. It should be noted that in the description of the present application, "multiple" is understood as "at least two". "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the following three situations: A exists alone, A and B exist at the same time, and B exists alone. A is connected to B, which can represent the following two situations: A is directly connected to B and A is connected to B through C. In addition, in the description of the present application, words such as "first" and "second" are only used to distinguish the purpose of description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0078] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0079] Currently, image quality chips are tested by inspecting the image quality chip's image. Specifically, during the image inspection, the entire device is manually illuminated for visual inspection. The human eye then determines whether the image quality chip has a defective image, thereby determining whether the image quality chip is abnormal. However, this inspection method is labor-intensive and results in low image quality chip screening efficiency.

[0080] In order to solve the above problems, the present application proposes a chip detection method, which uses a deep learning model to extract features from the collected images of the chip to be detected, and then calculates the similarity between the extracted high-dimensional feature vector and the high-dimensional feature reference vector of the reference image, so as to judge whether the corresponding chip to be detected is abnormal based on the similarity. In this process, there is no need for manual participation in the detection, and only the deep learning model and the calculated similarity are required to realize the automatic detection of the chip to be detected. At the same time, due to the reduction in manpower consumption, the detection efficiency of the chip to be detected is also improved. Moreover, compared with the missed detection in manual detection, the use of a deep learning model for detection avoids the missed detection of the chip to be detected, so that the final detection result (that is, whether the chip to be detected is a normal chip or an abnormal chip) is more accurate.

[0081] Figure 1 A schematic diagram of an artificial intelligence main framework is shown. The main framework describes the overall workflow of the artificial intelligence system and is applicable to general artificial intelligence field needs, including two dimensions: "intelligent information chain" (horizontal axis) and "IT value chain" (vertical axis).

[0082] The "intelligent information chain" reflects the entire process from data acquisition to processing. For example, it can be a general process of intelligent information perception, intelligent information representation and formation, intelligent reasoning, intelligent decision-making, and intelligent execution and output. In this process, data undergoes a condensed process of "data-information-knowledge-wisdom."

[0083] The "IT value chain" reflects the value that artificial intelligence brings to the information technology industry, from the underlying infrastructure of artificial intelligence, information (providing and processing technology implementation) to the system's industrial ecological process.

[0084] Figure 2 A system architecture 200 provided by an embodiment of the present invention is shown. A data acquisition device 260 is used to collect image data and store it in a database 230. A training device 220 generates a target model / rule 201 based on the image data maintained in database 230. The following describes in more detail how training device 220 derives target model / rule 201 based on the image data. Target model / rule 201 uses a deep learning model to extract high-dimensional feature vectors of the image of the chip to be inspected. The target model / rule 201 then calculates similarity between the high-dimensional feature vectors and the high-dimensional feature reference vectors of the reference image, thereby detecting whether the chip to be inspected is abnormal based on this similarity.

[0085] The above image data is the collected image of the chip to be tested.

[0086] The target model / rule obtained by the training device 220 can be applied to different systems or devices. Figure 2In the embodiment, the execution device 210 is configured with an I / O interface 212 for data interaction with external devices, and a “user” can input data into the I / O interface 212 through a client device 240 .

[0087] The execution device 210 can call data, code, etc. in the data storage system 250 , and can also store data, instructions, etc. in the data storage system 250 .

[0088] The calculation module 211 uses the target model / rule 201 to process the input data. Specifically, the high-dimensional feature vector of the image of the chip to be detected is extracted through the deep learning model, and then the similarity is calculated based on the high-dimensional feature vector and the high-dimensional feature reference vector of the reference image, so as to detect whether the chip to be detected is abnormal based on the similarity.

[0089] Finally, the I / O interface 212 returns the processing result to the client device 240 and provides it to the user.

[0090] More deeply, the training device 220 can generate corresponding target models / rules 201 based on different data for different goals to provide users with better results.

[0091] In the attached Figure 2 In the case shown in , the user can manually specify the data to be input into the execution device 210, for example, by operating in the interface provided by the I / O interface 212. In another case, the client device 240 can automatically input data into the I / O interface 212 and obtain the results. If the automatic data input of the client device 240 requires user authorization, the user can set the corresponding permissions in the client device 240. The user can view the results output by the execution device 210 on the client device 240, and the specific presentation form can be specific methods such as display, sound, and action. The client device 240 can also act as a data acquisition terminal to store the collected image data in the database 230.

[0092] It is worth noting that Figure 2 This is only a schematic diagram of a system architecture provided by an embodiment of the present invention. The positional relationship between the devices, components, modules, etc. shown in the figure does not constitute any limitation. For example, in the attached Figure 2 In the embodiment, the data storage system 250 is an external memory relative to the execution device 210. In other cases, the data storage system 250 can also be placed in the execution device 210.

[0093] Based on the above system architecture, this application provides a chip detection method, referring to Figure 3 The flowchart of a chip detection method provided in an embodiment of the present application is shown, and the method includes:

[0094] S301: Collect an image to be inspected corresponding to at least one chip to be inspected.

[0095] When the number of chips to be detected is greater than 1, multiple chips to be detected can be automatically detected simultaneously based on subsequent steps to further improve the detection efficiency (ie, screening efficiency) of the chips to be detected.

[0096] The chip to be tested may be an image quality chip, but may also be other functional chips.

[0097] In order to detect whether the chip to be detected is abnormal, that is, whether there is a chip defect problem, it is first necessary to test the chip to be detected to collect one or more images to be detected of the chip to be detected.

[0098] The aforementioned testing of the chip to be tested can be performed by placing the chip to be tested on a test platform, lighting up the entire device via the test platform, and then completing the test of the chip to be tested. An image capture device is then used to capture the entire device screen to obtain a picture to be tested. The picture to be tested can be a random picture of the entire device captured by the image capture device.

[0099] like Figure 4 As shown, the chip to be tested (such as an image quality chip) is placed in a movable fixture (i.e., a test platform). Each time a chip to be tested is placed, the test platform is powered on, thereby driving the entire TV (i.e., the entire TV) to display an image. The image capture device then captures the image of the entire TV (which is the image to be tested) and feeds the captured image back to the system (e.g., a PC platform), thereby capturing the image to be tested of the chip to be tested.

[0100] In the embodiment of the present application, the test platform can be a board that drives the entire TV, such as a timing controller board. The test platform can have a built-in device that automatically moves the chip to be tested. In addition, the circuit architecture of the test platform can be as follows: Figure 5 As shown, through the system on chip (SoC) module of the whole machine, a control signal is input to the whole machine test platform to control the picture quality chip, and a unified standard interface for TV (USIT) signal is output to the whole TV to complete the test of the picture quality chip.

[0101] Furthermore, in order to automatically place the chip to be tested on the test platform and automatically test the chip to be tested, a mechanical structure can be used to place the chip to be tested and collect images to be tested. The mechanical structure can include a mechanical arm, such as a first mechanical arm and a second mechanical arm.

[0102] For example, Figure 6 As shown, the computer sends a chip loading action instruction to the first robotic arm, so that after receiving the chip loading action instruction, the first robotic arm takes out the chip to be tested from the chip transfer area and places it in the chip placement area in the test platform, and then feeds back to the computer after the chip to be tested is placed. The computer then sends a third instruction to the second robotic arm, so that the second robotic arm performs power switch control (i.e., power-on operation) according to the third instruction, completes the operation steps of lighting up the entire machine once, and then waits for a preset time (such as 5 seconds), captures the picture of the entire TV through the camera, and feeds the picture back to the system (such as a computer), thereby completing the automatic acquisition of the picture to be tested of the chip to be tested, reducing manual participation in the detection process of the chip to be tested, and thus speeding up the acquisition rate of the picture to be tested, which helps to further improve the detection efficiency of the chip to be tested, and at the same time, further improves the detection accuracy of the chip to be tested.

[0103] In addition, in order to collect one or more images to be tested of the chip to be tested, it is also necessary to obtain a reference image first, so that the chip to be tested can determine which image to test for, so as to obtain the corresponding image to be tested.

[0104] Before obtaining the reference image, multiple normal images output by multiple normal chips can be collected. The collection of the multiple normal images can be used to collect normal specific TV images displayed by the normal chips driven by the entire device.

[0105] In an embodiment of the present application, the multiple normal pictures output by the multiple normal chips collected above can be each normal picture output by each normal chip, for example, normal chip A, normal chip B, and normal chip C each output a normal picture; or multiple normal pictures can be output for each normal chip, and the number of normal pictures output by different normal chips is the same or different, for example, normal chip A, normal chip B, and normal chip C each output three normal pictures, for example, normal chip A outputs two normal pictures, and normal chip B and normal chip C each output three normal pictures; or one normal picture can be output for some normal chips, and some normal chips each output multiple normal pictures, and the number of multiple normal pictures output by each is the same or different, for example, normal chip A outputs one normal picture, and normal chip B and normal chip C each output three normal pictures, for example, normal chip A outputs one normal picture, normal chip B outputs two normal pictures, and normal chip C outputs three normal pictures.

[0106] Then, the collected normal images are stored in the image database for subsequent use at any time.

[0107] Furthermore, the required reference pictures can be obtained from a picture database.

[0108] In a possible implementation, in order to obtain a reference image, at least one reference image may be selected from an image database according to a preset strategy.

[0109] In an embodiment of the present application, the preset strategy may include a random selection strategy, which may be to randomly select at least one first reference image from the image database. Therefore, the selection of at least one reference image from the image database according to the preset strategy may be:

[0110] According to the random selection strategy, at least one first reference picture is randomly selected from the picture database, and then the obtained first reference picture is used as the reference picture.

[0111] In the embodiment of the present application, the image database includes a variety of reference images. The reference images can be normal images output by a normal chip, that is, normal images without any defects. Furthermore, the first reference image is also a normal image output by a normal chip.

[0112] For example, according to the random selection strategy, picture a, picture b, and picture c are randomly selected from the picture database as the first reference picture. Then, picture a, picture b, and picture c can be input into the chip to be tested respectively. Through the test of the chip to be tested, the picture to be tested corresponding to picture a (i.e., picture a'), the picture to be tested corresponding to picture b (i.e., picture b'), and the picture to be tested corresponding to picture c (i.e., picture c') can be obtained.

[0113] Through the above method, according to the random selection strategy, a reference image (i.e., the first reference image) is selected from the image database by random selection, thereby avoiding the abnormality of the chip to be detected caused by the abnormality of the final image to be detected due to problems with the hardware device itself, and further improving the detection accuracy of the chip to be detected.

[0114] In an embodiment of the present application, the above-mentioned preset strategy may further include a priority selection strategy, which may prioritize images in the image database based on image parameters, and then select at least one second reference image from the image database based on the order of priority. Therefore, the above-mentioned selection of at least one reference image from the image database according to the preset strategy may be:

[0115] According to the priority selection strategy, the pictures in the picture database are prioritized based on the picture parameters. Then, at least one second reference picture is selected from the picture database in order of priority, and the second reference picture is used as the reference picture.

[0116] In the embodiment of the present application, the image parameters may include, but are not limited to, image contrast parameters, image color category parameters, image grayscale parameters, and parameters for whether a preset target exists in the image. Therefore, based on the image parameters, the image contrast, number of color categories, grayscale value, and presence of a preset target can be determined. The preset target can be a building or sunlight. In other words, based on the presence of the preset target parameters in the image, it can be determined whether a building and / or sunlight exists in the corresponding image.

[0117] Optionally, the priority order determined based on the image parameters can be divided into three levels: the first level is: the grayscale value of the image is lower than the grayscale threshold, the number of color categories is lower than the color category threshold, there is no preset target, and the contrast is lower than the contrast threshold.

[0118] The second level is: the grayscale value of the image is lower than the grayscale threshold, the number of color categories is lower than the color category threshold, and there is no preset target; or, the grayscale value of the image is lower than the grayscale threshold, the number of color categories is lower than the color category threshold, and the contrast is lower than the contrast threshold.

[0119] The third level is: the grayscale value of the image is lower than the grayscale threshold, and the number of color categories is lower than the color category threshold.

[0120] The order of the above-mentioned first, second and third levels is: the first level precedes the second level, and the second level precedes the third level.

[0121] Exemplarily, the image database includes three normal images, namely image a, image b, and image c. Among them, the grayscale value of image a is lower than the grayscale threshold, and the number of color categories is lower than the color category threshold, and there is no preset target, and the contrast is lower than the contrast threshold. The grayscale value of image b is lower than the grayscale threshold, and the number of color categories is lower than the color category threshold, and there is no preset target, but the contrast of image b is higher than the contrast threshold. The grayscale value of image c is lower than the grayscale threshold, and the number of color categories is lower than the color category threshold, but there is a building in image c, and the contrast is higher than the contrast threshold. According to the priority selection strategy, image a, image b, and image c in the image database are sorted based on the image parameters, and it is determined that the priority order of image a is the first level, the priority order of image b is the second level, and the priority order of image c is the third level. Then, according to the order of priority, if only one second reference picture is selected from the picture database, picture a is selected from the picture database as the second reference picture; if two second reference pictures are selected from the picture database, picture a and picture b are selected from the picture database as the second reference pictures; if three second reference pictures are selected from the picture database, picture a, picture b and picture c are selected from the picture database as the second reference pictures.

[0122] Through the above method, according to the priority selection strategy, a reference image (i.e., the second reference image) is selected from the image database in the priority order determined by the image parameters, so that the selected reference image can better meet the needs, so that the chip to be detected can be tested based on the selected reference image. When the obtained image to be detected is abnormal, the abnormality of the image to be detected can be better highlighted, so that when the similarity is calculated based on the selected reference image in the future, the similarity difference is clearer, which helps to improve the detection accuracy of whether the chip to be detected is abnormal.

[0123] In an embodiment of the present application, the above-mentioned preset strategy may further include a combination strategy of random selection and priority selection, and the combination strategy of random selection and priority selection may be a combination of the aforementioned random selection strategy and the aforementioned priority selection strategy. For example, the combination strategy of random selection and priority selection may be to prioritize the images in the image database based on image parameters, and then select at least one third reference image from the image database in sequence according to the order of priority. If, in the process of selecting at least one third reference image from the image database in sequence according to the order of priority, multiple normal images are included in the priority of the same level, then at least one third reference image may be selected therefrom by random selection. Therefore, the aforementioned selection of at least one reference image from the image database according to the preset strategy may be:

[0124] Using a combination of random selection and priority selection, the images in the image database are prioritized based on image parameters. Then, at least one third reference image is selected from the image database in order of priority. If multiple normal images of the same priority level are included, at least one third reference image is selected from them at any time. This selected third reference image is then used as the reference image.

[0125] Exemplarily, the image database includes three normal images, namely image a, image b, and image c. Among them, the grayscale values of images a and b are both lower than the grayscale threshold, and the number of color categories is lower than the color category threshold, and there is no preset target, and the contrast is lower than the contrast threshold. The grayscale value of image c is lower than the grayscale threshold, and the number of color categories is lower than the color category threshold, and there is no preset target, but the contrast of image b is higher than the contrast threshold. According to a combination of random selection and priority selection strategies, image a, image b, and image c in the image database are sorted based on image parameters, and it is determined that the priority order of image a is the first level, the priority order of image b is the first level, and the priority order of image c is the second level. Then, according to the order of priority, if only one third reference image is selected from the image database, then image a or image b is randomly selected from the image database as the third reference image.

[0126] Through the above method, a reference image (i.e., the third reference image) is selected by combining random selection with a priority order determined by image parameters (i.e., a combination of random selection and priority selection strategies). This can avoid abnormalities in the chip to be detected caused by abnormalities in the final image to be detected due to problems with the hardware device itself, thereby further improving the detection accuracy of the chip to be detected. It can also better detect the performance of the chip to be detected, thereby better highlighting the abnormal points in the image to be detected, thereby improving the detection accuracy of the chip to be detected. This makes the detection result of whether the chip to be detected is abnormal more reliable.

[0127] In addition, when the number of selected reference images is greater than 1, comparisons can be performed from multiple angles and aspects to determine whether the chip to be detected is abnormal, thereby further improving the detection accuracy of the chip to be detected.

[0128] S302: Extract features from the collected images to be detected using a deep learning model to obtain corresponding high-dimensional feature vectors.

[0129] Specifically, we first perform image preprocessing on each of the collected images to obtain the target images. We then use a deep learning model to extract features from each of the target images, obtaining high-dimensional feature vectors corresponding to each image. This feature extraction process for the target images is accomplished using the existing image feature extraction capabilities of the deep learning model and will not be detailed here.

[0130] In an embodiment of the present application, the above-mentioned image preprocessing may include unified processing and normalization processing of size and color mode, but is not limited to this. The image preprocessing method can be flexibly adjusted according to the specific application scenario to make it more suitable for the corresponding application scenario, so as to further improve the detection efficiency and detection accuracy of the chip to be detected.

[0131] The above-mentioned unified processing of size and color mode is as follows: the size of the image to be detected is adjusted to the preset size, and the color mode of the image to be detected is adjusted to the preset color mode, so that the size and color mode of each image to be input into the deep learning model are unified, so that the deep learning model can better extract its features, which helps to improve the final detection accuracy.

[0132] For example, the sizes of the M images of N chips to be tested are all adjusted to 224×224, and the color mode is all adjusted to RGB mode, where N and M are both positive integers.

[0133] The above-mentioned normalization processing may include: normalizing the pixel values of the image to be detected, for example, normalizing the pixel value of each pixel point in the image to be detected to the range of [0, 1], or normalizing to the range of [-1, 1].

[0134] The above-mentioned deep learning model can use a pre-trained convolutional neural network model (English: Convolutional Neural Networks, abbreviated as CNN), and then use the output of the last layer before full connection as the extracted feature vector (such as a high-dimensional feature vector). The pre-trained CNN model can be a residual network model (English: Residual Network, abbreviated as ResNet), a visual geometry group model (English: Visual Geometry Group, abbreviated as VGG), or an efficient network model (EfficientNet), but is not limited to these. Therefore, the pre-trained CNN model can be directly used for feature extraction.

[0135] S303: Calculate the similarity between the high-dimensional feature vector and the high-dimensional feature reference vector corresponding to the reference image.

[0136] In order to detect whether the chip to be inspected is abnormal, before calculating the similarity between the high-dimensional feature vector and the high-dimensional feature reference vector corresponding to the reference image, it is necessary to first obtain the high-dimensional feature reference vector corresponding to the reference image.

[0137] In an embodiment of the present application, when the reference image may be a normal image of a normal chip, that is, a normal image without any defective issues, the high-dimensional feature reference vector corresponding to the reference image represents feature information of the normal image.

[0138] The high-dimensional feature reference vector corresponding to the reference image is obtained by performing reference image preprocessing on the collected multiple reference images (e.g., K first reference images, L second reference images, and Q third reference images) to obtain the corresponding target reference image. This reference image preprocessing is consistent with the image preprocessing in step S302 above and is not further described here.

[0139] Next, the deep learning model is used to extract features from each preprocessed reference image (i.e., the target reference image) to obtain the corresponding high-dimensional feature reference vector, so that the similarity calculated based on the high-dimensional feature reference vector is more reference-based, which helps to further improve the detection accuracy of the chip to be tested.

[0140] Furthermore, the obtained multiple high-dimensional feature reference vectors may be stored in a database, so that the high-dimensional feature reference vectors may be extracted quickly and accurately from the database.

[0141] Furthermore, the required high-dimensional feature reference vector is obtained from the database.

[0142] In an embodiment of the present application, the required high-dimensional feature reference vector obtained from the database (i.e., the high-dimensional feature reference vector corresponding to the reference image for comparison) is the high-dimensional feature reference vector of the reference image (such as the first reference image, the second reference image, and the third reference image) used when collecting the image to be detected in the aforementioned step S301.

[0143] Optionally, the acquisition of the high-dimensional feature reference vector corresponding to the reference picture may be performed before step S302 or after the reference picture is acquired in step S301.

[0144] Furthermore, after obtaining the high-dimensional feature reference vector, the similarity between each high-dimensional feature vector and the corresponding high-dimensional feature reference vector is calculated, so as to determine the similarity between the corresponding image to be detected and the corresponding reference image.

[0145] Exemplarily, the pictures to be detected include picture a', picture b', and picture c'. Among them, picture a' is collected by the chip to be detected based on picture a, picture b' is collected by the chip to be detected based on picture b, and picture c' is collected by the chip to be detected based on picture c. Then, after obtaining the high-dimensional feature reference vector of picture a, calculate the similarity between the high-dimensional feature vector of picture a' and the high-dimensional feature reference vector of picture a. After obtaining the high-dimensional feature reference vector of picture b, calculate the similarity between the high-dimensional feature vector of picture b' and the high-dimensional feature reference vector of picture b. After obtaining the high-dimensional feature reference vector of picture c, calculate the similarity between the high-dimensional feature vector of picture c' and the high-dimensional feature reference vector of picture c. Picture a, picture b, and picture c here are all reference pictures.

[0146] In the embodiment of the present application, the similarity can be calculated using Euclidean distance, thereby using Euclidean distance to measure the similarity between the image to be detected and the corresponding reference image. That is, the spatial distance between the two vectors (i.e., the high-dimensional feature vector and the high-dimensional feature reference vector) is directly calculated, thereby making the calculated similarity more accurate.

[0147] In Euclidean distance, the straight-line distance between two points is calculated by taking the square root of the sum of the squares of the differences in each dimension. Specifically, the formula is as follows:

[0148]

[0149] Among them, Euclidean Distance represents the eigenvector a i With the eigenvector b i The Euclidean distance between them.i is the high-dimensional feature vector of the image to be detected, b i is the high-dimensional feature reference vector of the corresponding reference image; or, b i is the high-dimensional feature vector of the image to be detected, a i is the high-dimensional feature reference vector of the corresponding reference image.

[0150] In an embodiment of the present application, a matrix operation method can be used to calculate the distances of all sample pairs (i.e., vector pairs in the feature vectors) at one time through a broadcast mechanism, instead of calculating pair by pair, thereby utilizing parallelism to improve the operating efficiency of the Euclidean distance, so as to more quickly calculate the similarity between the image to be detected and the corresponding reference image.

[0151] The smaller the calculated Euclidean distance is, the higher the similarity between the image to be detected and the corresponding reference image is; and the larger the calculated Euclidean distance is, the lower the similarity between the image to be detected and the corresponding reference image is.

[0152] S304: Determine whether the corresponding chip to be detected is a normal chip or an abnormal chip based on the similarity.

[0153] After the similarity is calculated in step S303, whether the corresponding chip to be detected is abnormal is determined based on the similarity.

[0154] Specifically, for each similarity, the following judgment operations are performed:

[0155] The similarity is compared with a similarity threshold to determine whether the similarity is greater than or equal to the similarity threshold.

[0156] If it is determined that the similarity is less than the similarity threshold, it is determined that the corresponding image to be detected is different from the corresponding reference image.

[0157] If it is determined that the similarity is greater than or equal to the similarity threshold, it is determined that the corresponding image to be detected is the same as the corresponding reference image.

[0158] Since the reference image can be a normal image output by a normal chip, under the premise that the reference image is a normal image, when there is only one image to be tested for the chip to be tested, if it is determined that the image to be tested is the same as the reference image for comparison, it means that the image to be tested is a normal image, and thus the chip to be tested corresponding to the image to be tested can be determined to be a normal chip; if it is determined that the image to be tested is different from the reference image for comparison, it means that the image to be tested is not a normal image, and thus the chip to be tested corresponding to the image to be tested can be determined to be an abnormal chip.

[0159] In addition, under the premise that the reference picture is a normal picture, when there are multiple pictures to be tested for the chip to be tested, after comparing the similarities of all pictures to be tested corresponding to the chip to be tested with the similarity threshold, if it is determined that all pictures to be tested are the same as the reference pictures for comparison, then it means that all pictures to be tested of the chip to be tested are normal pictures, and thus it can be determined that the chip to be tested is a normal chip; if it is determined that among all pictures to be tested corresponding to the chip to be tested, there is any picture to be tested that is different from the reference picture for comparison, then it means that among all pictures to be tested corresponding to the chip to be tested, there is at least one abnormal picture with a defective problem, and thus it can be determined that the chip to be tested is an abnormal chip.

[0160] Through the above method, based on the comparison of the similarity between the image to be detected corresponding to the chip to be detected and the reference image with the similarity threshold, it is determined whether the chip to be detected is abnormal, making the detection result of whether the chip to be detected is abnormal more accurate, while also avoiding missed detection of the chip to be detected, further improving the detection accuracy.

[0161] Optionally, if after a preset period of time has passed since the detection of whether the chip to be detected is abnormal, when the detection results of E consecutive images to be detected are all abnormal images (i.e., different from the corresponding reference images (i.e., normal images)), an alarm can be output so that the equipment used to detect whether the chip to be detected is abnormal can be detected based on the alarm, thereby avoiding the abnormality of the chip to be detected caused by a failure of the equipment used to detect whether the chip to be detected is abnormal, so as to further improve the detection accuracy of the chip to be detected.

[0162] Furthermore, the reference image selected in step S301 may be adjusted according to the alarm, and the detection strategy may also be adjusted to better detect whether the chip to be detected is abnormal, thereby further improving the detection accuracy of the chip to be detected.

[0163] Optionally, after calculating the similarities in step S303, the similarities can be sorted by size. The sorted similarities can then be divided into low-similarity samples and high-similarity samples using a similarity threshold that distinguishes between low-similarity samples and high-similarity samples. For example, if the similarity threshold is 0.3, similarities below 0.3 are classified as low-similarity samples, and similarities not less than 0.3 are classified as high-similarity samples.

[0164] When the reference image is a normal image, it means that the image to be detected corresponding to the low-similarity sample is inconsistent with the reference image, so it can be determined that the image to be detected corresponding to the low-similarity sample is an abnormal image, and further, it can be determined that the chip to be detected corresponding to the image to be detected is an abnormal chip. The low-similarity samples are then eliminated, and the eliminated low-similarity samples are recorded so that the system (such as a computer) can filter out the chips to be detected corresponding to the low-similarity samples, thereby notifying the mechanical structure to place the chips to be detected corresponding to the low-similarity samples in the unqualified area, thereby completing the automatic detection and automatic placement of the chips to be detected, and eliminating unqualified chips to be detected (i.e., abnormal chips).

[0165] Furthermore, after determining that the chip to be tested is a normal chip, a first instruction indicating that the chip to be tested is a normal chip is sent to the mechanical structure, so that after receiving the first instruction, the mechanical structure determines that the corresponding chip to be tested is a normal chip, and then places the corresponding chip to be tested in the corresponding qualified area.

[0166] After determining that the chip to be detected is an abnormal chip, a second instruction indicating that the chip to be detected is an abnormal chip is sent to the mechanical structure, so that after receiving the second instruction, the mechanical structure determines that the corresponding chip to be detected is an abnormal chip, and then places the corresponding chip to be detected in the corresponding unqualified area.

[0167] The mechanical structure mentioned above may be a robotic arm.

[0168] For example, Figure 6 As shown, after receiving the image captured by the camera (i.e., the image to be detected), the computer processes the image to be detected to determine whether the image to be detected is an OK image or an NG image (i.e., whether the image to be detected is a qualified image or an unqualified image), thereby determining whether the corresponding chip to be detected is an OK chip (i.e., a normal chip) or an NG chip (i.e., an abnormal chip), and after the determination is completed, the number of OK chips and the number of NG images are counted, and at the same time, an instruction is sent to the robotic arm indicating that the corresponding chip to be detected is a normal chip or the corresponding chip to be detected is an abnormal chip, and then the robotic arm places the corresponding chip to be detected in the corresponding area, thereby realizing the automatic movement and automatic loading and unloading of the chip to be detected. For example, if the robotic arm receives the first instruction indicating that the chip to be detected is a normal chip, it will place the corresponding chip to be detected in the qualified area. For another example, if the robotic arm receives the second instruction indicating that the chip to be detected is an abnormal chip, it will place the corresponding chip to be detected in the unqualified area.

[0169] In addition, the detection of the chip to be detected in the embodiment of the present application can also be detected by the data selection signal value. For example, Figure 4As shown, the chip to be detected is tested by the test platform, and then the data selection signal value of the chip to be detected fed back by the test platform is received, and then the chip to be detected is detected to be abnormal according to the data selection signal value.

[0170] Specifically, first, a delayed data value is determined based on the data strobe signal value. Furthermore, a valid region of the data signal is determined. Then, a determination is made as to whether the delayed data value exceeds the valid region of the data signal. The delayed data value may be a center value of the rising edge delay.

[0171] If it is determined that the delayed data value exceeds the valid region of the data signal, the data is determined to be abnormal, and thus the corresponding chip to be detected can be determined to be an abnormal chip.

[0172] If it is determined that the delayed data value does not exceed the valid region of the data signal, the corresponding data is determined to be normal, and thus the corresponding chip to be detected can be determined to be a normal chip.

[0173] For example, Figure 7 As shown, if the center value of the rising edge delay does not exceed the valid area of the data signal, it is determined that the corresponding chip to be detected is a normal chip.

[0174] Whether the delayed data value exceeds the valid area of the data signal can also be determined by comparing the center value of the rising edge delay with the minimum and maximum values of the valid area of the data signal. For example, when the center value of the rising edge delay is greater than or equal to the minimum value of the valid area of the data signal, and less than or equal to the maximum value of the valid area of the data signal, it is determined that the delayed data value does not exceed the valid area of the data signal; when the center value of the rising edge delay is less than the minimum value of the valid area of the data signal, or greater than the maximum value of the valid area of the data signal, it is determined that the delayed data value exceeds the valid area of the data signal. Thus, by comparing the values, the determination of whether the delayed data value exceeds the valid area of the data signal is made more accurate, further improving the detection accuracy of the chip to be detected.

[0175] The data strobe signal is used in double data rate (DDR) memory. It works alongside the data signal to indicate the effective sampling time for data. Its primary functions include data synchronization and alignment.

[0176] Data synchronization refers to the use of a data strobe signal to synchronize data sampling during data transmission, ensuring correct timing. Data alignment refers to the use of a data strobe signal to help the receiver correctly identify the start and end points of data.

[0177] Therefore, data sampling and synchronization are performed through the data selection signal to ensure that data is accurately transmitted at a high frequency.

[0178] In DDR memory, the data strobe signal generates a pulse signal during data transmission, indicating the valid time window for data. Specifically, when the data strobe signal is high, data transmission begins; when the data strobe signal is low, data transmission ends. The data between two data strobe signal pulses is considered valid data, and the receiving end can sample data based on the edges of the data strobe signal.

[0179] In such Figure 8 In the timing diagram of the read operation shown in the figure, the data strobe signal is generated by the dynamic random access memory (DRAM) and sent to the controller. In addition, the data strobe signal and the data signal are edge-aligned with the clock. The controller aligns the delayed data value, the delayed data strobe signal edge, and the data signal center, so that stable data can be sampled. In addition, Figure 8 8-1 in it means "Command: center aligned with rising edge of clock cycle"; Figure 8 8-2 in it means "the command is valid throughout the clock cycle"; Figure 8 8-3 in it means "read data: align edge with rising edge of clock cycle"; Figure 8 8-4 in the figure means "The valid window for reading data accounts for data-to-data skew and jitter."

[0180] Similarly, after determining whether the corresponding chip to be detected is abnormal based on the data selection signal value, the first instruction or the second instruction can be sent to the mechanical structure so that the mechanical structure places the chip to be detected in the corresponding qualified area or unqualified area, thereby realizing automatic detection and automatic placement of the chip to be detected.

[0181] Therefore, the system (such as a computer host computer) can further improve the detection accuracy of the chip to be detected by performing two tests on the chip to be detected. Specifically, first, through the aforementioned steps S301-S304, based on the similarity between the high-dimensional feature vector extracted by the deep learning model and the high-dimensional feature reference vector, it is determined whether the corresponding chip to be detected is abnormal; and, through the aforementioned judgment based on whether the delayed data value exceeds the valid area of the data signal, it is determined whether the chip to be detected is abnormal. Then, after determining that the chip to be detected is an abnormal chip based on the deep learning model, and / or after judging that the chip to be detected is an abnormal chip based on the delayed data value, the chip to be detected is determined to be an abnormal chip; after determining that the chip to be detected is a normal chip based on the deep learning model, and after judging that the chip to be detected is a normal chip based on the delayed data value, the chip to be detected is determined to be a normal chip. Furthermore, by sending the first instruction / second instruction to the mechanical structure, the chip to be inspected can be placed in the corresponding qualified area or unqualified area, thereby realizing automatic detection and automatic placement of the chip to be inspected, and the defective chips (i.e., abnormal chips to be inspected) can be eliminated to avoid defective problems of the chip to be inspected.

[0182] However, it should be noted that the execution order of determining whether the corresponding chip to be detected is abnormal based on the similarity between the high-dimensional feature vector extracted by the deep learning model and the high-dimensional feature reference vector can be performed before the execution order of determining whether the chip to be detected is abnormal based on the judgment of whether the delayed data value exceeds the valid area of the data signal, or after the execution order of determining whether the chip to be detected is abnormal based on the judgment of whether the delayed data value exceeds the valid area of the data signal. The two can also be performed simultaneously. The embodiments of the present application do not limit the execution order.

[0183] In summary, the chip detection method proposed in this application is based on a deep learning model to extract features from the collected images of the chip to be detected, and then calculates the similarity between the extracted high-dimensional feature vector and the high-dimensional feature reference vector of the reference image, and then determines whether the corresponding chip to be detected is abnormal based on the similarity, so that bad chips (i.e., abnormal chips to be detected) can be quickly identified, and human participation in judgment can be reduced, while improving the recognition rate of defective products (i.e., bad chips), avoiding missed screening due to human factors, reducing labor costs, and thereby improving the efficiency and accuracy of the chip to be detected.

[0184] In addition, by using the similarity between the high-dimensional feature vector extracted by the deep learning model and the high-dimensional feature reference vector, as well as the judgment based on whether the delayed data value exceeds the valid area of the data signal, it is comprehensively determined whether the chip to be tested is abnormal, so that the detection accuracy of the chip to be tested is further improved.

[0185] Based on the same inventive concept, the present application also provides a chip detection device, such as Figure 9 FIG. 1 is a schematic diagram of a chip detection device provided in the present application, the device comprising:

[0186] The acquisition module 901 is used to acquire an image to be detected corresponding to at least one chip to be detected;

[0187] A feature extraction module 902 is configured to extract features from the collected images to be detected using a deep learning model to obtain corresponding high-dimensional feature vectors;

[0188] A calculation module 903 is used to calculate the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference image;

[0189] The processing module 904 is configured to determine, based on the similarity, whether the corresponding chip to be detected is a normal chip or an abnormal chip.

[0190] In a possible implementation, the acquisition module 901 is specifically configured to select at least one reference image from an image database according to a preset strategy before acquiring the image to be detected corresponding to at least one chip to be detected; wherein the reference image is a normal image output by a normal chip.

[0191] In a possible implementation, the acquisition module 901 is further configured to randomly select at least one first reference picture from the picture database according to a random selection strategy, and use the first reference picture as the reference picture.

[0192] In a possible implementation, the acquisition module 901 is further used to prioritize the images in the image database based on image parameters according to a priority selection strategy; select at least one second reference image from the image database in order of priority, and use the second reference image as the reference image.

[0193] In one possible implementation, the feature extraction module 902 is specifically configured to perform image preprocessing on each of the collected images to be detected to obtain a corresponding target image; and perform feature extraction on each of the target images through the deep learning model to obtain the corresponding high-dimensional feature vector.

[0194] In one possible embodiment, the device also includes a reference feature extraction module, which is specifically used to perform reference image preprocessing on the collected reference image to obtain a corresponding target reference image; perform feature extraction on the target reference image through the deep learning model to obtain the corresponding high-dimensional feature reference vector, and store the high-dimensional feature reference vector.

[0195] In a possible implementation, the unified processing of the size and color mode includes adjusting the size of the image to a preset size and adjusting the color mode of the image to a preset color mode.

[0196] In one possible implementation, the processing module 904 is specifically used to, when the reference image is a normal image, determine that the corresponding chip to be detected is the normal chip if it is determined that the similarities of all the images to be detected corresponding to the chip to be detected are greater than or equal to a similarity threshold; if it is determined that among the similarities of all the images to be detected corresponding to the chip to be detected, any similarity is less than the similarity threshold, determine that the corresponding chip to be detected is the abnormal chip.

[0197] In one possible embodiment, the device also includes a determination module, which is used to collect the data selection signal value corresponding to at least one of the chips to be detected, and determine the delayed data value based on the data selection signal value; judge whether the delayed data value exceeds the valid area of the data signal; if not, determine that the corresponding chip to be detected is the normal chip; if so, determine that the corresponding chip to be detected is the abnormal chip.

[0198] In a possible implementation, after determining that the corresponding chip to be inspected is a normal chip, the processing module 904 is further configured to send a first instruction to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in a qualified area based on the first instruction;

[0199] After determining that the corresponding chip to be inspected is an abnormal chip, the processing module 904 is further configured to send a second instruction to the mechanical structure, so that the mechanical structure places the corresponding chip to be inspected in a non-conforming area based on the second instruction.

[0200] Based on the same inventive concept, an electronic device is also provided in the embodiment of the present application. The electronic device can realize the function of the detection device of the aforementioned chip, referring to Figure 10 , the above-mentioned electronic equipment includes:

[0201] At least one processor 1001, and a memory 1002 connected to the at least one processor 1001. The specific connection medium between the processor 1001 and the memory 1002 is not limited in the embodiment of the present application. Figure 10 In the example, the processor 1001 and the memory 1002 are connected via the bus 1000. Figure 10 The bus 1000 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 10 The diagram is represented by only one thick line, but this does not mean that there is only one bus or one type of bus. Alternatively, the processor 1001 may also be referred to as a controller, without limitation to the name.

[0202] In the embodiment of the present application, the memory 1002 stores instructions that can be executed by at least one processor 1001. The at least one processor 1001 can execute the chip detection method discussed above by executing the instructions stored in the memory 1002. The processor 1001 can implement Figure 9 The functions of each module in the device shown.

[0203] Among them, the processor 1001 is the control center of the device, which can use various interfaces and lines to connect the various parts of the entire control device, and monitor the device as a whole by running or executing instructions stored in the memory 1002 and calling data stored in the memory 1002, the various functions of the device and processing data.

[0204] In one possible design, processor 1001 may include one or more processing units. Processor 1001 may integrate an application processor and a modem processor. The application processor primarily processes the operating system, user interface, and application programs, while the modem processor primarily handles wireless communications. It is understood that the modem processor may not be integrated into processor 1001. In some embodiments, processor 1001 and memory 1002 may be implemented on the same chip. In some embodiments, they may also be implemented on separate chips.

[0205] The processor 1001 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component, and can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the detection method of the chip disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware processor, or can be executed by a combination of hardware and software modules in the processor.

[0206] The memory 1002 is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 1002 may include at least one type of storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory, a random access memory (English: Random Access Memory, abbreviated as RAM), a static random access memory (English: Static Random Access Memory, abbreviated as SRAM), a programmable read-only memory (English: Programmable Read Only Memory, abbreviated as PROM), a read-only memory (English: Read Only Memory, abbreviated as ROM), an electrically erasable programmable read-only memory (English: Electrically Erasable Programmable Read-Only Memory, abbreviated as EEPROM), a magnetic memory, a disk, an optical disk, etc. The memory 1002 is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 1002 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0207] By designing and programming the processor 001, the code corresponding to the chip detection method described in the above embodiment can be fixed into the chip, so that the chip can execute the code when it is running. Figure 3 The steps of the chip detection method of the embodiment shown are as follows: How to design and program the processor 1001 is a technique well known to those skilled in the art and will not be described in detail here.

[0208] Based on the same inventive concept, an embodiment of the present application further provides a storage medium storing computer instructions. When the computer instructions are executed on a computer, the computer executes the chip detection method discussed above.

[0209] In some possible embodiments, various aspects of the chip detection method provided in the present application can also be implemented in the form of a program product, which includes program code. When the program product is run on the device, the program code is used to enable the control device to execute the steps of the chip detection method according to various exemplary embodiments of the present application described above in this specification.

[0210] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0211] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0212] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0213] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0214] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A chip detection method, characterized in that: include: Collecting an image to be detected corresponding to at least one chip to be detected; Perform feature extraction on the collected images to be detected through a deep learning model to obtain corresponding high-dimensional feature vectors; Calculating the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference image; According to the similarity, it is determined whether the corresponding chip to be detected is a normal chip or an abnormal chip.

2. The method according to claim 1, wherein Before acquiring the image to be detected corresponding to at least one chip to be detected, the method further includes: According to a preset strategy, at least one reference image is selected from an image database; wherein the reference image is a normal image output by a normal chip.

3. The method according to claim 2, wherein The step of selecting at least one reference image from an image database according to a preset strategy includes: According to a random selection strategy, at least one first reference picture is randomly selected from the picture database, and the first reference picture is used as the reference picture.

4. The method according to claim 2, wherein The step of selecting at least one reference image from an image database according to a preset strategy includes: Prioritizing each image in the image database based on image parameters according to a priority selection strategy; At least one second reference picture is selected from the picture database in sequence according to the order of priority, and the second reference picture is used as the reference picture.

5. The method according to claim 1, wherein The deep learning model is used to extract features from the collected images to be detected to obtain corresponding high-dimensional feature vectors, including: Performing image preprocessing on each of the collected images to be detected to obtain a corresponding target image; The deep learning model is used to extract features from each target image to obtain the corresponding high-dimensional feature vector.

6. The method according to claim 1, wherein Before calculating the similarity between the high-dimensional feature vector and the high-dimensional feature reference vector corresponding to the reference picture, the method further includes: Performing reference image preprocessing on the collected reference image to obtain a corresponding target reference image; The target reference image is subjected to feature extraction through the deep learning model to obtain the corresponding high-dimensional feature reference vector, and the high-dimensional feature reference vector is stored.

7. The method according to claim 1, wherein Determining, based on the similarity, whether the corresponding chip to be detected is a normal chip or an abnormal chip includes: When the reference picture is a normal picture, if it is determined that the similarities of all the pictures to be detected corresponding to the chip to be detected are greater than or equal to a similarity threshold, then the corresponding chip to be detected is determined to be the normal chip; If it is determined that any of the similarities of all the images to be detected corresponding to the chip to be detected has a similarity less than the similarity threshold, the corresponding chip to be detected is determined to be the abnormal chip.

8. The method according to claim 1, wherein The method further comprises: Collecting a data strobe signal value corresponding to at least one of the chips to be detected, and determining a delayed data value according to the data strobe signal value; Determining whether the delayed data value exceeds a valid region of the data signal; If not, determining that the corresponding chip to be detected is the normal chip; If so, it is determined that the corresponding chip to be detected is the abnormal chip.

9. A chip detection device, characterized in that: include: An acquisition module, configured to acquire an image to be detected corresponding to at least one chip to be detected; A feature extraction module is used to extract features from the collected images to be detected using a deep learning model to obtain corresponding high-dimensional feature vectors; A calculation module, configured to calculate the similarity between the high-dimensional feature vector and a high-dimensional feature reference vector corresponding to a reference image; A processing module is used to determine whether the corresponding chip to be detected is a normal chip or an abnormal chip according to the similarity.

10. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the method according to any one of claims 1 to 8 when executing the computer program stored in the memory.

11. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

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