Array substrate, display method and display equipment

Abstract

The invention discloses an array substrate, a display method and display equipment, and relates to the technical field of display, the array substrate comprises a plurality of pixel driving units in rectangular arrangement, each pixel driving unit is coupled with a corresponding gate line and a corresponding data line, and each pixel driving unit comprises a first thin film transistor, a capacitor and a reset module; the control end of the first thin film transistor is connected to the gate line, the input end of the first thin film transistor is connected to the data line, the output end of the first thin film transistor is connected with one end of the capacitor, and the other end of the capacitor is connected with the positive voltage end. One end of the reset module is connected to a first connecting line of the first thin film transistor and the capacitor, the other end of the reset module is connected with a negative electrode voltage end, and the conducting state of the reset module is controlled by a switch control signal, so that visual persistence of a current frame display picture is counteracted under the condition that a conventional black frame insertion display scheme is not needed, and the display effect is improved. Clear imaging of human eyes is achieved, and the problem that the refresh rate is reduced due to the adoption of a conventional black insertion display scheme is avoided.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate, a display method, and a display device. Background Art

[0002] In the field of display technology, whether it's an LCD (Liquid Crystal Display) or a self-luminous display, motion blur is common in dynamic images at low refresh rates. This phenomenon stems from the human eye's persistence of vision. When an object's speed exceeds the visual persistence threshold, the human eye is unable to clearly capture the moment of motion, resulting in a blurry image with residual images.

[0003] To solve the above problems, a conventional black insertion display solution is often used, which is to split a single frame into two stages: displaying the picture and displaying black. The angle of the outgoing light is changed by dynamically rotating the liquid crystal molecules to improve the display viewing angle. At the same time, the black frame is used to offset the visual residue of the current frame, providing a "zero" basis for the next frame, thereby enhancing dynamic clarity.

[0004] However, such solutions require doubling the refresh rate in self-luminous displays such as OLED (Organic Light-Emitting Diode) to maintain the original refresh rate, resulting in a significant increase in hardware costs. Summary of the Invention

[0005] The main purpose of this application is to provide an array substrate, a display method and a display device, aiming to solve the technical problem of how to avoid blurred imaging of the human eye caused by visual residue while maintaining the original refresh rate.

[0006] To achieve the above objectives, the present application provides an array substrate, which includes a plurality of pixel driving units arranged in a rectangular shape, each pixel driving unit coupled to a corresponding gate line and data line, and each pixel driving unit including a first thin film transistor, a capacitor, and a reset module;

[0007] The control terminal of the first thin film transistor is connected to the gate line, the input terminal of the first thin film transistor is connected to the data line, the output terminal of the first thin film transistor is connected to one end of the capacitor, and the other end of the capacitor is connected to the positive voltage terminal;

[0008] One end of the reset module is connected to the first connection line between the first thin film transistor and the capacitor, the other end of the reset module is connected to the negative voltage end, and the conduction state of the reset module is controlled by the switch control signal.

[0009] In one embodiment, one switch control signal controls the reset modules in the same row of pixel driving units; or one switch control signal controls the reset modules in multiple adjacent rows of pixel driving units.

[0010] In one embodiment, the switch control signal is generated by a front-end control chip.

[0011] In one embodiment, the pixel driving unit further includes a second thin film transistor and a light emitting diode, and the reset module includes a third thin film transistor;

[0012] The control terminal of the second thin film transistor is connected to the first connection line, the input terminal of the second thin film transistor is connected to the connection line between the capacitor and the positive voltage terminal, the output terminal of the second thin film transistor is connected to the positive electrode of the light emitting diode, and the negative electrode of the light emitting diode is connected to the negative voltage terminal;

[0013] The input end of the third thin film transistor is connected to the first connection line via the control end of the second thin film transistor, the output end of the third thin film transistor is connected to the negative voltage end, and the control end of the third thin film transistor is connected to the switch control signal.

[0014] In addition, to achieve the above-mentioned object, the present application also proposes a display method, which is applied to the array substrate described above, wherein the array substrate includes a plurality of pixel driving units arranged in a rectangular shape, each pixel driving unit being coupled to a corresponding gate line and data line, and each pixel driving unit including a first thin film transistor, a capacitor, and a reset module;

[0015] In the current frame display, the display method includes:

[0016] When each pixel driving unit on the current row completes the display operation and triggers the black insertion instruction, a switch control signal is output to each target pixel driving unit on the target row to turn on the target reset module in each target pixel driving unit, wherein the target row is determined according to the number of times the black insertion instruction is triggered and the number of rows turned on at a single time;

[0017] Based on the turned-on target reset module, the front-end voltage of the target capacitor in each target pixel driving unit is pulled down to the voltage level on the negative voltage terminal.

[0018] In one embodiment, before each pixel driving unit on the current row completes the display operation, the method further includes:

[0019] The target trigger row number is determined according to the total number of rows of gate lines coupled to the pixel driving units and the black insertion duty ratio in the black insertion instruction.

[0020] In one embodiment, after each pixel driving unit on the current row completes the display operation, the method further includes:

[0021] Determine whether the current row number corresponding to the current row is equal to or greater than the target trigger row number;

[0022] If so, the black insertion instruction is triggered;

[0023] If not, each pixel driving unit on the next row is controlled to perform a display operation, and after each pixel driving unit on the next row completes the display operation, it is determined whether a black insertion instruction is triggered.

[0024] In one embodiment, the step of outputting a switch control signal to each target pixel driving unit on a target row includes:

[0025] A switch control signal is output to each target pixel driving unit on a target row; or a switch control signal is output to each target pixel driving unit on multiple adjacent target rows.

[0026] In one embodiment, the display method further includes:

[0027] After the display operation of the current frame display image is completed, the non-target pixel driving unit is acquired, and before the display operation of the next frame display image begins, the corresponding switch control signal is output to each non-target pixel driving unit to pull down the front-end voltage of the capacitor in each non-target pixel driving unit to the voltage level on the negative voltage terminal.

[0028] In addition, to achieve the above-mentioned purpose, the present application also proposes a display device, which includes a display panel, and the display panel includes the array substrate described above.

[0029] One or more technical solutions proposed in this application have at least the following technical effects:

[0030] A novel array substrate is proposed, which includes a plurality of pixel driving units arranged in a rectangular shape. Each pixel driving unit is coupled to a corresponding gate line and data line. Each pixel driving unit includes a first thin-film transistor, a capacitor, and a reset module. The control terminal of the first thin-film transistor is connected to the gate line, the input terminal of the first thin-film transistor is connected to the data line, the output terminal of the first thin-film transistor is connected to one end of the capacitor, and the other end of the capacitor is connected to a positive voltage terminal. One end of the reset module is connected to a first connection line between the first thin-film transistor and the capacitor, and the other end of the reset module is connected to a negative voltage terminal. The conduction state of the reset module is controlled by a switch control signal.

[0031] That is, the present application adds a reset module between the first thin-film transistor and the capacitor of each pixel driving unit, which can connect the front end of the capacitor to the negative voltage terminal. When the reset module is turned on by a switch control signal, the front end voltage of the capacitor can be lowered and maintained at the voltage level of the negative voltage terminal, thereby turning off the pixel light emission on the pixel driving unit. This is equivalent to performing a black insertion operation in a frame display image. Without adopting a conventional black insertion display solution, the visual afterimage of the current frame display image is offset, thereby achieving clear imaging for the human eye and avoiding the refresh rate reduction problem caused by the conventional black insertion display solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0033] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0034] Figure 1 A schematic diagram of a flow chart provided for an embodiment of a display method of the present application;

[0035] Figure 2 This is a schematic diagram of the basic structure of the array substrate of this application;

[0036] Figure 3 This is a schematic diagram of the display screen splitting of a conventional black insertion display solution;

[0037] Figure 4 This is a circuit control structure diagram of the array substrate of this application;

[0038] Figure 5 for Figure 4 The schematic diagram of the row-by-row input timing of the switch control signal corresponding to the array substrate shown;

[0039] Figure 6 This is another circuit control structure diagram of the array substrate of this application;

[0040] Figure 7 for Figure 6 A schematic diagram of a multi-row input timing sequence of switch control signals corresponding to the array substrate shown;

[0041] Figure 8 Schematic diagram of the device structure of the hardware operating environment involved in the display method in the embodiment of the present application.

[0042] Description of Figure Numbers:

[0043] 10. Pixel driving unit; G, gate line; S, data line; T1, first thin film transistor; C, capacitor; 20. Reset module; ELVDD, positive voltage terminal; ELVSS, negative voltage terminal; M, switch control signal;

[0044] T3, third thin film transistor; T2, second thin film transistor; D, light emitting diode.

[0045] The purpose, features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0046] It should be understood that the specific embodiments described herein are merely used to explain the technical solutions of the present application and are not intended to limit the present application.

[0047] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0048] The main solution of the embodiment of the present application is: when each pixel driving unit on the current row completes the display operation and triggers the black insertion instruction, a switch control signal is output to each target pixel driving unit on the target row to turn on the target reset module in each target pixel driving unit, wherein the target row is determined based on the number of times the black insertion instruction is triggered and the number of rows that are turned on once; based on the turned-on target reset module, the front-end voltage of the target capacitor in each target pixel driving unit is pulled down to the voltage level on the negative voltage terminal.

[0049] Since conventional black insertion display solutions will lower the refresh rate when applied to self-luminous displays such as OLED, the refresh rate needs to be doubled to maintain the original refresh rate, but this operation will result in a significant increase in hardware costs.

[0050] The present application provides a solution by adding a reset module between the first thin-film transistor and the capacitor of each pixel driving unit, which can connect the front end of the capacitor to the negative voltage terminal. When the reset module is turned on by a switch control signal, the front end voltage of the capacitor can be lowered and maintained at the voltage level of the negative voltage terminal, thereby turning off the pixel light emission on the pixel driving unit. This is equivalent to performing a black insertion operation in a frame display image. Without adopting a conventional black insertion display solution, the visual afterimage of the current frame display image is offset, achieving clear imaging for the human eye and avoiding the refresh rate reduction problem caused by the conventional black insertion display solution.

[0051] It should be noted that the execution subject of this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, mobile phone, etc., or an electronic device or display device capable of implementing the above functions. The following uses a display device as an example to illustrate this embodiment and the following embodiments.

[0052] Based on this, the embodiment of the present application provides a display method, referring to Figure 1 , Figure 1 This is a flow chart showing an embodiment of the method of this application.

[0053] In this embodiment, the display method includes steps S10 to S20:

[0054] In step S10, when each pixel driving unit 10 on the current row completes the display operation and triggers the black insertion instruction, a switch control signal is output to each target pixel driving unit 10 on the target row to turn on the target reset module 20 in each target pixel driving unit 10, wherein the target row is determined based on the number of times the black insertion instruction is triggered and the number of rows that are turned on once.

[0055] In step S20 , based on the turned-on target reset module 20 , the front-end voltage of the target capacitor C in each target pixel driving unit 10 is pulled down to the voltage level of the negative voltage terminal ELVSS.

[0056] The display method shown in this embodiment is applied to Figure 2 The basic structural diagram of the array substrate is as follows: Figure 2 It can be seen that the array substrate includes a plurality of pixel driving units 10 arranged in a rectangular shape. Each pixel driving unit 10 is coupled to a corresponding gate line and data line. Each pixel driving unit 10 includes a first thin-film transistor T1, a capacitor C, and a reset module 20. The control terminal of the first thin-film transistor T1 is connected to the gate line, the input terminal of the first thin-film transistor T1 is connected to the data line, the output terminal of the first thin-film transistor T1 is connected to one end of the capacitor C, and the other end of the capacitor C is connected to the positive voltage terminal ELVDD. One end of the reset module 20 is connected to the first connection line between the first thin-film transistor T1 and the capacitor C, and the other end of the reset module 20 is connected to the negative voltage terminal ELVSS. The conduction state of the reset module 20 is controlled by a switch control signal.

[0057] First combine Figure 3 The conventional black insertion display scheme is explained. It can be seen that the conventional black insertion display scheme is to split the original one-frame display screen into two frames: the display screen and the black display screen. This is equivalent to the different liquid crystal brightness at different times in the original one-frame display screen. This black insertion scheme is only applicable to LCDs. The reason why OLEDs use this scheme will have a problem of reduced refresh rate is because LCDs rely on backlights for luminous display, and their liquid crystal molecules themselves do not emit light. Therefore, after each frame is displayed, the backlight can be quickly turned off to insert a black frame. For example, when a black frame is inserted at 60Hz, the backlight flickers at 120Hz, but the liquid crystal molecules still work at 60Hz, and the impact on the refresh rate is negligible. However, OLED is self-luminous, that is, each pixel emits light independently, and the brightness of each pixel needs to be directly controlled. Therefore, after each frame is displayed, all pixels need to be forced to turn off to insert a black frame, so that the pixel light-emitting time is occupied by the black insertion stage, resulting in a reduction in the effective display time, which in turn leads to a reduction in the refresh rate.

[0058] Therefore, in order to avoid the phenomenon of reduced refresh rate when OLED adopts conventional black insertion display solution, this embodiment proposes a method such as Figure 2 The basic structural diagram of the array substrate is as follows: Figure 1The display solution is to add a reset module 20 to each pixel driving unit 10 of a conventional array substrate. After the pixel driving unit 10 selected for black insertion completes the display operation, the reset module 20 pulls the pixel driving unit 10 to a negative voltage to turn off the pixel's light emission. That is, the negative voltage is used to quickly turn off the power supply to the light-emitting diode D during the blanking time, without affecting the normal display phase, that is, without occupying the normal display frame time, thereby avoiding the problem of reduced refresh rate caused by the black insertion phase occupying the frame time in conventional black insertion display solutions.

[0059] The specific display process is as follows: suppose that the front-end control chip detects that each pixel driving unit 10 on the Gn row has completed the display task and turned off the scanning signal input on the Gn gate line, triggering the black insertion instruction. At this time, the front-end control chip generates a switch control chip M1 for each pixel driving unit 10 on the target row, that is, the G1 row, and transmits the switch control signal M1 to the target reset module 20 of each target pixel driving unit 10 on the G1 row, turning on each target reset module 20, so that each target reset module 20 can connect the front end of each target capacitor C in each target pixel driving unit 10 to which it belongs to the negative voltage terminal ELVSS, and pull the front end voltage of each target capacitor C down to the voltage level of each negative voltage terminal ELVSS, that is, pull the front end voltage down to a negative voltage, and the G1 row pixel driving unit 1 that does not need to perform the display operation is turned off. 0 is turned off; when it is detected that each pixel driving unit 10 on the Gn+1 row has completed the display task and turned off the scanning signal input on the Gn+1 gate line, the black insertion instruction is triggered. At this time, the front-end control chip generates a switch control signal M2 for each pixel driving unit 10 on the target row, that is, the G2 row, and transmits the switch control signal M2 to the target reset module 20 of each target pixel driving unit 10 on the G2 row, turning on each target reset module 20, so that each target reset module 20 can connect the front end of each target capacitor C in each target pixel driving unit 10 thereof to the negative voltage terminal ELVSS, and pull down the front end voltage of each target capacitor C to the voltage level of each negative voltage terminal ELVSS, that is, pull down the front end voltage to a negative voltage, and turn off the G2 row pixel driving unit 10 that does not need to perform the display operation.

[0060] The same process is repeated until all rows of pixel driving units 10 on the frame display screen complete the display operation and complete the operation of lowering the front-end voltage of the corresponding row pixel driving units 10, thereby achieving a black insertion effect similar to that of a conventional black insertion display scheme. However, because the pixel light emission shutoff operation of the pixel driving unit 10 is completed within the blanking time, it does not occupy the display time of the frame display screen, resulting in the problem of a reduced refresh rate caused by the shortened display time of the frame display screen.

[0061] It states that the target row is determined based on the number of times the black insertion command is triggered and the number of rows that are turned on at a time. For example, if the black insertion command is triggered once within the frame, and the number of rows that are turned on at a time is one, then the number 1*1 is used to determine the current target row as G1. If the black insertion command is triggered once within the frame, and the number of rows that are turned on at a time is five, then the number 1*5 is used to determine the current target rows as G1, G2, G3, G4, and G5.

[0062] It should be noted that before step S10, step S01 is also included:

[0063] In step S01 , a target trigger row number is determined according to the total number of rows of gate lines coupled to the pixel driving unit 10 and the black insertion duty ratio in the black insertion instruction.

[0064] In this embodiment, the target trigger row number refers to the row number for triggering the black insertion instruction. For example, if the total number of gate lines coupled to the pixel driving unit 10 in the array substrate is 1080, and the black insertion duty cycle of the black insertion instruction is set to 50%, then using 1080 / 50%, the target trigger row number is row 540. That is, after detecting that the display operation of row G540 has been completed, it is determined that the black insertion operation has been triggered, and the rows after row G540 are determined to trigger the black insertion operation until the display operation of the frame is completed.

[0065] The specific number of target trigger rows can be set according to the actual desired effect. For example, if black insertion is required to take effect every half frame, the black insertion duty cycle in the black insertion instruction is set to 50%. If black insertion is required to take effect every 10 rows, the black insertion duty cycle in the black insertion instruction is set to about 99%, that is, the black insertion duty cycle is equal to (nq) / n%.

[0066] Here, n is the total number of rows of gate lines coupled to the pixel driving unit 10 , and q is the number of rows where black insertion needs to be performed at intervals.

[0067] In addition, it should be noted that after step S10, steps S11 to S13 are also included:

[0068] Step S11, determining whether the current row number corresponding to the current row is equal to or greater than the target trigger row number.

[0069] Step S12: If yes, trigger the black insertion instruction.

[0070] In step S13 , if not, each pixel driving unit 10 on the next row is controlled to perform a display operation, and after each pixel driving unit 10 on the next row completes the display operation, it is determined whether a black insertion instruction is triggered.

[0071] Assume that the total number of gate lines coupled to the pixel driving unit 10 is 1080, and the target trigger row number is row 540. If the current line is G230, the corresponding current row number is row 230, and it is determined that it is less than row 540, then the black insertion instruction is not triggered. At this time, the pixel driving units 10 on the next row, that is, row G231, are controlled to perform a display operation, because it is determined whether its row number is equal to or greater than the target trigger row number. If the current line is G630, the corresponding current row number is row 630, which is greater than row 540, then it is determined that the black insertion instruction is triggered. Using 630-540+1, it can be seen that the current number of times the black insertion instruction is triggered is 91 times. The number of rows that are turned on once when the black insertion instruction is triggered is 1 row. Using 91*1, it is determined that the pixel driving units 10 on row G91 need to be controlled to enter the pixel off state, that is, the front-end control chip generates a switch control signal to turn on each reset module 20 in the pixel driving unit 10 on row G91.

[0072] In one possible embodiment, combining Figure 4 A circuit control structure diagram of the array substrate shown in FIG. Figure 5 The row-by-row black insertion timing sequence shown in FIG. 1 is used to illustrate that step S10 may include step S14:

[0073] In step S14 , a switch control signal is output to each target pixel driving unit 10 on a target row.

[0074] First, according to Figure 5 As can be seen, in this array substrate, the pixel driving units 10 coupled to the same gate line receive the same switching control signal. That is, one switching control signal controls the reset modules 20 in the same row of pixel driving units 10, while different rows of pixel driving units 10 are turned on and off based on different switching control signals. Based on this circuit control structure, the front-end control chip can output a single switching control signal to control pixels in four rows of pixel driving units 10 to stop emitting light, effectively controlling the pixel driving units 10 row by row.

[0075] Assume that when it is detected that each pixel driving unit 10 on the Gn-1 row has completed the display operation and triggered the black insertion instruction, each pixel driving unit 10 on the G1 row needs to turn off the pixel. At this time, the front-end control chip will start to generate the M1 switch control signal and transmit it to the control end of the third thin-film transistor T3 in each pixel driving unit 10 on G1 to control the third thin-film transistor T3 to enter the conductive state, and connect the front end of the capacitor C in each pixel driving unit 10 on G1 to the negative voltage terminal ELVSS, thereby pulling the front end voltage of the capacitor C down to The negative voltage causes the front-end voltage of the capacitor C to be unable to maintain the on-state voltage of the second thin-film transistor T2, and the second thin-film transistor T2 is turned off, so that it cannot access the voltage value on the positive voltage terminal ELVDD to power the light-emitting diode D, thereby turning off the light-emitting diode D, so that the pixels of each pixel driving unit 10 on G1 are turned off. Similarly, if it is detected that each pixel driving unit 10 on the Gn row has completed the display operation and triggered the black insertion instruction, each pixel driving unit 10 on the G2 row needs to turn off the pixels until the display of the frame is completed.

[0076] In another possible embodiment, combining Figure 6 Another circuit control structure diagram of the array substrate and Figure 7 The multi-row black insertion timing sequence shown in FIG. 1 is used to illustrate that step S10 may include step S15:

[0077] In step S15 , a switch control signal is output to each target pixel driving unit 10 on a plurality of adjacent target rows.

[0078] First, according to Figure 6 As can be seen, in this array substrate, the switch control signals received by the pixel driving units 10 coupled to multiple adjacent gate lines are the same control signal, meaning that one switch control signal controls the reset modules 20 in multiple adjacent rows of pixel driving units 10. Based on this circuit control structure, the front-end control chip can be configured to output a single switch control signal to control pixels in four rows of pixel driving units 10 to stop emitting light. In other words, if the control scheme of controlling pixel driving units 10 row by row is deemed to have excessively high control costs, a scheme of controlling pixel driving units 10 in multiple rows can be configured to reduce the row control costs of the pixel driving units 10.

[0079] Assume that, when it is detected that each pixel driving unit 10 on the Gn row has completed the display operation and triggered the black insertion instruction, each pixel driving unit 10 on the G1 to G4 rows needs to turn off the pixel. At this time, the front-end control chip will start to generate the switch control signal M1 and transmit it to the control end of the third thin-film transistor T3 in each pixel driving unit 10 on the G1 to G4 rows, so as to control the third thin-film transistor T3 to enter the conductive state, and connect the front end of the capacitor C in each pixel driving unit 10 on the G1 to G4 to the negative voltage terminal ELVSS, thereby pulling the front end voltage of the capacitor C down to the negative voltage. The front-end voltage of the capacitor C is unable to maintain the on-state voltage of the second thin-film transistor T2, and the second thin-film transistor T2 is turned off, so that it cannot access the voltage value on the positive voltage terminal ELVDD to power the light-emitting diode D. In this way, the light-emitting diode D is turned off, so that the pixels of each pixel driving unit 10 on G1 to G4 are turned off. Similarly, if it is detected that the pixel driving units 10 on the next row of Gn, that is, the pixel driving units 10 on the Gn+1 row have completed the display operation and triggered the black insertion instruction, then the pixel driving units 10 on the G5 to G8 rows need to turn off the pixels until the display of the frame is completed.

[0080] It should be noted that according to Figure 4 and Figure 6 It can be seen that the pixel driving unit 10 in this embodiment further includes a second thin film transistor T2 and a light emitting diode D, and the reset module 20 includes a third thin film transistor T3;

[0081] The control terminal of the second thin film transistor T2 is connected to the first connecting line, the input terminal of the second thin film transistor T2 is connected to the connecting line between the capacitor C and the positive voltage terminal ELVDD, the output terminal of the second thin film transistor T2 is connected to the positive electrode of the light emitting diode D, and the negative electrode of the light emitting diode D is connected to the negative voltage terminal ELVSS; the input terminal of the third thin film transistor T3 is connected to the first connecting line via the control terminal of the second thin film transistor T2, the output terminal of the third thin film transistor T3 is connected to the negative voltage terminal ELVSS, and the control terminal of the third thin film transistor T3 is connected to the switch control signal.

[0082] When the display operation of the frame display image begins, a scan signal is transmitted on the gate line corresponding to row G1, causing the first thin film transistor T1 in each pixel driving unit 10 coupled to the gate line to enter a conductive state, and transmitting the data signals on S1 to Sn to the corresponding capacitor C through the conductive first thin film transistor T1, thereby charging the capacitor C. When the capacitor C voltage of the capacitor C reaches the turn-on voltage of the second thin film transistor T2, its front-end voltage output causes the second thin film transistor T2 to turn on, transmitting the voltage on the positive voltage terminal ELVDD to the light-emitting diode D, causing the pixel driving units 10 on row G1 to perform a display operation. When the gate line corresponding to row G1 stops transmitting the scan signal, that is, the display operation of the pixel driving units 10 on row G1 is completed, the display operation of the pixel driving units 10 on row G2 is performed, and the driving process is the same. The driving process of the pixel driving units 10 on other rows is not described here.

[0083] In a display frame, during the process of scanning and driving each row row by row, it is assumed that when it is detected that the pixel driving unit 10 on row G540 completes the display operation and triggers the black insertion instruction, it is determined that this is the first time the black insertion instruction is triggered, and the number of rows turned on in a single cycle is 1. The front-end control chip generates and outputs an M1 switch control signal to turn on the third thin-film transistor T3 on row G1, so that the third thin-film transistor T3 is turned on to pull the front-end voltage of the capacitor C down to the voltage level of the negative voltage terminal ELVSS, thereby turning off the second thin-film transistor T2 and controlling the light-emitting diode D to stop emitting light.

[0084] In order to further reduce hardware costs, in this embodiment, the switch control signal for controlling the conduction state of the third thin film transistor T3 is generated and output by the front-end control chip.

[0085] Further, based on Figure 4 and Figure 6 The circuit structure diagram shown may also be used to perform a display method including step S30:

[0086] In step S30, after the display operation of the current frame display image is completed, the non-target pixel driving unit 10 is acquired, and before the display operation of the next frame display image begins, the corresponding switch control signal is output to each non-target pixel driving unit 10, thereby pulling the front-end voltage of the capacitor C in each non-target pixel driving unit 10 down to the voltage level of the negative voltage terminal ELVSS.

[0087] That is, based on the newly added third thin-film transistor T3 in the original pixel driving unit 10, an early reset operation of the pixel driving unit 10 can also be achieved. Because the switch control signal and the scan signal in this embodiment are both generated by the front-end control chip, they can be aligned with the output time of the scan signal, and the reset operation of the pixel driving unit 10 is completed only during the blanking time (that is, the front-end voltage of the capacitor C in the pixel driving unit 10 is pulled down to the voltage level on the negative voltage terminal ELVSS). This avoids the hysteresis effect of the thin-film transistor caused by the long-term high-voltage stress in the conventional reset operation. That is, by reducing or eliminating the hysteresis effect of the thin-film transistor, the consistency of the driving current between different rows of pixel driving units 10 after reset can be ensured, thereby improving the brightness uniformity and ensuring the uniformity of the image displayed on the display panel.

[0088] It should be noted that the non-target pixel driving unit 10 is the pixel driving unit 10 to which the capacitor C belongs and whose front-end voltage is not maintained at the voltage level of the negative voltage terminal ELVSS.

[0089] The present application provides a display device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the display method in the above-mentioned embodiment one.

[0090] Reference below Figure 8 , which shows a schematic diagram of the structure of a display device suitable for implementing the embodiments of the present application. The display device in the embodiments of the present application may include, but is not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Descriptions), PMPs (Portable Media Players), in-vehicle terminals (such as in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 8 The display device shown is merely an example and should not limit the functions and scope of use of the embodiments of the present application.

[0091] like Figure 8As shown, the display device may include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes based on programs stored in a read-only memory 1002 or programs loaded from a storage device 1003 into a random access memory 1004. Random access memory 1004 also stores various programs and data required for the operation of the display device. The processing device 1001, the read-only memory 1002, and the random access memory 1004 are connected to each other via a bus 1005. An input / output interface 1006 is also connected to the bus. Typically, the following systems may be connected to the input / output interface 1006: an input device 1007 including, for example, a touch screen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; an output device 1008 including, for example, a liquid crystal display (LCD), speakers, or vibrator; a storage device 1003 including, for example, a magnetic tape or hard disk; and a communication device 1009. The communication device 1009 may allow the display device to communicate with other devices wirelessly or wired to exchange data. Although the figures show a display device with various systems, it should be understood that it is not required to implement or have all the systems shown. More or fewer systems may be implemented or have instead.

[0092] In particular, according to the embodiments disclosed in the present application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, the embodiments disclosed in the present application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program comprising program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via a communication device, or installed from a storage device 1003, or installed from a read-only memory 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the method of the embodiment disclosed in the present application are performed.

[0093] The display device provided in this application, employing the display method of the aforementioned embodiment, can solve the technical problem of how to avoid image blur caused by residual vision while maintaining the original refresh rate. Compared with the prior art, the beneficial effects of the display device provided in this application are the same as those of the display method provided in the aforementioned embodiment, and the other technical features of the display device are the same as those disclosed in the aforementioned embodiment, and are not further described here.

[0094] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0095] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

[0096] The present application provides a computer-readable storage medium having computer-readable program instructions (ie, computer program) stored thereon, and the computer-readable program instructions are used to execute the display method in the above embodiment.

[0097] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.

[0098] The computer-readable storage medium may be included in the display device, or may exist independently without being assembled into the display device.

[0099] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the display device, the display device: when each pixel driving unit on the current row completes the display operation and triggers the black insertion instruction, outputs a switch control signal to each target pixel driving unit on the target row to turn on the target reset module in each target pixel driving unit, wherein the target row is determined based on the number of times the black insertion instruction is triggered and the number of rows that are turned on once; based on the turned-on target reset module, pulls down the front-end voltage of the target capacitor in each target pixel driving unit to the voltage level on the negative voltage terminal.

[0100] Computer program code for performing the operations of the present application may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0101] The flow charts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, program segment or a part of code, and the module, program segment or a part of code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the specified function or operation, or can be implemented by a combination of dedicated hardware and computer instructions.

[0102] The modules described in the embodiments of the present application may be implemented in software or hardware, wherein the name of a module does not necessarily limit the unit itself.

[0103] The computer-readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described display method. This computer-readable storage medium can solve the technical problem of avoiding image blur caused by residual vision while maintaining the original refresh rate. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the display method provided in the above-described embodiment, and are not further elaborated here.

[0104] The above description is only part of the embodiments of the present application and does not limit the patent scope of the present application. All equivalent structural transformations made by using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect application in other related technical fields are included in the patent protection scope of the present application.

Claims

1. An array substrate, characterized in that: The array substrate includes a plurality of pixel driving units arranged in a rectangular shape, each of the pixel driving units is coupled to a corresponding gate line and a data line, and each of the pixel driving units includes a first thin film transistor, a capacitor and a reset module; The control terminal of the first thin film transistor is connected to the gate line, the input terminal of the first thin film transistor is connected to the data line, the output terminal of the first thin film transistor is connected to one end of the capacitor, and the other end of the capacitor is connected to the positive voltage terminal; One end of the reset module is connected to the first connection line between the first thin film transistor and the capacitor, and the other end of the reset module is connected to the negative voltage terminal. The conduction state of the reset module is controlled by a switch control signal.

2. The array substrate according to claim 1, wherein: A switch control signal controls the reset modules in the pixel driving units of the same row; or, A switch control signal controls the reset modules in a plurality of adjacent rows of pixel driving units.

3. The array substrate according to claim 1, wherein: The switch control signal is generated by a front-end control chip.

4. The array substrate according to claim 1, wherein: The pixel driving unit further includes a second thin film transistor and a light emitting diode, and the reset module includes a third thin film transistor; The control terminal of the second thin film transistor is connected to the first connection line, the input terminal of the second thin film transistor is connected to the connection line between the capacitor and the positive voltage terminal, the output terminal of the second thin film transistor is connected to the positive electrode of the light emitting diode, and the cathode of the light emitting diode is connected to the negative voltage terminal; The input end of the third thin film transistor is connected to the first connection line via the control end of the second thin film transistor, the output end of the third thin film transistor is connected to the negative voltage end, and the control end of the third thin film transistor is connected to the switch control signal.

5. A display method, characterized in that: The display method is applied to the array substrate according to any one of claims 1 to 4, wherein the array substrate comprises a plurality of pixel driving units arranged in a rectangular shape, each of the pixel driving units being coupled to a corresponding gate line and data line, and each of the pixel driving units comprising a first thin film transistor, a capacitor, and a reset module; In the current frame display picture, the display method includes: When each pixel driving unit on the current row completes the display operation and triggers the black insertion instruction, outputting a switch control signal to each target pixel driving unit on the target row to turn on the target reset module in each target pixel driving unit, wherein the target row is determined according to the number of times the black insertion instruction is triggered and the number of rows turned on at a single time; Based on the turned-on target reset module, the front-end voltage of the target capacitor in each target pixel driving unit is pulled down to the voltage level on the negative voltage terminal.

6. The display method according to claim 5, wherein: Before the step of each pixel driving unit on the current row completing the display operation, the method further includes: The target trigger row number is determined according to the total number of rows of gate lines coupled to the pixel driving units and the black insertion duty ratio in the black insertion instruction.

7. The display method according to claim 6, wherein: After each pixel driving unit on the current row completes the display operation, the method further includes: Determine whether the current row number corresponding to the current row is equal to or greater than the target trigger row number; If so, trigger the black insertion instruction; If not, each pixel driving unit on the next row is controlled to perform the display operation, and after each pixel driving unit on the next row completes the display operation, it is determined whether the black insertion instruction is triggered.

8. The display method according to claim 7, wherein: The step of outputting the switch control signal to each target pixel driving unit on the target row includes: outputting one of the switch control signals to each of the target pixel driving units on a target row; or, The switching control signal is output to each target pixel driving unit on a plurality of adjacent target rows.

9. The display method according to claim 5, wherein: The display method further includes: After the display operation of the current frame display image is completed, the non-target pixel driving unit is acquired, and before the display operation of the next frame display image is started, a corresponding switch control signal is output to each of the non-target pixel driving units to pull down the front-end voltage of the capacitor in each of the non-target pixel driving units to the voltage level on the negative voltage terminal.

10. A display device, characterized in that: The display device includes a display panel, and the display panel is an array substrate according to any one of claims 1 to 4.

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