Surge suppression method of buck-boost circuit, controller, system and charger

Abstract

The invention discloses a surge suppression method of a buck-boost circuit, a controller, a system and a charger, and the method comprises the steps: outputting a first control signal to the buck-boost circuit so as to enable a first switching tube and a second switching tube to enter a soft start mode, obtaining a first output current corresponding to a signal output end, and when the first output current meets a surge suppression condition, carrying out the soft start of the buck-boost circuit; and a second control signal is output to the buck-boost circuit, so that a second switch tube suppresses surge, and therefore, on the premise of not increasing additional circuits, the second switch tube of the buck-boost circuit is multiplexed to effectively suppress surge current, and the charging efficiency is ensured while the cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a surge suppression method, controller, system and charger for a buck-boost circuit. Background Art

[0002] A buck-boost circuit is often used in the main circuit of a photovoltaic MPPT (Maximum Power Point Tracking) charger. The charger switches between boost and buck modes based on the voltage between the photovoltaic array and the battery. For the charger, the battery is the load, and charging can generate large forward or reverse inrush currents that could damage the buck-boost circuit.

[0003] To address the above issues, the following two approaches are commonly used in the prior art: The first approach is to use a Schottky diode to suppress reverse current from the battery to the charger during the boost and freewheeling phase of the buck-boost circuit during soft-start, thereby avoiding large inrush currents. However, when the output current is large, the Schottky diode generates severe heat, so an additional heat sink must be added to reduce the temperature of the Schottky diode, which reduces charging efficiency and increases costs. The second approach is to connect two reverse-connected MOS transistors to the output end of the buck-boost circuit. When it is detected that the charger output voltage is higher than the battery voltage, the two reverse-connected MOS transistors are turned on simultaneously. This can also avoid large inrush currents, but this approach also increases the cost of the charger. Summary of the Invention

[0004] Embodiments of the present invention provide a surge suppression method, controller, system, and charger for a buck-boost circuit to solve the problems of poor suppression effect and high cost of existing buck-boost circuit surge suppression methods.

[0005] A surge suppression method for a buck-boost circuit, wherein the buck-boost circuit includes a first switching tube connected to a signal input terminal and a second switching tube connected to a signal output terminal, comprising: Outputting a first control signal to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a soft start mode, and obtaining a first output current corresponding to the signal output end; When the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit to enable the second switch tube to suppress the surge.

[0006] Furthermore, after the first output current meets the surge suppression condition and a second control signal is output to the buck-boost circuit to enable the second switch tube to suppress the surge, the method further includes: Obtaining a second output current corresponding to the signal output terminal; When the second output current meets a preset charging condition, a third control signal is output to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a charging mode.

[0007] Furthermore, when the first output current meets the surge suppression condition, outputting a second control signal to the buck-boost circuit to enable the second switch tube to suppress the surge includes: determining whether the first output current is less than a first current; If the first output current is less than the first current, determining that the first output current meets the surge suppression condition; If the first output current is not less than the first current, it is determined that the first output current does not meet the surge suppression condition.

[0008] Furthermore, when the second output current meets a preset charging condition, outputting a third control signal to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a charging mode includes: determining whether the second output current is greater than a second current; If the second output current is greater than the second current, it is determined that the second output current meets the preset charging condition; If the second output current is not greater than the second current, it is determined that the second output current does not meet the preset charging condition.

[0009] A charging controller is used to implement the above-mentioned surge suppression method for the buck-boost circuit.

[0010] A surge suppression system includes a buck-boost circuit and the above-mentioned charging controller; the buck-boost circuit includes a first switching tube connected to a signal input end and a second switching tube connected to a signal output end; the charging controller is connected to the first switching tube and the second switching tube.

[0011] Furthermore, the buck-boost circuit further includes a first capacitor, a second capacitor, a first inductor, a third switch tube and a fourth switch tube; A first end of the first switching transistor is connected to the positive input electrode of the signal input terminal and the first end of the first capacitor, a second end of the first switching transistor is connected to the first end of the first inductor and the first end of the third switching transistor, and a second end of the third switching transistor is connected to the negative input electrode of the signal input terminal and the second end of the first capacitor; A first end of the second switching transistor is connected to the positive output electrode of the signal output terminal and the first end of the second capacitor, a second end of the second switching transistor is connected to the second end of the first inductor and the first end of the fourth switching transistor, and a second end of the fourth switching transistor is connected to the negative output electrode of the signal output terminal and the second end of the second capacitor; The charging controller is respectively connected to the third end of the first switching tube, the third end of the second switching tube, the third end of the third switching tube, and the third end of the fourth switching tube.

[0012] Furthermore, the buck-boost circuit further includes a first driver chip and a second driver chip; The first input terminal of the first driver chip is connected to the first control terminal of the charging controller, the second input terminal of the first driver chip is connected to the second control terminal of the charging controller, the first output terminal of the first driver chip is connected to the third terminal of the first switching tube, and the second output terminal of the first driver chip is connected to the third terminal of the third switching tube; The first input end of the second driver chip is connected to the third control end of the charging controller, the second input end of the second driver chip is connected to the fourth control end of the charging controller, the first output end of the second driver chip is connected to the third end of the second switching tube, and the second output end of the second driver chip is connected to the third end of the fourth switching tube.

[0013] Furthermore, the buck-boost circuit further includes a current detection circuit, which is connected to the signal output terminal of the buck-boost circuit and the charging controller, and is used to obtain the first output current of the buck-boost circuit.

[0014] A charger includes the above-mentioned surge suppression system.

[0015] The surge suppression method, controller, system, and charger for the buck-boost circuit output a first control signal to the buck-boost circuit to cause the first and second switching tubes to enter a soft-start mode, obtain a first output current corresponding to the signal output terminal, and when the first output current meets the surge suppression condition, output a second control signal to the buck-boost circuit to cause the second switching tube to suppress the surge. Thus, without adding additional circuitry, the second switching tube of the buck-boost circuit is reused to effectively suppress surge current, thereby reducing costs while ensuring charging efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0017] Figure 1 is a flow chart of a surge suppression method for a buck-boost circuit according to an embodiment of the present invention; Figure 2 is another flow chart of a surge suppression method for a buck-boost circuit according to one embodiment of the present invention; Figure 3 is another flow chart of a surge suppression method for a buck-boost circuit according to one embodiment of the present invention; Figure 4 is another flow chart of a surge suppression method for a buck-boost circuit according to one embodiment of the present invention; Figure 5 is a schematic diagram of a charging controller according to an embodiment of the present invention; Figure 6 FIG. 1 is a schematic diagram of a surge suppression system according to an embodiment of the present invention.

[0018] In the figure: 1. Buck-boost circuit; 11. First driver chip; 12. Second driver chip; 13. Current detection circuit; 2. Charging controller. DETAILED DESCRIPTION

[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0020] An embodiment of the present invention provides a surge suppression method for a buck-boost circuit 1. This surge suppression method for a buck-boost circuit 1 is applied to a charger, preferably a photovoltaic MPPT charger. Exemplarily, the photovoltaic MPPT charger can be applied to a photovoltaic charging system, which also includes a photovoltaic module and a battery. The photovoltaic MPPT charger is used to extract the maximum available power from the photovoltaic module to efficiently charge the battery. Exemplarily, the photovoltaic module includes a photovoltaic cell assembly. It is understood that the photovoltaic cell assembly can specifically employ any battery assembly known to those skilled in the art, without limitation herein.

[0021] Illustratively, the charger includes a surge suppression system such as Figure 6 As shown, the surge suppression system includes a buck-boost circuit 1 and a charging controller 2. The surge suppression method of the buck-boost circuit 1 is applied in the charging controller 2.

[0022] As an example, the buck-boost circuit 1 includes a first capacitor C1, a second capacitor C2, a first inductor L1, a first switch Q1, a second switch Q2, a third switch Q3, and a fourth switch Q4. A first end of the first switch Q1 is connected to the positive input electrode of the signal input terminal and the first end of the first capacitor C1. A second end of the first switch Q1 is connected to the first end of the first inductor L1 and the first end of the third switch Q3. A second end of the third switch Q3 is connected to the negative input electrode of the signal input terminal and the second end of the first capacitor C1. A first end of the second switch Q2 is connected to the positive output electrode of the signal output terminal and the first end of the second capacitor C2. A second end of the second switch Q2 is connected to the second end of the first inductor L1 and the first end of the fourth switch Q4. A second end of the fourth switch Q4 is connected to the negative output electrode of the signal output terminal and the second end of the second capacitor C2. A charging controller 2 is connected to the third ends of the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4, respectively. In this example, when the buck-boost circuit 1 is soft-started, the charging controller 2 executes the surge suppression method of the buck-boost circuit 1 to suppress the surge by controlling the second switch Q2 in the buck-boost circuit 1. When the buck-boost circuit 1 is charging normally, the preset charging logic is used to control the operation of the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 to achieve normal constant-voltage and constant-current charging. This effectively suppresses the surge during the soft-start process of the buck-boost circuit 1 without adding additional cost, thereby reducing costs. It should be noted that the preset charging logic refers to the custom charging control logic.

[0023] The capacitance value of the first capacitor C1 , the capacitance value of the second capacitor C2 , and the inductance value of the first inductor L1 can be selected based on actual experience and are not limited here.

[0024] As an example, the first switch transistor Q1, the second switch transistor Q2, the third switch transistor Q3, and the fourth switch transistor Q4 can be field-effect transistors or bipolar transistors. Preferably, the first switch transistor Q1, the second switch transistor Q2, the third switch transistor Q3, and the fourth switch transistor Q4 can be field-effect transistors, specifically NMOS transistors.

[0025] This embodiment provides a surge suppression method for a buck-boost circuit 1, such as Figure 1 As shown, it is applied in the charging controller 2, such as Figure 6 As shown, the buck-boost circuit 1 includes a first switch tube Q1 connected to the signal input terminal (IN+, IN-) and a second switch tube Q2 connected to the signal output terminal (OUT+, OUT-), including: S101: Output a first control signal to the buck-boost circuit 1 to enable the first switch tube Q1 and the second switch tube Q2 to enter a soft start mode, and obtain a first output current corresponding to a signal output terminal.

[0026] S102 : When the first output current meets the surge suppression condition, output a second control signal to the buck-boost circuit 1 to enable the second switch tube Q2 to suppress the surge.

[0027] The first control signal refers to the control signal output by the charge controller 2, which is used to control the first switch Q1 and the second switch Q2 to enter soft start mode. The first output current refers to the current obtained from the signal output terminal. The surge suppression condition refers to a custom condition used to determine whether surge suppression is performed.

[0028] As an example, in step S101, the charging controller 2 may respond to a charging request upon receiving the charging request, or may output a first control signal to the buck-boost circuit 1 upon detecting that the battery is connected to the buck-boost circuit 1, thereby causing the first switch Q1 and the second switch Q2 to enter a soft-start mode. Alternatively, the charging request may be triggered by a user interaction terminal.

[0029] Specifically, the charging controller 2 outputs a first control signal comprising a first electrical signal, a second electrical signal, a third electrical signal, and a fourth electrical signal. The first electrical signal is input to the first switching transistor Q1, the second electrical signal is input to the second switching transistor Q2, the third electrical signal is input to the third switching transistor Q3, and the fourth electrical signal is input to the fourth switching transistor Q4. During soft start, the first and fourth electrical signals respectively control the simultaneous operation of the first and fourth switching transistors Q1 and Q4, while the second and third electrical signals respectively control the simultaneous operation of the second and third switching transistors Q2 and Q3. The first and fourth switching transistors Q1 and Q4 form a group, while the second and third switching transistors Q2 and Q3 form another group. The two groups of switching transistors alternately conduct, causing the buck-boost circuit 1 to enter soft start mode. Exemplarily, the first and fourth electrical signals are the same PWM signal, and the second and third electrical signals are the same PWM signal. The first and second electrical signals are complementary PWM signals.

[0030] In this example, a first control signal is output to the buck-boost circuit 1 to cause the first switch Q1 and the second switch Q2 to enter a soft-start mode. A first output current corresponding to the signal output terminal is obtained to facilitate subsequent determination of whether surge suppression is required. For example, the charge controller 2 can obtain the first output current corresponding to the signal output terminal via the current detection circuit 13.

[0031] As an example, in step S102, when the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit 1 to cause the second switch Q2 to suppress the surge. Specifically, when the first output current meets the surge suppression condition, the surge current damages the buck-boost circuit 1. The charging controller 2 then outputs the second control signal to the buck-boost circuit 1 to control the second switch Q2 to be turned off. The first, third, and fourth switches Q1, Q3, and Q4 are still controlled by the first control signal. When the fourth switch Q4 switches from on to off, the freewheeling current generated by the first inductor L1 flows through the body diode of the second switch Q2 and gradually increases from zero. Therefore, the body diode of the second switch Q2 can effectively suppress the surge current and prevent reverse current flow. Without adding additional circuitry, the body diode of the second switch Q2 of the buck-boost circuit 1 can be reused to effectively suppress the surge current, reducing costs while ensuring charging efficiency. The second control signal is a low-level signal to control the second switch Q2 to be turned off.

[0032] In this embodiment, a first control signal is output to the buck-boost circuit 1 to cause the first switch Q1 and the second switch Q2 to enter a soft start mode, and a first output current corresponding to the signal output terminal is obtained. When the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit 1 to cause the second switch Q2 to suppress the surge. In this way, without adding additional circuitry, the second switch Q2 of the buck-boost circuit 1 is reused to effectively suppress the surge current, thereby reducing costs while ensuring charging efficiency.

[0033] In one embodiment, if Figure 2 As shown, after step S102, when the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit 1 to enable the second switch tube Q2 to suppress the surge, the process includes: S201: Obtain a second output current corresponding to the signal output terminal.

[0034] S202 : When the second output current meets a preset charging condition, output a third control signal to the buck-boost circuit 1 to enable the first switch tube Q1 and the second switch tube Q2 to enter a charging mode.

[0035] The second output current refers to the current obtained from the signal output terminal. The second output current may be the same as or different from the first output current. The preset charging condition refers to a custom set condition used to determine whether to enter the charging mode. Optionally, the charging mode is a constant voltage and constant current charging mode. The third control signal refers to the control signal output by the charging controller 2, which is used to control the first switch tube Q1 and the second switch tube Q2 to enter the charging mode.

[0036] As an example, in step S201, a second output current corresponding to the signal output terminal is obtained. For example, the charge controller 2 can obtain the second output current corresponding to the signal output terminal via the current detection circuit 13. It should be noted that the current detection circuit 13 can be any current detection circuit 13 known to those skilled in the art, as long as the current detection circuit 13 is connected to the signal output terminal of the buck-boost circuit 1 and the charge controller 2 to obtain the first output current or the second output current output by the buck-boost circuit 1.

[0037] As an example, in step S202, when the second output current meets a preset charging condition, a third control signal is output to the buck-boost circuit 1 to cause the first switch Q1 and the second switch Q2 to enter a charging mode. Specifically, the third control signal is identical to the first control signal and includes a first electrical signal, a second electrical signal, a third electrical signal, and a fourth electrical signal; the first electrical signal is input to the first switch Q1, the second electrical signal is input to the second switch Q2, the third electrical signal is input to the third switch Q3, and the fourth electrical signal is input to the fourth switch Q4. In charging mode, the first and fourth electrical signals respectively control the first and fourth switching tubes Q1 and Q4 to operate simultaneously, and the second and third electrical signals respectively control the second and third switching tubes Q2 and Q3 to operate simultaneously. The first switching tubes Q1 and the fourth switching tubes Q4 form a group, and the second switching tubes Q2 and the third switching tubes Q3 form another group. The two groups of switching tubes are alternately turned on to perform synchronous rectification. At this time, only the control signal of the second switching tube Q2 is changed, that is, the control signal of the second switching tube Q2 is switched from the second control signal to the second electrical signal, thereby reducing circuit loss.

[0038] In this embodiment, a second output current corresponding to the signal output terminal is obtained. When the second output current meets a preset charging condition, a third control signal is output to the buck-boost circuit 1 to enable the first switch tube Q1 and the second switch tube Q2 to enter the charging mode, thereby quickly switching from the soft start mode to the charging mode, reducing circuit loss and improving charging efficiency.

[0039] In one embodiment, if Figure 3 As shown, in step S102, when the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit 1 to enable the second switch tube Q2 to suppress the surge, including: S301: Determine whether the first output current is less than the first current.

[0040] S302: If the first output current is less than the first current, determine that the first output current meets the surge suppression condition.

[0041] S303: If the first output current is not less than the first current, determine that the first output current does not meet the surge suppression condition.

[0042] The first current refers to a user-defined current.

[0043] As an example, in step S301 , it is determined whether the first output current is less than the first current, so as to determine whether a surge current is likely to be generated currently.

[0044] As an example, in step S302, if the first output current is less than the first current, it is judged that the first output current meets the surge suppression condition. At this time, the battery voltage is too high and the charging current is small, that is, the first output current is small, and there is a risk of generating surge current. Then, it is judged that the first output current meets the surge suppression condition.

[0045] As an example, in step S303, if the first output current is not less than the first current, the battery voltage is low and the charging current is large, that is, the first output current is large, and there is no risk of generating surge current, then it is judged that the first output current does not meet the surge suppression conditions.

[0046] In this embodiment, it is determined whether the first output current is less than the first current. If the first output current is less than the first current, it is determined that the first output current meets the surge suppression condition. If the first output current is not less than the first current, it is determined that the first output current does not meet the surge suppression condition. Therefore, whether surge suppression is required is determined by the first output current.

[0047] In one embodiment, if Figure 4 As shown, in step S202, when the second output current meets the preset charging condition, a third control signal is output to the buck-boost circuit 1 to enable the first switch tube Q1 and the second switch tube Q2 to enter the charging mode, including: S401: Determine whether the second output current is greater than the second current.

[0048] S402: If the second output current is greater than the second current, determine that the second output current meets a preset charging condition.

[0049] S403: If the second output current is not greater than the second current, it is determined that the second output current does not meet the preset charging condition.

[0050] The second current is a custom current. The second current is greater than the first current. Preferably, the first current is 0.5 amperes and the second current is 0.8 amperes.

[0051] As an example, in step S401 , it is determined whether the second output current is greater than the second current to determine whether the current mode is in charging mode.

[0052] As an example, in step S402, if the second output current is greater than the second current, the battery voltage is too low and the charging current is large, that is, the second output current is large, and the battery needs to be charged normally, then it is determined that the second output current meets the preset charging condition.

[0053] As an example, in step S403, if the second output current is not greater than the second current, the battery voltage is high and the charging current is small, that is, the second output current is small, and the battery does not need to be charged, then it is determined that the second output current does not meet the preset charging condition.

[0054] In this embodiment, it is determined whether the second output current is greater than the second current. If the second output current is greater than the second current, it is determined that the second output current meets the preset charging condition. If the second output current is not greater than the second current, it is determined that the second output current does not meet the preset charging condition to ensure safety during the charging process.

[0055] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0056] This embodiment provides a charging controller 2 for executing the surge suppression method of the buck-boost circuit 1 described above.

[0057] In one embodiment, a charging controller 2 is provided. The charging controller 2 may be a server, and its internal structure may be as shown in FIG. Figure 5 As shown. The charging controller 2 includes a processor, a memory, a network interface and a database connected via a system bus. The processor of the charging controller 2 is used to provide computing and control capabilities. The memory of the charging controller 2 includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the charging controller 2 is used for surge suppression of the buck-boost circuit 1. The network interface of the charging controller 2 is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, a surge suppression method for the buck-boost circuit 1 is implemented.

[0058] In one embodiment, a charging controller 2 is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the surge suppression method of the buck-boost circuit 1 in the above embodiment is implemented. To avoid repetition, the method is not described here.

[0059] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the surge suppression method of the buck-boost circuit 1 in the above embodiment is implemented. To avoid repetition, it is not described here.

[0060] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the above-described method embodiments. Any reference to memory, storage, database, or other media used in the various embodiments provided herein may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct RAMbus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM).

[0061] This embodiment provides a surge suppression system, such as Figure 6 As shown, it includes a buck-boost circuit 1 and the above-mentioned charging controller 2; the buck-boost circuit 1 includes a first switch tube Q1 connected to the signal input end and a second switch tube Q2 connected to the signal output end; the charging controller 2 is connected to the first switch tube Q1 and the second switch tube Q2.

[0062] In one embodiment, the buck-boost circuit 1 further includes a first capacitor C1, a second capacitor C2, a first inductor L1, a third switching transistor Q3, and a fourth switching transistor Q4. The first end of the first switching transistor Q1 is connected to the positive input electrode of the signal input terminal and the first end of the first capacitor C1. The second end of the first switching transistor Q1 is connected to the first end of the first inductor L1 and the first end of the third switching transistor Q3. The second end of the third switching transistor Q3 is connected to the negative input electrode of the signal input terminal and the second end of the first capacitor C1. The first end of the second switching transistor Q2 is connected to the positive output electrode of the signal output terminal and the first end of the second capacitor C2. The second end of the second switching transistor Q2 is connected to the second end of the first inductor L1 and the first end of the fourth switching transistor Q4. The second end of the fourth switching transistor Q4 is connected to the negative output electrode of the signal output terminal and the second end of the second capacitor C2. The charging controller 2 is connected to the third end of the first switching transistor Q1, the third end of the second switching transistor Q2, the third end of the third switching transistor Q3, and the third end of the fourth switching transistor Q4, respectively.

[0063] In one embodiment, the buck-boost circuit further includes a first driver chip 11 and a second driver chip 12; a first input terminal of the first driver chip 11 is connected to the first control terminal of the charge controller 2, a second input terminal of the first driver chip 11 is connected to the second control terminal of the charge controller 2, a first output terminal of the first driver chip 11 is connected to the third terminal of the first switch tube Q1, and a second output terminal of the first driver chip 11 is connected to the third terminal of the third switch tube Q3; a first input terminal of the second driver chip 12 is connected to the third control terminal of the charge controller 2, a second input terminal of the second driver chip 12 is connected to the fourth control terminal of the charge controller 2, a first output terminal of the second driver chip 12 is connected to the third terminal of the second switch tube Q2, and a second output terminal of the second driver chip 12 is connected to the third terminal of the fourth switch tube Q4.

[0064] The first driver chip 11 and the second driver chip 12 can be driver chips known to those skilled in the art. The first driver chip 11 and the second driver chip 12 are two identical chips.

[0065] As an example, Figure 6 As shown, the first driver chip 11 and the second driver chip 12 include a VCC pin, a HIN pin (first input end), a LIN pin (second input end), a GND pin, a VB pin, a HO pin (first output end), a VS pin and a LO pin (second output end).

[0066] Among them, the VCC pin is used to connect to the power supply end (+12V), the GND pin is grounded, the VB pin is connected to the VCC pin through the first diode D1 / the second diode D2, and is connected to the VS pin through the third capacitor C3 / the fourth capacitor C4. The VS pin of the first driver chip 11 and the VS pin of the second driver chip 12 are also connected to the first end and the second end of the first inductor L1, respectively.

[0067] In this embodiment, the first control terminal of the charge controller 2 is configured to output a first electrical signal, the second control terminal of the charge controller 2 is configured to output a second electrical signal or a second control signal (a low-level signal), the third control terminal of the charge controller 2 is configured to output a third electrical signal, and the fourth control terminal of the charge controller 2 is configured to output a fourth electrical signal. In soft-start mode and charging mode, the second control terminal of the charge controller 2 is configured to output the second electrical signal. When the first output current meets the surge suppression condition, the second control terminal of the charge controller 2 outputs a second control signal to the buck-boost circuit 1 to suppress the surge. At this time, the first and fourth electrical signals, as well as the second and third electrical signals, remain identical PWM signals within the charge controller 2. The first and second electrical signals are complementary PWM signals. This means that the first, third, and fourth control terminals of the charge controller 2 normally output the first, third, and fourth electrical signals, while the second control terminal outputs the second control signal (a low-level signal). This changes only the control signal of the second switch Q2, switching it from the second control signal to the second signal. This minimizes circuit loss and ensures charging efficiency.

[0068] In one embodiment, the buck-boost circuit 1 further includes a current detection circuit 13 , which is connected to the signal output terminal of the buck-boost circuit 1 and the charging controller 2 , and is configured to obtain a first output current of the buck-boost circuit 1 .

[0069] This embodiment provides a charger including the above-mentioned surge suppression system.

[0070] Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0071] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A surge suppression method for a buck-boost circuit, wherein the buck-boost circuit comprises a first switch connected to a signal input terminal and a second switch connected to a signal output terminal, wherein: include: Outputting a first control signal to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a soft start mode, and obtaining a first output current corresponding to the signal output end; When the first output current meets the surge suppression condition, a second control signal is output to the buck-boost circuit to enable the second switch tube to suppress the surge.

2. The surge suppression method for a buck-boost circuit according to claim 1, wherein: After the first output current meets the surge suppression condition and a second control signal is output to the buck-boost circuit so as to enable the second switch tube to suppress the surge, the method includes: Obtaining a second output current corresponding to the signal output terminal; When the second output current meets a preset charging condition, a third control signal is output to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a charging mode.

3. The surge suppression method for a buck-boost circuit according to claim 1, wherein: The method of outputting a second control signal to the buck-boost circuit when the first output current meets the surge suppression condition so as to enable the second switch tube to suppress the surge includes: determining whether the first output current is less than a first current; If the first output current is less than the first current, determining that the first output current meets the surge suppression condition; If the first output current is not less than the first current, it is determined that the first output current does not meet the surge suppression condition.

4. The surge suppression method for a buck-boost circuit according to claim 2, wherein: When the second output current meets a preset charging condition, outputting a third control signal to the buck-boost circuit to enable the first switch tube and the second switch tube to enter a charging mode includes: determining whether the second output current is greater than a second current; If the second output current is greater than the second current, it is determined that the second output current meets the preset charging condition; If the second output current is not greater than the second current, it is determined that the second output current does not meet the preset charging condition.

5. A charging controller, characterized in that: Used to implement the surge suppression method of the buck-boost circuit according to any one of claims 1 to 4.

6. A surge suppression system, characterized in that: The invention comprises a buck-boost circuit and a charging controller as claimed in claim 5; the buck-boost circuit comprises a first switching tube connected to a signal input terminal and a second switching tube connected to a signal output terminal; the charging controller is connected to the first switching tube and the second switching tube.

7. The surge suppression system according to claim 6, wherein: The buck-boost circuit further includes a first capacitor, a second capacitor, a first inductor, a third switch tube and a fourth switch tube; A first end of the first switching transistor is connected to the positive input electrode of the signal input terminal and the first end of the first capacitor, a second end of the first switching transistor is connected to the first end of the first inductor and the first end of the third switching transistor, and a second end of the third switching transistor is connected to the negative input electrode of the signal input terminal and the second end of the first capacitor; A first end of the second switching transistor is connected to the positive output electrode of the signal output terminal and the first end of the second capacitor, a second end of the second switching transistor is connected to the second end of the first inductor and the first end of the fourth switching transistor, and a second end of the fourth switching transistor is connected to the negative output electrode of the signal output terminal and the second end of the second capacitor; The charging controller is respectively connected to the third end of the first switching tube, the third end of the second switching tube, the third end of the third switching tube, and the third end of the fourth switching tube.

8. The surge suppression system according to claim 7, wherein: The buck-boost circuit further includes a first driver chip and a second driver chip; The first input terminal of the first driver chip is connected to the first control terminal of the charging controller, the second input terminal of the first driver chip is connected to the second control terminal of the charging controller, the first output terminal of the first driver chip is connected to the third terminal of the first switching tube, and the second output terminal of the first driver chip is connected to the third terminal of the third switching tube; The first input end of the second driver chip is connected to the third control end of the charging controller, the second input end of the second driver chip is connected to the fourth control end of the charging controller, the first output end of the second driver chip is connected to the third end of the second switching tube, and the second output end of the second driver chip is connected to the third end of the fourth switching tube.

9. The surge suppression system according to claim 6, wherein: The buck-boost circuit further includes a current detection circuit, which is connected to a signal output terminal of the buck-boost circuit and the charging controller, and is used to obtain a first output current of the buck-boost circuit.

10. A charger, characterized in that: The method comprises the surge suppression system according to any one of claims 6 to 9.

Images