Power module control circuit, PCB and power module

Abstract

The invention relates to the technical field of electronics, and discloses a power module control circuit, a PCB and a power module, and the power module control circuit comprises a driving control unit, a power conversion unit, a power factor correction unit, a bootstrap unit and a rectification module. A power conversion unit, a power factor correction unit and a rectification module are integrated in a control circuit of the power module, rectification, power factor correction and inversion functions are integrated in the power module, the design complexity of a peripheral main control board is greatly reduced, meanwhile, a bootstrap unit is used for connecting a driving module and the power conversion unit, and the design complexity of the peripheral main control board is greatly reduced. Therefore, the internal layout of the power module is optimized, separation processing of high-voltage and low-voltage pins is realized, crosstalk phenomena of power devices under different working conditions are effectively reduced, the probability of occurrence of false triggering faults is reduced, the reliability of system operation is remarkably improved, and stable integration of the multifunctional power module is realized.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a power module control circuit, a PCB board and a power module. Background Art

[0002] The Intelligent Power Module (IPM) is a power drive product that combines power electronics and integrated circuit technology. It combines the advantages of GTRs (Genius Transistors) with high current, low saturation voltage, and high withstand voltage, and MOSFETs (High Input Impedance, High Switching Frequency, and Low Drive Power). Furthermore, IPMs integrate logic, control, detection, and protection circuits, making them easy to use, shortening development time, and enhancing system reliability, adapting to current trends in power device development.

[0003] At present, domestic and foreign modules only have inverter functions and are single in function. If more functional modules need to be integrated, it is easy to lead to complex design of the peripheral main control board. During the integration process, the circuit layout and signal transmission path of different modules are difficult to plan reasonably. The high and low voltage signal lines are dense, and the electromagnetic interference generated by the high voltage power signal can easily affect the low voltage control signal. The signals between different modules may also interfere with each other, causing control signal distortion, power device false triggering and other problems. This makes the integration of power modules difficult and the signal stability low, seriously affecting the stability and reliability of the system. Summary of the Invention

[0004] The present invention aims to improve at least one technical problem in the background technology.

[0005] The first aspect of the present invention provides a power module control circuit, including: a drive control unit, a power conversion unit, a power factor correction unit and a bootstrap unit; the drive control unit is used to generate and send a control signal; the power conversion unit is used to convert the internal current of the power module into an AC current that is adapted to the external load; the power factor correction unit is used to improve the power factor of the circuit and optimize the internal current waveform of the power module; the bootstrap unit is used to provide a high-voltage drive signal for the power conversion unit; the drive control unit is electrically connected to the power conversion unit, the power factor correction unit and the bootstrap unit respectively; the power conversion unit is electrically connected to the power factor correction unit and the bootstrap unit respectively.

[0006] The beneficial effects of the present invention are as follows: by integrating the power conversion and power factor correction units in the power module control circuit, the power factor correction and inversion functions are integrated inside the power module, which greatly reduces the design complexity of the peripheral main control board. At the same time, the bootstrap unit is used to connect the drive control unit and the power conversion unit, thereby optimizing the internal layout of the power module, realizing the separation processing of the high-voltage and low-voltage pins, effectively reducing the crosstalk phenomenon of the power devices under different working conditions, reducing the probability of false triggering failures, significantly improving the reliability of the system operation, and realizing the stable integration of the multi-functional power module.

[0007] As some sub-solutions of the above technical solution, the drive control unit includes a control chip and a chip bootstrap circuit; the control chip includes a first bootstrap boot pin VB1, a second bootstrap boot pin VB2, a third bootstrap boot pin VB3, a power supply terminal VDD, a first reference potential terminal U-VS1, a second reference potential terminal V-VS2, a third reference potential terminal W-VS3, a first high-end drive signal output terminal HO1, a second high-end drive signal output terminal HO2, a third high-end drive signal output terminal HO3, a first low-end drive signal output terminal LO1, a second low-end drive signal output terminal LO2, a third low-end drive signal output terminal LO3 and a PFCOUT terminal; the power supply terminal VDD is connected to the first bootstrap boot pin VB1, the second The bootstrap guide pin VB2 and the third bootstrap guide pin VB3 are connected; the first bootstrap guide pin VB1, the second bootstrap guide pin VB2, the third bootstrap guide pin VB3, the first reference potential terminal U-VS1, the second reference potential terminal V-VS2 and the third reference potential terminal W-VS3 are electrically connected to the bootstrap unit; the first high-end drive signal output terminal HO1, the second high-end drive signal output terminal HO2, the third high-end drive signal output terminal HO3, the first low-end drive signal output terminal LO1, the second low-end drive signal output terminal LO2 and the third low-end drive signal output terminal LO3 are electrically connected to the power conversion unit; the PFCOUT terminal is electrically connected to the power factor correction unit.

[0008] As some sub-solutions of the above technical solution, the power conversion unit includes a first transistor G1, a second transistor G2, a third transistor G3, a fourth transistor G4, a fifth transistor G5 and a sixth transistor G6; the source of the first transistor G1 is connected to the drain of the second transistor G2 and the first reference potential terminal U-VS1, and the gate of the first transistor G1 is connected to the first high-end drive signal output terminal HO1; the gate of the second transistor G2 is connected to the first low-end drive signal output terminal LO1; the source of the third transistor G3 is connected to the drain of the fourth transistor G4 and the second reference potential terminal V-VS2, and the gate of the third transistor G3 is connected to the second high-end drive signal output terminal HO1. The output terminal HO2 is connected; the gate of the fourth transistor G4 is connected to the second low-end drive signal output terminal LO2; the source of the fifth transistor G5 is connected to the drain of the sixth transistor G6 and the third reference potential terminal W-VS3, and the gate of the fifth transistor G5 is connected to the third high-end drive signal output terminal HO3; the gate of the sixth transistor G6 is connected to the third low-end drive signal output terminal LO3; the drain of the first transistor G1, the drain of the third transistor G3 and the drain of the fifth transistor G5 are connected to the power factor correction unit; the source of the first transistor G1, the source of the third transistor G3 and the source of the fifth transistor G5 are connected to the bootstrap unit.

[0009] As some sub-solutions of the above technical solution, the power conversion unit further includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6; the two ends of the first resistor R1 are respectively connected to the first high-end drive signal output terminal HO1 and the gate of the first transistor G1; the two ends of the second resistor R2 are respectively connected to the first low-end drive signal output terminal LO1 and the gate of the second transistor G2; the two ends of the third resistor R3 are respectively connected to the second high-end drive signal output terminal HO2 and the gate of the third transistor G3; the two ends of the fourth resistor are respectively connected to the second low-end drive signal output terminal LO2 and the gate of the fourth transistor G4; the two ends of the fifth resistor R5 are respectively connected to the third high-end drive signal output terminal HO3 and the gate of the fifth transistor G5, and the two ends of the sixth resistor R6 are respectively connected to the third low-end drive signal output terminal LO3 and the gate of the sixth transistor G6.

[0010] As some sub-solutions of the above technical solution, the bootstrap unit includes a first bootstrap capacitor C1, a second bootstrap capacitor C2 and a third bootstrap capacitor C3; the two ends of the first bootstrap capacitor C1 are respectively connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1; the two ends of the second bootstrap capacitor C2 are respectively connected to the second bootstrap guide pin VB2 and the second reference potential terminal V-VS2; and the two ends of the third bootstrap capacitor C3 are respectively connected to the third bootstrap guide pin VB3 and the third reference potential terminal W-VS3.

[0011] As some sub-solutions of the above technical solution, the bootstrap unit also includes a first filter capacitor C4, a second filter capacitor C5 and a third filter capacitor C6; the two ends of the first filter capacitor C4 are respectively connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1; the two ends of the second filter capacitor C5 are respectively connected to the second bootstrap guide pin VB2 and the second reference potential terminal V-VS2; the two ends of the third filter capacitor C6 are respectively connected to the third bootstrap guide pin VB3 and the third reference potential terminal W-VS3.

[0012] As some sub-solutions of the above technical solution, the power factor correction unit includes a seventh transistor G7 and a first diode D1; the gate of the seventh transistor G7 is connected to the PFCOUT terminal, the drain of the seventh transistor G7 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the drain of the first transistor G1, the drain of the third transistor G3 and the drain of the fifth transistor G5.

[0013] As some sub-solutions of the above technical solution, the power factor correction unit further includes a seventh resistor R7, one end of the seventh resistor R7 is connected to the PFCOUT end, and the other end of the seventh resistor R7 is connected to the gate of the seventh transistor G7.

[0014] A second aspect of the present invention provides a PCB board, on which any power module control circuit as described above is printed.

[0015] The PCB board according to the embodiment of the second aspect of the present invention also has corresponding beneficial effects because it includes the power module control circuit of the above technical solution.

[0016] A third aspect of the present invention provides a power module, wherein the power module adopts any of the above-mentioned power module control circuits to realize operation control.

[0017] The power module according to the embodiment of the third aspect of the present invention also has corresponding beneficial effects because it includes the power module control circuit of the above technical solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which:

[0019] Figure 1 A circuit block diagram of the power module control circuit provided by the present invention;

[0020] Figure 2 An application circuit diagram of the power module control circuit provided by the present invention;

[0021] Figure 3 A schematic diagram of a power module provided by the present invention;

[0022] Figure 4 Schematic diagram of a traditional power module.

[0023] In the accompanying drawings: 1- drive control unit; 2- power conversion unit; 3- power factor correction unit; 4- bootstrap unit; 6- metal substrate board; 7- module plastic package body; 8- load motor; 100- control chip; 101- chip bootstrap circuit. DETAILED DESCRIPTION

[0024] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and are not to be construed as limiting the present invention.

[0025] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present invention.

[0026] In the description of the present invention, "several" means an indefinite quantity, "multiple" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, and "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" is solely for the purpose of distinguishing technical features and should not be understood to indicate or imply relative importance, or to implicitly indicate the number or order of the technical features indicated. "And / or" throughout the text represents three parallel solutions. For example, "A and / or B" means a solution where A satisfies, a solution where B satisfies, or a solution where both A and B satisfy.

[0027] In the description of the present invention, if there is a short sentence containing multiple parallel features, the attributive defines the closest feature. For example, "B, C, and E are arranged on A, and are connected to D" means that B is arranged on A and E is connected to D, and does not constitute a limitation on C. However, attributives that express the relationship between features, such as "spaced arrangement" or "circular arrangement", do not fall into this category. If the word "all" is preceded by an attributive, it means that all features in the short sentence are limited. For example, "B, C, and D are all arranged on A" means that B, C, and D are all arranged on A. In a sentence with an omitted subject, the omitted subject is the subject of the previous sentence, that is, "B is arranged on A, including C" means that B is arranged on A and A includes C.

[0028] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, and connecting should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0029] The following combination Figures 1 to 4 Embodiments of the present invention are described.

[0030] A power module control circuit in this embodiment includes: a drive control unit 1, a power conversion unit 2, a power factor correction unit 3 and a bootstrap unit 4; the drive control unit 1 is used to generate and send a control signal; the power conversion unit 2 is used to convert the internal current of the power module into an AC current that is adapted to the external load; the power factor correction unit 3 is used to improve the power factor of the circuit and optimize the internal current waveform of the power module; the bootstrap unit 4 is used to provide a high-voltage drive signal for the power conversion unit 2; the drive control unit 1 is electrically connected to the power conversion unit 2, the power factor correction unit 3 and the bootstrap unit 4 respectively; the power conversion unit 2 is electrically connected to the power factor correction unit 3 and the bootstrap unit 4 respectively.

[0031] Reference Figure 1 , Figure 1 This is a circuit block diagram of the power module control circuit provided by the present invention. In an embodiment of the present invention, a drive control unit 1, a power conversion unit 2, a power factor correction unit 3 and a bootstrap unit 4 are integrated inside the power module, and the modules are electrically connected; direct current is first input into the power factor correction module to improve its power factor and optimize the current waveform, and then output to the power conversion unit 2; the drive control unit 1 generates a control signal to control the operation of the power conversion unit 2 and the power factor correction unit 3 respectively; the bootstrap unit 4 connects the drive control unit 1 and the power conversion unit 2, and provides a high-voltage drive signal to the power conversion unit 2 while separating the high and low voltage pins of the drive module, to ensure the normal operation of the power conversion unit 2.

[0032] By integrating the power factor correction and inversion functions inside the power module, the design complexity of the peripheral main control board is greatly reduced and the system integration is improved; at the same time, the connection between the bootstrap unit 4 and the drive module is used to achieve the separation of high and low voltage pins, solving the wiring complexity and power device crosstalk problems caused by high integration, and realizing the stable integration of the multi-functional power module.

[0033] Specifically, the drive control unit 1 includes a control chip 100 and a chip bootstrap circuit 101; the control chip 100 includes a first bootstrap pin VB1, a second bootstrap pin VB2, a third bootstrap pin VB3, a power supply terminal VDD, a first reference potential terminal U-VS1, a second reference potential terminal V-VS2, a third reference potential terminal W-VS3, a first high-end drive signal output terminal HO1, a second high-end drive signal output terminal HO2, a third high-end drive signal output terminal HO3, a first low-end drive signal output terminal LO1, a second low-end drive signal output terminal LO2, a third low-end drive signal output terminal LO3 and a PFCOUT terminal; the power supply terminal VDD is connected to the first bootstrap pin VB1, the second bootstrap pin VB2, the third bootstrap pin VB3 and the PFCOUT terminal through the chip bootstrap circuit 101. The first bootstrap guide pin VB2 and the third bootstrap guide pin VB3 are electrically connected; the first bootstrap guide pin VB1, the second bootstrap guide pin VB2, the third bootstrap guide pin VB3, the first reference potential terminal U-VS1, the second reference potential terminal V-VS2 and the third reference potential terminal W-VS3 are electrically connected to the bootstrap unit 4; the first high-end drive signal output terminal HO1, the second high-end drive signal output terminal HO2, the third high-end drive signal output terminal HO3, the first low-end drive signal output terminal LO1, the second low-end drive signal output terminal LO2 and the third low-end drive signal output terminal LO3 are electrically connected to the power conversion unit 2; the PFCOUT terminal is electrically connected to the power factor correction unit 3.

[0034] Reference Figure 2 In this embodiment, the control chip 100 receives external control instructions and generates control signals through internal logic processing. The chip bootstrap circuit 101 is integrated inside the control chip 100. Its input end is connected to the power supply terminal VDD, and its output end is respectively connected to the first bootstrap pin VB1, the second bootstrap pin VB2, and the third bootstrap pin VB3. The chip bootstrap circuit 101 transmits power from the power supply terminal VDD to each bootstrap pin, preparing to subsequently provide a drive signal higher than the power supply voltage.

[0035] It should be noted that traditional power modules require an external VB port to power the driver IC to achieve bootstrap guidance. The embodiment of the present invention integrates a bootstrap circuit inside the control chip 100, and the VDD signal is directly powered from the inside to VB1 / VB2 / VB3, thereby reducing external wiring and increasing the connection and wiring space between the control chip 100 and other power devices; at the same time, because there is no need for an external low-voltage VB terminal, the separation of the high-voltage U, V, W ports and the low-voltage VB port is achieved, reducing crosstalk between the high and low voltage ports, reducing interference sources, and enabling the system to operate more stably and reliably.

[0036] Specifically, the bootstrap unit 4 includes a first bootstrap capacitor C1, a second bootstrap capacitor C2, and a third bootstrap capacitor C3; the two ends of the first bootstrap capacitor C1 are respectively connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1; the two ends of the second bootstrap capacitor C2 are respectively connected to the second bootstrap guide pin VB2 and the second reference potential terminal V-VS2; and the two ends of the third bootstrap capacitor C3 are respectively connected to the third bootstrap guide pin VB3 and the third reference potential terminal W-VS3.

[0037] Specifically, the bootstrap unit 4 also includes a first filter capacitor C4, a second filter capacitor C5 and a third filter capacitor C6; the two ends of the first filter capacitor C4 are respectively connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1; the two ends of the second filter capacitor C5 are respectively connected to the second bootstrap guide pin VB2 and the second reference potential terminal V-VS2; the two ends of the third filter capacitor C6 are respectively connected to the third bootstrap guide pin VB3 and the third reference potential terminal W-VS3.

[0038] Reference Figure 2In this embodiment, taking the first bootstrap capacitor C1 and the first filter capacitor C4 as an example, the two ends of the first bootstrap capacitor C1 are connected to the first bootstrap pin VB1 and the first reference potential terminal U-VS1, respectively, and the first filter capacitor C4 is connected in parallel. When the lower bridge arm transistor corresponding to the first bootstrap capacitor C1 is turned on, the power supply terminal VDD charges VB1 through the chip bootstrap circuit 101, storing energy. When it is necessary to drive the upper bridge arm transistor in the power conversion unit 2, the charge stored in the first bootstrap capacitor C1 comes into play. The driver chip combines the voltage of the bootstrap capacitor and provides a drive signal higher than the power supply voltage to the gate of the upper bridge arm transistor from the first bootstrap pin VB1 port. At this time, the first reference potential terminal U-VS1 serves as a reference potential terminal for determining the potential of the source of the upper bridge arm transistor, so that the drive signal can accurately control the conduction and cutoff of the upper bridge arm transistor. The first filter capacitor C4 is used to filter out noise in the drive signal, stabilize the drive signal, and ensure the normal operation of the power conversion unit 2. In this way, the upper and lower bridge arm transistors of the power conversion unit 2 are driven to alternately turn on and off, converting DC power into three-phase AC power, which is then output to the external load through the output ports U, V, and W on the power module.

[0039] Specifically, the power conversion unit 2 includes a first transistor G1, a second transistor G2, a third transistor G3, a fourth transistor G4, a fifth transistor G5 and a sixth transistor G6; the source of the first transistor G1 is connected to the drain of the second transistor G2 and the first reference potential terminal U-VS1, and the gate of the first transistor G1 is connected to the first high-end drive signal output terminal HO1; the gate of the second transistor G2 is connected to the first low-end drive signal output terminal LO1; the source of the third transistor G3 is connected to the drain of the fourth transistor G4 and the second reference potential terminal V-VS2, and the gate of the third transistor G3 is connected to the second high-end drive signal output terminal HO2. The gate of the fourth transistor G4 is connected to the second low-end drive signal output terminal LO2; the source of the fifth transistor G5 is connected to the drain of the sixth transistor G6 and the third reference potential terminal W-VS3, and the gate of the fifth transistor G5 is connected to the third high-end drive signal output terminal HO3; the gate of the sixth transistor G6 is connected to the third low-end drive signal output terminal LO3; the drain of the first transistor G1, the drain of the third transistor G3 and the drain of the fifth transistor G5 are connected to the power factor correction unit 3; the source of the first transistor G1, the source of the third transistor G3 and the source of the fifth transistor G5 are connected to the bootstrap unit 4.

[0040] Specifically, the power conversion unit 2 further includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6; the two ends of the first resistor R1 are respectively connected to the first high-end drive signal output terminal HO1 and the gate of the first transistor G1; the two ends of the second resistor R2 are respectively connected to the first low-end drive signal output terminal LO1 and the gate of the second transistor G2; the two ends of the third resistor R3 are respectively connected to the second high-end drive signal output terminal HO2 and the gate of the third transistor G3; the two ends of the fourth resistor are respectively connected to the second low-end drive signal output terminal LO2 and the gate of the fourth transistor G4; the two ends of the fifth resistor R5 are respectively connected to the third high-end drive signal output terminal HO3 and the gate of the fifth transistor G5, and the two ends of the sixth resistor R6 are respectively connected to the third low-end drive signal output terminal LO3 and the gate of the sixth transistor G6.

[0041] Reference Figure 2 In this embodiment, taking a half-bridge consisting of a first transistor G1 and a second transistor G2 as an example, when the first high-side drive signal output terminal HO1 outputs a high level to turn on the first transistor G1, and the first low-side drive signal output terminal LO1 outputs a low level to turn off the second transistor G2, current flows from the VCC port through the first transistor G1 to the drain of the second transistor G2. Conversely, when the first transistor G1 is turned off and the second transistor G2 is turned on, current flows out of the source of the second transistor G2. Three such half-bridge structures operate alternately to convert direct current into three-phase alternating current. By controlling the on and off times of the upper and lower bridge arm transistors in each half-bridge, a three-phase AC voltage with a phase difference of 120° can be generated to drive a three-phase AC load. During the positive half-cycle of the three-phase AC voltage, current is output from the power module's output ports U, V, and W to the external load. During the negative half-cycle of the three-phase AC voltage, current flows from the negative output ports U-, V-, and W-, forming a complete three-phase AC waveform.

[0042] Reference Figure 2 In this embodiment, taking the first resistor R1 as an example, it is connected in series between the first high-end drive signal output terminal HO1 and the gate of the first transistor G1 to limit the drive current entering the gate of the first transistor G1. When a high-level drive signal is generated, the rising edge or falling edge of the drive signal may be relatively steep, which may easily generate a large transient current. The first resistor R1 can buffer such changes, preventing excessive current from damaging the gate of the first transistor G1, protecting the transistor gate, and enhancing the reliability and stability of the system.

[0043] Specifically, the power factor correction unit 3 includes a seventh transistor G7 and a first diode D1; the gate of the seventh transistor G7 is connected to the PFCOUT terminal, the drain of the seventh transistor G7 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the drain of the first transistor G1, the drain of the third transistor G3 and the drain of the fifth transistor G5.

[0044] Reference Figure 2 In this embodiment, when the PFCOUT terminal of the driver chip outputs a high-level signal, the seventh transistor G7 turns on, lowering the anode potential of the first diode D1 connected to the drain of the seventh transistor G7. This causes the first diode D1 to be forward-biased. Current flows from the VCC port through the first diode D1 into the seventh transistor G7, where it is shaped, and ultimately flows to the -VCC port, forming a complete current path. When the seventh transistor G7 is turned off, the anode potential of the first diode D1 is higher than the cathode potential, placing the diode in a reverse-blocking state and preventing reverse current flow. By controlling the on and off times of the seventh transistor G7 and the unidirectional conductivity of the first diode D1, the input DC current is shaped, minimizing the phase difference between the current waveform and the voltage waveform, reducing the reactive power component, and increasing the active power ratio of the circuit, thereby achieving power factor correction.

[0045] Specifically, the power factor correction unit 3 further includes a seventh resistor R7 , one end of the seventh resistor R7 is connected to the PFCOUT terminal, and the other end of the seventh resistor R7 is connected to the gate of the seventh transistor G7 .

[0046] Reference Figure 2 In this embodiment, the seventh resistor R7 limits the driving current from the PFCOUT terminal to the gate of the seventh transistor G7, thereby preventing the gate of the seventh transistor G7 from being damaged by excessive current, protecting the transistor gate, and enhancing the reliability and stability of the system.

[0047] Reference Figure 2In this embodiment, the power module control circuit further includes a rectifier unit for converting AC power into DC input; the rectifier unit is electrically connected to the power factor correction module; the rectifier unit includes a second diode D2, a third diode D3, a fourth diode D4, and a fifth diode D5. When the external input AC power is in the positive half cycle, assuming AC1 is positive and AC2 is negative, current flows into the AC1 port through the fifth diode D5 to the DC-P port. Simultaneously, current flows out of the DC-N port through the second diode D2 to the AC2 port. Thus, during the positive half cycle of the AC power, current flows through the conduction path of the two diodes, converting the positive half cycle of the AC power into DC power, resulting in the DC-P port being positive and the DC-N port being negative. When the AC power is in the negative half cycle, AC1 becomes negative and AC2 becomes positive. At this point, current flows into the AC2 port, passes through the third diode D3, and flows to the DC-P port. Simultaneously, current flows out of the DC-N port and passes through the fourth diode D4 to the AC1 port. Thus, during the negative half-cycle of the AC power, the AC signal is also converted into a DC signal, keeping the DC-P port positive and the DC-N port negative. The rectifier unit is also integrated into the power module control circuit.

[0048] Through the above rectification process, the rectifier unit converts the external AC power input into DC power, regardless of whether it is in the positive or negative half-cycle. The DC-P port always outputs the DC positive pole, while the DC-N port outputs the DC negative pole. The DC-P port is connected to the VCC port, providing DC power input for the power factor correction unit 3. The DC-N port is connected to the -VCC port, serving as the power supply reference ground.

[0049] A second aspect of the present invention provides a PCB board, on which any power module control circuit as described above is printed.

[0050] A third aspect of the present invention provides a power module, wherein the power module adopts any of the above-mentioned power module control circuits to realize operation control.

[0051] Reference Figure 3 , Figure 3 Figure 1 is a schematic diagram of a power module, which includes a metal substrate 6, a plastic-encapsulated module body 7, multiple capacitors, a control chip 100, a chip bootstrap circuit 101, and a load motor 8. The module's internal driver IC's bootstrap VB1&U, VB2&V, and VB3&W ports are connected to corresponding functional traces via binding jumpers, internally connecting filter capacitors, bootstrap capacitors, and load motor 8, respectively.

[0052] Among them, the bootstrap capacitor uses a 1206 package and a 22nf capacitance, and the filter capacitor uses a 0402 package and a 1nf capacitance. The larger capacitance and 1206 package of the bootstrap capacitor are conducive to storing sufficient charge to meet the high voltage requirement when driving the upper arm transistor. The 0402 package and 1nf capacitance of the filter capacitor can effectively filter out high-frequency noise in the circuit, ensure the purity of the driving signal, and reduce the impact of interference on the circuit.

[0053] Reference Figure 4 , Figure 4 This is a schematic diagram of a traditional IPM power module, which requires the design of an external terminal VB on the module body as a bootstrap guide pin. However, because the low-voltage terminal VB is designed between the high-voltage pins U, V, and W, there is a lack of isolation between high voltage, low voltage, high frequency, and low frequency, resulting in a risk of crosstalk, which affects product reliability. In addition, it is also necessary to add a peripheral bootstrap circuit between VB and U, V, and W, which complicates the circuit routing and increases the difficulty of integrating the power module.

[0054] In this solution, the chip bootstrap circuit 101 is integrated inside the control chip 100, and the VDD signal can directly supply power to the VB1 port, VB2 port, and VB3 port of the control chip 100, eliminating the three low-voltage external VB terminals and the wiring between the control chip 100 and the external VB terminals, thereby achieving the separation of U and VB1, V and VB2, and W and VB3, thereby optimizing the layout of the external pins of the power module; specifically, Figure 3 The separation and centralized layout of medium and high voltage pins and low voltage pins greatly enhances the anti-interference ability, reduces the crosstalk between high and low voltage signals, shortens the drive loop area, reduces the interference source, makes the system operation more stable and reliable, and improves the integration and stability of the module.

[0055] The above specifically describes the preferred embodiments of the present invention, but the present disclosure is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present disclosure.

Claims

1. A power module control circuit, characterized in that: include: A drive control unit, a power conversion unit, a power factor correction unit and a bootstrap unit; the drive control unit is used to generate and send control signals; the power conversion unit is used to convert the internal current of the power module into an AC current that is adapted to the external load; the power factor correction unit is used to improve the power factor of the circuit and optimize the internal current waveform of the power module; the bootstrap unit is used to provide a high-voltage drive signal for the power conversion unit; the drive control unit is electrically connected to the power conversion unit, the power factor correction unit and the bootstrap unit respectively; the power conversion unit is electrically connected to the power factor correction unit and the bootstrap unit respectively.

2. The power module control circuit according to claim 1, wherein: The drive control unit includes a control chip and a chip bootstrap circuit; the control chip includes a first bootstrap boot pin VB1, a second bootstrap boot pin VB2, a third bootstrap boot pin VB3, a power supply terminal VDD, a first reference potential terminal U-VS1, a second reference potential terminal V-VS2, a third reference potential terminal W-VS3, a first high-end drive signal output terminal HO1, a second high-end drive signal output terminal HO2, a third high-end drive signal output terminal HO3, a first low-end drive signal output terminal LO1, a second low-end drive signal output terminal LO2, a third low-end drive signal output terminal LO3 and a PFCOUT terminal; The power supply terminal VDD is connected to the first bootstrap pin VB1, the second bootstrap pin VB2, and the third bootstrap pin VB3 through the chip bootstrap circuit; the first bootstrap pin VB1, the second bootstrap pin VB2, the third bootstrap pin VB3, the first reference potential terminal U-VS1, the second reference potential terminal V-VS2, and the third reference potential terminal W-VS3 are electrically connected to the bootstrap unit; the first high-end drive signal output terminal HO1, the second high-end drive signal output terminal HO2, the third high-end drive signal output terminal HO3, the first low-end drive signal output terminal LO1, the second low-end drive signal output terminal LO2, and the third low-end drive signal output terminal LO3 are electrically connected to the power conversion unit; The PFCOUT terminal is electrically connected to the power factor correction unit.

3. The power module control circuit according to claim 2, wherein: The power conversion unit includes a first transistor G1, a second transistor G2, a third transistor G3, a fourth transistor G4, a fifth transistor G5, and a sixth transistor G6; the source of the first transistor G1 is connected to the drain of the second transistor G2 and the first reference potential terminal U-VS1, and the gate of the first transistor G1 is connected to the first high-end drive signal output terminal HO1; the gate of the second transistor G2 is connected to the first low-end drive signal output terminal LO1; the source of the third transistor G3 is connected to the drain of the fourth transistor G4 and the second reference potential terminal V-VS2, and the gate of the third transistor G3 is connected to the second high-end drive signal output terminal HO2 The gate of the fourth transistor G4 is connected to the second low-end drive signal output terminal LO2; the source of the fifth transistor G5 is connected to the drain of the sixth transistor G6 and the third reference potential terminal W-VS3, and the gate of the fifth transistor G5 is connected to the third high-end drive signal output terminal HO3; the gate of the sixth transistor G6 is connected to the third low-end drive signal output terminal LO3; the drain of the first transistor G1, the drain of the third transistor G3 and the drain of the fifth transistor G5 are connected to the power factor correction unit; the source of the first transistor G1, the source of the third transistor G3 and the source of the fifth transistor G5 are connected to the bootstrap unit.

4. The power module control circuit according to claim 3, wherein: The power conversion unit also includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6; the two ends of the first resistor R1 are respectively connected to the first high-end drive signal output terminal HO1 and the gate of the first transistor G1; the two ends of the second resistor R2 are respectively connected to the first low-end drive signal output terminal LO1 and the gate of the second transistor G2; the two ends of the third resistor R3 are respectively connected to the second high-end drive signal output terminal HO2 and the gate of the third transistor G3; the two ends of the fourth resistor are respectively connected to the second low-end drive signal output terminal LO2 and the gate of the fourth transistor G4; the two ends of the fifth resistor R5 are respectively connected to the third high-end drive signal output terminal HO3 and the gate of the fifth transistor G5, and the two ends of the sixth resistor R6 are respectively connected to the third low-end drive signal output terminal LO3 and the gate of the sixth transistor G6.

5. The power module control circuit according to claim 2, wherein: The bootstrap unit includes a first bootstrap capacitor C1, a second bootstrap capacitor C2, and a third bootstrap capacitor C3; the two ends of the first bootstrap capacitor C1 are respectively connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1; the two ends of the second bootstrap capacitor C2 are respectively connected to the second bootstrap guide pin VB2 and the second reference potential terminal V-VS2; and the two ends of the third bootstrap capacitor C3 are respectively connected to the third bootstrap guide pin VB3 and the third reference potential terminal W-VS3.

6. The power module control circuit according to claim 5, wherein: The bootstrap unit further includes a first filter capacitor C4, a second filter capacitor C5 and a third filter capacitor C6; the two ends of the first filter capacitor C4 are connected to the first bootstrap guide pin VB1 and the first reference potential terminal U-VS1 respectively; The two ends of the second filter capacitor C5 are respectively connected to the second bootstrap pin VB2 and the second reference potential terminal V-VS2; the two ends of the third filter capacitor C6 are respectively connected to the third bootstrap pin VB3 and the third reference potential terminal W-VS3.

7. The power module control circuit according to claim 3, wherein: The power factor correction unit includes a seventh transistor G7 and a first diode D1; the gate of the seventh transistor G7 is connected to the PFCOUT terminal, the drain of the seventh transistor G7 is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the drain of the first transistor G1, the drain of the third transistor G3, and the drain of the fifth transistor G5.

8. The power module control circuit according to claim 7, wherein: The power factor correction unit further includes a seventh resistor R7 , one end of the seventh resistor R7 is connected to the PFCOUT terminal, and the other end of the seventh resistor R7 is connected to the gate of the seventh transistor G7 .

9. A PCB board, characterized in that: The power module control circuit according to any one of claims 1 to 8 is printed on the PCB board.

10. A power module, characterized in that: The power module uses the power module control circuit according to any one of claims 1 to 8 to achieve operation control.

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