Novel under-sampling least square digital pre-distortion method and system

Abstract

The invention discloses a novel under-sampling least square digital pre-distortion method and system, and belongs to the field of mobile communication, and the method comprises the steps: adding a band-pass filter at a received analog side, segmenting an obtained feedback signal, constructing a least square coefficient updating equation, and grouping according to different feedback signals, so as to obtain a pre-distortion result; then constructing a basis function by using a cubic term basis and a quintic term basis, estimating coefficients of the cubic term basis and the quintic term basis of corresponding power gears through a digital low-pass filter and finally by using least square, feeding back forward data, searching the corresponding coefficients of the forward data according to the power gears at the moment, and calculating pre-distortion output; the problem that in the prior art, when digital pre-distortion is carried out, energy consumption in a lookup table needs to be displayed is solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of mobile communications, and in particular relates to a novel undersampling least squares digital predistortion method and system. Background Art

[0002] With the advancement of communication technology, signal bandwidths are becoming increasingly wider, from 5MHz and 10MHz in the past to 100MHz and 200MHz today. As the signal bandwidth widens, the distortion of the signal after passing through the power amplifier increases. Therefore, various algorithms or devices are often needed to eliminate this distortion. Common distortion methods include feedforward, feedback, analog pre-distortion, and digital pre-distortion. Digital pre-distortion has gained widespread application due to its low cost and high performance. Digital pre-distortion adds a pre-distortion module before the power amplifier. By superimposing the inverse function of the power amplifier, the nonlinearity after passing through the power amplifier is precisely offset, thereby improving the linear range of the power amplifier and reducing the near-band interference (ACLR) and in-band EVM.

[0003] In digital pre-distortion, since it is necessary to collect the distorted signal after power amplification, and the spectrum of the distorted signal will be widened to 3 to 5 times the bandwidth, a high sampling rate ADC is often required to collect the real and imaginary data. It is generally believed that when the sampling rate is 4 to 5 times the signal bandwidth, a full sampling of the distorted signal can be obtained.

[0004] For example, if the signal bandwidth is 100MHz, the ADC sampling rate for both the real and imaginary parts must be 500MSPS to achieve full sampling. This results in higher analog component costs, defeating the original purpose of DPD's low cost. To address this issue, a method to reduce the ADC sampling rate, which we refer to in this article as undersampling ADC, is needed to reduce the overall analog component cost and associated analog requirements.

[0005] In addition, in the forward DPD process, a LUT table is often used for forward pre-distortion processing. The amplitude value of the input signal often needs to be quantized in the LUT table and mapped to the corresponding LUT table. This will result in the need for a very large number of LUT tables and a large amount of storage resources. In addition, due to the quantization of the LUT table, there is often quantization loss. Summary of the Invention

[0006] In response to the problems of excessive resource consumption of the LUT table and excessive ADC sampling rate in the pre-distortion process in the prior art, the present invention proposes a novel undersampling least squares digital pre-distortion method and system, which can reduce the size of the LUT and the sampling rate of the ADC.

[0007] To achieve the above-mentioned purpose, the technical solution adopted by the present invention is to provide a novel undersampling least squares digital predistortion method, comprising the following steps: S1: divide the input signal into different levels; S2: construct predistortion basis function; S3: Calculate the 3rd and 5th order basis filter outputs; S4: Perform LS coefficient pre-distortion training; S5: Build a predistorter; Preferably, in step S1, the input signal is divided into grades according to the power of the input signal, and the signal address is divided into 3rd order address, 5th order address, etc., and the input signal is uniformly set to , first quantize the input signal into M bits Among them high The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- -Q Represents the signal address, each input signal is based on the high and the middle The bits are divided into different power levels, and the coefficients between different power levels are different.

[0008] Preferably, in step S2, the process of constructing the predistortion basis function is as follows: let the basis function be , let the value of the signal address be expressed as , then the basis function is expressed as: Preferably, in step S3, the process of calculating the output of the 3rd and 5th order basis filters is as follows: Let the output after the third-order basis filter be , the output after 5th order basis filtering , the low-pass filter coefficient is , let the length of the low-pass filter be L, where n represents the filtered output at the nth moment, then: The new basis after low-pass filtering is and .

[0009] In the S4 process, the LS coefficient pre-distortion training is better as follows: Construct the LS equation, in Then use the LS estimation method to get the coefficient combination C as in Represents the inverse matrix of B.

[0010] Preferably, in step S5, the construction process of the predistorter is as follows: First, the input signal selects the power level according to different power levels. The selection method is consistent with the coefficient calculation. The input signal is uniformly set to , quantize the input signal into M bits, Among them high The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- - Represents the signal address, let the value of the signal address be expressed as , Then use the 3rd and 5th item addresses to look up the table and find the coefficients of the corresponding power levels. Let the coefficients found be and , and finally the output of the predistorter is: where | |Representative Find the absolute value.

[0011] The present invention also provides a novel undersampling least squares digital predistortion system, which includes a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit and a calculation module.

[0012] Preferably, the BPF circuit includes a first BPF circuit and a second BPF circuit; the first BPF circuit is placed on the analog side of the receiver.

[0013] Preferably, the frequency conversion circuit includes an up-conversion circuit and a down-conversion circuit.

[0014] Preferably, the predistorter is connected to the DAC circuit, the DAC circuit is connected to the up-conversion circuit, the up-conversion circuit is connected to the PA circuit, the coupler circuit is connected to the PA circuit, and the antenna is connected to the coupler, the other end of the coupler is connected to the first BPF circuit, the first BPF circuit is connected to the down-conversion circuit, the down-conversion circuit is connected to the ADC circuit, one end of the ADC circuit is connected to the predistorter coefficient training module, the other end of the ADC circuit is connected to the predistorter coefficient training module, and the second BPF circuit is also connected to the predistorter coefficient training module.

[0015] Preferably, the first BPF circuit is placed on the analog side of the receiver.

[0016] Preferably, the DAC circuit segments the feedback signal and constructs an LS coefficient update equation, then groups the input signal according to different input signal powers, and then uses the third-order basis and the fifth-order basis to construct the basis function. Through a digital low-pass filter, the LS algorithm is used to estimate the coefficients of the third-order basis and the fifth-order basis of the corresponding power level, and the forward data is fed back to the pre-distorter coefficient training module.

[0017] Preferably, the predistorter coefficient training module searches for the corresponding coefficient according to the power level and calculates the predistortion output to complete the digital predistortion process.

[0018] The English translation used in this invention is as follows: DPD Digital Pre-Distortion PA Power Amplifier ADC Analog Digital Converter MSPS Mega sample per second EVM Error Vector Magnitude ACLR Adjacent Channel Leakage Ratio LUT Look Up Table Compared with the prior art, the technical solution of the present invention has the following advantages / benefits: 1. The present invention performs bin-by-bin calculation on the input signal, thereby reducing the consumption of the LUT.

[0019] 2. The present invention modifies the signal processing process, and processes the input signal through the ADC circuit first and then through the BPF circuit, thereby reducing the ADC sampling rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0021] Figure 1 It is a structural diagram of a novel undersampling least squares digital predistortion method and system of the present invention.

[0022] Figure 2 It is a schematic diagram of the gear positions divided by the input signal of the present invention. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention are clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. Therefore, the detailed description of the embodiments of the present invention provided below is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention.

[0024] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it may not be further defined or explained in subsequent drawings.

[0025] Embodiment 1: A novel undersampling least squares digital predistortion method is provided, comprising the following steps: S1: divide the input signal into different levels; S2: construct predistortion basis function; S3: Calculate the 3rd and 5th order basis filter outputs; S4: Perform LS coefficient pre-distortion training; S5: Build a predistorter; In step S1, if Figure 2 As shown, the input signal is divided into grades according to the power of the input signal, and the signal address is converted into a 3rd term address, a 5th term address, etc., and the input signal is unified as , first quantize the input signal into M bits Among them high The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- -Q Represents the signal address, each input signal is based on the high and the middle The bits are divided into different power levels, and the coefficients between different power levels are different.

[0026] In step S2, the process of constructing the predistortion basis function is as follows: Let the basis function be , let the value of the signal address be expressed as , then the basis function is expressed as: In step S3, the process of calculating the output of the 3rd and 5th order basis filters is as follows: Let the output after the third-order basis filter be , the output after 5th order basis filtering , the low-pass filter coefficient is , let the length of the low-pass filter be L, where n represents the filtered output at the nth moment, then: The new basis after low-pass filtering is and .

[0027] During S4, the LS coefficient pre-distortion training is specifically performed as follows: Construct the LS equation, in Then use the LS estimation method to get the coefficient combination C as in Represents the inverse matrix of B.

[0028] In step S5, the construction process of the predistorter is as follows: Figure 2 As shown, first, the input signal selects the power gear according to different power gears. The selection method is consistent with the coefficient calculation. The input signal is uniformly set to , quantize the input signal into M bits, Among them high The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- - Represents the signal address, let the value of the signal address be expressed as , Then use the 3rd and 5th item addresses to look up the table and find the coefficients of the corresponding power levels. Let the coefficients found be and , and finally the output of the predistorter is: where | |Representative Find the absolute value.

[0029] Example 2: Figure 1As shown, a novel undersampling least squares digital predistortion system includes a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit and a calculation module.

[0030] The BPF circuit includes a first BPF circuit and a second BPF circuit; the first BPF circuit is placed on the analog side of the receiver.

[0031] The frequency conversion circuit includes an up-conversion circuit and a down-conversion circuit.

[0032] The predistorter is connected to the DAC circuit, the DAC circuit is connected to the up-conversion circuit, the up-conversion circuit is connected to the PA circuit, the coupler circuit is connected to the PA circuit, and the antenna is connected to the coupler. The other end of the coupler is connected to the first BPF circuit, the first BPF circuit is connected to the down-conversion circuit, and the down-conversion circuit is connected to the ADC circuit. One end of the ADC circuit is connected to the predistorter coefficient training module, the other end of the ADC circuit is connected to the predistorter coefficient training module, and the second BPF circuit is also connected to the predistorter coefficient training module.

[0033] A bandpass filter is added to the analog side of the receiver, and then the obtained feedback signal is segmented, and the LS coefficient update equation is constructed. The feedback signals are then grouped according to different groups, and the basis function is constructed using the third-order basis and the fifth-order basis. After passing through a digital low-pass filter, the coefficients of the third-order basis and the fifth-order basis corresponding to the power level are finally estimated using LS, and the forward data is fed back. The forward data searches for the corresponding coefficient according to the power level, and the pre-distortion output is calculated.

[0034] BPF refers to band-pass filter, ADC refers to analog-to-digital converter, and PA refers to power amplifier.

[0035] The above are merely preferred embodiments of the present invention. It should be noted that the above preferred embodiments should not be construed as limiting the present invention, and the scope of protection of the present invention should be determined by the scope defined in the claims. Persons skilled in the art will appreciate that improvements and modifications may be made without departing from the spirit and scope of the present invention, and such improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A novel undersampling least squares digital predistortion method, characterized in that: The following steps are involved: S1: divide the input signal into different levels; S2: construct predistortion basis function; S3: Calculate the 3rd and 5th order basis filter outputs; S4: Perform least square coefficient pre-distortion training; S5: Build a predistorter to complete digital predistortion.

2. The novel undersampling least squares digital predistortion method according to claim 1, characterized in that: In the step S1, the input signal is divided into grades according to the power of the input signal, and the signal address is converted into a 3rd term address, a 5th term address, etc., and the input signal is uniformly set to , first quantize the input signal into M bits: The highest of these The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- - Represents the signal address, each input signal is based on the highest Bit and the middle The bits are used to divide different power levels, and the coefficients between different power levels are different.

3. The novel undersampling least squares digital predistortion method according to claim 2, characterized in that: In the step S2, the process of constructing the predistortion basis function is as follows: let the basis function be , let the value of the signal address be expressed as , then the basis function is expressed as: where | |Representative Find the absolute value, C1 represents the first estimated coefficient, C2 represents the second estimated coefficient, Represents a quantized digital signal.

4. The novel undersampling least squares digital predistortion method according to claim 3, characterized in that: In step S3, the process of calculating the output of the 3rd and 5th order basis filters is as follows: Let the output after the third-order basis filter be , the output after 5th order basis filtering , the low-pass filter coefficient is , let the length of the low-pass filter be L, where n represents the filtered output at the nth moment, then: The new basis after low-pass filtering is and .

5. The novel undersampling least squares digital predistortion method according to claim 4, characterized in that: In the S4 process, the least square coefficient pre-distortion training is specifically performed as follows: Construct the LS equation, in Then, using the least squares estimation method, we get the coefficient combination C as in Indicates the inverse of matrix B.

6. The novel undersampling least squares digital predistortion method according to claim 5, characterized in that: In step S5, the construction process of the predistorter is as follows: First, the input signal selects the power level according to different power levels. The selection method is consistent with the coefficient calculation. The input signal is uniformly set to , quantize the input signal into M bits, Among them high The bits are the 3rd item address, the middle Bits represent 5 item addresses, the lowest M- - Represents the signal address, let the value of the signal address be expressed as , Then use the 3rd and 5th item addresses to look up the table and find the coefficients of the corresponding power levels. Let the coefficients found be and , and finally the output of the predistorter is: where | |Representative Find the absolute value.

7. A novel undersampling least squares digital predistortion system, characterized in that: The system comprises a predistorter, a DAC circuit, a PA circuit, a coupler circuit, an antenna, a BPF circuit, a frequency conversion circuit, a full-band model estimation module, a predistorter coefficient training module, an ADC circuit, and a calculation module. The BPF circuit comprises a first BPF circuit and a second BPF circuit; the frequency conversion circuit comprises an up-conversion circuit and a down-conversion circuit. The predistorter is connected to the DAC circuit, the DAC circuit is connected to the up-conversion circuit, the up-conversion circuit is connected to the PA circuit, the coupler circuit is connected to the PA circuit, and the antenna is connected to the coupler. The other end of the coupler is connected to the first BPF circuit, the first BPF circuit is connected to the down-conversion circuit, and the down-conversion circuit is connected to the ADC circuit. One end of the ADC circuit is connected to the predistorter coefficient training module, the other end of the ADC circuit is connected to the predistorter coefficient training module, and the second BPF circuit is also connected to the predistorter coefficient training module.

8. The novel undersampling least squares digital predistortion system according to claim 7, characterized in that: The first BPF circuit is placed on the analog side of the receiver.

9. The novel undersampling least squares digital predistortion system according to claim 8, characterized in that: The DAC circuit segments the obtained feedback signal and constructs an LS coefficient update equation. It then groups the input signal according to different input signal powers, and then constructs a basis function using a third-order basis and a fifth-order basis. The coefficients of the third-order basis and the fifth-order basis corresponding to the power level are estimated using an LS algorithm through a digital low-pass filter, and the forward data is fed back to the pre-distorter coefficient training module.

10. The novel undersampling least squares digital predistortion system according to claim 9, characterized in that: The predistorter coefficient training module searches for corresponding coefficients according to the power level and calculates the predistortion output to complete the digital predistortion process.

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