Relay protection and export matrix detection system, method, device and storage medium

Abstract

The application discloses a kind of relay protection and export matrix detection system, method, equipment and storage medium.The relay protection and export matrix detection system includes: input module, processing module, instruction generation module and error analysis module;Input module is used to receive input signal from export matrix and send to processing module, processing module is used to process and analyze input signal and send processing result to error analysis module;Instruction generation module is used to receive user input, generates error analysis instruction according to user input and sends to error analysis module;Error analysis module is used to generate error index according to processing result and error analysis instruction, generates final processing result according to error index.The application pays attention to the error caused by different input interface, and is conducive to improving the accuracy of detection result.

Description

Relay protection and output matrix detection system, method, equipment and storage medium Technical Field

[0001] This invention relates to the field of power system technology, and in particular to a relay protection and output matrix detection system and detection method. Background Technology

[0002] In power systems, the output matrix typically refers to the status control and monitoring matrix of various control devices such as circuit breakers and switches. These devices are responsible for functions such as current inflow and outflow, line switching, and load regulation in the power system. Output matrix detection is mainly used to monitor the status of these devices, ensure their normal operation, and perform protection or control operations when necessary.

[0003] Currently, existing technologies for testing relay protection and output matrix detection systems do not take into account the errors caused by different input interfaces, resulting in insufficient accuracy of the test results. Summary of the Invention

[0004] This invention provides a relay protection and output matrix detection system and detection method. When detecting the relay protection and output matrix detection system, attention is paid to the errors caused by different input interfaces, which helps to improve the accuracy of the detection results.

[0005] According to one aspect of the present invention, a relay protection and output matrix detection system is provided, the relay protection and output matrix detection system comprising: an input module, a processing module, an instruction generation module, and an error analysis module;

[0006] The input module is connected to the processing module. The input module is used to receive input signals from the exit matrix and send them to the processing module. The processing module is used to process and analyze the input signals and send the processing results to the error analysis module.

[0007] The instruction generation module is connected to the error analysis module. The instruction generation module is used to receive user input, generate error analysis instructions based on the user input, and send them to the error analysis module.

[0008] The processing module is connected to the error analysis module, which generates an error index based on the processing result and the error analysis instruction, and generates the final processing based on the error index.

[0009] Optionally, it may also include: a display module;

[0010] The display module is connected to the processing module and the error analysis module, and the display module is used to display the processing results of the processing module and the final processing results of the error analysis module.

[0011] Optionally, the input module includes: a signal acquisition unit, a voltage detection unit, a current detection unit, a high-impedance input unit, and an internal transmission unit;

[0012] The signal acquisition unit is used to acquire the outputs of each relay protection device and the output matrix as input signals. The signal acquisition unit is connected to the voltage detection unit and the current detection unit. The voltage detection unit is used to detect the voltage of the input signal and send it to the error analysis module. The current detection unit is used to detect the current of the input signal and send it to the error analysis module.

[0013] The high-impedance input unit is connected to the signal acquisition unit and the internal transmission unit. The internal transmission unit is connected to the processing module. The high-impedance input unit is used to input the input signal into the internal transmission unit, and the internal transmission unit is used to transmit the input signal to the processing module.

[0014] Optionally, the error analysis module includes: a data receiving unit, an error index calculation unit, and a processing result generation unit;

[0015] The data receiving unit is connected to the voltage detection unit and the current detection unit. The data receiving unit is used to receive voltage and current related information of the input signal from the input module, and to receive processing result related information from the processing module.

[0016] The error index calculation unit is used to calculate the error index based on the voltage and current information of the input signal received by the data receiving unit.

[0017] The processing result generation unit is used to generate a final processing result based on the acquired error index and the relevant information of the processing result received by the data receiving unit.

[0018] Optionally, the high-impedance input unit includes: the high-impedance input interface, an indicator light, and a protection circuit;

[0019] The number of high-impedance input interfaces is 16, and the number of indicator lights is 16. The indicator lights are set on the high-impedance input interfaces and correspond one-to-one with them. The indicator lights are used to display the on / off status of the high-impedance input interfaces.

[0020] The protection circuit is located between the signal output terminal of the high-impedance input interface and the input terminal of the internal transmission unit. The protection circuit includes a diode or a fuse and is used to protect the internal transmission unit from overvoltage or transient current.

[0021] Optionally, the processing module includes: a data processing unit, an algorithm storage unit, and a data analysis unit;

[0022] The data processing unit is used to process the input signals transmitted to the processing module through the internal transmission unit. The algorithm storage unit is used to store the algorithms for various detections of the exit matrix. The data analysis unit is used to schedule the algorithms stored in the algorithm storage unit according to user instructions and analyze the various data required by the user based on the data processed by the data processing unit to obtain the processing results.

[0023] Optionally, the data processing unit includes: a filter, a signal amplifier, and an analog-to-digital converter;

[0024] The filter is used to filter the input signal, the signal amplifier is used to amplify the input signal, and the analog-to-digital converter is used to convert the format of the input signal.

[0025] According to another aspect of the present invention, a relay protection and output matrix detection method is provided, which is applied to the relay protection and output matrix detection system described in the above aspect, the detection method comprising:

[0026] The input module responds to user input detection commands and receives corresponding input signals from the relay protection equipment and its output matrix;

[0027] The input signal is transmitted to the processing module through the input module, and the processing module processes the input signal to obtain a processing result;

[0028] The processing module responds to the user's input interface change command and changes the interface when the input signal is input;

[0029] The processing module processes the input signal after the interface is changed to obtain the processing result after the interface is changed, and determines whether the specified number of adjustments has been reached to obtain the first judgment result.

[0030] If the first judgment result is that the specified number of adjustments has not been reached, then return to continue executing the interface when the user changes the input signal;

[0031] If the first judgment result is that the specified number of adjustments has been reached, the instruction generation module receives the error analysis instruction input by the user, the error analysis module calculates the error index, and generates the final processing result based on the error index.

[0032] Optionally, the error analysis module calculates an error index and generates a final processing result based on the error index, including:

[0033] The data receiving unit receives information about the input signal voltage and input signal current from the input module, and receives information about the processing result from the processing module.

[0034] The error index calculation unit calculates the interface error index of each interface based on the processing results before and after the interface replacement.

[0035] The error index calculation unit obtains the relationship between voltage and current and the interface error index based on past data;

[0036] The error index calculation unit calculates the corrected interface error index for each interface based on the relevant information of the current input signal current and input signal voltage.

[0037] The processing result generation unit calculates the final processing result based on the corrected interface error index and relevant information of the processing result.

[0038] According to another aspect of the present invention, an electronic device is also provided, the electronic device comprising:

[0039] One or more processors;

[0040] Memory, used to store one or more programs;

[0041] When the one or more programs are executed by the one or more processors, the one or more processors perform the method as described in any embodiment of the present invention.

[0042] According to another aspect of the present invention, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the method as described in any embodiment of the present invention.

[0043] The technical solution of this invention obtains and corrects error indicators from different input interfaces to arrive at the final processing result. This facilitates the analysis of processing results and errors from each interface, understanding the impact of errors from different input interfaces on the processing result, and improving the accuracy of the final processing result by comprehensively considering the errors from each interface. In summary, this invention solves the problem of insufficient accuracy in existing relay protection and output matrix detection systems, which do not consider errors introduced by different input interfaces.

[0044] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 is a schematic diagram of a relay protection and output matrix detection system according to an embodiment of the present invention;

[0047] Figure 2 is a flowchart of a relay protection and output matrix detection method provided according to an embodiment of the present invention;

[0048] Figure 3 is a flowchart of another relay protection and output matrix detection method provided according to an embodiment of the present invention;

[0049] Figure 4 is a diagram showing the relationship between a modified interface error index and the second interface error index according to an embodiment of the present invention.

[0050] Figure 5 is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present invention. Detailed Implementation

[0051] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0052] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0053] Figure 1 is a structural schematic diagram of a relay protection and output matrix detection system provided according to an embodiment of the present invention. Referring to Figure 1, the embodiment of the present invention provides a relay protection and output matrix detection system, which includes: an input module 10, a processing module 20, an instruction generation module 40, and an error analysis module 50.

[0054] The input module 10 is connected to the processing module 20. The input module 10 is used to receive the input signal from the exit matrix and send it to the processing module 20. The processing module 20 is used to process and analyze the input signal and send the processing result to the error analysis module 50.

[0055] The instruction generation module 40 is connected to the error analysis module 50. The instruction generation module 40 is used to receive user input, generate error analysis instructions based on user input, and send them to the error analysis module 50.

[0056] The processing module 20 is connected to the error analysis module 50. The error analysis module 50 is used to generate error indicators based on the processing results and error analysis instructions, and to generate the final processing result based on the error indicators.

[0057] Specifically, the user inputs a detection command. After receiving the user's detection command, the input module 10 receives the corresponding input signal from the relay protection device and its output matrix. The input signal is transmitted to the processing module 20 through the input module 10. The processing module 20 processes the input signal to obtain the processing result. When the user changes the interface of the input signal, the processing module 20 processes the input signal after the interface change to obtain the processing result after the interface change and determines whether the specified number of adjustments has been reached. If yes, the user inputs an error analysis command through the command generation module 40. The error analysis module 50 calculates the error index and generates the final processing result based on the error index. If no, it returns to continue executing the interface operation when the user changed the input signal.

[0058] By considering the reliability of the input signal and weighting the corrected error index to obtain the final processing result, it is beneficial to consider the impact of the input signal on the error calculation and processing result during the propagation process. By considering this impact to obtain the final processing result, the accuracy of the final processing result is improved, and the degree to which the processing result fits the actual situation is increased.

[0059] The technical solution of this invention obtains and corrects error indicators from different input interfaces to arrive at the final processing result. This facilitates the analysis of processing results and errors from each interface, understanding the impact of errors from different input interfaces on the processing result, and improving the accuracy of the final processing result by comprehensively considering the errors from each interface. In summary, this invention solves the problem of insufficient accuracy in existing relay protection and output matrix detection systems, which do not consider errors introduced by different input interfaces.

[0060] Referring again to Figure 1, optionally, a display module 30 is also included;

[0061] The display module 30 is connected to the processing module 20 and the error analysis module 50. The display module 30 is used to display the processing results of the processing module 20 and the final processing results of the error analysis module 50.

[0062] Specifically, the processing module 20 processes and analyzes the input signal and sends the processing result to the display module 30. The error analysis module 50 generates an error index based on the processing result and error analysis instructions, generates the final processing result based on the error index, and sends it to the display module 30. The display module 30 displays the processing result of the processing module 20 and the final processing result of the error analysis module 50.

[0063] Optionally, the input module includes: a signal acquisition unit, a voltage detection unit, a current detection unit, a high-impedance input unit, and an internal transmission unit;

[0064] The signal acquisition unit is used to acquire the output of each relay protection device and the output matrix as input signals. The signal acquisition unit is connected to the voltage detection unit and the current detection unit. The voltage detection unit is used to detect the voltage of the input signal and send it to the error analysis module. The current detection unit is used to detect the current of the input signal and send it to the error analysis module.

[0065] The high-impedance input unit is connected to the signal acquisition unit and the internal transmission unit. The internal transmission unit is connected to the processing module. The high-impedance input unit is used to input the input signal into the internal transmission unit, and the internal transmission unit is used to transmit the input signal to the processing module.

[0066] Optionally, the error analysis module includes: a data receiving unit, an error index calculation unit, and a processing result generation unit;

[0067] The data receiving unit is connected to the voltage detection unit and the current detection unit. The data receiving unit is used to receive the voltage and current related information of the input signal from the input module and to receive the relevant information of the processing result from the processing module.

[0068] The error index calculation unit is used to calculate the error index based on the voltage and current information of the input signal received by the data receiving unit.

[0069] The processing result generation unit is used to generate the final processing result based on the acquired error index and the relevant information of the processing result received by the data receiving unit.

[0070] Optionally, the high-impedance input unit includes: a high-impedance input interface, an indicator light, and a protection circuit;

[0071] There are 16 high-impedance input interfaces and 16 indicator lights. The indicator lights are located on the high-impedance input interfaces and correspond one-to-one with them. The indicator lights are used to show the on / off status of the high-impedance input interfaces.

[0072] The protection circuit is located between the signal output terminal of the high-impedance input interface and the input terminal of the internal transmission unit. The protection circuit includes a diode or a fuse and is used to protect the internal transmission unit from overvoltage or transient current.

[0073] Optionally, the processing module includes: a data processing unit, an algorithm storage unit, and a data analysis unit;

[0074] The data processing unit is used to process the input signals transmitted to the processing module through the internal transmission unit. The algorithm storage unit is used to store the algorithms for various detections of the exit matrix. The data analysis unit is used to schedule the algorithms stored in the algorithm storage unit according to user instructions and analyze the various data required by the user based on the data processed by the data processing unit to obtain the processing results.

[0075] Optionally, the data processing unit includes: a filter, a signal amplifier, and an analog-to-digital converter;

[0076] Filters are used to filter input signals, signal amplifiers are used to amplify input signals, and analog-to-digital converters are used to convert the format of input signals.

[0077] Embodiments of the present invention also provide a relay protection and output matrix detection method, which is applied to the relay protection and output matrix detection system in any embodiment of the present invention. Figure 2 is a flowchart of a relay protection and output matrix detection method provided according to an embodiment of the present invention. Referring to Figure 2, the relay protection and output matrix detection method includes the following steps:

[0078] S110 The input module responds to user input detection commands and receives corresponding input signals from the relay protection equipment and its output matrix.

[0079] S120. The input signal is sent to the processing module through the input module, and the processing module processes the input signal to obtain the processing result.

[0080] S130: The processing module responds to the user's input interface change command and changes the interface when the input signal is input.

[0081] S140. The processing module processes the input signal after the interface is changed to obtain the processing result after the interface is changed, and determines whether the specified number of adjustments has been reached to obtain the first judgment result.

[0082] Specifically, the number of adjustments shall be set by those skilled in the art and the maximum value shall not exceed the number of interfaces included in the detection system.

[0083] S150. If the first judgment result is that the specified number of adjustments has not been reached, then return to continue executing the interface when the user changes the input signal.

[0084] S160. If the first judgment result is that the specified number of adjustments has been reached, the instruction generation module receives the error analysis instruction input by the user, the error analysis module calculates the error index, and generates the final processing result based on the error index.

[0085] Specifically, calculating error indicators and obtaining the final processing results helps reduce detection errors. The final processing results can more accurately reflect the actual situation of the relay protection equipment and output matrix being tested compared to the preliminary processing results and the secondary processing results.

[0086] The final processing result is generally the output action time of the relay protection equipment and the output matrix. The output action time is the time required from the triggering of the fault simulation signal to the output signal of the relay protection equipment and the output matrix. The fault simulation signal can be generated by the corresponding fault simulation signal generator and the triggering time can be recorded.

[0087] The relay protection and output matrix detection method provided in this embodiment of the invention is used to control the relay protection and output matrix detection system provided in any embodiment of the invention. Therefore, the relay protection and output matrix detection method provided in this embodiment of the invention also has the beneficial effects described in the above embodiments, which will not be repeated here.

[0088] Based on the above embodiments, the present invention further refines step S160, which will be described in detail below, but this is not intended to limit the present invention.

[0089] Figure 3 is a flowchart of another relay protection and output matrix detection method provided according to an embodiment of the present invention. Referring to Figure 3, step S160 includes:

[0090] S161. The data receiving unit receives relevant information about the input signal voltage and input signal current from the input module, and receives relevant information about the processing result from the processing module.

[0091] S162. The error index calculation unit calculates the interface error index of each interface based on the processing results before and after the interface replacement.

[0092] Specifically, the interface error index can be calculated using the following formula:

[0093] JMIS = T-TT+DE-de

[0094] JMIS is the first interface error index, used to characterize the degree of error in the calculation of the exit action time of each interface. The larger the index value, the greater the degree of error. T is the average value of the exit action time detected by each interface, TT is the exit action time detected by the interface, DE is the average value of the delay value detected by each interface, de is the delay value detected by the interface, and the delay value is the time taken for the input signal to be transmitted from the interface to the processing module.

[0095] S163, The error index calculation unit obtains the relationship between voltage and current and interface error index based on past data.

[0096] Specifically, the relationship can be obtained by fitting a linear model to the past data. The past data includes the past input signal voltage and the past input signal current of the interface, as well as the past interface error index calculated by the above formula. The obtained relationship is denoted as jmis=F1(U,I), where F1() is the corresponding function relationship, jmis is the second interface error index obtained through the function relationship, U is the input signal voltage, and I is the input signal current.

[0097] S164. The error index calculation unit calculates the corrected interface error index for each interface based on the relevant information of the current input signal current and input signal voltage.

[0098] Specifically, the corrected interface error index can be calculated using the following formula:

[0099] XJMIS=0.5*k1*JMIS′+0.5*k2*F1(U now ,I now )

[0100]

[0101] Where XJMIS is the corrected interface error index, JMIS′ is the interface error index of the interface, k1 is the current data weight, k2 is the historical data weight, and U nowI represents the current input signal voltage of this interface. now This represents the current input signal current of the interface.

[0102] e is a natural constant, N is the total number of interfaces used during the detection process, and JMIS n JMIS is the error metric for the first interface corresponding to the nth interface used. 均 JMISS represents the average value of the first interface error index for each interface; M is the number of historical data sets used to obtain the second interface error index. m JMIS is the second interface error index obtained from the m-th set of past data through a functional relationship. m jmis is the error index of the first interface corresponding to the m-th set of past data. 均 This is the mean of all second interface error indices obtained from the M sets of past data for this interface.

[0103] Figure 4 is a diagram showing the relationship between a corrected interface error index, an interface error index, and a second interface error index according to an embodiment of the present invention. As shown in Figure 4, when k1 is 0.6 and k2 is 0.4, the corrected interface error index and the interface error index (via F1(U)) are... now ,I now The relationship between the calculated second interface error indices is shown in the diagram.

[0104] S165. The processing result generation unit calculates the final processing result based on the corrected interface error index and relevant information of the processing result.

[0105] Specifically, the final processing result can be calculated according to the following formula:

[0106]

[0107] Where FIN is the final processing result, T is the average exit action time detected by each interface, N is the total number of interfaces used during the detection process, and XJMIS n Let K be the interface error index after correction for the nth interface. n This is the signal confidence index for the nth interface.

[0108] The following is the program used to calculate the final processing result:

[0109] def calculate_FIN(T, N, XJMIS, K):

[0110] # Calculate Σ(XJMIS_n*K_n)

[0111] weighted_sum=sum(xjmis*k for xjmis,k in zip(XJMIS,K))

[0112] #Calculate FIN

[0113] FIN = T - (1 / N) * weighted_sum

[0114] return FIN

[0115] #Example Input Data

[0116] T = 100# Average action time (example)

[0117] N = 3 # Number of interfaces (example)

[0118] XJMIS = [0.1, 0.05, 0.02] # Corrected error index for each interface (example)

[0119] K = [0.9, 0.8, 0.85] # Signal confidence index for each interface (example)

[0120] #Calculate FIN

[0121] FIN=calculate_FIN(T,N,XJMIS,K)

[0122] print("Final processing result FIN:", FIN)

[0123] The signal confidence index of the interface can be calculated using the following formula:

[0124]

[0125] Among them, K n SNR is the signal confidence index for the nth interface, used to characterize how close the signal transmitted through that interface is to the ideal signal (a signal without any distortion, noise, or interference, conforming to expectations and perfectly presenting the required characteristics). The closer the index value is to 1, the greater the closeness. n Let SNR be the signal-to-noise ratio of the signal at the Nth interface. n The ideal signal-to-noise ratio for the detection system is set by those skilled in the art between 5 dB and 20 dB based on the quality of the detection system, where e is the natural constant and t is the signal-to-noise ratio. n Let t be the number of fluctuations of the signal at the nth interface within one detection period. max The maximum number of fluctuations within a detection period from the signals of each interface recorded in the past; time is the duration of a detection period, t. 1x Let t be the starting time of the x-th signal fluctuation.2x Let FD be the end time of the x-th signal fluctuation. x (t) represents the signal voltage value at time t during the x-th signal fluctuation, and FD represents the normal voltage value when the signal does not fluctuate.

[0126] It is worth noting that the above method mainly applies to DC input signals. For AC input signals, replacing U in the formula jmis=F1(U,I) with the effective value of the AC input signal voltage and I with the effective value of the AC input signal current can yield the corresponding corrected interface error index. However, K n The calculation method is not universally applicable to AC input signals. Therefore, when the input signal is an AC input signal, the confidence level of the signal is not considered, and K is set to... n It is always equal to 1, so the final processing result can be obtained through calculation.

[0127] This embodiment should be understood as including all the features of any of the foregoing embodiments and further improving upon them. In the above embodiments, the method for obtaining the final processing result is mainly applicable to DC input signals. For AC input signals, replacing U in the formula jmis=F1(U,I) with the effective voltage value of the AC input signal and replacing I with the effective current value of the AC input signal can obtain the final processing result through the above embodiments. However, this processing does not specifically consider AC input signals and still has certain errors. Therefore, a method for obtaining the final processing result when the input signal is an AC signal is proposed to reduce errors, including the following steps:

[0128] STEP1: Calculate the interface error index according to the method described in the above embodiment.

[0129] STEP2: The error index calculation unit obtains the relationship between the effective voltage value, effective current value, frequency and interface error index of the AC input signal based on past data.

[0130] Specifically, the relationship can be obtained by fitting a linear model to the past data. The past data includes the effective voltage value, effective current value, and frequency of the AC input signal of the interface in the past, as well as the past interface error index calculated by the above formula. The obtained relationship is denoted as gmis = F2(u, i, f), where F2() is the corresponding functional relationship, gmis is the third interface error index obtained through the functional relationship, u is the effective voltage value of the AC input signal, i is the effective current value of the AC input signal, and f is the frequency of the AC input signal.

[0131] STEP3: The error index calculation unit calculates the corrected interface error index for each interface when the input signal is an AC input signal, based on the current AC input signal.

[0132] When the input signal is an AC input signal, the corrected interface error index can be calculated according to the following formula:

[0133] xjmis=0.5*k3*JMIS+0.5*k4*F2(u now ,u now ,f now )

[0134]

[0135] Where xjmis is the interface error index after correction when the input signal is an AC input signal, k3 is the current data weight of the AC input, k4 is the past data weight of the AC input, and u now i represents the effective voltage value of the current AC input signal of this interface. now f is the effective value of the current of the current AC input signal of this interface. now This is the frequency of the current AC input signal for this interface.

[0136] e is a natural constant, N is the total number of interfaces used during the detection process, and JMIS n JMIS is the error metric for the first interface corresponding to the nth interface used. 均 Gmis represents the average value of the first interface error index for each interface; P is the number of historical data sets used to obtain the third interface error index. p JMIS is the third interface error index obtained from the p-th set of past data through a functional relationship. p GMI represents the first interface error index corresponding to the p-th group of past data. 均 This is the mean of all third interface error metrics obtained from the past data of group P.

[0137] STEP4: The processing result generation unit calculates the final processing result based on the corrected interface error index when the input signal is an AC input signal.

[0138] When the input signal is an AC input signal, the final processing result fin can be calculated according to the following formula:

[0139]

[0140] Where T is the average exit action time detected by each interface, and N is the total number of interfaces used during the detection process. n Q is the interface error index after correction for the nth interface when the input signal is an AC input signal. nWhen the input signal is an AC input signal, the signal confidence index of the nth interface.

[0141] The interface confidence index can be calculated using the following formula:

[0142]

[0143] Among them, Q n SNR is the signal confidence index of the nth interface when the input signal is an AC input signal. It characterizes how close the signal transmitted by this interface is to the ideal signal (a signal without any distortion, noise, or interference, which meets expectations and perfectly presents the required characteristics) when the input signal is an AC input signal. The closer the index value is to 1, the greater the degree of closeness. n Let SNR be the signal-to-noise ratio of the signal at the Nth interface. n The ideal signal-to-noise ratio for the detection system is defined by those skilled in the art as being between 5 dB and 20 dB based on the quality of the detection system, where e is the natural constant and ZC is the signal-to-noise ratio. n ZC represents the number of noise occurrences in the signal of the nth interface within one detection period. max Y represents the maximum number of noise occurrences within a single detection cycle of signals from various interfaces recorded in the past; Y is the number of phase sampling points. Let y be the phase of the y-th phase sampling point. The phase of the (y-1)th phase sampling point. Let X be the average phase difference between the phase of each sampling point and the phase of its adjacent sampling points, and let A be the number of peak values ​​of the AC input signal. x Let x be the absolute value of the x-th peak of the AC input signal, and A be the average of the absolute values ​​of all peaks of the AC input signal.

[0144] The beneficial effect of this embodiment is that by considering the frequency of the AC input signal to calculate the third interface error index, it is beneficial to improve the accuracy of error correction when the input signal is an AC signal. This is achieved by using Q... n To obtain the final processing result, the influence of AC signal on the processing result is taken into account, thereby improving the accuracy of the final processing result.

[0145] Figure 5 shows a schematic diagram of an electronic device 1 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0146] As shown in Figure 5, the electronic device 1 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer programs stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 1. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0147] Multiple components in electronic device 1 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of monitors, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 1 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0148] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as relay protection and output matrix detection methods.

[0149] In some embodiments, the relay protection and output matrix detection method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 1 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the relay protection and output matrix detection method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the relay protection and output matrix detection method by any other suitable means (e.g., by means of firmware).

[0150] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0151] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0152] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0153] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0154] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0155] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0156] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0157] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for detecting relay protection and output matrix, characterized in that, An application is made in a relay protection and output matrix detection system, the relay protection and output matrix detection system comprising: an input module, a processing module, an instruction generation module, and an error analysis module; the input module is connected to the processing module, and is used to receive input signals from the output matrix and send them to the processing module, the processing module is used to process and analyze the input signals and send the processing results to the error analysis module; the instruction generation module is connected to the error analysis module, and is used to receive user input, generate error analysis instructions based on the user input, and send them to the error analysis module; the processing module is connected to the error analysis module, and the error analysis module is used to generate error indicators based on the processing results and the error analysis instructions, and generate a final processing result based on the error indicators; the detection method includes: the input module In response to a user-input detection command, the system receives a corresponding input signal from the relay protection device and its output matrix. The input signal is transmitted to the processing module via the input module, where it processes the input signal to obtain a processing result. The processing module also responds to a user-input interface change command, changing the interface at which the input signal is input. The processing module processes the input signal after the interface change to obtain a processing result after the interface change, and determines whether a specified number of adjustments has been reached, obtaining a first judgment result. If the first judgment result indicates that the specified number of adjustments has not been reached, the system returns to continue executing the user-input interface change. If the first judgment result indicates that the specified number of adjustments has been reached, the instruction generation module receives an error analysis command input by the user, calculates an error index, and generates a final processing result based on the error index.

2. The detection method according to claim 1, characterized in that, The relay protection and output matrix detection system further includes a display module; the display module is connected to the processing module and the error analysis module, and the display module is used to display the processing results of the processing module and the final processing results of the error analysis module.

3. The detection method according to claim 1, characterized in that, The input module includes: a signal acquisition unit, a voltage detection unit, a current detection unit, a high-impedance input unit, and an internal transmission unit. The signal acquisition unit is used to acquire the outputs of each relay protection device and the output matrix as input signals. The signal acquisition unit is connected to the voltage detection unit and the current detection unit. The voltage detection unit is used to detect the voltage of the input signal and send it to the error analysis module. The current detection unit is used to detect the current of the input signal and send it to the error analysis module. The high-impedance input unit is connected to the signal acquisition unit and the internal transmission unit. The internal transmission unit is connected to the processing module. The high-impedance input unit is used to input the input signal into the internal transmission unit, and the internal transmission unit is used to transmit the input signal to the processing module.

4. The detection method according to claim 3, characterized in that, The error analysis module includes: a data receiving unit, an error index calculation unit, and a processing result generation unit; the data receiving unit is connected to the voltage detection unit and the current detection unit, and is used to receive voltage and current related information of the input signal from the input module, and to receive processing result related information from the processing module; the error index calculation unit is used to calculate the error index based on the voltage and current related information of the input signal received by the data receiving unit; the processing result generation unit is used to generate the final processing result based on the acquired error index and the processing result related information received by the data receiving unit.

5. The detection method according to claim 3, characterized in that, The high-impedance input unit includes: a high-impedance input interface, indicator lights, and a protection circuit; there are 16 high-impedance input interfaces and 16 indicator lights, each corresponding to a high-impedance input interface, and the indicator lights are used to display the on / off status of the high-impedance input interface; the protection circuit is located between the signal output terminal of the high-impedance input interface and the input terminal of the internal transmission unit, and the protection circuit includes a diode or a fuse, and the protection circuit is used to protect the internal transmission unit from overvoltage or transient current.

6. The detection method according to claim 3, characterized in that, The processing module includes a data processing unit, an algorithm storage unit, and a data analysis unit. The data processing unit processes input signals transmitted to the processing module through the internal transmission unit. The algorithm storage unit stores algorithms for various detections of the exit matrix. The data analysis unit schedules the algorithms stored in the algorithm storage unit according to user instructions and analyzes the data processed by the data processing unit to obtain various data required by the user and thus obtain the processing result.

7. The detection method according to claim 6, characterized in that, The data processing unit includes a filter, a signal amplifier, and an analog-to-digital converter; the filter is used to filter the input signal, the signal amplifier is used to amplify the input signal, and the analog-to-digital converter is used to convert the format of the input signal.

8. The detection method according to claim 4, characterized in that, The error analysis module calculates error indices and generates final processing results based on these indices, including: the data receiving unit receiving relevant information about the input signal voltage and current from the input module, and receiving relevant information about the processing results from the processing module; the error index calculation unit calculating the interface error indices for each interface based on the processing results before and after interface replacement; the error index calculation unit obtaining the relationship between voltage and current and the interface error indices based on past data; the error index calculation unit calculating the corrected interface error indices for each interface based on relevant information about the current input signal current and voltage; and the processing result generation unit calculating the final processing result based on the corrected interface error indices and relevant information about the processing results.

9. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the detection method as described in claim 1 or 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the detection method as described in claim 1 or 8.

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