Verification system and method of chip isolator

Abstract

The invention provides a verification system and method for a chip isolator. The verification system comprises a main system, an auxiliary system, a to-be-verified target and a controller. The controller can determine the target configuration item corresponding to the test requirement in the test configuration file according to the test requirement, and set the parameter corresponding to the target configuration item as the target parameter. In this way, relevant modules can be configured by configuring the target parameters. The controller can send the test data to the main system, so that the main system and the auxiliary system interact based on the test data. The controller can obtain the test report information generated by the to-be-verified target in the interaction process, compare the test report information with the expected report information, and generate adaptive verification information according to the comparison result. According to the verification system, the setting items related to the test requirements are integrated into the configuration file and can still be effectively reused under the condition of different test requirements, so that the verification efficiency is improved.

Description

Technical Field

[0001] The present application belongs to the field of chip verification technology, and in particular relates to a verification system and method for a chip isolator. Background Art

[0002] The chip isolator can be used in the chip circuit to monitor the sub-system in the chip, and then detect the abnormality in time when the communication abnormality occurs in the sub-system, and send the abnormal situation to the main system, and communicate with the main system on behalf of the sub-system to prevent the main system from falling into abnormality due to the communication abnormality of the sub-system.

[0003] Due to the importance of chip isolators in the chip communication process, after the chip design is completed, the chip isolators need to be verified to ensure that the chip isolators can operate normally in various scenarios, thereby ensuring the stability of the chip operation in various scenarios.

[0004] Although the verification environment can be built based on a general verification methodology, the chip isolator has a variety of functions to be verified and a wide range of applicable scenarios, which makes the verification environment difficult to reuse and affects verification efficiency. Summary of the Invention

[0005] The present application provides a chip isolator verification system and method to solve the problem that the chip isolator has many functions to be verified, which makes it difficult to reuse the verification environment and affects the verification efficiency.

[0006] In a first aspect, the present application provides a chip isolator verification system, comprising: a main system, a sub-system, a target to be verified, and a controller; the main system and the sub-system are connected via a communication channel established by an AXI bus; the target to be verified is configured to monitor the communication status of the sub-system and, when the communication status of the sub-system is abnormal, to interact with the main system on behalf of the sub-system;

[0007] The controller is configured to:

[0008] According to the test requirements, determining a target configuration item corresponding to the test requirements in the test configuration file, and setting a parameter corresponding to the target configuration item as a target parameter; the main system, the secondary system, and the target to be verified correspond to at least one of the target configuration items;

[0009] Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data;

[0010] Acquire test report information and expected report information generated based on the interaction performed by the primary system and the secondary system; the test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize an abnormal state of the interaction process; the abnormal transmission address and the abnormal transmission ID are used to determine an abnormal interaction transaction;

[0011] If the test report information is different from the expected report information, first verification information is generated; the first verification information is used to indicate that the target to be verified has passed the verification process corresponding to the test requirement;

[0012] If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has not passed the verification process corresponding to the test requirement.

[0013] In some feasible embodiments, the target configuration item includes a delay configuration option; the delay configuration option is used to control the response time of the secondary system to the data sent by the primary system;

[0014] After the controller sets the delay configuration option to the target parameter, the controller is further configured to:

[0015] Sending first test data to the primary system, so that the primary system interacts with the secondary system based on the first test data and the communication channel corresponding to the first test data;

[0016] Acquire first test report information generated by the target to be verified; the first test report information is information generated by the target to be verified when the delay of the secondary system in responding to the first test data sent by the primary system is greater than a delay threshold;

[0017] If the first test report information is different from the first expected report information, generating first verification information;

[0018] If the first test report information is identical to the first expected report information, second verification information is generated.

[0019] In some feasible embodiments, the target configuration item further includes a transparent transmission configuration option; the transparent transmission configuration option is used to control the primary system to send the second test data to the secondary system in a transparent transmission manner;

[0020] When the interaction mode between the primary system and the secondary system is transparent transmission, the controller is further configured to:

[0021] When the interaction mode between the primary system and the secondary system is transparent transmission, the controller is further configured to:

[0022] Sending a target mode start signal to the target to be verified, so that the target to be verified operates in the target mode;

[0023] sending second test data to the primary system, so that the primary system sends the second test data to the secondary system;

[0024] After the secondary system receives the second test data, sending a target mode exit signal to the target to be verified, so that the target to be verified exits the target mode;

[0025] sending the second test data to the primary system, so that the primary system continues to send the second test data to the secondary system;

[0026] If the second test report information generated by the target to be verified is acquired, or the secondary system does not receive the second test data, the first verification information is generated.

[0027] In some feasible embodiments, the target configuration item further includes a target mode configuration option; the target mode configuration option is used to control the target to be verified to run in the target mode;

[0028] After the controller sets the transparent transmission configuration option and the target mode configuration option as target parameters, the controller is further configured to:

[0029] Sending third test data to the primary system, so that the primary system sends the third test data to the secondary system in a transparent transmission manner;

[0030] After the secondary system receives the third test data, updating the target parameter of the target mode configuration option to make the target to be verified exit the target mode;

[0031] sending the third test data to the primary system, so that the primary system continues to send the third test data to the secondary system;

[0032] If the third test report information generated by the target to be verified is acquired, or the secondary system does not receive the third test data, the first verification information is generated.

[0033] In some feasible embodiments, after the controller sets the transparent transmission configuration option and the target mode configuration option as target parameters, the controller is further configured to:

[0034] Controlling the primary system to send fourth test data to the secondary system in a burst transmission manner, and obtaining a burst transmission threshold supported by the target to be verified;

[0035] When fourth test report information is obtained, which indicates that the number of burst transmissions of the fourth test data transmitted by the main system is less than the burst transmission threshold, the first verification information is generated.

[0036] In some possible embodiments, the controller is further configured to:

[0037] Updating the target parameter of the transparent transmission configuration option so that the target to be verified exits the transparent transmission;

[0038] controlling the primary system to send fifth test data to the secondary system in a burst transmission manner;

[0039] When the number of burst transmissions supported by the main system is greater than the burst transmission threshold and the fifth test report information generated by the target to be verified is not obtained, the first verification information is generated; the fifth test report information is used to characterize that the transmission status of the burst transmission is abnormal.

[0040] In some feasible embodiments, the target configuration item further includes a data volume configuration option; the data volume configuration option is used to control the amount of response data fed back by the secondary system when receiving the test data sent by the primary system;

[0041] After configuring the data volume configuration option as the target parameter, the controller is further configured to:

[0042] controlling the primary system to send sixth test data to the secondary system;

[0043] When the number of the sixth test data is different from the number of response data fed back by the sub-system, and the sixth test report information generated by the target to be verified is not obtained, the first verification information is generated; the sixth test report information is used to characterize the abnormal interaction between the main system and the sub-system.

[0044] In some feasible embodiments, after the controller controls the primary system to send the sixth test data to the secondary system, the controller is further configured to:

[0045] obtaining a data identifier of response data fed back by the secondary system to the primary system based on the sixth test data;

[0046] When the data identifier of the sixth test data is different from the data identifier of the response data and the seventh test report information generated by the target to be verified is not obtained, the first verification information is generated; the sixth test report information is used to characterize the abnormal interaction between the main system and the secondary system.

[0047] In some feasible embodiments, after the controller controls the primary system to send the sixth test data to the secondary system, the controller is further configured to:

[0048] Before the main system sends the sixth test data including the end data identifier to the secondary system, when it is detected that the secondary system feeds back the end response data including the end response data identifier to the main system, and the eighth test report information generated by the target to be verified is not obtained, the first verification information is generated; the eighth test report information is used to characterize the abnormal interaction between the main system and the secondary system.

[0049] In a second aspect, the present application provides a chip isolator verification method, which can be applied to the chip isolator verification system described in the first aspect. The verification system can include a main system, a secondary system, and a target to be verified. The verification method includes:

[0050] According to the test requirements, determining a target configuration item corresponding to the test requirements in the test configuration file, and setting a parameter corresponding to the target configuration item as a target parameter; the main system, the secondary system, and the target to be verified correspond to at least one of the target configuration items;

[0051] Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data;

[0052] Controlling the target to be verified to generate test report information according to the interaction process between the primary system and the secondary system; the test report information includes at least an interruption type and an interruption generation time; the test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize an abnormal state of the interaction process; the abnormal transmission address and the abnormal transmission ID are used to determine an abnormal interaction transaction;

[0053] If the test report information is different from the expected report information, first verification information is generated; the first verification information is used to indicate that the target to be verified has passed the verification process corresponding to the test requirement;

[0054] If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has not passed the verification process corresponding to the test requirement.

[0055] It can be seen from the above technical content that the present application provides a verification system and method for a chip isolator, and the verification system includes a main system, a sub-system, a target to be verified and a controller. The controller can determine the target configuration items corresponding to the test requirements in the test configuration file according to the test requirements, and set the parameters corresponding to the target configuration items as target parameters. In this way, the relevant modules can be configured by configuring the target parameters. The controller can then send the test data to the main system, so that the main system and the sub-system interact based on the test data. During the interaction, the controller can obtain the test report information generated by the target to be verified, and compare the test report information with the expected report information, and generate adaptive verification information based on the comparison results. The verification system integrates the setting items related to the test requirements into the configuration file, which can still be effectively reused under different test requirements, thereby improving the verification efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0057] Figure 1 A diagram of the verification environment architecture provided for some embodiments of the present application;

[0058] Figure 2 A schematic diagram of the communication channels between the primary and secondary systems provided in some embodiments of the present application;

[0059] Figure 3 A schematic diagram of verifying the delay monitoring function of a target to be verified provided in some embodiments of the present application;

[0060] Figure 4 A schematic diagram of the operation of the transparent transmission mode of the target to be verified provided in some embodiments of the present application;

[0061] Figure 5 A schematic diagram of verifying the data transmission protocol monitoring function of a first target to be verified provided in some embodiments of the present application;

[0062] Figure 6 A schematic diagram of verifying the data transmission protocol monitoring function of the second target to be verified provided in some embodiments of the present application;

[0063] Figure 7 A schematic diagram of verification of the data transmission protocol monitoring function of the third target to be verified provided in some embodiments of the present application. DETAILED DESCRIPTION

[0064] The following embodiments are described in detail, with examples illustrated in the accompanying drawings. When the following description refers to the drawings, identical numbers in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following embodiments are not intended to represent all possible implementations consistent with the present application. They are merely examples of systems and methods consistent with certain aspects of the present application, as detailed in the claims.

[0065] Some chips can operate based on dual systems, namely a main system and a secondary system. During the operation of the chip, the main system and the secondary system can exchange data information based on a bus protocol, such as the AXI (Advanced eXtensible Interface) bus.

[0066] In some embodiments, the primary system has a higher security level, meaning that the secondary system is relatively more likely to experience errors. During the dual-system interaction process, communication anomalies in either system can cause the interaction to malfunction, potentially even triggering communication anomalies in the other system, such as a communication hang. Therefore, during the chip design phase, a chip isolator can be pre-designed to monitor the communication status of the secondary system to prevent primary system operation abnormalities caused by a secondary system hang.

[0067] In addition, even if the probability of errors in the main system is lower, it is necessary to add a chip isolator for monitoring the communication status of the main system so that when the main system hangs, it can interact with the secondary system on behalf of the main system to prevent chip operation failures caused by the main system hanging.

[0068] The chip isolator includes multiple ports for communicating with the main and secondary systems. It can monitor the status of the communication channels between the main and secondary systems. If, for example, the secondary system's communication status is abnormal, it can promptly report this abnormality to the main system, suspending interaction between the main and secondary systems to prevent the main system from malfunctioning due to the abnormal secondary system's communication status. Alternatively, if the main system's communication status is abnormal, it can promptly report this abnormality to the secondary system, suspending interaction between the main and secondary systems to prevent chip malfunctions caused by the abnormal main system communication. Furthermore, the chip isolator can temporarily replace the faulty system to perform interaction, thereby maintaining normal chip operation.

[0069] It can be seen that the chip isolator can be used to maintain the normal operation of the chip. Therefore, before the chip is put into use, the function of the chip isolator needs to be verified. The functions to be verified of the chip isolator may include but are not limited to: whether it operates normally before and after entering the transparent transmission mode, whether the status monitoring function of each channel during the interaction between the main and sub-systems is normal, whether it operates normally before and after entering the flush mode, whether the monitoring function of the interactive data generated during the interaction between the main and sub-systems is normal, and whether the interrupt output function is normal. In addition, according to the needs of the chip in different scenarios, the functions to be verified need to be executed in combination, and then the combined functions to be verified also need to be verified. Therefore, it is necessary to provide scenarios with rich verification functions in order to improve verification efficiency.

[0070] In order to solve the above problems, the present application provides a verification system for a chip isolator. The verification system can build a verification environment based on the Universal Verification Methodology (UVM), and use the relevant components provided by the Universal Verification Methodology to simulate the various components in the chip operation scenario, such as using the Verification Intellectual Property Component (VIP) to simulate the main system and the sub-system.

[0071] like Figure 1 As shown, in some embodiments, a layer-by-layer verification environment can be provided, such as the top layer tb_top, the configuration layer test, and the environment layer env / amba_env. Among them, the verification intellectual property components for simulating the main system and the sub-system, that is, the main system and the sub-system, can be set in the environment layer amba_env. And the APB (Advanced PeripheralBus) protocol can also be added to the environment layer amba_env, so that the verification environment can interact with the target to be verified through the APB bus protocol, such as sending configuration information to the target to be verified, or reading the interrupt status and other information of the target to be verified. Among them, a custom interface misc_if can be deployed in the verification environment to receive information output by the target to be verified during the verification process, such as interrupt information and pending transaction information, through the custom interface. The target to be verified can be a chip isolator to be verified for monitoring the sub-system or a chip isolator to be verified for monitoring the main system.

[0072] It is understood that the verification environment may also include a sequencer (Seq). In some embodiments, the sequencer may be used as a controller to control and adjust the verification process based on the sequencer. That is, the controller is configured to:

[0073] S100: According to the test requirement, a target configuration item corresponding to the test requirement is determined in the test configuration file, and a parameter corresponding to the target configuration item is set as a target parameter.

[0074] In some embodiments, target configuration items can be used to configure registers, clocks, ports, and other parameters of the primary system, secondary system, and target to be verified. That is, the primary system, secondary system, and target to be verified all have corresponding target configuration items. By configuring target configuration items to different target parameters, different testing requirements can be met.

[0075] S200: Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data.

[0076] In some embodiments, the controller can send pre-prepared test data to the main system. After receiving the test data, the main system can send the test data to the sub-system, thereby simulating the interaction process between the main system and the sub-system in the chip.

[0077] The test data can be various data generated during the interaction between the primary and secondary systems. Taking the data read interaction between the primary and secondary systems as an example, the test data can include read handshake signals, read address signals, read data signals, and important identifiers during the read data interaction, such as rlast (used to identify the last sub-data in the split transmission of read data).

[0078] It is understood that when the primary system sends test data to the secondary system, the primary and secondary systems can perform a complete interactive process, and the chip isolator used to monitor the secondary system can monitor the entire interactive process. In this way, the target to be verified, that is, the chip isolator used to monitor the secondary system, can generate test report information that represents the monitoring results, and then determine whether the target to be verified function is normal based on the test report information.

[0079] S300: Acquire test report information and expected report information generated based on the interaction between the primary system and the secondary system.

[0080] In some embodiments, the verification environment also includes a pre-built ideal model. When the controller inputs test data into the main system, it can also input the test data into the ideal model, and the ideal model outputs the corresponding expected report information based on the test data. In this way, the controller can compare the test report information output by the target to be verified with the expected report information output by the ideal model, and then determine whether the target to be verified has passed the verification. The test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize the abnormal state of the interaction process. The abnormal transmission address and abnormal transmission ID are used to determine abnormal interaction transactions.

[0081] In this way, according to the interrupt type, it can be determined whether the problem monitored by the target to be verified is the problem corresponding to the test requirement, and through the abnormal transmission address and abnormal transmission ID, it can be further determined whether the function of the target to be verified is normal based on the correctness of the problem.

[0082] S401: If the test report information is different from the expected report information, generate first verification information.

[0083] S402: If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has failed the verification process corresponding to the test requirement.

[0084] In some embodiments, the controller may obtain and compare test report information generated by the target to be verified with expected report information generated by the ideal model. If there are any differences between the test report information and the expected report information, the controller may generate first verification information indicating that the target to be verified has passed the verification process corresponding to the test requirement.

[0085] In this way, the tester can confirm that the target to be verified has failed verification through the first verification information, and determine the reason why the target to be verified has failed verification based on information such as the interruption type, abnormal transmission address, and abnormal transmission ID in the first verification information.

[0086] In other embodiments, the controller may generate second verification information for indicating that the target to be verified has passed the verification process corresponding to the test requirement when the test report information is completely identical to the expected report information.

[0087] In this way, the tester can continue to test other functions of the target to be verified.

[0088] like Figure 2 As shown, when the primary and secondary systems communicate over the AXI bus, they primarily interact via the read address channel, read data channel, write data channel, write address channel, and write response channel. For a verification target used to monitor a secondary system, the secondary system can be monitored for normal responses after receiving data from the primary system, as well as for the normality of the data fed back by the secondary system to the primary system. Therefore, during the verification process, the verification function can be pre-classified into different types, and verification can be performed based on these types.

[0089] In some embodiments, the target configuration item includes a delay configuration option. The delay configuration option is used to control the response time of the secondary system to data sent by the primary system. Based on the test requirements, the controller can configure the delay configuration option to the target value after receiving the configuration instruction input by the tester. In this way, after the controller executes the delay configuration option to set the target parameter, it is also configured to:

[0090] Sending first test data to the primary system, so that the primary system interacts with the secondary system based on the first test data and the communication channel corresponding to the first test data;

[0091] Acquire first test report information generated by the target to be verified; the first test report information is information generated by the target to be verified when the delay of the secondary system in responding to the first test data sent by the primary system is greater than a delay threshold;

[0092] If the first test report information is different from the first expected report information, generating first verification information;

[0093] If the first test report information is identical to the first expected report information, second verification information is generated.

[0094] like Figure 3 As shown in the figure, the process of interaction between the main system and the secondary system, taking the read data transaction as an example, the main system can send arvalid (indicating that the address information and control information in the read address channel are valid) to the secondary system through the read address channel. After receiving the address valid signal, the secondary system can reply arready (indicating that the secondary system is ready to receive the read address sent by the main system). During this process, the target to be verified can monitor the response of the secondary system to the main system. That is, in some embodiments of the present application, the function of the target to be verified at this stage can be verified.

[0095] During the verification phase of a chip isolator used to monitor a secondary system, if the response delay between the secondary system and the primary system exceeds a preset threshold, the target to be verified will generate a test report. The preset threshold can be configured by setting the target configuration option to a specific parameter, so that the target to be verified has a preset threshold. This way, if the target to be verified detects that the response time of the secondary system exceeds the preset threshold, a test report will be generated.

[0096] Furthermore, the test report information generated by the target to be verified can be compared with the expected report information. The comparison content may include the interrupt type generated by the target to be verified, which indicates that the response delay of the secondary system exceeds the threshold, as well as the corresponding abnormal transmission address and abnormal ID when the delay occurs. This can determine the target to be verified's monitoring capability of the secondary system.

[0097] It's important to note that the test data used to verify the target can include multiple read transactions. This increases the generalizability of the test and prevents rare events from interfering with the verification results. Furthermore, the test report includes the exception transfer address and exception ID. This ensures that the target can detect pre-deployed exception transfer transactions even when testing multiple read transactions.

[0098] It is understood that the module to be verified can monitor the read data channel, write address channel, write data channel, and write response channel between the primary and secondary systems using the methods described in the above embodiments. Therefore, the verification process can also adopt the verification principles described in the above embodiments. Simply replace the test data corresponding to the verification requirements and pre-configure the target configuration options based on the actual verification requirements, and therefore, no further details will be given.

[0099] Furthermore, if the module to be verified is a chip isolator used to monitor the primary system, a test report will also be generated if the response delay between the primary system and the secondary system exceeds a preset threshold. This test report information can then be compared with the expected report information to determine whether the module to be verified is operating normally. The verification process is similar to that for chip isolators used to monitor secondary systems and will not be further described here.

[0100] Furthermore, if the target detects a communication anomaly with the secondary system, it can enter flush mode. This means the target takes over communication with the primary system, including sending a notification to the primary system indicating a communication anomaly and completing the data transfer transaction caused by the anomaly on behalf of the secondary system. Furthermore, the target can generate relevant information in the test report for easier organization by testers.

[0101] In some embodiments, data transmission between the primary and secondary systems requires transparent transmission. The target to be verified must be configured to operate in a transparent transmission-supporting mode. Specifically, the target can enable transparent transmission between the primary and secondary systems by switching its internal circuits on and off. In this transparent transmission mode, the target only provides a data transmission path between the primary and secondary systems. Therefore, during the verification process, it is necessary to verify whether the target supports transparent transmission.

[0102] like Figure 4As shown, the target configuration items may also include transparent transmission configuration options. After the controller configures the transparent transmission configuration options as target parameters, it can enable the primary system and the secondary system to exchange data in the form of transparent transmission, and enable the target to be verified to operate in a mode that supports transparent transmission. The transparent transmission configuration options include, but are not limited to, configuration items for configuring the internal circuit state of the target to be verified, and for configuring registers related to transparent transmission in the primary and secondary systems.

[0103] When the interaction mode between the primary system and the secondary system is transparent transmission, the controller is further configured as follows:

[0104] When the interaction mode between the primary system and the secondary system is transparent transmission, the controller is further configured to:

[0105] Sending a target mode start signal to the target to be verified, so that the target to be verified operates in the target mode;

[0106] sending second test data to the primary system, so that the primary system sends the second test data to the secondary system;

[0107] After the secondary system receives the second test data, sending a target mode exit signal to the target to be verified, so that the target to be verified exits the target mode;

[0108] sending the second test data to the primary system, so that the primary system continues to send the second test data to the secondary system;

[0109] If the second test report information generated by the target to be verified is acquired, or the secondary system does not receive the second test data, the first verification information is generated.

[0110] In some embodiments, the target mode is the flush mode of the target to be verified. When operating in flush mode, the target to be verified will interact with the primary system on behalf of the secondary system. However, in transparent transmission mode, the target to be verified will not participate in the interaction between the primary and secondary systems. Based on this, it is possible to verify whether there are any anomalies when the target to be verified operates in flush mode or transparent transmission mode, and whether there is any conflict in the operating modes.

[0111] Furthermore, when the target to be verified is a chip isolator used to verify the main system, the same verification method can still be used. For example, it can be determined whether the main system can normally receive data before the main system chip isolator enters target mode. If data can be received normally and the main system chip isolator does not generate test report information indicating that the main system is abnormal, it means that the main system chip isolator can support transparent transmission mode before entering target mode.

[0112] For another example, determine whether the main system chip isolator can receive data normally after entering the target mode. If the main system cannot receive the data sent back by the sub-system after the main system chip isolator enters the target mode, or the main system chip isolator generates a test report information used to characterize the transmission abnormality, it means that the target mode of the main system chip isolator conflicts with the transparent transmission mode.

[0113] It is understood that the second test data may also be multiple data items, including any one or a combination of read and write transactions. Furthermore, the second test data or other related data used to test the target function to be verified may be data pre-set for the function to be verified, and does not necessarily have to be data transmitted under normal interaction between the primary and secondary systems.

[0114] In some embodiments, the controller may trigger the flush mode of the target to be verified through software configuration. After triggering the flush mode of the target to be verified, the controller may continue to send second test data to the main system to trigger interaction between the main system and the secondary system.

[0115] When the controller detects that the secondary system has not received the second test data, it may be considered that the flush mode of the target to be verified conflicts with the transparent transmission mode, and thus the first verification information may be generated.

[0116] When monitoring that the secondary system receives the second test data, the controller may continue to verify whether the exit of the flush mode of the target to be verified has any impact on the transparent transmission.

[0117] That is, the controller can continue to send a target mode exit signal to the target to be verified, causing it to exit flush mode. Furthermore, the controller can continue to instruct the primary system to send the second test data to the secondary system to test whether the secondary system can normally receive the second test data transmitted transparently after the target exits flush mode. Furthermore, during this verification process, it can be determined whether the target's entry / exit of flush mode affects transparent transmission.

[0118] It is understood that the controller can determine whether the data transmission is normal based on the second test report information, and then generate first verification information to indicate that the target to be verified has passed verification if the data transmission is normal. In the event of data transmission abnormality, the controller can generate second verification information to indicate that the target to be verified has failed verification. In the event of data transmission abnormality, the second test report can include the interrupt type corresponding to the data transmission abnormality, as well as the transmission abnormality address and abnormality ID. The second verification information can also include the same content to enable testers to troubleshoot the abnormality.

[0119] In addition, in the verification scenario where the target to be verified is the main system chip isolator, the same verification idea can also be used for verification, except that in the final stage of verification, the verification information generated by the main system chip isolator and the expected information are judged to determine whether there is a conflict between the flush mode and the transparent transmission mode of the main system chip isolator.

[0120] In other embodiments, the flush mode of the target to be verified can be configured by hardware configuration. That is, the controller can modify the value of the relevant register in the target to be verified by configuring the target mode configuration option to cause the target to be verified to enter or exit the flush mode. After the controller executes the transparent transmission configuration option and the target mode configuration option as the target parameter, it is also configured to:

[0121] Sending third test data to the primary system so that the primary system sends the third test data to the secondary system in a transparent transmission manner, and obtaining third test report information indicating whether the secondary system has received the third test data;

[0122] Sending third test data to the primary system, so that the primary system sends the third test data to the secondary system in a transparent transmission manner;

[0123] After the secondary system receives the third test data, updating the target parameter of the target mode configuration option to make the target to be verified exit the target mode;

[0124] sending the third test data to the primary system, so that the primary system continues to send the third test data to the secondary system;

[0125] If the third test report information generated by the target to be verified is acquired, or the secondary system does not receive the third test data, the first verification information is generated.

[0126] It is understood that the target to be verified will also generate corresponding report information when entering or exiting flush mode, so that the controller can determine whether the target to be verified has entered or exited flush mode according to the target mode start signal or target parameters. In other words, when verifying whether the target to be verified supports transparent transmission and conflicts with flush mode, it can also verify whether the target to be verified can normally enter or exit flush mode.

[0127] Furthermore, in the scenario where the controller causes the target to be verified to enter the flush mode through hardware configuration, the controller can still determine whether data transmission and the flush mode of the target to be verified are normal by checking whether the secondary system has received the third test data. If data transmission is normal, the controller generates first verification information indicating that the target to be verified has failed the current verification, or if data transmission is abnormal, the controller generates second verification information indicating that the target to be verified has passed the current verification.

[0128] In addition, when the target to be verified is the main system chip isolator, the above-mentioned verification idea can also be adopted. The main system chip isolator can be put into flush mode through hardware configuration, and the data transmission and reception status of the main and sub-systems can be used to determine whether the main system chip isolator can enter flush mode based on the hardware configuration instruction. When the main system chip isolator cannot accurately respond to the hardware configuration instruction, the first verification information for characterizing the abnormality of the main system chip isolator can be generated.

[0129] In some embodiments, the target to be verified can limit the burst transmission length during data exchange between the primary and secondary systems to prevent overloading of the transmission channel. Therefore, this functionality of the target to be verified can be verified in conjunction with transparent transmission. Specifically, the controller can pre-configure the target to be verified to enter transparent transmission mode. After configuring the target to be verified to enter transparent transmission mode, the controller is further configured to:

[0130] The main system is controlled to send fourth test data to the secondary system in a burst transmission manner, and a burst transmission threshold supported by the target to be verified is obtained.

[0131] When fourth test report information is obtained, which indicates that the number of burst transmissions of fourth test data transmitted by the main system is less than the burst transmission threshold, first verification information is generated.

[0132] It is understandable that the burst transfer threshold can also be pre-configured by the controller into the target to be verified by configuring the corresponding configuration options. In this way, the target to be verified can monitor the data transmission process between the main system and the secondary system based on the burst transfer threshold. For example, when the main system sends the burst transfer number arlen to the secondary system, this information can be obtained and compared with the burst transfer threshold in a timely manner. When the burst transfer number exceeds the burst transfer threshold, the system enters the flush mode and directly informs the main system of this situation (pulling down arready) to prevent the secondary system from hanging due to excessive burst transfers.

[0133] The burst transmission threshold may refer to the maximum number of burst transmissions that the secondary system can receive. Therefore, when the number of burst transmissions in the transmission channel is greater than the burst transmission threshold, the secondary system will generate an exception in a mode where there is no target to be verified to take over.

[0134] Therefore, when the controller pre-configures the target to be verified to support the transparent transmission mode, the target to be verified should not generate a test report related to the burst transmission anomaly. That is, when the controller obtains the fourth test report information used to indicate that the number of burst transmissions is less than the burst transmission threshold during the interaction between the primary system and the secondary system, it can indicate that the monitoring function of the target to be verified is still executed in the transparent transmission mode, and further indicates that the transparent transmission mode of the target to be verified conflicts with the flush mode, or that the target to be verified has not entered the transparent transmission mode according to the pre-configured target parameters. Therefore, the controller can generate the first verification information used to indicate that the target to be verified has failed verification.

[0135] It is understandable that when the controller detects that the secondary system is hung because the number of burst transmissions is greater than the burst transmission threshold, it can indicate to a certain extent that there is no conflict between the transparent transmission mode and the flush mode of the target to be verified.

[0136] In other embodiments, the controller may further test the monitoring capability of the target to be verified on the number of burst transmissions by causing the target to be verified to exit the transparent transmission mode. Figure 5 As shown, the controller is also configured to:

[0137] Update the target parameter of the transparent transmission configuration option to enable the target to be verified to exit transparent transmission.

[0138] The main system simulation module is controlled to send fifth test data to the auxiliary system simulation module in a burst transmission manner.

[0139] When the number of burst transmissions supported by the main system simulation module is greater than the burst transmission threshold and the fifth test report information generated by the target to be verified is not obtained, the first verification information is generated.

[0140] In some embodiments, the controller can configure the target parameters of the transparent transmission configuration option to disable transparent transmission for the target to be verified. This allows the target to proactively generate a fifth test report and interact with the primary system when detecting a burst transmission count exceeding a burst transmission threshold, thereby preventing communication anomalies in the secondary system caused by burst transmission counts exceeding the burst transmission threshold. Upon receiving the fifth test report, the controller can compare it with the expected report. If the fifth test report matches the expected report, the controller generates second verification information indicating that the target to be verified has passed verification.

[0141] In other embodiments, if the controller does not obtain the fifth test report information, it indicates that the target to be verified has not detected a burst transmission number greater than the burst transmission threshold after exiting the transparent transmission mode, thereby indicating that the function of the target to be verified is operating abnormally. The controller can generate first verification information to indicate that the function of the target to be verified is operating abnormally. The first verification information can also include information such as the abnormal transmission address and abnormal ID used to determine which specific data exchange transaction is abnormal, to facilitate troubleshooting by testers.

[0142] Furthermore, when the target to be verified is a main system chip isolator, it is possible to determine whether the time point at which the main system chip isolator generated the fifth test report information is correct. If, in transparent transmission mode, the fifth test report information is still generated to indicate that the current number of burst transmissions is greater than the burst transmission threshold, first verification information can be generated to indicate that the main system chip isolator has failed verification. If, in non-transparent transmission mode, the fifth test report information is not received, first verification information can be generated to indicate that the main system chip isolator has failed verification.

[0143] It is understandable that the data transmitted during the communication between the main system and the sub-system can be transmitted in batches. For example, the sub-system splits a read data into multiple sub-data for feedback. The number of these sub-data can be defined by the main system and the sub-system during the handshake phase before the transmission. In this way, when the sub-system feedbacks data, the target to be verified can monitor the number of sub-system feedback data to determine whether the sub-system transmits data in accordance with the protocol. Therefore, this function of the target to be verified also needs to be verified. Figure 6 As shown, the controller is also configured to:

[0144] The main system simulation module is controlled to send sixth test data to the auxiliary system simulation module.

[0145] When the amount of the sixth test data is different from the amount of the response data fed back by the sub-system simulation module, and the sixth test report information generated by the target to be verified is not obtained, the first verification information is generated.

[0146] In some embodiments, the controller can send pre-configured sixth test data to the primary system simulation module. The sixth test data can include a read data request, a RID assigned to the read data request, and the burst transfer length of the read data request. In this way, the secondary system can feed back read data to the primary system based on information such as the read data request, RID, and burst transfer length.

[0147] It should be noted that during the target parameter configuration phase, the controller can pre-configure the secondary system to report an erroneous number of read data points as feedback to verify the proper functioning of the target's monitoring function. When the secondary system reports data back to the primary system, the target can record the number of read data points reported and compare it with a pre-agreed number. If the numbers do not match, a sixth test report is generated, indicating an abnormal interaction between the primary and secondary systems—indicated by an error in the amount of data returned by the secondary system.

[0148] In the verification environment, the main system can also detect whether the number of received read data is consistent with the expected number, and notify the target to be verified if it is inconsistent. The target to be verified can then determine that a communication abnormality has occurred in the sub-system based on the notification message of the main system simulation module and generate the sixth test report information.

[0149] Furthermore, if the target detects data anomalies in the secondary system's feedback, it will communicate with the primary system on behalf of the secondary system, instructing the primary system to cease sending further data requests. The sixth test report generated by the target may also include information indicating that it has entered takeover mode, thereby verifying that the target's flush function is functioning properly.

[0150] It is understood that based on the write operation scenario between the primary and secondary systems, it is possible to verify whether the chip isolator used to monitor the primary system's data volume is functioning properly. This verification process can be performed by determining whether the amount of write data received by the secondary system is consistent with expectations, and combining this with whether the primary system chip isolator generates the sixth test report information to determine whether the primary system chip isolator is functioning properly. The specific process can be referenced in the verification process for the secondary system chip isolator, and will not be detailed here.

[0151] In addition, the target to be verified can also monitor whether the read data corresponding to different IDs are all returned, and enter the flush mode and generate the sixth test report information when the number of read data of different IDs fed back by the secondary system to the primary system is inconsistent.

[0152] Furthermore, based on the test report information indicating that the target under verification has entered takeover mode, the flush function of the target under verification can also be verified to be functioning properly. Specifically, the target under verification can be configured to exit the flush function through software or hardware configuration, and the controller can then detect whether normal communication between the primary and secondary systems has been restored. If normal communication between the primary and secondary systems is restored, the flush function of the target under verification is functioning properly.

[0153] It is understandable that the data transmitted between the main system and the sub-system during the communication process has some specific identifiers, so that the main system or the sub-system can execute transactions corresponding to the identifiers by identifying the identifiers. For example, when the main system sends a read data request to the sub-system, it can assign arid to the read request to identify the read data; and when the sub-system feeds back the read data, it will also assign rid to the read data to identify the read data. In this way, when the main system receives the read data, it can confirm whether the read data is received based on arid and rid. When the target to be verified detects this situation, it can also enter flush mode and generate corresponding test report information. Therefore, it is also necessary to verify this monitoring function of the target to be verified. Figure 7 As shown, after the controller controls the main system simulation module to send the sixth test data to the auxiliary system simulation module, it is further configured to:

[0154] A data identifier of response data fed back by the secondary system simulation module to the primary system simulation module based on the sixth test data is obtained.

[0155] When the data identifier of the sixth test data is different from the data identifier of the response data and the seventh test report information generated by the target to be verified is not obtained, the first verification information is generated.

[0156] In some embodiments, when the primary system receives read data from the secondary system, it can compare the arid in the read data request with the rid in the read data. Upon detecting a mismatch between the arid and rid, the primary system can notify the target to be verified, which can then communicate with the primary system on behalf of the secondary system. The primary system is notified of the secondary system communication anomaly and a seventh test report is generated, indicating the secondary system communication anomaly. The seventh test report can include interrupt information indicating the secondary system communication anomaly, as well as the anomaly address and ID to facilitate troubleshooting.

[0157] It is understandable that when the controller obtains the seventh test report information, it can also compare it with the expected test report information. When the comparison is consistent, it can generate second verification information for indicating that the target to be verified has passed the verification.

[0158] When the comparison is inconsistent, first verification information may be generated to indicate that the target to be verified has failed the verification.

[0159] In some embodiments, during a write interaction between the primary system and the secondary system, the primary system can add a wlast identifier to the last write data entry to indicate that the current data is the last data entry in the write transaction. Thus, upon recognizing wlast, the secondary system can return a write response identifier, bresp, to the primary system to notify it that the write data has been received. The target to be verified can monitor this process, so this functionality also needs to be verified. Specifically, the controller is configured to:

[0160] Before the main system simulation module sends the sixth test data including the end data identifier to the sub-system simulation module, when it is detected that the sub-system simulation module feeds back the end response data including the end response data identifier to the main system simulation module, and the eighth test report information generated by the target to be verified is not obtained, the first verification information is generated.

[0161] In some embodiments, the secondary system feeds back a write response identifier to the primary system before the primary system sends test data containing the wlast identifier. Upon receiving the write response identifier, the primary system notifies the target to be verified, and the target to be verified generates an eighth test report. Alternatively, upon detecting this event, the target to be verified generates the eighth test report and replaces the secondary system in communicating with the primary system, thereby suspending communication between the primary and secondary systems.

[0162] Among them, the eighth test report information may include interrupt information for indicating that the sub-system returns a write response identifier in advance, as well as information such as the exception address and exception ID of the current write transaction. In addition, when the controller obtains the eighth test report information, it can compare the eighth test report information with the expected report information. When the comparison is consistent, second verification information is generated to indicate that the target to be verified has passed the verification. When the comparison is inconsistent, first verification information is generated to indicate that the target to be verified has not passed the verification. The tester can troubleshoot problems with the target to be verified based on the inconsistencies in the first verification information.

[0163] In some embodiments, a chip isolator verification method is also provided, which can be applied to a chip isolator verification system. The verification method includes:

[0164] According to the test requirements, determining a target configuration item corresponding to the test requirements in the test configuration file, and setting a parameter corresponding to the target configuration item as a target parameter; the main system, the secondary system, and the target to be verified correspond to at least one of the target configuration items;

[0165] Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data;

[0166] Controlling the target to be verified to generate test report information according to the interaction process between the primary system and the secondary system; the test report information includes at least an interruption type and an interruption generation time; the test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize an abnormal state of the interaction process; the abnormal transmission address and the abnormal transmission ID are used to determine an abnormal interaction transaction;

[0167] If the test report information is different from the expected report information, first verification information is generated; the first verification information is used to indicate that the target to be verified has passed the verification process corresponding to the test requirement;

[0168] If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has not passed the verification process corresponding to the test requirement.

[0169] In some embodiments, the verification environment and its components and parameters can be configured based on the type of target to be verified. For example, when verifying a main system chip isolator, the amount of data written from the main system to the secondary system can be verified based on the write scenario between the main system and the secondary system, and whether the main system chip isolator generates corresponding test report information. For another example, when verifying a secondary system chip isolator, the amount of data fed back from the secondary system to the main system can be verified based on the read scenario between the main system and the secondary system, and whether the secondary system chip isolator generates corresponding test report information.

[0170] The verification method for the chip isolator provided in the embodiment of the present application is based on a model with high coverage of the functions to be verified. During each verification process, it is only necessary to configure the relevant data and relevant registers used to simulate the interaction process according to the verification requirements. It has good mobility and reusability, which is conducive to improving the coverage and efficiency of verification.

[0171] It can be seen from the above technical content that the present application provides a verification system and method for a chip isolator, and the verification system includes a main system, a sub-system, a target to be verified and a controller. The controller can determine the target configuration items corresponding to the test requirements in the test configuration file according to the test requirements, and set the parameters corresponding to the target configuration items as target parameters. In this way, the relevant modules can be configured by configuring the target parameters. The controller can then send the test data to the main system, so that the main system and the sub-system interact based on the test data. During the interaction, the controller can obtain the test report information generated by the target to be verified, and compare the test report information with the expected report information, and generate adaptive verification information based on the comparison results. The verification system integrates the setting items related to the test requirements into the configuration file, which can still be effectively reused under different test requirements, thereby improving the verification efficiency.

[0172] Similar parts between the embodiments provided in this application can be referenced to each other. The specific implementation methods provided above are only a few examples under the overall concept of this application and do not constitute a limitation on the scope of protection of this application. For those skilled in the art, any other implementation methods expanded based on the scheme of this application without expending creative work shall fall within the scope of protection of this application.

Claims

1. A chip isolator verification system, characterized in that: include: A main system, a sub-system, a target to be verified, and a controller; the main system and the sub-system are connected based on a communication channel established by an AXI bus; The target to be verified is used to monitor the communication status of the secondary system and to interact with the primary system on behalf of the secondary system when the communication status of the secondary system is abnormal; The controller is configured to: According to the test requirements, determining a target configuration item corresponding to the test requirements in the test configuration file, and setting a parameter corresponding to the target configuration item as a target parameter; the main system, the secondary system, and the target to be verified correspond to at least one of the target configuration items; Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data; Acquiring test report information and expected report information generated based on the interaction performed by the primary system and the secondary system; The test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize the abnormal state of the interaction process; The abnormal transmission address and the abnormal transmission ID are used to determine the abnormal interactive transaction; If the test report information is different from the expected report information, generating first verification information; the first verification information is used to indicate that the target to be verified has passed the verification process corresponding to the test requirement; If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has not passed the verification process corresponding to the test requirement.

2. The system according to claim 1, wherein: The target configuration item includes a delay configuration option; the delay configuration option is used to control the response time of the secondary system to the data sent by the primary system; After the controller sets the delay configuration option to the target parameter, the controller is further configured to: Sending first test data to the primary system, so that the primary system interacts with the secondary system based on the first test data and the communication channel corresponding to the first test data; Obtaining first test report information generated by the target to be verified; The first test report information is information generated by the target to be verified when the delay of the secondary system in responding to the first test data sent by the primary system is greater than a delay threshold; If the first test report information is different from the first expected report information, generating first verification information; If the first test report information is identical to the first expected report information, second verification information is generated.

3. The system according to claim 1, wherein: The target configuration item further includes a transparent transmission configuration option; the transparent transmission configuration option is used to control the primary system to send the second test data to the secondary system in a transparent transmission manner; When the interaction mode between the primary system and the secondary system is transparent transmission, the controller is further configured to: Sending a target mode start signal to the target to be verified, so that the target to be verified operates in the target mode; sending second test data to the primary system, so that the primary system sends the second test data to the secondary system; After the secondary system receives the second test data, sending a target mode exit signal to the target to be verified, so that the target to be verified exits the target mode; sending the second test data to the primary system, so that the primary system continues to send the second test data to the secondary system; If the second test report information generated by the target to be verified is acquired, or the secondary system does not receive the second test data, the first verification information is generated.

4. The system according to claim 3, characterized in that The target configuration item also includes a target mode configuration option; the target mode configuration option is used to control the target to be verified to run in target mode; After the controller sets the transparent transmission configuration option and the target mode configuration option as target parameters, the controller is further configured to: Sending third test data to the primary system, so that the primary system sends the third test data to the secondary system in a transparent transmission manner; After the secondary system receives the third test data, updating the target parameter of the target mode configuration option to make the target to be verified exit the target mode; sending the third test data to the primary system, so that the primary system continues to send the third test data to the secondary system; If the third test report information generated by the target to be verified is acquired, or the secondary system does not receive the third test data, the first verification information is generated.

5. The system according to claim 3, wherein: After the controller sets the transparent transmission configuration option and the target mode configuration option as target parameters, the controller is further configured to: Controlling the primary system to send fourth test data to the secondary system in a burst transmission manner, and obtaining a burst transmission threshold supported by the target to be verified; When fourth test report information is obtained, which indicates that the number of burst transmissions of the fourth test data transmitted by the main system is less than the burst transmission threshold, the first verification information is generated.

6. The system according to claim 5, characterized in that The controller is further configured to: Updating the target parameter of the transparent transmission configuration option so that the target to be verified exits the transparent transmission; controlling the primary system to send fifth test data to the secondary system in a burst transmission manner; When the number of burst transmissions supported by the main system is greater than the burst transmission threshold and the fifth test report information generated by the target to be verified is not obtained, generating the first verification information; The fifth test report information is used to indicate that the transmission state of the burst transmission is abnormal.

7. The system according to claim 1, wherein: The target configuration item further includes a data volume configuration option; the data volume configuration option is used to control the amount of response data fed back by the secondary system when receiving the test data sent by the primary system; After configuring the data volume configuration option as the target parameter, the controller is further configured to: controlling the primary system to send sixth test data to the secondary system; When the number of the sixth test data is different from the number of the response data fed back by the secondary system, and the sixth test report information generated by the target to be verified is not obtained, generating first verification information; The sixth test report information is used to indicate that the interaction between the primary system and the secondary system is abnormal.

8. The system according to claim 7, characterized in that After the controller controls the primary system to send the sixth test data to the secondary system, the controller is further configured to: obtaining a data identifier of response data fed back by the secondary system to the primary system based on the sixth test data; When the data identifier of the sixth test data is different from the data identifier of the response data, and the seventh test report information generated by the target to be verified is not obtained, generating first verification information; The seventh test report information is used to indicate that the interaction between the primary system and the secondary system is abnormal.

9. The system according to claim 8, characterized in that After the controller controls the primary system to send the sixth test data to the secondary system, the controller is further configured to: before the primary system sends the sixth test data including the end data identifier to the secondary system, if it is detected that the secondary system feeds back the end response data including the end response data identifier to the primary system and the eighth test report information generated by the target to be verified is not obtained, then generating first verification information; The eighth test report information is used to indicate that the interaction between the primary system and the secondary system is abnormal.

10. A chip isolator verification method, characterized in that: A verification system for a chip isolator according to any one of claims 1 to 9, the verification system comprising a main system, a sub-system, and a target to be verified; the method comprising: According to the test requirements, determining a target configuration item corresponding to the test requirements in the test configuration file, and setting a parameter corresponding to the target configuration item as a target parameter; the main system, the secondary system, and the target to be verified correspond to at least one of the target configuration items; Sending test data to the primary system, so that the primary system interacts with the secondary system based on the test data and the communication channel corresponding to the test data; Controlling the target to be verified to generate test report information according to the interaction process between the primary system and the secondary system; the test report information includes at least an interruption type and an interruption generation time; the test report information includes at least an interruption type, an abnormal transmission address, and an abnormal transmission ID; the interruption type is used to characterize an abnormal state of the interaction process; the abnormal transmission address and the abnormal transmission ID are used to determine an abnormal interaction transaction; If the test report information is different from the expected report information, first verification information is generated; the first verification information is used to indicate that the target to be verified has passed the verification process corresponding to the test requirement; If the test report information is the same as the expected report information, second verification information is generated; the second verification information is used to indicate that the target to be verified has not passed the verification process corresponding to the test requirement.

Images