A PLC, PLC control system and communication method based on MLVDS communication

Abstract

This invention relates to the field of PLCs, and more particularly to a PLC, PLC control system, and communication method based on MLVDS communication. The PLC internal modules include a PLC controller and several control modules. The PLC controller includes a central processing unit (CPU), a first FPGA, and a first MLVDS transceiver. One end of the first FPGA is connected to the CPU via a high-speed bus, and the other end is connected to several first MLVDS transceivers. Each control module includes a local processor, a second FPGA, and a second MLVDS transceiver. One end of the second FPGA is connected to the local processor via SPI, and the other end is connected to several second MLVDS transceivers. Several MLVDS channels are connected in parallel between the PLC controller and the control modules. One end of each MLVDS channel is connected to a first MLVDS transceiver, and the other end is connected to a second MLVDS transceiver. Both the first and second MLVDS transceivers are used for mutual conversion between multi-point low-voltage differential signals and single-point TTL level signals. This invention uses multi-channel MLVDS parallel connection, which enables the localization of communication between PLC internal modules, reduces inter-module communication latency, and increases communication bandwidth.

Description

Technical Field

[0001] This invention relates to the field of PLC technology, and in particular to a PLC, PLC control system and communication method based on MLVDS communication. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] Traditionally, communication between modules within a PLC (Programmable Logic Controller) relies primarily on EtherCAT communication. However, this technology has the following problems:

[0004] (1) Inability to achieve localization: EtherCAT technology relies on foreign technical support, which restricts the independent development of domestic PLC technology.

[0005] (2) High communication delay: Traditional communication methods have a certain delay in data transmission between modules, which affects the system response speed.

[0006] (3) Insufficient bandwidth: In high data transmission scenarios, the existing communication bandwidth is insufficient to meet the requirements.

[0007] In view of the above-mentioned defects, the present invention has made improvements. Summary of the Invention

[0008] To overcome the shortcomings of the prior art, this invention provides a PLC, PLC control system and communication method based on MLVDS communication. By utilizing the high bandwidth characteristics of MLVDS and adopting a multi-channel MLVDS parallel connection method, it can realize the localization of communication between modules within the PLC, reduce the communication delay between modules and improve the communication bandwidth, and meet the requirements of high data volume transmission.

[0009] To achieve the above objectives, the present invention provides the following technical solution:

[0010] Firstly, a PLC based on MLVDS communication is provided, wherein the internal modules of the PLC include a PLC controller and several control modules;

[0011] The PLC controller includes a central processing unit, a first FPGA and a first MLVDS transceiver, wherein one end of the first FPGA is connected to the central processing unit via a high-speed bus, and the other end is connected to several of the first MLVDS transceivers.

[0012] The control module includes a local processor, a second FPGA, and a second MLVDS transceiver. One end of the second FPGA is connected to the local processor via SPI, and the other end is connected to several second MLVDS transceivers.

[0013] Several MLVDS channels are connected in parallel between the PLC controller and the control module. One end of each MLVDS channel is connected to the first MLVDS transceiver, and the other end is connected to the second MLVDS transceiver.

[0014] Both the first MLVDS transceiver and the second MLVDS transceiver are used for mutual conversion between multi-point low-voltage differential signals and single-point TTL level signals.

[0015] Furthermore,

[0016] The PLC controller and the control module are connected in parallel to several MLVDS channels, including MLVDS data transmission channels and MLVDS control channels for sending control commands.

[0017] The system includes two MLVDS control channels and the remaining MLVDS channels are MLVDS data transmission channels. The MLVDS data transmission channels are bidirectional, while the MLVDS control channels are unidirectional.

[0018] Furthermore,

[0019] The PLC controller is equipped with two first MLVDS transceivers for sending control commands, and each of the control modules is equipped with two second MLVDS transceivers for receiving control commands. The two first MLVDS transceivers of the PLC controller are respectively connected to the two second MLVDS transceivers of each control module, forming two MLVDS control channels from the PLC controller to the control module.

[0020] Furthermore,

[0021] One end of the first FPGA is connected to the high-speed bus via a high-speed parallel interface. The high-speed bus adopts a high-speed parallel data bus. The other end of the first FPGA is connected to several first MLVDS transceivers via a high-speed parallel interface. The first FPGA is used to realize the mutual conversion between data in the central processing unit's parallel communication interface and data in the multi-channel MLVDS parallel processing interface.

[0022] One end of the second FPGA is connected to the local processor via an SPI interface, and the other end of the second FPGA is connected to several second MLVDS transceivers via a high-speed parallel interface. The second FPGA is used to realize the mutual conversion between data on the serial interface of the local processor and data on the multi-channel MLVDS parallel processing interface.

[0023] Secondly, a PLC control system is also provided, which includes a host computer and a PLC based on MLVDS communication as described above, wherein the host computer and the PLC controller are connected in communication.

[0024] Thirdly, a communication method is also provided, applied to the PLC control system as described above, the method comprising:

[0025] After power-on initialization, the PLC controller discovers all locally existing control modules by traversing the devices and caches the traversal information configured for the control modules.

[0026] After establishing communication with the PLC controller, the host computer sends the initial configuration information of the control module to the PLC controller.

[0027] The PLC controller performs configuration verification by comparing the traversal information configured in the control module with the initial information configured in the control module.

[0028] If the configuration verification passes, the PLC controller waits for the next instruction.

[0029] After receiving the configuration command from the host computer, the PLC controller configures the control module according to the configuration command;

[0030] If the control module is configured successfully, the PLC controller will communicate with the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and perform data verification.

[0031] If the data verification passes, the data communication is successful; otherwise, the data communication will be restarted.

[0032] Furthermore, the method also includes:

[0033] If the configuration verification fails, the initial information for updating the control module configuration on the host computer will be returned.

[0034] If the configuration of the control module fails, the PLC controller will re-traverse the devices to confirm whether the control module to be configured is working properly.

[0035] If the control module to be configured is confirmed to be normal, return to the PLC controller to wait for the next instruction;

[0036] If the control module to be configured is confirmed to be abnormal, the initial information for updating the control module configuration will be returned to the host computer.

[0037] Furthermore,

[0038] After the control module is successfully configured, the PLC controller transmits data to the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and performs data verification.

[0039] If the data verification passes, the data transmission is successful, and the PLC controller sends an update data command to the control module.

[0040] After receiving an update data command from the PLC controller, the control module overwrites the original local data with the received new data;

[0041] If the data verification fails, the PLC controller will retransmit the data to the control module.

[0042] Furthermore,

[0043] Data communication between the PLC controller and the control module uses a custom communication protocol frame.

[0044] The frame structure of the custom communication protocol frame includes several bytes, where Byte0 and Byte1 are the frame header, Byte2 is the device address, Byte3 is the device type, Byte4 is the frame type, Byte5 and Byte6 are the frame length, Byte7 and Byte8 are the operation data address, Bytes N0~Nx are data packets, Byte9 and Byte10 are CRC checksums, Byte11 is the MLVDS channel number, and Byte12 and Byte13 are the frame tail.

[0045] Furthermore,

[0046] The data packet includes a device identification code used to uniquely identify the device.

[0047] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0048] 1. High bandwidth: The parallel connection of multiple MLVDS channels significantly increases communication bandwidth to meet the demand for high data volume;

[0049] 2. High reliability: Customized communication protocols and error correction mechanisms ensure the accuracy and integrity of data transmission;

[0050] 3. Localization: Breaking through the limitations of EtherCAT technology, achieving independent control over PLC internal communication;

[0051] 4. Low latency: Optimized communication mechanism significantly reduces inter-module latency and improves system response speed;

[0052] 5. High efficiency: The introduction of device identification codes avoids communication conflicts and improves point-to-point communication efficiency.

[0053] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures pointed out in the description, claims and drawings.

[0054] The invention will now be further described with reference to the accompanying drawings. Attached Figure Description

[0055] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0056] Figure 1 This is a schematic diagram of the architecture of a PLC based on MLVDS communication according to an embodiment of the present invention;

[0057] Figure 2 This is a schematic diagram of the structure of a PLC control system according to an embodiment of the present invention;

[0058] Figure 3 This is a flowchart illustrating a communication method according to an embodiment of the present invention;

[0059] Figure 4 This is a schematic diagram of the overall process of a communication method according to an embodiment of the present invention;

[0060] Figure 5 This is a schematic diagram of the frame structure of a custom communication protocol frame according to an embodiment of the present invention. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0062] like Figure 1As shown, the first embodiment of the present invention provides a PLC based on MLVDS communication. The internal modules of the PLC include a PLC controller and several control modules. The PLC controller includes a central processing unit, a first FPGA, and a first MLVDS transceiver. One end of the first FPGA is connected to the central processing unit via a high-speed bus, and the other end is connected to several of the first MLVDS transceivers. The control modules include a local processor, a second FPGA, and a second MLVDS transceiver. One end of the second FPGA is connected to the local processor via SPI, and the other end is connected to several of the second MLVDS transceivers.

[0063] Several MLVDS channels are connected in parallel between the PLC controller and the control module. One end of each MLVDS channel is connected to the first MLVDS transceiver, and the other end is connected to the second MLVDS transceiver. Both the first and second MLVDS transceivers are used for mutual conversion between multi-point low-voltage differential signals and single-point TTL level signals.

[0064] The above technical solution describes the internal structure of the PLC controller and control module, both of which use FPGA and MLVDS transceivers. It also describes the communication connection method between the PLC controller and other control modules, which adopts a multi-channel MLVDS parallel structure. The above solution makes full use of the high bandwidth characteristics of MLVDS and adopts a multi-channel MLVDS parallel method, which can realize the localization of communication between PLC internal modules, get rid of dependence on foreign technologies, reduce communication latency between modules, improve the real-time performance and response speed of PLC system, increase communication bandwidth, and meet the needs of high data volume transmission.

[0065] Among them, MLVDS (Multipoint Low-Voltage Differential Signaling) features high bandwidth and strong anti-interference capability. This embodiment of the invention constructs an efficient and stable communication infrastructure by adapting the MLVDS signal to the communication interface of the PLC's internal modules. This is achieved through an MLVDS transceiver, which can convert the multipoint low-voltage differential signal to an internal ordinary single-point TTL level signal, and vice versa. In this embodiment, the communication interface formed by the MLVDS transceiver is a multi-channel high-speed serial MLVDS interface. Using this communication interface can significantly shorten the communication response time and meet the application requirements of PLC controllers for high data volume and low latency. This embodiment of the invention uses MLVDS communication transmission, which can effectively resist interference in complex electromagnetic environments, ensuring the stability and accuracy of data transmission and providing technical support for high-speed communication. In this embodiment, the local processor configured in the control module refers to the module where the local processor resides loading configuration information according to the default state when the module is powered on, allowing the module to operate in a default state.

[0066] This embodiment significantly improves the communication bandwidth between the PLC controller and other control modules by connecting multiple MLVDS channels in parallel. Each channel transmits data independently, and the parallel operation of multiple channels is like multiple data highways running in parallel, effectively superimposing communication capabilities. This embodiment of the invention uses a multi-channel MLVDS parallel connection method to overcome the bandwidth limitation of a single channel, which can meet the high data volume and rapid transmission requirements in complex industrial scenarios.

[0067] Taking the control module sending data to the PLC controller as an example, the signal data on the MLVDS bus is converted into a single-point TTL level signal after passing through the MLVDS transceiver and input to the FPGA. The FPGA integrates the data from multiple MLVDS channels into internal high-speed serial data according to its own protocol and then transmits it to the central processing unit.

[0068] In practical implementation, the aforementioned control modules include, but are not limited to, digital input / output, analog input / output, RTD / thermocouple acquisition, frequency generation / measurement, and other modules.

[0069] It should be noted that, Figure 1 Although the technical solution of this invention is illustrated using a modular PLC as an example, the technical solution of this invention can also be applied to a fixed PLC.

[0070] As a preferred technical solution, the multiple MLVDS channels connected in parallel between the PLC controller and the control module include MLVDS data transmission channels and MLVDS control channels for sending control commands; wherein, two MLVDS control channels are provided, and the remaining MLVDS channels are MLVDS data transmission channels, the MLVDS data transmission channels are bidirectional channels, and the MLVDS control channels are unidirectional channels.

[0071] In this embodiment, two separate MLVDS control channels are set up so that the transmission of control commands is not affected when transmitting large amounts of data. If no separate MLVDS control channels are set up, control commands cannot be transmitted when transmitting data. The two MLVDS control channels in this embodiment are redundant and can better ensure the correctness of control command transmission. The MLVDS data transmission channel is a bidirectional channel, that is, data can be transmitted bidirectionally between the PLC controller and the control module. The MLVDS control channel is a unidirectional channel, that is, control commands are sent from the PLC controller to the control module.

[0072] Figure 1 The system includes two control modules. Four MLVDS data transmission channels and two MLVDS control channels are established between the PLC controller and these control modules. In this embodiment, data is transmitted as a group of four MLVDS data transmission channels, divided into odd and even slots. Since the FPGA uses parallel processing, dividing the data into odd and even slots allows data to be transmitted simultaneously in odd and even slots, improving transmission efficiency. In practice, the data is unpacked and evenly distributed across the four MLVDS data transmission channels, similar to dividing the packet length by 4, with the remainder indicating the channel number on which the packet is placed. The transmission performance in this embodiment is based on the CRC checksum in the data packet. The four MLVDS data transmission channels used here are only the actual number used in this embodiment; the number of MLVDS data transmission channels can be increased or decreased according to actual needs in specific implementations.

[0073] As a preferred technical solution, the PLC controller is equipped with two first MLVDS transceivers for sending control commands, and each of the control modules is equipped with two second MLVDS transceivers for receiving control commands. The two first MLVDS transceivers of the PLC controller are respectively connected to the two second MLVDS transceivers of each control module, forming two MLVDS control channels from the PLC controller to the control module.

[0074] In this embodiment, the PLC controller is equipped with two first MLVDS transceivers dedicated to sending control commands, and each control module is equipped with two second MLVDS transceivers dedicated to receiving control commands. The two second MLVDS transceivers of the control module are respectively connected to the two first MLVDS transceivers of the PLC controller, forming two MLVDS control channels from the PLC controller to the control module.

[0075] As a preferred technical solution, one end of the first FPGA is connected to the high-speed bus via a high-speed parallel interface. The high-speed bus adopts a high-speed parallel data bus. The other end of the first FPGA is connected to several first MLVDS transceivers via a high-speed parallel interface. The first FPGA is used to realize the mutual conversion between data in the central processing unit's parallel communication interface and data in the multi-channel MLVDS parallel processing interface. One end of the second FPGA is connected to the local processor via an SPI interface. The other end of the second FPGA is connected to several second MLVDS transceivers via a high-speed parallel interface. The second FPGA is used to realize the mutual conversion between data on the local processor's serial interface and data in the multi-channel MLVDS parallel processing interface.

[0076] In this embodiment, both the first FPGA and the second FPGA are parallel processing devices. The first FPGA is used to realize the mutual conversion between data in the parallel communication interface of the central processing unit and data in the multi-channel MLVDS parallel processing interface. The second FPGA is used to realize the mutual conversion between data on the serial interface of the local processor and data in the multi-channel MLVDS parallel processing interface.

[0077] In practice, the high-speed bus adopts a 16-bit data width and supports a high-speed parallel data bus with a maximum frequency of 100MHz.

[0078] like Figure 2 As shown, the second embodiment of the present invention also provides a PLC control system, which includes a host computer and a PLC based on MLVDS communication as described above, and the host computer and the PLC controller are connected in communication.

[0079] In this embodiment, the host computer and the PLC controller communicate via Ethernet, and the PLC controller communicates with each control module via multiple parallel MLVDS channels.

[0080] The PLC based on MLVDS communication in the above embodiments has been described in detail in the aforementioned PLC embodiments, and will not be elaborated upon here.

[0081] like Figure 3As shown, the third embodiment of the present invention also provides a communication method applied to the PLC control system described above, the method comprising:

[0082] After power-on initialization, the PLC controller discovers all locally existing control modules by traversing the devices and caches the traversal information configured for the control modules.

[0083] After establishing communication with the PLC controller, the host computer sends the initial configuration information of the control module to the PLC controller.

[0084] The PLC controller performs configuration verification by comparing the traversal information configured in the control module with the initial information configured in the control module.

[0085] If the configuration verification passes, the PLC controller waits for the next instruction.

[0086] After receiving the configuration command from the host computer, the PLC controller configures the control module according to the configuration command;

[0087] If the control module is configured successfully, the PLC controller will communicate with the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and perform data verification.

[0088] If the data verification passes, the data communication is successful; otherwise, the data communication will be restarted.

[0089] The above technical solution mainly includes establishing communication between the host computer and the PLC controller, and establishing communication between the PLC controller and the control module. Configuration verification is used to check whether the control module configuration in the host computer corresponds to the physical module (i.e., all the control modules that actually exist locally by traversing the device). Data verification is used to check whether the data transmitted in the data communication is accurate and complete. This method can better realize the internal communication of the PLC control system.

[0090] The following will combine Figure 4 To further explain the above method, among which, Figure 4 The middle part corresponds to the execution of the PLC controller. Figure 4 The left side corresponds to the execution of the host computer. Figure 4 The right side corresponds to the execution of the control module.

[0091] The communication methods specifically include:

[0092] After power-on initialization, the PLC controller discovers all locally existing control modules by traversing the devices and caches the traversal information configured for the control modules; this step corresponds to Figure 4The middle part consists of power-on, initialization, device traversal, and slave device mapping cache. The cache is the traversal information configured by the control module, i.e., the slave device mapping cache. In this embodiment, the control module is also referred to as the slave device, and the same applies below.

[0093] After establishing communication with the PLC controller, the host computer sends the initial configuration information of the control module to the PLC controller; this step corresponds to... Figure 4 The host computer on the left connects to the CPU (i.e., the PLC controller) and the configuration mapping cache.

[0094] The PLC controller performs configuration verification by comparing the traversal information configured in the control module with the initial information configured in the control module; this step corresponds to Figure 4 Configuration verification in the process.

[0095] If the configuration verification fails, the initial information for updating the control module configuration on the host computer will be returned; this step corresponds to Figure 4 Configure the failed operation above the settings.

[0096] If the configuration verification passes, the PLC controller waits for the next instruction. In this step, the PLC controller enters the idle mode while waiting for the next instruction. In this embodiment, a pre-operation is added after the PLC enters the idle mode. The pre-operation can be used to preprocess the data, such as retrieving some local data from the local memory to facilitate sending it to the slave device in the next step.

[0097] After receiving the configuration command from the host computer, the PLC controller configures the control module according to the configuration command; this step corresponds to Figure 4 The configuration of the slave device (its purpose is to update the configuration of the slave device), that is, to configure the control module.

[0098] If configuring the control module fails, the PLC controller will re-traverse the devices to confirm whether the control module to be configured is functioning correctly; this step corresponds to... Figure 4 Configure failed operations from the right side of the device.

[0099] If the control module to be configured is confirmed to be normal, return to the PLC controller to wait for the next instruction (i.e., enter idle mode).

[0100] If the control module to be configured is confirmed to be abnormal, the initial information for updating the control module configuration is returned to the host computer; this step also corresponds to Figure 4 Configure the failed operation above the settings.

[0101] If the control module is configured successfully (which can be understood as successfully establishing communication between the PLC controller and the slave device), the PLC controller will communicate with the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and perform data verification; this step corresponds to Figure 4 Data transmission and data verification.

[0102] If the data verification passes, the data communication is successful; otherwise, the data communication is re-initiated. In this embodiment, data verification occurs during data transmission. If data outside the data packet in the frame format is found to be non-compliant, an error code is returned to the sending device, which then retransmits the data. If data verification fails in this step, data communication must be re-initiated. In this embodiment, this re-initiation includes re-communication between the host computer and the PLC controller, and re-communication between the PLC controller and the control module, since the PLC controller's data ultimately originates from the host computer.

[0103] The above method covers the operation steps of the sending and receiving ends, and introduces error detection (mainly including configuration verification, configuration slave device verification and data verification) and correction mechanism (mainly including the handling of various verification errors). The above method can effectively realize the internal communication of the PLC control system, that is, the communication between the host computer and the PLC controller and the communication between the internal modules of the PLC (that is, the communication between the PLC controller and the control module).

[0104] exist Figure 4 In the process, when the PLC controller traverses the devices, it sends instructions to the control module to check whether a slave device exists in a certain slot. The control module returns the configuration to the PLC controller, which indicates which slot the slave device is in and what type of device it is. During the execution of the control module, updating the local configuration cache means updating its own address (slot) and other hardware configuration information. The data cache can be understood as readable and writable.

[0105] Generally speaking, control modules are mainly divided into input control modules and output control modules. Input control modules are used to receive external data and transmit it to the PLC controller, while output control modules are used to receive data from the PLC controller and output it to the outside.

[0106] As a preferred technical solution, after the control module is successfully configured, the PLC controller transmits data to the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and performs data verification. If the data verification passes, the data transmission is successful, and the PLC controller sends an update data command to the control module. After receiving the update data command from the PLC controller, the control module uses the received new data to overwrite the original data locally. If the data verification fails, the PLC controller retransmits the data to the control module.

[0107] In this embodiment, when the PLC controller transmits data to the control module, it also sends an update data command to ensure that the local data of the control module is not overwritten by errors. The update data command is only sent to the control module when the data verification is successful, thereby ensuring that the local data of the control module is not lost and making data transmission more efficient.

[0108] As a preferred technical solution, the data communication between the PLC controller and the control module adopts a custom communication protocol frame; the frame structure of the custom communication protocol frame includes several bytes, wherein Byte0 and Byte1 are the frame header, Byte2 is the device address, Byte3 is the device type, Byte4 is the frame type, Byte5 and Byte6 are the frame length, Byte7 and Byte8 are the operation data address, Bytes N0~Nx are data packets, Byte9 and Byte10 are CRC check codes, Byte11 is the MLVDS channel number, and Byte12 and Byte13 are the frame tail.

[0109] To ensure reliable data transmission under high bandwidth, this embodiment of the invention designs a custom protocol (i.e., adopts the aforementioned custom communication protocol frame). The data encoding rules of the custom communication protocol frame are detailed in the table below. Figure 5 A specific encoding method is adopted to make the data easy to identify and parse. Specifically, this encoding method can easily identify the type, location, quantity, etc. of each control module, so as to facilitate the parsing of the meaning of the data content in the data packet (data frame structure); the frame structure design of the custom communication protocol frame is detailed in the table below. Figure 5 The frame includes a frame header, data segment (i.e., data packet), checksum, frame trailer, etc., which ensures the orderliness of data transmission. The above-mentioned custom communication protocol frame forms an effective error correction mechanism by integrating checksum, cyclic redundancy check (CRC) and other technologies, which can facilitate timely detection and correction of transmission errors and ensure the accuracy and integrity of data.

[0110] The definitions and meanings of each byte in the frame structure of the custom communication protocol frame in this embodiment are shown in the table below:

[0111]

[0112] As a preferred technical solution, the data packet includes a device identification code for unique device identification.

[0113] Traditional PLC (Programmable Logic Controller) inter-module communication primarily relies on EtherCAT communication, which suffers from signal conflict issues: the lack of an effective device differentiation mechanism in bus communication easily leads to communication conflicts and data loss. This embodiment introduces a device identification code into the bus communication protocol, assigning a unique identifier to each device (including the PLC controller and various control modules). This effectively avoids communication conflicts, thus resolving the bus signal communication conflict problem and improving point-to-point communication efficiency. Specifically, the sending end appends the device identification code to the data packet of the aforementioned custom communication protocol frame, and the receiving end uses the device identification code to determine the data source, improving the efficiency and reliability of point-to-point communication.

[0114] Here's a simple example to illustrate the above process: After power-on, the PLC controller sends a broadcast message 0xFFFFFFFF01XXXXXX01DDDD to all MLVDS buses to inquire whether there is a control module in slot 1. If there is a control module in that slot, the control module replies on the corresponding MLVDS channel with 0xFFFF010000XXXXXX01DDDD (There is a type 00 control module in slot 1 on MLVDS channel 01).

[0115] In this embodiment, each type of control module has an independent identification code associated with its type, slot, and operation, so that the module has a unique identification code in a system controlled by a PLC controller.

[0116] In summary, this invention abandons the traditional EtherCAT communication method and adopts MLVDS technology combined with multi-channel parallel connection and custom protocol, which not only realizes the localization of communication, but also significantly improves bandwidth and response speed, and solves many shortcomings of the existing technology.

[0117] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0118] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0119] The parts not mentioned in the above embodiments are the same as or can be implemented using existing technologies, and will not be further described here.

[0120] Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication method for a PLC control system, characterized in that, The PLC control system includes a host computer and a PLC based on MLVDS communication. The internal modules of the PLC include a PLC controller and several control modules. The host computer and the PLC controller are connected for communication. The PLC controller includes a central processing unit, a first FPGA and a first MLVDS transceiver, wherein one end of the first FPGA is connected to the central processing unit via a high-speed bus, and the other end is connected to several of the first MLVDS transceivers. The control module includes a local processor, a second FPGA, and a second MLVDS transceiver. One end of the second FPGA is connected to the local processor via SPI, and the other end is connected to several second MLVDS transceivers. Among them, a plurality of the first MLVDS transceivers and a plurality of the second MLVDS transceivers respectively form a multi-channel high-speed serial MLVDS interface; Several MLVDS channels are connected in parallel between the PLC controller and the control module. One end of each MLVDS channel is connected to the first MLVDS transceiver, and the other end is connected to the second MLVDS transceiver. The PLC controller and the control module are connected in parallel to several MLVDS channels, including MLVDS data transmission channels and MLVDS control channels for sending control commands; wherein, two MLVDS control channels are provided, and the remaining MLVDS channels are MLVDS data transmission channels. Each MLVDS data transmission channel transmits data in odd and even slots. The MLVDS data transmission channel is a bidirectional channel, and the MLVDS control channel is a unidirectional channel. The PLC controller is equipped with two first MLVDS transceivers for sending control commands, and each of the control modules is equipped with two second MLVDS transceivers for receiving control commands. The two first MLVDS transceivers of the PLC controller are respectively connected to the two second MLVDS transceivers of each control module, forming two MLVDS control channels from the PLC controller to the control module. Both the first MLVDS transceiver and the second MLVDS transceiver are used for mutual conversion between multi-point low-voltage differential signals and single-point TTL level signals; Data communication between the PLC controller and the control module uses a custom communication protocol frame. The frame structure of the custom communication protocol frame includes several bytes, where Byte0 and Byte1 are the frame header, Byte2 is the device address, Byte3 is the device type, Byte4 is the frame type, Byte5 and Byte6 are the frame length, Byte7 and Byte8 are the operation data address, Bytes N0~Nx are data packets, Byte9 and Byte10 are CRC checksums, Byte11 is the MLVDS channel number, and Byte12 and Byte13 are the frame trailer. The data packet includes a device identification code used for unique device identification. The method includes: After power-on initialization, the PLC controller discovers all locally existing control modules by traversing the devices and caches the traversal information configured for the control modules. After establishing communication with the PLC controller, the host computer sends the initial configuration information of the control module to the PLC controller. The PLC controller performs configuration verification by comparing the traversal information configured in the control module with the initial information configured in the control module. If the configuration verification passes, the PLC controller waits for the next instruction. After receiving the configuration command from the host computer, the PLC controller configures the control module according to the configuration command; If the control module is configured successfully, the PLC controller will communicate with the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and perform data verification. If the data verification passes, the data communication is successful; otherwise, the data communication will be restarted.

2. The communication method of a PLC control system according to claim 1, characterized in that, One end of the first FPGA is connected to the high-speed bus via a high-speed parallel interface. The high-speed bus adopts a high-speed parallel data bus. The other end of the first FPGA is connected to several first MLVDS transceivers via a high-speed parallel interface. The first FPGA is used to realize the mutual conversion between data in the central processing unit's parallel communication interface and data in the multi-channel MLVDS parallel processing interface. One end of the second FPGA is connected to the local processor via an SPI interface, and the other end of the second FPGA is connected to several second MLVDS transceivers via a high-speed parallel interface. The second FPGA is used to realize the mutual conversion between data on the serial interface of the local processor and data on the multi-channel MLVDS parallel processing interface.

3. The communication method of a PLC control system according to claim 1, characterized in that, The method further includes: If the configuration verification fails, the initial information for updating the control module configuration on the host computer will be returned. If the configuration of the control module fails, the PLC controller will re-traverse the devices to confirm whether the control module to be configured is working properly. If the control module to be configured is confirmed to be normal, return to the PLC controller to wait for the next instruction; If the control module to be configured is confirmed to be abnormal, the initial information for updating the control module configuration will be returned to the host computer.

4. The communication method of a PLC control system according to claim 1, characterized in that, After the control module is successfully configured, the PLC controller transmits data to the control module through several MLVDS channels connected in parallel between the PLC controller and the control module, and performs data verification. If the data verification passes, the data transmission is successful, and the PLC controller sends an update data command to the control module. After receiving an update data command from the PLC controller, the control module overwrites the original local data with the received new data; If the data verification fails, the PLC controller will retransmit the data to the control module.

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