Nonvolatile memory device and garbage collection method thereof
By introducing main block, buffer block and garbage collection block into the flash memory device, and automatically triggering garbage collection operations using the write ratio, the problem of inefficiency in the flash memory conversion layer is solved, and the healthy state maintenance and efficient operation of the flash memory device is achieved.
Patent Information
- Application Number
- CN202410189612.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-20
- Publication Date
- 2025-08-22
AI Technical Summary
How to balance garbage collection operations in flash memory devices with write operations of hosts to avoid inefficiency in the operation of the flash conversion layer and no blank blocks.
By introducing multiple physical blocks into the nonvolatile memory device, including the main block, the buffer block and the garbage collection block, the garbage collection operation is automatically triggered using the write ratio, and the effective data full of the block is moved to the target block, maintaining the operation efficiency of the flash conversion layer.
Effectively balance the garbage collection operation and write operation, avoid the situation of no blank blocks, maintain the health of the non-volatile memory device and the efficient operation of the flash conversion layer.
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Figure CN120523744A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a memory device, and in particular to a non-volatile memory device and a garbage collection method thereof. Background Art
[0002] Flash memory is widely used in data storage systems due to its superior read / write performance and low power consumption compared to traditional hard disk drives. However, since flash memory does not support overwrite operations, writing new data requires replacing the old data stored in the flash memory. This means that as new data is written to a new location, the old data becomes invalid. As new data accumulates, the amount of invalid data increases. To ensure sufficient storage space for data, garbage collection is typically performed to free up space occupied by invalid data. While garbage collection effectively frees up space occupied by invalid data, balancing write operations (e.g., executing host write commands) with garbage collection is a critical issue. For example, insufficient garbage collection can lead to inefficient operation of the Flash Translation Layer (FTL) or result in a lack of free blocks. Summary of the Invention
[0003] The present invention provides a non-volatile memory device and a garbage collection method thereof, which can effectively balance garbage collection operations with write operations of write instructions from a host, so as to keep the non-volatile memory device in good health, avoid the situation of no blank blocks, and maintain normal operating efficiency of the flash memory translation layer.
[0004] The garbage collection method for a memory device of the present invention is used for a non-volatile memory, wherein the non-volatile memory includes multiple physical blocks, each of which includes multiple main blocks and multiple over-allocated blocks, wherein the number of main blocks corresponds to the number of logical blocks, and the multiple over-allocated blocks include multiple buffer blocks and multiple garbage collection blocks. The garbage collection method for the memory device includes the following steps: 1. Receive a write instruction; 2. Response: When the number of full blocks in the multiple physical blocks reaches a preset number of blocks and the logical address of the write data corresponding to the write instruction hits a full block in the physical blocks, the hit full block is used as a first source block; 3. Valid data corresponding to the hit logical address in the first source block is set to invalid data; 4. Write the write data to a target block and move the valid data in the first source block to the target block based on a write ratio, wherein the write ratio is the ratio of the number of buffer blocks to the number of main blocks; the target block is one of the garbage collection blocks.
[0005] In one embodiment of the present invention, the garbage collection method of the memory device includes writing write data into a target block and moving valid data of a first source block and a second source block to the target block based on a write ratio, wherein the second source block is at least one of a main block and a buffer block including valid data.
[0006] In one embodiment of the present invention, the second source block includes a main block or a buffer block from which valid data has not been completely moved.
[0007] In one embodiment of the present invention, the garbage collection method of the memory device includes: responding that the plurality of main blocks and the plurality of buffer blocks are full blocks, and determining that the number of full blocks in the plurality of physical blocks has reached a predetermined number of blocks.
[0008] In one embodiment of the present invention, the garbage collection method of the memory device includes stopping moving valid data of filled blocks in the physical blocks to the garbage collection block when the number of empty blocks in the plurality of physical blocks reaches a predetermined number of empty blocks.
[0009] In one embodiment of the present invention, the preset number of empty blocks is greater than or equal to the number of garbage collection blocks.
[0010] The present invention also provides a memory device comprising a non-volatile memory and a controller. The non-volatile memory comprises a plurality of physical blocks, wherein the physical blocks comprise a plurality of primary blocks and a plurality of over-allocated blocks, wherein the number of primary blocks corresponds to the number of logical blocks, and the plurality of over-allocated blocks comprise a plurality of buffer blocks and a plurality of garbage collection blocks. The controller is coupled to the non-volatile memory and accesses the non-volatile memory according to a write instruction. When the number of full blocks in the plurality of physical blocks reaches a preset number of blocks, and the logical address of the write data corresponding to the write instruction hits a full block in the plurality of physical blocks, the hit full block is used as a first source block, and the valid data corresponding to the hit logical address in the first source block is set to invalid data. The write data is written to a target block and the valid data of the first source block is moved to the target block according to a write ratio, wherein the write ratio is the ratio of the number of buffer blocks to the number of primary blocks, and the target block is one of the plurality of garbage collection blocks.
[0011] In one embodiment of the present invention, the controller writes write data into the target block and moves valid data of a first source block and at least one second source block to the target block based on a write ratio, wherein the second source block is at least one of a main block including valid data and a buffer block.
[0012] In one embodiment of the present invention, the second source block includes a main block or a buffer block from which valid data has not been completely moved.
[0013] In one embodiment of the present invention, the controller determines that the number of full blocks in the plurality of physical blocks has reached a preset number of blocks when the plurality of main blocks and the plurality of buffer blocks are all full blocks.
[0014] In one embodiment of the present invention, the controller stops moving valid data of full blocks in the plurality of physical blocks to the garbage collection block in response to the fact that the number of empty blocks in the plurality of physical blocks has reached a predetermined number of empty blocks.
[0015] In one embodiment of the present invention, the preset number of empty blocks is greater than or equal to the number of garbage collection blocks.
[0016] Based on the above, in an embodiment of the present invention, when the number of full blocks reaches a preset number and the logical address of the write data of a write instruction from a host hits a full block, the hit full block is used as the first source block, the valid data hit in the first source block is set to invalid data, and the write data is written to the target block and the valid data of the first source block is moved to the target block based on a write ratio, wherein the write ratio is the ratio of the number of buffer blocks to the number of main blocks, and the target block is one of a plurality of garbage collection over-allocation blocks. In this way, when the number of full blocks reaches the preset number, a garbage collection operation is automatically triggered, and the write data of the corresponding write instruction written to the target block and the data of the garbage collection operation are allocated based on the write ratio. This can effectively balance the garbage collection operation and the write operation of the corresponding write instruction, thereby maintaining the non-volatile memory device in good health, avoiding the situation of no blank blocks, and maintaining the normal operating efficiency of the flash translation layer.
[0017] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 is a schematic diagram of a memory reading device according to an embodiment of the present invention;
[0019] Figures 2 to 5 is a schematic diagram of a garbage collection method for a memory device according to an embodiment of the present invention;
[0020] Figure 6 The present invention is a flowchart of a garbage collection method for a memory device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0021] In order to make the content of the present invention more clearly understood, the following embodiments are given as examples of how the present invention can be truly implemented. In addition, wherever possible, components / members with the same reference numerals are used in the drawings and embodiments to represent the same or similar parts.
[0022] Figure 1 is a schematic diagram of a memory device according to an embodiment of the present invention, please refer to Figure 1 The memory device 100 may include a controller 102 and a non-volatile memory 104, wherein the controller 102 is coupled to the non-volatile memory 104, wherein the controller 102 may be, for example, a memory controller, and the memory controller may include, for example, a hardware processor such as a microprocessor, but is not limited thereto. In the present embodiment, the non-volatile memory 104 is implemented as a flash memory, such as a single-level cell (SLC) NAND flash memory, a multi-level cell (MLC) NAND flash memory, a triple-level cell (TLC) NAND flash memory, or a quad-level cell (QLC) NAND flash memory. However, in other embodiments, the non-volatile memory 104 may also be implemented as other non-volatile storage circuits / components.
[0023] Furthermore, the non-volatile memory may include multiple physical blocks, which may include multiple main blocks and multiple over-provision (OP) blocks, where the number of main blocks corresponds to the number of logical blocks, and the multiple over-provision blocks may include multiple buffer blocks and multiple garbage collection blocks.
[0024] For example, in Figure 2 In one embodiment, the non-volatile memory 104 is a single-level NAND flash memory, comprising a plurality of physical blocks B1-B17. Physical blocks B1-B17 include a plurality of primary blocks (physical blocks B1-B10) and a plurality of over-allocated blocks (physical blocks B11-B17). The number of primary blocks (physical blocks B1-B10) corresponds to the number of logical blocks LB1-LB10. The storage capacity of physical blocks B1-B10 is equal to the storage capacity of the memory device (i.e., equal to the storage capacity of logical blocks LB1-LB10). A host accesses data in units of logical blocks, and logical blocks are overwritable. Furthermore, the plurality of over-allocated blocks can be divided into a plurality of buffer blocks (physical blocks B11-B14) and a plurality of garbage collection blocks (physical blocks B15-B17).
[0025] When the controller 102 determines that the number of full blocks in the physical block has reached the preset number of blocks (for example, the preset number of blocks is set to 14, i.e., Figure 2 In the embodiment, when both the main block and the buffer block are full, it can be determined that the full blocks in the physical block have reached the preset number of blocks, but this is not limited to this. In other embodiments, the preset number of blocks can also be set to more or less. The controller 102 can automatically start the garbage collection operation. When the controller 102 performs the garbage collection operation, it is based on the write ratio (in Figure 2 In the embodiment, the write ratio is the ratio of the number of buffer blocks (physical blocks B11 to B14) to the number of main blocks (physical blocks B1 to B10). For example, the target block is written in such a way that the ratio of the amount of write data corresponding to the host's write command to the amount of data moved from the source block is equal to 4:10. After multiple garbage collection operations, the data composition of each physical block B1 to B14 can be, for example, Figure 2 As shown in the embodiment, each physical block B1-B14 includes 14 equal portions of data, wherein the valid data area includes 10 portions of valid data, and the invalid data area includes 4 portions of invalid data. That is, the ratio of the amount of valid data to the amount of invalid data in each main block (physical blocks B1-B10) and each buffer block (physical blocks B11-B14) is 10:4. Even if the controller 102 continues to write data according to the host's write command, it can still effectively balance the garbage collection operation and the write operation of the corresponding write command, so that the non-volatile memory device remains in good health.
[0026] For example, when the controller 102 receives a write instruction from a host (not shown) and the logical address of the write data corresponding to the write instruction hits one of a plurality of full blocks, the controller 102 may use the hit full block as a first source block, set the hit valid data corresponding to the logical address in the valid data area of the first source block to invalid data, and write the write data corresponding to the write instruction to a target block based on a write ratio and move the valid data in the valid data area of the first source block to the target block, where the target block may be, for example, one of a plurality of garbage collection blocks. In some embodiments, the controller 102 may also write the write data to the target block based on the write ratio and move the valid data in the valid data area of the first source block and at least one second source block to the target block, where the second source block is at least one of a main block and a buffer block including valid data, and the second source block may include a main block or a buffer block from which valid data has not been completely moved.
[0027] For example, if Figure 3As shown, when the logical address of the write data corresponding to the write instruction hits the 4 valid data in the valid data area in the physical block B1, the controller 102 can use the physical block B1 as the source block, set the 4 valid data (4Hit) hit in the physical block B1 to invalid data, and write the write data (4Host) corresponding to the write instruction into the target block (in this embodiment, the target block is the physical block B15 serving as the garbage collection block), and move the remaining 6 valid data (6GC) in the physical block B1 to the physical block B15, so that the physical block B1 will become a free block. Since the write ratio cannot be satisfied even if the remaining valid data of physical block B1 is moved to physical block B15 (i.e., the ratio of the amount of written data to the amount of valid data moved from the source block must be equal to the ratio of the number of buffer blocks to the number of main blocks (4:10)), the controller 102 may then select another physical block as another source block, for example, select physical block B2 as another source block, and move 4 copies of valid data (4GC) from physical block B2 to physical block B15 (at this time, physical block B15 becomes a full block) to satisfy the write ratio of the data in physical block B15.
[0028] And so on, in Figure 4 In the embodiment, when the logical address of the write data corresponding to the write instruction hits the four valid data in the valid data area of the physical block B2, the controller 102 uses the physical block B2 as the source block (because Figure 3 In the embodiment, the four copies of valid data in the physical block B2 have been moved to the physical block B15, so the invalid data in the physical block B2 has been changed from 4 copies to 8 copies. Figure 3 In the embodiment, the physical block B2 includes 6 copies of valid data and 8 copies of invalid data), the 4 copies of valid data (4Hit) hit in the physical block B2 are set as invalid data, and the write data (4Host) corresponding to the write instruction is written into the target block (in Figure 4 In this embodiment, the target block is physical block B16, which is a garbage collection block. The remaining two copies of valid data (2GC) in physical block B2 are moved to physical block B16, making physical block B2 an empty block. Similarly, since even if the remaining valid data in physical block B2 is moved to physical block B16, the write ratio (4:10) cannot be met, the controller 102 can then select another physical block as the source block, for example, physical block B3 as the source block, and move eight copies of valid data (8GC) from physical block B3 to physical block B16 (at this point, physical block B16 becomes a full block) to meet the write ratio of the data in physical block B16.
[0029] Then, in Figure 5 In the embodiment, when the logical address of the write data corresponding to the write instruction hits the four valid data in the valid data area of the physical block B4, the controller 102 uses the physical block B4 as the source block, sets the four valid data (4Hit) hit in the physical block B4 as invalid data, and writes the write data (4Host) corresponding to the write instruction into the target block (in Figure 5 In this embodiment, the target block is physical block B17, which serves as a garbage collection block. The remaining two copies of valid data (2GC) in physical block B3 (serving as another source block) and the remaining six copies of valid data (6GC) in physical block B4 are moved to physical block B16, thereby rendering physical blocks B3 and B4 empty. Similarly, since the write ratio (4:10) cannot be met even if the remaining valid data in physical blocks B3 and B4 is moved to physical block B16, the controller 102 selects another physical block B5 as the source block and moves two copies of valid data (2GC) from physical block B5 to physical block B17 (at this point, physical block B17 becomes a full block) to meet the write ratio of physical block B17.
[0030] In addition, the controller 102 may stop the garbage collection operation in response to the number of empty blocks in the plurality of physical blocks reaching a preset number of empty blocks, wherein the preset number of empty blocks may be set to be greater than or equal to the number of garbage collected blocks. Figures 2 to 5 In the embodiment, when the number of the preset empty blocks is set to be greater than the number of garbage collection blocks (for example, the number of the preset empty blocks is set to 4 physical blocks), when the number of the empty blocks reaches the preset number of empty blocks (for example, Figure 5 As shown, when four physical blocks B1-B4 are empty, controller 102 can stop garbage collection. At this point, the write traffic quality management (QOS) = 4:10 (equal to the number of buffer blocks: ((the number of buffer blocks + the number of primary blocks) - the number of buffer blocks), that is, the number of buffer blocks: the number of primary blocks, which is also equal to the write ratio), effectively balancing garbage collection operations with the write operations corresponding to write commands, thereby maintaining normal operating efficiency of the flash translation layer.
[0031] As described above, the embodiments of the present invention can automatically trigger a garbage collection operation when the number of full blocks reaches a preset number of blocks, and allocate the write data of the corresponding write instruction written to the target block and the data of the garbage collection operation (i.e., the valid data moved from the source block) according to the write ratio. This can effectively balance the garbage collection operation and the write operation of the corresponding write instruction, so that the non-volatile memory device is kept in good health (the number of blank blocks is maintained at at least 3 or more), avoid the situation of no blank blocks, and maintain the normal operating efficiency of the flash translation layer.
[0032] It is worth noting that in the above embodiments, the physical blocks targeted by the logical addresses of the write data corresponding to the write instructions are all primary blocks, but this is not limiting. For example, in other embodiments, the physical blocks targeted by the logical addresses of the write data corresponding to the write instructions may also be buffer blocks. Furthermore, the above embodiments are described using the case where the non-volatile memory 104 is a single-level cell NAND flash memory, but this is not limiting. In other embodiments, the non-volatile memory 104 may also be other types of flash memory, such as multi-level cell NAND flash memory, triple-level cell NAND flash memory, or quad-level cell NAND flash memory.
[0033] Figure 6 The present invention is a flowchart of a garbage collection method for a memory device according to an embodiment of the present invention, wherein the non-volatile memory includes a plurality of physical blocks, the plurality of physical blocks including a plurality of primary blocks and a plurality of over-allocated blocks, wherein the number of primary blocks corresponds to the number of logical blocks, and the plurality of over-allocated blocks include a plurality of buffer blocks and a plurality of garbage collection blocks. As can be seen from the above embodiment, the garbage collection method for the memory device may include at least the following steps: First, a write command is received from a host (step S602). Next, when the number of full blocks in the plurality of physical blocks reaches a predetermined number of blocks and the logical address of the write data corresponding to the write command hits a full block in the plurality of physical blocks, the hit full block is used as the first source block (step S604). The method for determining whether the number of full blocks in the plurality of physical blocks has reached the predetermined number of blocks may, for example, be to determine whether both the primary blocks and the buffer blocks are full blocks. If both the primary blocks and the buffer blocks are full blocks, it may be determined that the number of full blocks in the plurality of physical blocks has reached the predetermined number of blocks. In other embodiments, the preset number of blocks may be set to be greater or lesser.
[0034] Then, valid data corresponding to the hit logical address in the first source block is set to invalid data (step S606). Thereafter, based on a write ratio, the write data is written to the target block and the valid data in the first source block is moved to the target block (step S608), where the write ratio is the ratio of the number of buffer blocks to the number of primary blocks, and the target block is one of a plurality of garbage collection blocks. In some embodiments, based on the write ratio, the write data is also written to the target block and the valid data in the first source block and at least one second source block is moved to the target block, where the second source block is at least one of a primary block and a buffer block containing valid data, and the second source block may include a primary block or a buffer block from which valid data has not been completely moved. Then, in response to the fact that the number of empty blocks in the plurality of physical blocks has reached a predetermined number of empty blocks, the transfer of valid data in the filled blocks in the physical blocks to the garbage collection block is stopped (step S610), where the predetermined number of empty blocks can be set, for example, to be greater than or equal to the number of garbage collection blocks.
[0035] In summary, in an embodiment of the present invention, when the number of full blocks reaches a preset number and the logical address of the write data of a write instruction from a host hits a full block, the hit full block is used as the first source block, the valid data hit in the first source block is set to invalid data, and the write data is written to the target block and the valid data of the first source block is moved to the target block based on a write ratio, wherein the write ratio is the ratio of the number of buffer blocks to the number of main blocks, and the target block is one of a plurality of garbage collection over-allocation blocks. In this way, when the number of full blocks reaches the preset number, a garbage collection operation is automatically triggered, and the write data of the corresponding write instruction written to the target block and the data of the garbage collection operation are allocated based on the write ratio. This can effectively balance the garbage collection operation and the write operation of the corresponding write instruction, thereby maintaining the non-volatile memory device in good health, avoiding the situation of no blank blocks, and maintaining the normal operating efficiency of the flash translation layer.
[0036] Although the present invention has been disclosed above by way of embodiments, they are not intended to limit the present invention. Any person skilled in the art may make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the claims.
Claims
1. A garbage collection method for a memory device, used for a non-volatile memory, characterized in that: The non-volatile memory includes a plurality of physical blocks, the plurality of physical blocks including a plurality of main blocks and a plurality of over-allocation blocks, wherein the number of the plurality of main blocks corresponds to the number of logical blocks, the plurality of over-allocation blocks including a plurality of buffer blocks and a plurality of garbage collection blocks, and the garbage collection method of the memory device includes: Receive write instruction; In response to the number of full blocks among the plurality of physical blocks reaching a preset number of blocks and the logical address of the write data corresponding to the write instruction hits a full block among the plurality of physical blocks, the hit full block is used as the first source block; Setting the hit valid data corresponding to the logical address in the first source block to invalid data; and According to a write ratio, the write data is written into a target block and valid data of the first source block is moved to the target block, wherein the write ratio is the ratio of the number of the multiple buffer blocks to the number of the multiple main blocks, and the target block is one of the multiple garbage collection blocks.
2. The garbage collection method of a memory device according to claim 1, wherein: include: According to the write ratio, the write data is written to the target block and valid data of the first source block and at least one second source block are moved to the target block, wherein the second source block is at least one of a main block and a buffer block including valid data.
3. The garbage collection method of a memory device according to claim 2, wherein: The second source block includes a main block or a buffer block from which valid data has not been completely moved.
4. The garbage collection method of a memory device according to claim 1, wherein: include: It is reflected that the plurality of main blocks and the plurality of buffer blocks are all full blocks, and it is determined that the number of full blocks in the plurality of physical blocks has reached the preset block number.
5. The garbage collection method for a memory device according to claim 1, wherein: include: In response to the fact that the number of empty blocks in the plurality of physical blocks has reached a preset number of empty blocks, the migration of valid data in full blocks in the plurality of physical blocks to the plurality of garbage collection blocks is stopped.
6. The garbage collection method for a memory device according to claim 5, wherein: The preset number of empty blocks is greater than or equal to the number of the plurality of garbage collection blocks.
7. A memory device, characterized in that: include: A non-volatile memory comprising a plurality of physical blocks, the plurality of physical blocks comprising a plurality of primary blocks and a plurality of over-allocated blocks, wherein the number of the plurality of primary blocks corresponds to the number of logical blocks, and the plurality of over-allocated blocks comprises a plurality of buffer blocks and a plurality of garbage collection blocks; as well as A controller is coupled to the non-volatile memory and accesses the non-volatile memory according to a write instruction. When the number of full blocks among the multiple physical blocks has reached a preset number of blocks and the logical address of the write data corresponding to the write instruction hits a full block among the multiple physical blocks, the hit full block is used as a first source block, and the hit valid data corresponding to the logical address in the first source block is set to invalid data. According to a write ratio, the write data is written to a target block and the valid data of the first source block is moved to the target block, wherein the write ratio is a ratio of the number of the multiple buffer blocks to the number of the multiple main blocks, and the target block is one of the multiple garbage collection blocks.
8. The memory device according to claim 7, wherein: The controller writes the write data into the target block and moves valid data of the first source block and at least one second source block to the target block according to the write ratio, wherein the second source block is at least one of a main block and a buffer block including valid data.
9. The memory device according to claim 8, wherein: The second source block includes a main block or a buffer block from which valid data has not been completely moved.
10. The memory device according to claim 7, wherein: When the plurality of main blocks and the plurality of buffer blocks are all full blocks, the controller determines that the number of full blocks in the plurality of physical blocks has reached the preset block number.
11. The memory device according to claim 7, wherein: The controller responds that the number of empty blocks in the plurality of physical blocks has reached a preset number of empty blocks and stops moving valid data in full blocks in the plurality of physical blocks to the plurality of garbage collection blocks.
12. The memory device according to claim 11, wherein: The preset number of empty blocks is greater than or equal to the number of the plurality of garbage collection blocks.