Binding mapping method and device, storage control chip and storage medium

Abstract

The invention provides a binding mapping method and device, a storage control chip and a storage medium. The method comprises the following steps: determining a binding relationship of each Planes in the flash memory; reading a shared page characteristic table of the flash memory; binding mapping operation is executed on all Blocks of the Planes with the binding relation, and the binding mapping operation comprises the steps that shared pages of the Blocks under the same position offset are transversely bound, and binding mapping entries are established according to the transverse binding relation of the shared pages; and according to the binding mapping entry, establishing and storing an L2P table. By transversely binding the shared pages of the Blocks under the same position offset, the shared pages of the same type in different Blocks can be bound together, the effect that a single mapping relation represents that multiple logic pages correspond to multiple physical pages is achieved, the overall length of an L2P table can be effectively reduced, and excessive occupation of space resources of an RAM is avoided.

Description

Technical Field

[0001] The present invention relates to the field of Flash technology, and in particular to a binding mapping method, device, storage control chip and storage medium. Background Art

[0002] NAND Flash (hereinafter referred to as Flash) is a mainstream storage medium used for data storage. Flash is almost universally preferred as the core storage medium for storage products. However, due to its physical characteristics, Flash requires a storage controller chip for mass production.

[0003] The Flash Translation Layer (FTL) in the storage controller chip translates the host's logical address space into the Flash physical address space, essentially mapping the logical address to the physical address. Whenever data needs to be written to the Flash address space, the mapping relationship between the logical address and the physical address must be recorded. When the host needs to read the data, it can use this mapping to retrieve the data from the Flash and return it to the host. In practice, these mapping relationships are stored in the storage controller chip's RAM as a mapping table (L2P). However, RAM space is limited in length and, in addition to storing the mapping table, it also needs to store other data. Therefore, the length of the mapping table is crucial. In previous firmware code designs, each mapping relationship in the mapping table represented a single logical page corresponding to a single physical page, resulting in an unusually large mapping table and excessive RAM usage. Summary of the Invention

[0004] The purpose of the present invention is to overcome the deficiencies in the prior art and provide a binding mapping method, device, storage control chip and storage medium, which can reduce the length of the mapping table and avoid excessive occupation of RAM space resources.

[0005] A first aspect of the present application provides a binding mapping method, comprising: Determine the binding relationship between each Plane in the flash memory; Reading a shared page characteristic table of the flash memory; Performing a binding mapping operation on each block of the plane that has a binding relationship, the binding mapping operation comprising: horizontally binding the shared pages of the blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages; An L2P table is created and stored according to the binding mapping entry.

[0006] Furthermore, in one preferred embodiment, the binding mapping operation is performed on each block of the plane having a binding relationship, and the binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and before establishing the binding mapping entry based on the horizontal binding relationship of the shared pages, the operation further includes: A single-bit block of the flash memory is identified, and a binding mapping operation is not performed on pages in the single-bit block.

[0007] Furthermore, in one preferred embodiment, the horizontal binding of the shared pages of the block at the same position offset and the establishment of a binding mapping entry based on the horizontal binding relationship of the shared pages include: Obtain the shared page type corresponding to each WordLine in the shared page property table; Perform horizontal binding on the WordLine according to the shared page type, where: If the shared page corresponding to the WordLine includes only a single sharing type of Low Page, then the Low Page is horizontally bound in the Block at the same position offset; If the shared pages corresponding to the WordLine include two shared page types, namely, Low Page and Upper Page, then the Low Page and the Upper Page are horizontally bound in the Block at the same position offset. If the shared pages corresponding to the WordLine include three shared page types: Low Page, Upper Page, and Extra Page, then in the Block with the same position offset, the Low Page, the Upper Page, and the Extra Page are horizontally bound respectively; A binding mapping entry is established according to the horizontal binding relationship of the shared pages.

[0008] Furthermore, in one preferred embodiment, determining the binding relationship between the Planes in the flash memory includes: Read the number of error bits of each Plane before and after binding in the flash memory, and determine the binding relationship of each Plane based on the change in the number of error bits before and after binding.

[0009] A second aspect of the present application provides a binding mapping device, including: Binding module, used to determine the binding relationship between each Plane in the flash memory; A reading module, configured to read a shared page characteristic table of the flash memory; a mapping module, configured to perform a binding mapping operation on each block of the plane having a binding relationship, wherein the binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages; The storage module is used to establish and store an L2P table according to the binding mapping entry.

[0010] Furthermore, in one preferred embodiment, it also includes The identification module is configured to identify a single-bit block of the flash memory and not perform a binding mapping operation on pages in the single-bit block.

[0011] Furthermore, in one preferred embodiment, the mapping module includes: An acquiring unit, configured to acquire the shared page type corresponding to each WordLine in the shared page property table; A mapping unit is configured to perform horizontal binding on the WordLine according to a shared page type, wherein: If the shared page corresponding to the WordLine includes only a single sharing type of Low Page, then the Low Page is horizontally bound in the Block at the same position offset; If the shared pages corresponding to the WordLine include two shared page types, namely, Low Page and Upper Page, then the Low Page and the Upper Page are horizontally bound in the Block at the same position offset. If the shared pages corresponding to the WordLine include three shared page types: Low Page, Upper Page, and Extra Page, then in the Block with the same position offset, the Low Page, the Upper Page, and the Extra Page are horizontally bound respectively; The establishing unit is configured to establish a binding mapping entry according to the horizontal binding relationship of the shared page.

[0012] Furthermore, in one preferred embodiment, the binding module is used to determine the binding relationship between the Planes in the flash memory, including: Read the number of error bits of each Plane before and after binding in the flash memory, and determine the binding relationship of each Plane based on the change in the number of error bits before and after binding.

[0013] A third aspect of the present application provides a storage control chip, comprising: the binding mapping device as described above.

[0014] A fourth aspect of the present application provides a computer-readable storage medium storing executable code, which, when executed by a processor of an electronic device, causes the processor to execute the binding mapping method described above.

[0015] The technical solution of the present application includes: determining the binding relationship of each Plane in the flash memory; reading the shared page characteristic table of the flash memory; performing a binding mapping operation on each Block of the Plane with the binding relationship, wherein the binding mapping operation includes: horizontally binding the shared pages of the Blocks at the same position offset, and establishing a binding mapping entry based on the horizontal binding relationship of the shared pages; and establishing and storing the L2P table based on the binding mapping entry. By horizontally binding the shared pages of the Blocks at the same position offset, the same type of shared pages in different Blocks can be bound together, achieving the effect of a single mapping relationship representing multiple logical pages corresponding to multiple physical pages, which can effectively reduce the overall length of the L2P table and avoid excessive occupation of RAM space resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0017] Figure 1 This is a flow chart of a binding mapping method according to an embodiment of the present application; Figure 2 is a flowchart illustrating a binding mapping method according to another embodiment of the present application; Figure 3 FIG2 is a schematic structural diagram of a binding mapping device in an embodiment of the present application; Figure 4 FIG2 is a schematic structural diagram of a binding mapping device in another embodiment of the present application; Figure 5 FIG2 is a schematic diagram of the structure of a storage control chip in an embodiment of the present application; Figure 6 FIG2 is a schematic structural diagram of an electronic device in an embodiment of the present application; Figure 7 Schematic diagram of the organizational structure of a flash memory block according to an embodiment of the present application. DETAILED DESCRIPTION

[0018] To facilitate understanding of the present invention, the present invention is described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present invention. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present disclosure.

[0019] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly attached to the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only implementation methods.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0021] In the related art, in the firmware code design, each mapping relationship in the mapping table (L2P) represents a single logical page corresponding to a single physical page, resulting in an abnormally large length of the mapping table and excessive occupation of RAM space resources.

[0022] Therefore, in order to solve the above technical problems, the present application discloses a binding mapping method, which can reduce the length of the mapping table and avoid excessive occupation of RAM space resources.

[0023] Before formally describing the technical solution of the present application, the knowledge points of the flash memory (Flash) involved in the present application are described.

[0024] Flash can be divided into SLC, MLC, and TLC flash memory based on the number of bits of data stored in a single storage unit. However, regardless of the type of flash memory, its internal architecture is the same. Figure 7The following diagram shows the organizational structure of a Flash block. A wordline (WL) corresponds to one or more pages (Pages), the specific number depending on whether it is SLC, MLC, or TLC. For SLC, one wordline corresponds to one page; MLC corresponds to two pages, which form a pair (Lower Page and Upper Page); and TLC corresponds to three pages (Lower Page, Upper Page, and Extra Page, the names vary among flash memory manufacturers). The size of a page determines the number of memory cells and bitlines (BL) on a wordline. All memory cells in a block share the same substrate.

[0025] The shared page characteristics table describes the shared page information within a block. This information includes the shared page's WordLine address, location, write order, and continuous write. When the storage controller chip programs the flash memory, it must store the firmware code related to this shared page characteristics; otherwise, the storage controller chip cannot program the flash memory.

[0026] Table 1 shows the shared page characteristics of the B58r flash memory.

[0027] Low Page (LP) Upper Page (UP) Extra Page (XP) WordLine (WL) 0 - - 0 1 - - 1 2 - - 2 3 - - 3 4 5 6 4 7 8 9 5 10 11 12 6 13 14 16 7 16 17 18 8 19 20 21 9 22 23 24 10 25 26 27 11 …… …… …… …… 1381 1382 1383 463 1384 1385 - 464 1386 1387 - 465 …… …… …… …… 1398 1399 - 471 1400 1401 1402 472 1403 1404 1405 473 1406 1407 1408 474 …… …… …… …… 2777 2778 2779 931 2780 - - 932 2781 - - 933 2782 - - 934 2783 - - 935 Table 1 in: "0~2783" represents the page number in the current block, which means there are 2784 pages in the current block.

[0028] “…” represents a gradually increasing page number or word line address (WordLine), and the word line address has the same shared page characteristic.

[0029] "WordLine" is the "structure" used to operate pages in flash memory. For example, when programming a page in a block, it is necessary to find the wordline address corresponding to the page and operate on the wordline address to program the page. As mentioned above, the storage association between pages of a conventional type of block in TLC flash memory exists in the form of shared pages, that is, each shared page consists of three pages: Lower Page (LP), Upper Page (UP), and Extra Page (XP).

[0030] "-" indicates that when operating on this word line address, this page does not need to be programmed. For example, when operating on the word line address of WordLine0, only one page needs to be programmed, that is, only Page0 needs to be programmed. For another example, when operating on the word line address of WordLine4, three pages need to be programmed, that is, Page4, Page5, and Page6 need to be programmed.

[0031] The technical solution of this application is described in detail below with reference to the accompanying drawings.

[0032] Figure 1 The figure is a flow chart of the binding mapping method in one embodiment of the present application.

[0033] See also Figure 1 , a binding mapping method, comprising the following steps: Step S110: Determine the binding relationship between the Planes in the flash memory.

[0034] It's important to note that, to adapt to the current era of big data, most Flash memories are configured with multiple planes. To improve Flash read and write speeds, most Flash memories support multi-plane operations. Multi-plane operations work by binding blocks from multiple planes together to form a bound block. The storage controller chip then operates on this bound block when reading or writing Flash data, thus saving Flash read / write time.

[0035] However, multi-plane operations have prerequisites. The binding relationships between the planes in Flash must be clearly defined in advance. Not all planes in Flash are suitable for binding together. When PlaneA and PlaneB are bound together, PlaneB's properties are sacrificed too much, making the two planes unsuitable for binding to form a partition. In this embodiment, the binding ability of each plane is determined by reading the number of error bits of each plane before and after binding in Flash memory, and determining the binding relationship based on the change in the number of error bits before and after binding.

[0036] For example, suppose there are two planes configured in the flash memory, PlaneA and PlaneB. Before binding, PlaneA has an error bit count of 50 bits per 1K and PlaneB has an error bit count of 55 bits per 1K. After binding, PlaneA has an error bit count of 72 bits per 1K and PlaneB has an error bit count of 56 bits per 1K. The change in the error bit count before and after binding can be calculated as follows: ∆A=|72-50|=22Bit; ∆B=|56-55|=1Bit; In this embodiment, the preset error bit number change threshold is configured to 10 bits. The value of the preset error bit number change threshold can be configured according to actual conditions. The larger the value is, the looser the binding conditions are, and the smaller the value is, the stricter the binding conditions are. According to the preset error bit number change threshold, it can be determined that PlaneA and PlaneB cannot perform the binding operation because the error bit number change value before and after PlaneA is bound exceeds the set threshold. In actual application, the identification of the inability to bind Plane will be recorded in the Flash management file, and the storage control chip can confirm the binding relationship between Plane and Plane by reading the Flash management file.

[0037] Step S120: Read the shared page characteristic table of the flash memory.

[0038] It should be noted that the shared page feature table is an information table used to describe the shared page information in a block. Therefore, before officially performing binding mapping, the storage control chip needs to read the shared page feature table stored in the Flash memory. Based on the shared page feature table, it can obtain information such as the WordLine address, location relationship, write order, and continuous write of the Flash shared page. In this embodiment, the Flash model B58r is still used as an example for explanation.

[0039] Step S130 : performing a binding mapping operation on each Block of the Plane with a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of the Blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages.

[0040] It's important to note that to improve Flash read and write speeds, the Flash utilizes Multi-Plane operations to accelerate Flash read and write operations. Furthermore, since the shared page feature table applies to every plane, block, and page in the Flash, the shared page distribution information for pages at the same offset (page offset) within each block is consistent. For example, Block 0 of PlaneA, Block 0 of PlaneB, and Block 0 of PlaneC all have 2784 pages (0-2783). The WordLine addresses, location relationships, write order, and continuous write information for the shared pages strictly follow the information shown in Table 1. Based on this, when the storage controller chip controls the Flash to perform Multi-Plane operations, shared pages of blocks at the same offset in different planes (different planes are bound together) can be horizontally bound based on the shared page type, thus implementing binding mapping.

[0041] For example, assume that the Flash is configured with four planes: PlaneA, PlaneB, PlaneC, and PlaneD. Each plane has 100 blocks (0 to 99), and each block has 2784 pages (0 to 2783). The Flash is a TLC type Flash. The shared page characteristics are shown in Table 1.

[0042] After the storage control chip reads the Flash management file, it is found that PlaneA, PlaneB, PlaneC, and PlaneD have a binding relationship, which means that when the storage control chip performs a Multi-Plane operation, it operates PlaneA, PlaneB, PlaneC, and PlaneD simultaneously.

[0043] In this embodiment, first, the shared page type corresponding to each WordLine in the shared page characteristic table is obtained, that is, the storage control chip obtains the contents of Table 1. Then, horizontal binding is performed on the WordLine according to the shared page type, where: if the shared page corresponding to the WordLine includes only a single shared page type of Low Page, the Low Page is horizontally bound in the block with the same position offset; if the shared page corresponding to the WordLine includes two shared page types of Low Page and Upper Page, the Low Page and Upper Page are horizontally bound separately in the block with the same position offset; if the shared page corresponding to the WordLine includes three types of Low Page, Upper Page, and Extra Page, the Low Page, Upper Page, and Extra Page are horizontally bound separately in the block with the same position offset.

[0044] When performing a Multi-Plane operation, operating WordLine0 is equivalent to operating Page0 of the Block in each Plane. Since the shared page corresponding to the WordLine only includes the Low Page type, Page0 of the Block in each Plane (that is, the Low Page of the Block at the same position offset) is horizontally bound, which is equivalent to: PlaneA-Block0-Page0; PlaneB-Block0-Page0; PlaneC-Block0-Page0; PlaneD-Block0-Page0; The horizontal binding of these four pages completes one mapping entry, in which four physical pages can be mapped.

[0045] Similarly, when operating WordLine4, it is equivalent to operating Page4~6 of the Block in each Plane. Since the shared pages corresponding to the WordLine include three types of shared pages: Low Page, Upper Page, and Extra Page, Page4~6 of the Block in each Plane (that is, the Low Page, Upper Page, and ExtraPage of the Block at the same position offset are horizontally bound respectively) is equivalent to: For Low Page, it is: PlaneA-Block0-Page4; PlaneB-Block0-Page4; PlaneC-Block0-Page4; PlaneD-Block0-Page4; For Upper Page, it is: PlaneA-Block0-Page5; PlaneB-Block0-Page5; PlaneC-Block0-Page5; PlaneD-Block0-Page5; For the Extra Page, it is: PlaneA-Block0-Page6; PlaneB-Block0-Page6; PlaneC-Block0-Page6; PlaneD-Block0-Page6; The horizontal binding of these 12 pages completes 3 mapping entries. Among these 3 mapping entries, each mapping entry can map 4 physical pages.

[0046] Similarly, when operating WordLine464, it is equivalent to operating Page1384~1385 of the Block in each Plane. Since the shared pages corresponding to this WordLine include two types of shared pages: Low Page and Upper Page, Page1384~1385 of the Block in each Plane (that is, the Low Page and Upper Page of the Block at the same position offset are horizontally bound respectively), which is equivalent to: For Low Page, it is: PlaneA-Block0-Page1384; PlaneB-Block0-Page1384; PlaneC-Block0-Page1384; PlaneD-Block0-Page1384; For Upper Page, it is: PlaneA-Block0-Page1385; PlaneB-Block0-Page1385; PlaneC-Block0-Page1385; PlaneD-Block0-Page1385; The horizontal binding of these eight pages completes two mapping entries. In these two mapping entries, each mapping entry can map four physical pages. Finally, based on the horizontal binding relationship of the shared pages, a binding mapping entry is established.

[0047] The above examples demonstrate that the technical solution of this embodiment is essentially implemented based on the principles of shared page types and multi-plane operations. Since multi-plane operations simultaneously operate on shared pages of blocks in different planes, these shared pages can be horizontally bound to achieve bound mapping. This eliminates the need for mapping a single logical page to a single physical page (i.e., a single mapping entry can only map to one physical page), as in previous firmware code. Instead, multiple physical pages are implemented using a single mapping entry. However, this single mapping entry actually contains mappings from four logical pages to four physical pages. These four physical pages are simply bound together based on the principles of multi-plane operations to achieve mapping. During multi-plane operations, these shared pages are read and written simultaneously. This is the core of this technical solution. Furthermore, for Flash, there can only be one type of mapping entry: either one mapping entry represents one logical page mapping to one physical page, or one mapping entry represents n logical pages mapping to n physical pages (n is a positive integer greater than or equal to 2). There cannot be more than two mapping types in the same Flash.

[0048] Step S140: Create and store an L2P table according to the binding mapping entry.

[0049] It's important to note that the L2P table summarizes all mapping relationships currently in Flash. When the storage controller chip controls Flash for write operations, the established binding mapping entries are recorded in the L2P table. When the storage controller chip controls Flash for read operations, it reads the mapping entries recorded in the L2P table to retrieve the data stored in the physical page, which is then fed back to the host for output.

[0050] Figure 2 Shown is a flow chart of a binding mapping method in another embodiment of the present application.

[0051] See also Figure 2 , a binding mapping method, characterized by comprising the following steps: Step S210: Determine the binding relationship between the Planes in the flash memory.

[0052] Please refer to the description of step S110 for step S210, which will not be repeated here.

[0053] Step S220: Read the shared page characteristic table of the flash memory.

[0054] Please refer to the description of step S120 for step S220, which will not be repeated here.

[0055] Step S230: Identify the single-bit blocks of the flash memory, and do not perform the binding mapping operation on the pages in the single-bit blocks.

[0056] It should be noted that before establishing binding mapping, it is necessary to identify which blocks in the Flash memory are single-bit blocks (SLC blocks) or multi-bit blocks (TLC blocks). Binding mapping is not used for SLC blocks because SLC blocks are typically managed as management blocks, which require very high read and write speeds and stability. Although TLC blocks have higher capacity, their read and write speeds and stability are far inferior to SLC blocks. Therefore, the technical solution of this embodiment does not allow binding mapping for SLC blocks.

[0057] Step S240: Perform a binding mapping operation on each Block of the Plane with a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of the Blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages.

[0058] Please refer to the description of step S130 for step S240, which will not be repeated here.

[0059] Step S250: Create and store an L2P table according to the binding mapping entry.

[0060] Please refer to the description of step S140 for step S250, which will not be repeated here.

[0061] Corresponding to the aforementioned method embodiments, the present application also provides a binding mapping device and corresponding embodiments.

[0062] Figure 3 FIG. 1 is a schematic structural diagram of a binding mapping device in an embodiment of the present application.

[0063] See also Figure 3 A binding mapping device 300 includes a binding module 310, a reading module 320, a mapping module 330, and a storage module 340. The binding module 310 is used to determine the binding relationship between the Planes in the flash memory.

[0064] Furthermore, in this embodiment, the binding module 310 determines the binding relationship of each Plane in the flash memory by reading the number of error bits of each Plane before and after binding in the flash memory, and determining the binding relationship of each Plane based on the change in the number of error bits before and after binding.

[0065] The reading module 320 is used to read the shared page characteristic table of the flash memory.

[0066] The mapping module 330 is used to perform a binding mapping operation on each block of a plane with a binding relationship. The binding mapping operation includes: horizontally binding the shared pages of blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages.

[0067] The storage module 340 is configured to create and store an L2P table according to the binding mapping entries.

[0068] It should be noted that the binding mapping method implemented by the binding mapping device disclosed in this embodiment is the same as the above embodiment, so it will not be described in detail here. Optionally, the various modules in this embodiment and the above other operations or functions are respectively for implementing the methods in the above embodiments.

[0069] Figure 4 Shown is a structural diagram of a binding mapping device in another embodiment of the present application.

[0070] See also Figure 4 , a binding mapping device 300, including: a binding module 310, a reading module 320, an identification module 350, a mapping module 330 and a storage module 340. Wherein: the functional description of the binding module 310, the reading module 320, the mapping module 330 and the storage module 340 can be found in Figure 3 , I will not go into details here.

[0071] The identification module 350 is used to identify the single-bit blocks of the flash memory and not perform the binding mapping operation on the pages in the single-bit blocks.

[0072] Furthermore, in this embodiment, the mapping module 330 includes: an acquisition unit 331, a mapping unit 332, and a creation unit 333. The acquisition unit 331 is used to acquire the shared page type corresponding to each WordLine in the shared page property table.

[0073] The mapping unit 332 is used to perform horizontal binding on the WordLine according to the shared page type, wherein: If the shared page corresponding to the WordLine includes only the Low Page sharing type, the Low Page will be horizontally bound in the Block with the same position offset.

[0074] If the shared pages corresponding to the WordLine include two shared page types: Low Page and Upper Page, the Low Page and Upper Page are horizontally bound separately in the Block with the same position offset.

[0075] If the shared pages corresponding to the WordLine include three types: Low Page, Upper Page, and Extra Page, then the Low Page, Upper Page, and Extra Page are horizontally bound separately in the Block with the same position offset.

[0076] The establishing unit 333 is used to establish a binding mapping entry according to the horizontal binding relationship of the shared pages.

[0077] It should be noted that the binding mapping method implemented by the binding mapping device disclosed in this embodiment is the same as the above embodiment, so it will not be described in detail here. Optionally, the various modules in this embodiment and the above other operations or functions are respectively for implementing the methods in the above embodiments.

[0078] like Figure 5 Shown is a structural diagram of a storage control chip in one embodiment of the present application.

[0079] Please refer to 5 , a storage control chip 500 includes the above-mentioned binding mapping device 300 .

[0080] It should be noted that the storage control chip of this embodiment can bind the shared pages of the same type in different blocks together by horizontally binding the shared pages of the blocks with the same position offset, so as to achieve the effect that a single mapping relationship represents multiple logical pages corresponding to multiple physical pages, which can effectively reduce the overall length of the L2P table and avoid excessive occupation of RAM space resources.

[0081] See Figure 6 Another embodiment of the present application shows a computing electronic device 600 including: a processor 610 and a memory 620.

[0082] The processor 610 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0083] A general purpose processor may be a microprocessor or the processor may be any conventional processor. The memory 610 may include various types of storage units, such as system memory, read-only memory (ROM), and permanent storage.

[0084] The ROM can store static data or instructions required by the processor 620 or other modules of the computer. The permanent storage device can be a readable and writable storage device. The permanent storage device can be a non-volatile storage device that retains stored instructions and data even when the computer is powered off. In some embodiments, the permanent storage device uses a large-capacity storage device (e.g., a magnetic or optical disk, or flash memory) as the permanent storage device.

[0085] In some other embodiments, the permanent storage device may be a removable storage device (e.g., a floppy disk or optical drive). The system memory may be a read-write storage device or a volatile read-write storage device, such as dynamic random access memory. The system memory may store some or all of the instructions and data required by the processor during operation.

[0086] In addition, the memory 620 may include any combination of computer-readable storage media, including various types of semiconductor memory chips (eg, DRAM, SRAM, SDRAM, flash memory, programmable read-only memory), magnetic disks, and / or optical disks.

[0087] In some embodiments, memory 620 may include a removable, readable and / or writable storage device, such as a compact disc (CD), a read-only digital versatile disc (e.g., a DVD-ROM, a dual-layer DVD-ROM), a read-only Blu-ray disc, an ultra-high-density optical disc, a flash memory card (e.g., an SD card, a mini-SD card, and a micro-SD card), a magnetic floppy disk, etc. Computer-readable storage media do not contain carrier waves or transient electronic signals transmitted wirelessly or wired. Executable code is stored on memory 620. When executed by processor 610, this executable code can cause processor 610 to perform some or all of the methods described above.

[0088] In addition, the method according to the present application may also be implemented as a computer program or a computer program product, which includes computer program code instructions for executing some or all of the steps in the above method of the present application.

[0089] Alternatively, the present application can also be implemented as a computer-readable storage medium (or non-transitory machine-readable storage medium or machine-readable storage medium) on which executable code (or computer program or computer instruction code) is stored. When the executable code (or computer program or computer instruction code) is executed by a processor of an electronic device (or server, etc.), the processor executes part or all of the steps of the above-mentioned method according to the present application.

[0090] The embodiments of the present application have been described above. The above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to the technology in the market, or to enable other persons skilled in the art to understand the embodiments disclosed herein.

Claims

1. A binding mapping method, characterized in that: include: Determine the binding relationship between each Plane in the flash memory; Reading a shared page characteristic table of the flash memory; Performing a binding mapping operation on each block of the plane that has a binding relationship, the binding mapping operation comprising: horizontally binding the shared pages of the blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages; An L2P table is created and stored according to the binding mapping entry.

2. The binding mapping method according to claim 1, characterized in that: The binding mapping operation is performed on each block of the plane with a binding relationship, wherein the binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and before establishing a binding mapping entry based on the horizontal binding relationship of the shared pages, the binding mapping operation further includes: A single-bit block of the flash memory is identified, and a binding mapping operation is not performed on pages in the single-bit block.

3. The binding mapping method according to claim 1, wherein: The horizontal binding of the shared pages of the block at the same position offset and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages include: Obtain the shared page type corresponding to each WordLine in the shared page property table; Perform horizontal binding on the WordLine according to the shared page type, where: If the shared page corresponding to the WordLine includes only a single sharing type of Low Page, then the Low Page is horizontally bound in the Block at the same position offset; If the shared pages corresponding to the WordLine include two shared page types, namely, Low Page and Upper Page, then the Low Page and the Upper Page are horizontally bound in the Block at the same position offset. If the shared pages corresponding to the WordLine include three shared page types: Low Page, Upper Page, and Extra Page, then the Low Page, the Upper Page, and the ExtraPage are horizontally bound respectively in the Block at the same position offset; A binding mapping entry is established according to the horizontal binding relationship of the shared pages.

4. The binding mapping method according to claim 1, wherein: Determining the binding relationship between the Planes in the flash memory includes: Read the number of error bits of each Plane before and after binding in the flash memory, and determine the binding relationship of each Plane based on the change in the number of error bits before and after binding.

5. A binding mapping device, characterized in that: include: Binding module, used to determine the binding relationship between each Plane in the flash memory; A reading module, configured to read a shared page characteristic table of the flash memory; a mapping module, configured to perform a binding mapping operation on each block of the plane having a binding relationship, wherein the binding mapping operation includes: horizontally binding the shared pages of the blocks at the same position offset, and establishing a binding mapping entry according to the horizontal binding relationship of the shared pages; The storage module is used to establish and store an L2P table according to the binding mapping entry.

6. The binding mapping device according to claim 5, characterized in that: Also includes The identification module is configured to identify a single-bit block of the flash memory and not perform a binding mapping operation on pages in the single-bit block.

7. The binding mapping device according to claim 6, characterized in that: The mapping module includes: An acquiring unit, configured to acquire the shared page type corresponding to each WordLine in the shared page property table; A mapping unit is configured to perform horizontal binding on the WordLine according to a shared page type, wherein: If the shared page corresponding to the WordLine includes only a single sharing type of Low Page, then the Low Page is horizontally bound in the Block at the same position offset; If the shared pages corresponding to the WordLine include two shared page types, namely, Low Page and Upper Page, then the Low Page and the Upper Page are horizontally bound in the Block at the same position offset. If the shared pages corresponding to the WordLine include three shared page types: Low Page, Upper Page, and Extra Page, then the Low Page, the Upper Page, and the ExtraPage are horizontally bound respectively in the Block at the same position offset; The establishing unit is configured to establish a binding mapping entry according to the horizontal binding relationship of the shared page.

8. The binding mapping device according to claim 5, characterized in that: The binding module is used to determine the binding relationship between the planes in the flash memory, including: Read the number of error bits of each Plane before and after binding in the flash memory, and determine the binding relationship of each Plane based on the change in the number of error bits before and after binding.

9. A storage control chip, comprising: The binding mapping device according to any one of claims 5 to 8.

10. A computer-readable storage medium, characterized in that An executable code is stored, and when the executable code is executed by a processor of an electronic device, the processor is caused to execute the binding mapping method according to any one of claims 1 to 3.

Images