Interconnect device power analysis

Abstract

The invention discloses interconnection device power analysis. An interconnection device is provided. In one example, an interconnect device includes a port and a power distribution controller to receive a power distribution, monitor data through one or more of a switch and power consumption of the switch, and transmit the monitored data to the port. And determining at least one of the ingress bandwidth exceeding a first bandwidth threshold and the power consumption exceeding a first power threshold during the first time period. At least one of the first bandwidth threshold and the first power threshold is defined in the power profile. During the first time period, the power distribution controller is to limit one or more of power consumption of data through the switch and the interconnect device in response to determining at least one of the ingress bandwidth exceeding the first bandwidth threshold and the power consumption exceeding the first power threshold.

Description

Technical Field

[0001] The present disclosure relates generally to networking, and more particularly to networking devices and methods of operating the same. Background Art

[0002] Switches and similar network devices are core components of many communications, security, and computing networks. Switches are commonly used to connect multiple devices, device types, networks, and network types.

[0003] Devices (including but not limited to personal computers, servers, or other types of computing devices) can be interconnected using network devices such as switches. These interconnected entities form a network that enables data communication and resource sharing between nodes. While certain switches may be capable of handling large amounts of data, switches typically do not operate at full capacity. Consequently, conventional switches consume unnecessarily high amounts of power during periods of low traffic. Summary of the Invention

[0004] According to one or more embodiments described herein, a computing system (e.g., an interconnect device) may enable various systems (e.g., switches, servers, personal computers, and other computing devices) to communicate over a network. Such a computing system (which may be referred to herein as an interconnect device or switch) may implement one or more power profiles. Implementing a power profile may include monitoring ingress and / or egress bandwidth and / or power consumption, and comparing the monitored bandwidth and / or power consumption to one or more thresholds based on the power profile. The computing system may use these thresholds to limit ingress and / or egress bandwidth based on the monitored bandwidth and / or power consumption, and reduce the total amount of power consumption when the amount of bandwidth required for data to traverse the computing system for the power profile is less than a maximum amount of bandwidth.

[0005] The present disclosure describes a system and method for enabling an interconnect device (e.g., a switch) or other computing system to reduce overall power consumption by providing a feature to a client device that enables the client device to adjust for periods of high bandwidth (or high power consumption) followed by periods of low bandwidth (or low power consumption). The embodiments described herein relate to throttling bandwidth based on a power profile that includes one or more thresholds. In some examples, the power profile may include four thresholds, such as a low bandwidth threshold, a medium bandwidth threshold, a high bandwidth threshold, and a maximum bandwidth threshold. It should be understood that in some embodiments, the power profile may include any number of thresholds greater than or less than the four thresholds. A processing device performing a process-intensive task may operate in such a manner that the processing device performs the computing task for a period of time before sending data through one or more interconnect devices. During the period of time when the processing device performs the process-intensive task, the interconnect device may be used little or not at all. On the other hand, during the period of time when the processing device sends data through one or more interconnect devices, the interconnect device may be used at a high level or at a maximum level. Because during normal operation, the interconnect device is required to perform relatively short bursts of use by processing devices during which the processing devices are not busy processing and using the interconnect device for interconnect services, the interconnect device can be configured to provide periods of high bandwidth capability. During periods when the processing devices are less likely to use the interconnect services, the interconnect device can provide periods of low bandwidth capability.

[0006] Embodiments of the present disclosure are directed to improving power efficiency and other issues by implementing a power analysis method. The power analysis method depicted and described herein may be applied to switches, routers, or any other suitable type of networking device, whether known or yet to be developed. In an illustrative example, a system is disclosed that includes one or more circuits for receiving a power profile, monitoring one or more of data passing through the system and power consumption of the system, and during a first time period: determining that an ingress bandwidth exceeds a first bandwidth threshold and that power consumption exceeds a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile, and in response to determining that the ingress bandwidth exceeds the first bandwidth threshold and that the power consumption exceeds the first power threshold, limiting one or more of data passing through the system and the power consumption of the system.

[0007] In another example, a method is disclosed that includes: receiving a power profile; monitoring one or more of data passing through a system and power consumption of the system; and during a first time period: determining at least one of an ingress bandwidth exceeding a first bandwidth threshold and power consumption exceeding a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile; and in response to determining at least one of the ingress bandwidth exceeding the first bandwidth threshold and the power consumption exceeding the first power threshold, limiting one or more of data passing through the system and power consumption of the system.

[0008] In another example, a switch is disclosed that includes one or more ports and a power profile controller that is configured to: receive a power profile; monitor one or more of data passing through the switch and power consumption of the switch; and during a first time period: determine that an ingress bandwidth exceeds a first bandwidth threshold and at least one of power consumption exceeds a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile; and in response to determining that the ingress bandwidth exceeds the first bandwidth threshold and at least one of the power consumption exceeds the first power threshold, limit one or more of data passing through the switch and the power consumption of the switch.

[0009] Any of the above example aspects include where a power supply is shared by one or more switches and one or more processing devices, and the power distribution involves the power supply providing a greater amount of power to the one or more processing devices and less power to the one or more switches during a first time period, followed by the power supply providing a greater amount of power to the one or more switches and less power to the one or more processing devices during a second time period.

[0010] Any of the above example aspects include where monitoring data passing through the system comprises monitoring one or more of bandwidth, packet rate, buffer utilization, and queue length.

[0011] Any of the above-mentioned example aspects includes that the one or more circuits are further used to: correlate the monitored data with the power consumption of the system through the system, and adjust one or more of the first power threshold and the first bandwidth threshold based on the correlation to solve the power leakage problem.

[0012] Any of the above example aspects includes wherein the one or more circuits are further configured to update one or more of the first power threshold and the first bandwidth threshold based on a correlation of the monitored data with the power consumption of the system.

[0013] Any of the above example aspects includes where limiting one or more of data passing through the system and power consumption of the system comprises limiting one or more of ingress bandwidth and egress bandwidth.

[0014] Any of the above example aspects include, wherein the first power threshold indicates a user-defined power consumption limit and / or a power consumption limit set by an optimization algorithm or an artificial intelligence model.

[0015] Any of the above example aspects includes where the system receives power from a power supply shared by the one or more interconnected devices and the processing device, wherein the power consumption limit is associated with an amount of power consumed by the system from the power supply.

[0016] Any of the above example aspects, including where the first bandwidth threshold indicates a user-defined bandwidth limit.

[0017] Any of the above example aspects may include wherein the one or more circuits are further configured to determine a power requirement based on a bandwidth limitation.

[0018] Any of the above example aspects includes wherein the one or more circuits are further configured to measure one or more of current and voltage and calculate a moving average power consumption.

[0019] Any of the above example aspects includes: one or more circuits are further used to: during a second time period, determine that the ingress bandwidth exceeds a second bandwidth threshold and the power consumption exceeds at least one of a second power threshold, wherein at least one of the second bandwidth threshold and the second power threshold is defined in a power profile; and in response to determining that the ingress bandwidth exceeds the second bandwidth threshold and the power consumption exceeds at least one of the second power threshold, limit the egress of the packet.

[0020] Any of the above example aspects include where at least one of the first bandwidth thresholds is greater than the second bandwidth threshold and at least one of the first power thresholds is greater than the second power threshold.

[0021] Any of the above example aspects includes where a duration of the first time period is less than a duration of the second time period.

[0022] Any of the above example aspects includes where the shaper circuit determines at least one of the ingress bandwidth exceeds a first bandwidth threshold and the power consumption exceeds a first power threshold and determines at least one of the ingress bandwidth exceeds a second bandwidth threshold and the power consumption exceeds a second power threshold.

[0023] Any of the above example aspects include wherein limiting the egress of packets comprises one or more of throttling traffic and dropping packets. Embodiments include wherein different thresholds and throttling levels apply to specific queues, such as a low priority queue and a high priority queue.

[0024] Any of the above example aspects include wherein the power profile specifies two or more time periods, wherein a first time period is associated with one or more of a first bandwidth threshold and a first power threshold, and a second time period is associated with one or more of a second bandwidth threshold and a second power threshold.

[0025] Any of the above example aspects includes wherein the one or more circuits are further configured to monitor temperature and adjust one or more of the first bandwidth threshold and the first power threshold based on the temperature.

[0026] Any of the above example aspects include, wherein the power profile is one of a plurality of power profiles and each of the plurality of power profiles is associated with a corresponding application, wherein the one or more circuits are further configured to aggregate the plurality of power profiles and determine one or more of a first bandwidth threshold and a first power threshold based on the aggregated plurality of power profiles.

[0027] Additional features and advantages are described herein, and will be apparent from the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The present disclosure is described in conjunction with the accompanying drawings, which are not necessarily drawn to scale:

[0029] Figure 1 is a block diagram depicting an illustrative configuration of a network according to at least some embodiments of the present disclosure;

[0030] Figure 2 is a block diagram depicting an illustrative configuration of an interconnect device according to at least some embodiments of the present disclosure;

[0031] Figure 3 is a block diagram depicting an illustrative configuration of routing circuitry of an interconnect device according to at least some embodiments of the present disclosure;

[0032] Figure 4 is a diagram depicting an illustrative power distribution according to at least some embodiments of the present disclosure; and

[0033] Figure 5 is a flow chart depicting an illustrative configuration of a method in accordance with at least some embodiments of the present disclosure.

[0034] Like reference numbers and designations in the various drawings indicate like elements. DETAILED DESCRIPTION

[0035] The following description provides only examples and is not intended to limit the scope, applicability, or configuration of the claims. Instead, the following description will provide those skilled in the art with a feasible description of implementing the described embodiments. It should be understood that various changes may be made to the function and arrangement of the elements without departing from the spirit and scope of the appended claims.

[0036] As will be understood from the following description, for reasons of computational efficiency, the components of the system may be arranged at any suitable location in a distributed network of components without affecting the operation of the system.

[0037] Furthermore, it should be understood that the individual links connecting the elements may be wired, traced, or wireless links, or any suitable combination thereof, or any other suitable known or later developed element capable of providing data to and / or transmitting data from the connected elements. For example, the transmission medium used as the link may be any suitable electrical signal carrier, including coaxial cable, copper wire and optical fiber, electrical traces on a printed circuit board (PCB), etc.

[0038] As used herein, the phrases "at least one," "one or more," "or," and "and / or" are open-ended expressions that are operationally both conjunctions and disjunctions. For example, each of the expressions "at least one of A, B, and C," "at least one of A, B, or C," "one or more of A, B, and C," "one or more of A, B, or C," "A, B and / or C," and "A, B, or C" means A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together.

[0039] As used herein, the term "automatic" and its variations refer to any suitable process or operation that can be performed without substantial human input when the process or operation is performed. However, if input is received before the process or operation is performed, then the process or operation may be automatic, even if the process or operation is performed with substantial or immaterial human input. Human input is considered substantial if it affects the manner in which the process or operation is performed. Human input that consents to the performance of the process or operation shall not be considered "substantial."

[0040] As used herein, the terms "determine," "calculate," and "compute," and variations thereof, are used interchangeably and include any suitable type of method, process, operation, or technique.

[0041] Various aspects of the disclosure are described herein with reference to the accompanying drawings, which are schematic illustrations of idealized configurations.

[0042] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with that in the context of the relevant art and this disclosure.

[0043] As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "comprise," "comprises," and / or "comprising" are used in this specification, these terms specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The term "and / or" includes any and all combinations of one or more of the associated listed items.

[0044] Now refer to Figures 1 to 5 , various systems and methods for implementing power distribution in interconnect devices will be described. The concepts of power distribution depicted and described herein can be applied to any type of computing system capable of receiving and / or transmitting data, whether the computing system includes one port or multiple ports. Such a computing system can be a switch, but it should be understood that any type of computing system can be used. As the ability of interconnect devices (e.g., switches) to pass data continues to increase, the forwarding packet processing becomes more and more complex, and therefore the power requirements and power density of interconnect devices are also increasing.

[0045] Since the purpose of the interconnect device can be to perform on-demand packet forwarding for incoming packets from clients and processing devices, the system-side power envelope must always support the worst-case power requirements of the switch, which is the maximum power use case occurring at the most stressed packet processing density and bandwidth. Through the power analysis described in this article, the client can draw one or more applicable power profiles for one or more specific applications with high-bandwidth windows and low-bandwidth windows or no bandwidth windows to achieve an average power envelope.

[0046] like Figure 1As shown, the computing environment described herein can be a network of processing devices 103 interconnected by an interconnect device 100. One or more interconnect devices 100 can communicate with one or more processing devices 103. The processing devices 103 and the network of interconnect devices 100 can communicate with one or more client devices 109. The processing devices 103 and the network of interconnect devices 100 can be powered by one or more power devices 106. Such a network of processing devices 103 and interconnect devices 100 can be used in a variety of environments, from data centers and cloud computing infrastructures to artificial intelligence systems.

[0047] The processing device 103 may be a computing unit, such as a personal computer, server, or other computing device, and may be responsible for executing applications and performing data processing tasks. The processing device 103 described herein may range from a server in a data center to a desktop computer in a network, or to devices such as Internet of Things (IoT) sensors and smart devices.

[0048] Each processing device 103 may include one or more processing circuits, such as a graphics processing unit (GPU), a central processing unit (CPU), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other circuit systems capable of performing computations, as well as memory and storage resources, to run software applications, handle data processing, and perform specific tasks as needed. In some embodiments, the processing device 103 may also or alternatively include hardware, such as a GPU, for handling intensive tasks of machine learning, artificial intelligence (AI) workloads, or other complex processes.

[0049] For example, processing device 103 can operate as a high-performance computing (HPC) cluster. A cluster of processing devices 103 can include many interconnected servers, each equipped with a powerful CPU and / or GPU. Processing devices 103 can provide computing horsepower, for example, for training large-scale AI models or running complex scientific simulations. For AI and machine learning tasks, processing device 103 can include one or more GPUs or other processing circuitry that can handle the parallel processing requirements of neural networks and other applications.

[0050] As described in more detail herein, the interconnect device 100 can enable communication between the processing devices 103 and / or the client devices 109. The interconnect device 100 can be, for example, a switch, a network interface controller (NIC), or other device capable of receiving and sending data, and can act as a central node in a network. The interconnect device 100 can be wired in a topology including, for example, a spine switch and a top-of-rack (TOR) switch. The interconnect device 100 can be capable of receiving, processing, and forwarding data (e.g., packets) to an appropriate destination within the network, such as the processing devices 103 and / or the client devices 109. In some embodiments, the interconnect device 100 can be included in a switch box, platform, or chassis, which can contain one or more interconnect devices 100 and one or more power devices 106.

[0051] In some embodiments, each processing device 103 can be connected to one or more ports of one or more interconnected devices 100 via a network cable or wirelessly. Processes (e.g., applications) executed by a processing device 103 can involve transmitting data to nodes of the network, such as other processing devices 103 and / or client devices 109. Data can flow through the network of processing devices 103 and interconnected devices 100 using one or more protocols, such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP), or Internet Protocol (IP). Each interconnected device 100 can, upon receiving data from a processing device 103 or another interconnected device 100, examine the data to identify the destination of the data and route the data through the network.

[0052] Each interconnect device 100 can receive power from a power supply device 106 shared by one or more interconnect devices 100 and / or processing devices 103, from a power supply device 106 contained within the interconnect device 100, or from a power supply device 106 dedicated to the interconnect device 100. The power supply device 106 may include a power regulator or other power circuitry. In some embodiments, the power supply device 106 can supply power to a voltage regulator (VR), which can maintain power according to the needs of the particular interconnect device 100. For example, the VR can maintain 600 watts, even though the average application executed by the interconnect device 100 consumes much less power.

[0053] The power supply device 106 shared by the interconnect device 100 and the processing device 103 may be capable of dynamically redirecting power from the interconnect device to the processing device (and vice versa). For example, when the processing device 103 is performing computations, the processing device 103 may require less interaction with the interconnect device 100. Thus, while the processing device 103 may require above-average processing power, the interconnect device 100 may require below-average power or no power. On the other hand, when the processing device 103 is not performing computations, the processing device 103 may rely on the interconnect device 100. Thus, while the interconnect device 100 may require above-average processing power, the processing device 103 may require below-average power or no power.

[0054] When the processing device 103 is not actively using the interconnect device 100 to transmit data, the interconnect device 100 can enter a standby or low-power mode. During such times, the interconnect device 100 can receive, process, and forward packets as needed without consuming more than an average amount of power. Therefore, the power supply device 106 can supply enough power to the interconnect device 100 to meet the needs of the processing device 103. The power supply device 106 can provide enough power for the interconnect device 100 and the processing device 103 to complete the necessary tasks at the appropriate time.

[0055] As described herein, client devices 109 can be computing devices that, for example, perform AI-related tasks, research-related tasks, and other processor-intensive tasks, and utilize processing devices 103 to handle the computational load and data throughput required by such intensive applications. Client devices 109 can include, for example, workstations and personal computers used by researchers, data scientists, and professionals to develop, test, and run AI models and research simulations. Client devices 109 can include one or more CPUs and / or GPUs, but may require additional computing power to complete complex tasks.

[0056] By interacting with processing device 103, client device 109 may be enabled to perform functions such as training machine learning models, performing data processing, running simulations, analyzing large data sets, and performing complex data processing tasks such as data mining, pattern recognition, and predictive modeling.

[0057] In some embodiments, the interconnect device 100 described herein may be configured as follows: Figure 2 Such an interconnect device 100 may include a plurality of ports 203 , routing circuitry 206 , processing circuitry 209 , and memory 212 .

[0058] The ports 203 of the interconnect device 100 may be capable of facilitating the transfer of data packets or non-packetized data to, from, and through the interconnect device 100. Such ports 203 may serve as interface points to which network cables may be connected, connecting the interconnect device 100 with other interconnect devices 100, processing devices 103, and / or client devices 109.

[0059] Each port 203 is capable of receiving incoming data packets from other devices and / or transmitting outgoing data packets to other devices. In some embodiments, a port 203 can be configured to operate as a dedicated ingress or egress port 203, or can be enabled to operate with dual functionality capable of performing both ingress and egress functions. For example, an egress port 203 can be used exclusively to send data from an interconnected device, while an ingress port 203 can be used only to receive incoming data into the switch.

[0060] The routing circuitry 206 of the interconnect device 100 may be capable of handling received packets by determining which port to send the packet from and forwarding the packet from the determined port, as described below and with respect to FIG. Figure 3 Using the systems or methods described herein, routing circuitry 206 may be able to throttle data traversing through interconnect device 100 based on one or more power profiles. Thus, routing circuitry 206 may be able to reduce the overall amount of power consumed by interconnect device 100 without incurring a processing power penalty.

[0061] To support the functionality of routing circuitry 206, processing circuitry 209 may be configured to control various aspects of routing circuitry 206 to implement throttling related to power distribution. In some embodiments, processing circuitry 209 may include a CPU, an ASIC, and / or other processing circuitry that may be capable of handling the computational, decision-making, and management functions required for the operation of interconnect device 100.

[0062] The processing circuit system 209 can be configured to handle level management and control functions of the interconnect device 100, such as setting routing tables, configuring ports, and otherwise managing the operation of the interconnect device 100. The processing circuit system 209 can execute software and / or firmware to configure and manage the interconnect device 100, such as an operating system and management tools. In some embodiments, the processing circuit system 209 can be configured to receive power profiles from external devices (e.g., the processing device 103 and / or the client device 109). The processing circuit system 209 can be capable of aggregating multiple received power profiles, updating the power profiles based on information such as bandwidth, power consumption, temperature, etc. (as described in more detail below), and instructing the routing circuit system 206 to operate according to one or more power profiles.

[0063] Processing circuit system 209 may also be capable of storing such power profiles in memory 212, for example, in the form of power profile data 215. Processing circuit system 209 may also be capable of correlating the bandwidth of interconnect device 100 with power consumption, temperature, and / or other factors, and making determinations responsive to such correlations. Processing circuit system 209 may store data related to such correlations in memory 212, for example, in the form of power-bandwidth correlation data 218. Such correlations may be used to adjust one or more power consumption and / or bandwidth thresholds to address power leakage issues.

[0064] The memory 212 of the interconnect device 100 as described herein may include one or more memory elements capable of storing configuration settings, power profile data 215, power-bandwidth correlation data 218, application data, operating system data, and other data. Such memory elements may include, for example, random access memory (RAM), dynamic RAM (DRAM), flash memory, non-volatile RAM (NVRAM), ternary content addressable memory (TCAM), static RAM (SRAM), and / or other formats of memory elements.

[0065] In some embodiments, the interconnect device 100 as described herein may include one or more power sensors 221. The power sensor 221 may be a current sensor, a voltage sensor, a power meter, or other device that can be used to monitor the power consumption of the interconnect device 100. For example, a current sensor can measure the flow of current (in amperes) from the power supply device 106 to the interconnect device 100. Such a current sensor can be, for example, a Hall effect current sensor, a current transformer, a shunt resistor, or other types of components that can be used to determine the amount of current. Based on the current, the interconnect device 100 may be able to determine the amount of power consumed at any given time. In some embodiments, the current sensor can be used in conjunction with a voltage sensor to measure the amount of power consumed. Data from the power sensor 221 can be prepared by, for example, the processing circuit system 209 and can be stored in the memory 212.

[0066] In some embodiments, the interconnect device 100 as described herein may include one or more temperature sensors 224. The temperature sensor 224 may be a thermocouple, a resistance temperature detector, a thermistor, a semiconductor-based sensor, or other device capable of monitoring the temperature of the interconnect device 100, the temperature of the environment in which the interconnect device 100 operates (ambient temperature), and / or the temperature of one or more components of the interconnect device 100 (e.g., processing circuitry, ASICs, or other components). For example, the temperature sensor may measure the temperature at any given time. Data from the temperature sensor 224 may be prepared by, for example, the processing circuitry 209 and may be stored in the memory 212.

[0067] Figure 3 1 shows elements of the routing circuitry 206 of the interconnect device 100 according to one or more embodiments of the present disclosure. Upon receiving data, one or more ingress ports 203 may communicate the data to one or more ingress processing circuits 303. In some embodiments, each ingress port 203 may be associated with a dedicated ingress processing circuit 303, while in other embodiments, multiple ingress ports 203 may share an ingress processing circuit 303.

[0068] Each ingress processing circuit 303 may include one or more of a forward error correction (FEC) circuit 306, a decryption engine circuit 309, a control plane 312, and / or other circuits and components that may handle ingress packets and non-packetized ingress data. The FEC circuit 306, as described herein, may be configured to perform error detection and correction on packets received from a port 203 before they are directed to an egress port. The FEC circuit 306 may receive ingress data from a port 203 and, after performing FEC, output the received ingress data or a processed version of the ingress data to the decryption engine circuit 309.

[0069] The decryption engine circuit 309, as described herein, may be used to decrypt all or a portion of received packets to enable the interconnect device 100 to determine from which port 203 each packet was sent. The decryption engine circuit 309 may be capable of ensuring that sensitive data remains protected from unauthorized access during the data's traversal through the interconnect device 100. The decryption engine circuit 309 may output the received packets or data associated with the received packets to one or more shared buffer circuits 318 via a bandwidth measurement component 315, as described below. The decryption engine circuit 309 may also output data associated with the received packets to the control plane 312.

[0070] The control plane 312, as described herein, may be used to manage how received data packets are forwarded and handled within the interconnect device 100. The control plane 312 may receive data associated with the received packets from the decryption engine circuitry 309 and, based on the data associated with the received packets, write instructions to one or more queuing circuits 321, as described below.

[0071] Each of the FEC circuitry 306, the decryption engine circuitry 309, the control plane 312, and / or other circuits and components of the ingress processing circuitry 303 may include one or more of an ASIC, an FPGA, a digital signal processor (DSP), a network processor, an accelerator, a hardware security module, a CPU, and / or other components and circuitry capable of performing ingress processing. It should be understood that each ingress processing circuitry 303 of the interconnect device 100 may include one or more additional circuits and components to supplement or replace the aforementioned FEC circuitry 306, the decryption engine circuitry 309, and the control plane 312.

[0072] Each ingress processing circuit 303 of the interconnect device 100 may be enabled to write data to the shared buffer circuit 318 and the queuing circuit 321. Packets to be transmitted out of the interconnect device 100 may be stored in the shared buffer circuit 318. Data used by the egress processing circuit 327 to route packets to the egress port 203 may be written to the queuing circuit 321. Once the queuing circuit 321 assigns a particular packet to a particular egress port 203, the egress processing circuit 327 associated with the particular egress port 203 may read the packet data stored in the shared buffer circuit 318.

[0073] Data to be sent from the interconnect device 100 may be processed by one or more egress processing circuits 327. In some embodiments, each port 203 used for egress may be associated with a dedicated egress processing circuit 327. In other embodiments, multiple egress ports 203 may share one or more egress processing circuits 327.

[0074] The egress processing circuitry 327 may include (but should not be considered limited to) a packet modifier 330 and an encryption engine 333. The packet modifier 330, as described herein, may include circuitry such as an ASIC, FPGA, or other components capable of modifying packets before they are transmitted from the interconnect device. Such modifications may include, for example, adding or removing tags, modifying settings and packet header data, and other modifications. The encryption engine 333, as described herein, may include circuitry such as an ASIC, FPGA, or other components capable of encrypting packets before they are transmitted from the interconnect device. Such encryption may include, for example, using an encryption algorithm such as the Advanced Encryption Standard (AES), RSA, or other algorithms.

[0075] After being processed by the egress processing circuitry 327, the packet may be transmitted from the interconnect device 100 via the egress port 203. The egress port 203 may be directly connected to the final destination of the packet, or may be connected to another interconnect device 100 that may forward the packet to the final destination.

[0076] As described above, the routing circuitry 206 of the interconnect device 100 may be capable of throttling data traversing through the interconnect device 100 based on one or more power profiles. Thus, the routing circuitry 206 may be capable of reducing the overall amount of power consumed by the interconnect device 100 without incurring a processing power penalty.

[0077] Reduction in overall power consumption of the interconnect device 100 may be achieved through the use of one or more power profiler controllers 336. The power profiler controller 336 may be one or more or a combination of an ASIC, an FPGA, and other components capable of performing the functions of the power profiler controller 336 described herein.

[0078] The power analyzer controller 336 may be capable of measuring bandwidth, such as by using a bandwidth measurement component 315 as described below, and throttling data through the interconnect device 100, such as by using one or more throttling circuits 324 as described below. The power analyzer controller 336 may include or be in communication with an analog-to-digital converter (ADC) 339 and one or more distribution shapers 342.

[0079] The ADC 339 of the power analyzer controller 336 of the interconnect device 100 may include one or more of a delta-sigma ADC, a flash ADS, a successive approximation register ADC, or other devices capable of receiving analog data from a power sensor 221 (e.g., a current sensor, a temperature sensor 348, or other source) and converting the analog data into digital data for interpretation by the power analyzer controller 336.

[0080] The power analyzer controller 336 can use the power sensor 221 to determine the amount of power or current being consumed at any given time by the interconnect device 100. In some embodiments, the power analyzer controller 336 can use the current readings to determine the wattage being consumed by the interconnect device 100.

[0081] The interconnect device 100 may be enabled to use the profile shaper 342 to control or regulate power consumption based on one or more power profiles. In some embodiments, the power profile may be provided to the power analyzer controller 336 by the processing circuitry 209 of the interconnect device 100. For example, in some embodiments, a user may be enabled to set one or more power consumption limits or thresholds and / or bandwidth limits or thresholds. The user may be enabled to manually set such power consumption limits or thresholds and / or bandwidth limits or thresholds, such as by interacting with the client device 109 and / or the processing device 103, or the client device 109 and / or the processing device 103 may automatically set such power consumption limits or thresholds and / or bandwidth limits or thresholds. In some embodiments, in addition to or in lieu of user-defined thresholds, thresholds may be automatically set based on various performance requirements. For example, the thresholds may be defined by one or more optimization algorithms and / or artificial intelligence models that may be capable of monitoring bandwidth and / or power consumption and dynamically adjusting the threshold amount and / or threshold duration.

[0082] The distribution shaper 342 can be configured to control or manage the bandwidth of data passing through the interconnect device 100. For example, the distribution shaper 342 can control one or more throttling circuits 324 of the interconnect device 100. Controlling the throttling circuits 324 can involve turning throttling on and off or adjusting the amount of throttling. The amount of throttling can depend on various thresholds, and the thresholds can depend on the power profiles in effect as described herein.

[0083] In some embodiments, the power analyzer controller 336 may include multiple profile shapers 342. In some embodiments, the profile shapers 342 may be associated with a specific power profile and / or a specific threshold bandwidth. For example, a power profile may be associated with multiple thresholds, and each threshold may be associated with a corresponding profile shaper 342.

[0084] The power analyzer controller 336 may be enabled to measure the bandwidth through the interconnect device 100. Although Figure 3 The routing circuitry 206 shown in FIG includes a bandwidth measurement component 315 between the decryption engine and the shared buffer circuit 318, but it should be understood that the bandwidth measurement component 315 can be located elsewhere within or external to the routing circuitry 206 and can enable the power analyzer controller 336 to measure the bandwidth at various points along the path from the ingress port 203 to the egress port 203. For example, the bandwidth measurement component 315 can be capable of measuring the ingress bandwidth and / or the egress bandwidth.

[0085] Using the bandwidth measurement component 315, the power analyzer controller 336 can be enabled to measure the amount of bandwidth per ingress port 203. In some embodiments, each ingress port 203 or ingress processing circuitry 303 can be enabled to report its respective bandwidth to the power analyzer controller 336. The power analyzer controller 336 can be enabled to aggregate the bandwidth of each port 203 to understand the total bandwidth currently required by the ingress ports 203. In this way, the power analyzer controller 336 can monitor the bandwidth passing through the switch in real time at any given minute.

[0086] In some embodiments, the bandwidth measurement component 315 can additionally or alternatively be used by the power analyzer controller 336 to measure the amount of bandwidth per egress port 203. For example, each egress port 203 or egress processing circuitry 327 can be enabled to report its respective outbound bandwidth to the power analyzer controller 336. The power analyzer controller 336 can be enabled to aggregate the outbound bandwidth of each port 203 to understand the total outbound bandwidth of the interconnect device 100.

[0087] Each distribution shaper 342 can be configured for a specific threshold and can cause throttling when necessary, as described below. The throttling circuit 324 can be enabled to cause packets to be dispatched to the outbound processing circuitry 327 to stop or occur at a lower rate. For example, when the bandwidth measured by the bandwidth measurement component 315 according to the power profile reaches or exceeds a threshold, the distribution shaper 342 can control the throttling circuit 324 to stop the outbound flow of traffic.

[0088] In some embodiments, throttling circuitry 324 can be enabled to throttle traffic on the ingress and / or egress side of routing circuitry 206. Whether throttling is performed on the egress side, the ingress side, or both can depend on factors such as whether the traffic is lossy or lossless. In some embodiments, throttling circuitry 324 can throttle traffic on the egress side for a period of time until one or more shared buffer circuits 318 reach a maximum or threshold storage level, and then throttling circuitry 324 can throttle traffic on the ingress side to prevent packet loss for lossless systems.

[0089] The threshold value in effect may vary over time according to any of the power profiles in effect as described below. Depending on the power profile, the power analyzer controller 336 may be enabled to load the profile shaper 342 with a value corresponding to a particular threshold value at various time windows. For example, a power profile may include multiple different threshold values ​​that may be in effect at various times during one or more intervals.

[0090] In some embodiments, the power analyzer controller 336 can be enabled to monitor temperature and adjust the power profile thresholds based on the temperature using data from the temperature sensor 224. Because temperature affects leakage, and leakage can lead to excessive power consumption, adjusting the power profile thresholds based on temperature enables the power analyzer controller to account for ASIC temperature, power leakage, and / or other considerations when applying a particular power profile.

[0091] For example, if the temperature measured by temperature sensor 224 is higher than the normal operating temperature or higher than average, it can be assumed that leakage is high and the power consumption per bandwidth is higher than normal or average. Therefore, the threshold can be adjusted lower to account for leakage.

[0092] In some embodiments, the power analyzer controller 336 can be configured to respond to data in packets received by the interconnect device 100. For example, the power analyzer controller 336 can be capable of determining that packets passing through the interconnect device 100 contain data indicating a congestion state. Such data can include explicit congestion notifications (ECNs), forward ENCs (FECNs), and / or congestion notification packets (CNPs). When the interconnect device 100 receives packets marked with ECNs, FECNs, CNPs, or some other congestion marking, the interconnect device 100 may receive less traffic due to congestion. Therefore, by implementing the systems or methods described herein, the interconnect device 100 can be enabled to reduce power consumption by applying specific power profiles and / or thresholds in anticipation of sustained relatively low bandwidth to reduce power consumption. In such embodiments, the power analyzer controller 336 can be configured to apply a low-bandwidth power profile upon receiving one or more packets indicating congestion.

[0093] Adjusting the threshold may include configuring hardware circuitry (e.g., distribution shaper 342) and / or throttling circuitry 324 to be enabled to throttle the flow at the adjusted threshold, as described below with respect to Figure 5 The throttling circuit 324 of the interconnect device 100 can be enabled to throttle traffic through the interconnect device 100 in various ways. In some embodiments, the manner in which traffic is throttled can depend at least in part on whether the traffic is lossless or lossy.

[0094] For example, for lossless data, the interconnect device 100 may be required to avoid dropping packets. In such a system, when the distribution shaper 342 initiates throttling, incoming packets may be aggregated into the shared buffer circuit 318. When this occurs, credit backpressure may occur, and congestion in the interconnect device 100 may cause traffic to be throttled back. Ultimately, the source of the traffic may stop sending packets to the interconnect device 100 and / or delays may occur.

[0095] For lossy data, the interconnect device 100 may be able to drop packets. If the distribution shaper 342 initiates throttling, some packets may be retained in the shared buffer (e.g., microsecond traffic), while other packets received at the ingress side may be dropped. In some embodiments, early congestion notifications may be sent to the source via an adaptive routing mechanism.

[0096] The power analyzer controller 336 may be enabled to receive instructions from and send data to the processing circuitry 209 of the interconnect device 100, as well as read data from the power sensors 221, the temperature sensors 224, and / or other components. The thresholds for throttling by the profile shaper 342 may be based on such power profiles provided to the power analyzer controller 336 by, for example, the processing circuitry 209.

[0097] Figure 4 An example power profile 400 is shown that may be implemented by the power analyzer controller 336. To illustrate the example power profile 400, bandwidth is plotted on a vertical axis 403 and time is plotted on a horizontal axis 406. Dashed line 409 shows the overall average bandwidth.

[0098] In the example power profile 400, a high-bandwidth phase 412 at time t1 is followed by a low-bandwidth phase 415 at time t2. During the high-bandwidth phase 412, the profile shaper 342 may apply a first threshold bandwidth. During time period t1, the profile shaper 342 may initiate throttling only when the bandwidth exceeds the first threshold. This high-bandwidth phase 412 may represent a period of relatively intense activity for the interconnected device 100, such as during a period when the processing device 103, as described above, is relatively inactive in processing data and needs to interact with other devices.

[0099] During the low bandwidth phase 415, the same or different distribution shaper 342 may apply a second threshold bandwidth. During time period t2, when the bandwidth exceeds the second threshold, the distribution shaper 342 may initiate throttling. This low bandwidth phase 415 may represent a relatively quiet period of activity for the interconnected device 100, such as during a period when the processing device 103, as described above, is relatively more active in processing data and requires less interaction with other devices.

[0100] While shown as an immediate switch between the high bandwidth phase 412 and the low bandwidth phase 415, it should be understood that in some embodiments, the transition period between the phases 412, 415 may be used to raise or lower the threshold.

[0101] exist Figure 4In the example power profile 400, the duration of the high-bandwidth phase 412 is less than the duration of the low-bandwidth phase 415. It will be appreciated that these durations may vary depending on application requirements. For example, in some embodiments, the duration of the high-bandwidth phase 412 may be greater than or equal to the duration of the low-bandwidth phase 415. An example duration may be, for example, 50 milliseconds followed by 950 milliseconds, for a total repetition time of one second. However, it will be appreciated that other time amounts may be used. Example thresholds may be, for example, 90% of the maximum bandwidth for the high threshold and 20% of the maximum bandwidth for the low threshold. As another example, the high-bandwidth threshold may be 26 terabits per second (Tbps), followed by 5.6 Tbps for the low-bandwidth threshold. As another example, the high-bandwidth threshold may be 100% of the maximum bandwidth, and the low-bandwidth threshold may be zero percent of the allowed bandwidth. Furthermore, while only two levels, high and low, are shown, more levels may be used in some embodiments. In some embodiments, a power profile may include any number of one or more thresholds. As an example, a power profile may include four thresholds. The first threshold value can be a low bandwidth threshold value, the second threshold value can be a medium bandwidth threshold value, the third threshold value can be a high bandwidth threshold value, and the fourth threshold value can be a maximum bandwidth threshold value. In addition, each threshold value can be associated with the same or different amount of time. For example, the first threshold value can be associated with a first duration, the second threshold value can be associated with a second duration, the third threshold value can be associated with a third duration, and the fourth threshold value can be associated with a fourth duration. Each of the first to fourth durations can be any amount of time, whether equal to or different from each of the other durations. It should be understood that the power analysis described herein should not be considered to be limited to the use of two threshold values. In addition, in some embodiments, the power profile can include a smooth function rather than a square curve.

[0102] exist Figure 4 In the example shown, the power profile 400 has two phases 412, 415. During the high-bandwidth phase 412, the interconnect device 100 can be used by one or more processing devices 103 to perform high-level communications, while during the low-bandwidth phase 415, the interconnect device 100 can be used by one or more processing devices 103 for sporadic communications.

[0103] Power distribution (e.g. Figure 4The power profile 400 shown can be created by a user (e.g., a user of the client device 109) or can be automatically created by an application executed by the client device 109 and / or the processing device 103. For example, a user or an application can be enabled to draw one or more suitable power profiles suitable for one or more specific applications. Such a power profile can include one or more windows with a high bandwidth threshold and one or more windows with a low bandwidth threshold. By creating a specific power profile, any desired average power envelope of the interconnected device 100 can be achieved.

[0104] When packets are processed by the ingress processing circuitry 303 and the egress processing circuitry 327, components such as the FEC circuitry 306, the decryption engine circuitry 309, the control plane 312, the packet modifier 330, and the encryption engine 333 consume power. When a larger amount of bandwidth passes through the interconnect device 100, the interconnect device 100 may consume a greater amount of power than when a smaller amount of bandwidth passes through the interconnect device 100. The amount of power consumed by the interconnect device 100 may be directly related to the amount of bandwidth passing through the interconnect device 100. Therefore, the power profile of the application can be used to configure the overall average amount of power consumed by the interconnect device 100, and the power profile can inform the overall average power consumption that the interconnect device 100 should expect. High-bandwidth and low-bandwidth windows can be directly related to high-power consumption and low-power consumption windows.

[0105] Although Figure 4 The power profiles shown in FIG are in terms of bandwidth that varies over time, but it should be understood that in some embodiments, the power profiles may be in terms of power that varies over time. That is, the power profiles may indicate two or more threshold power amounts rather than threshold bandwidth amounts. If the power consumed by the interconnect device 100 exceeds the threshold power amount, throttling of data passing through the interconnect device 100 may occur, resulting in less data passing through the interconnect device 100 and, therefore, less power being consumed by the interconnect device 100.

[0106] like Figure 5 As shown, the example method 500 can be implemented by the interconnect device 100 described herein to implement power consumption control based on one or more power profiles. As described above, the interconnect device 100 can be, for example, a switch or other type of computing system capable of receiving and forwarding data in a network. The interconnect device 100 can be used by one or more processing devices 103 and / or client devices 109 to provide interconnection services with one or more other processing devices 103 and / or client devices 109. The interconnect device 100 can receive power from one or more power supply devices 106. Such power supply devices 106 can be composed of the interconnect device 100, or can be shared by multiple interconnect devices 100, processing devices 103 and / or client devices 109.

[0107] At 503 , the interconnect device 100 may receive a power profile. The power profile may be received from an application executing on a processing device, may be programmed by a system administrator or other user, or may be otherwise stored in the memory 212 of the interconnect device 100 as power profile data 215 .

[0108] For example, a user of a client device 109 can design an application that can utilize a processing device 103 to perform a computationally intensive task. The task can require the processing device 103 to perform processing functions and interact with other processing devices 103 and / or client devices 109 via one or more interconnect devices 100. The user can specify the amount of time (e.g., number of milliseconds) that high bandwidth is allowed through the interconnect device and the amount of time (e.g., number of milliseconds) that a lower level of bandwidth is allowed through the interconnect device between high bandwidth periods. The user can also specify the amount of bandwidth or power that can be allowed during each of the high bandwidth period and the low bandwidth period. For example, the user can specify a percentage of maximum bandwidth, a data rate, or a power level, which the interconnect device can use to determine the thresholds to be effective when implementing the power profiles described herein.

[0109] In some embodiments, power profiles can be applied to multiple interconnected devices 100 in a network. For example, an overarching or governing power profile can be implemented so that each (or a subset thereof) of the interconnected devices 100 in the network implements the same or similar power profile. In some such embodiments, the interconnected devices 100 can operate synchronously with each other to provide interconnection services to the processing devices 103 and / or client devices 109 according to a common power profile.

[0110] As described herein, the power profile may specify two or more time periods. Each time period may be associated with a specific threshold. Each threshold may be a power threshold or a bandwidth threshold. In some embodiments, the received power profile may include a reception interval time (e.g., 1 second), a pulse length representing a high bandwidth (or power) pulse (e.g., 50 milliseconds), a first (or high) threshold amount, and a second (or low) threshold amount. It should be understood that any numbers provided herein regarding durations and thresholds are for illustrative purposes only and should not be considered as limiting in any way.

[0111] The power profile may be one of a plurality of power profiles. For example, the interconnect device 100 may receive a plurality of power profiles from one or more processing devices 103 and / or client devices 109. In some embodiments, each of the plurality of power profiles may be associated with a corresponding application, a corresponding service, a corresponding flow, a corresponding destination device, or a corresponding source device. In other embodiments, each power profile may not be associated with any particular application, service, flow, or device.

[0112] In some embodiments, the interconnect device 100 can be enabled to aggregate multiple received power profiles. In such embodiments, the interconnect device 100 can determine a threshold to apply based on the aggregated multiple power profiles. For example, the interconnect device 100 can use a summation operation to calculate the sum of the upper threshold and / or lower threshold, calculate the average of the upper threshold and / or lower threshold, select the maximum and / or minimum of the upper threshold and / or lower threshold, or otherwise create an aggregate power profile based on the received thresholds.

[0113] At 506, the interconnect device may monitor one or more of ingress bandwidth and power consumption. Monitoring ingress bandwidth as described herein may involve measuring the rate at which data packets enter the interconnect device 100 via one or more ingress ports 203. In some embodiments, bandwidth may be measured on a per-port basis, and the per-port bandwidth measurements may be aggregated to arrive at an overall ingress bandwidth. Figure 3 As shown, in some embodiments, bandwidth measurement can occur at some point between the ingress processing circuitry 303 and the shared buffer circuitry 318. For example, a packet can be sent from the decryption engine circuitry 309 of the ingress processing circuitry 303 associated with a particular port to the shared buffer circuitry 318. The power analyzer controller 336 can use the bandwidth measurement component 315 to track bandwidth. However, it should be understood that bandwidth measurement can occur at other locations along the path that the data takes as it passes through the interconnect device 100.

[0114] Monitoring bandwidth may be accomplished by sampling the data flow at one or more points in the interconnect device 100 at regular intervals (e.g., every millisecond), tracking the real-time bandwidth of each ingress port 203, using statistical sampling, or any other method to determine or estimate the rate at which data passes through the interconnect device 100.

[0115] As described herein, monitoring power consumption may involve the power analyzer controller 336 reading data from the power sensor 221, as described above. For example, the power sensor 221 may be a current sensor, a voltage sensor, a power meter, or other device, and may be used to determine the amperage of current drawn by the interconnect device 100 at any given time. Similar to the measurement bandwidth described above, the power sensor 221 may be read at certain intervals or in real time. In some embodiments, the power analyzer controller 336 may be configured to determine a moving average power consumption, or may simply monitor actual power consumption over time.

[0116] In some embodiments, determining a moving average of power consumption may involve calculating the average power usage over a specific time period or time window. The time window may be microseconds, milliseconds, seconds, minutes, or even longer, depending on configuration settings. The power sensor 221 may be configured to collect continuous or periodic readings of power consumption. The power consumption readings may then be summed and divided based on the time window to calculate an average. The moving average may be recalculated periodically, for example, each time the power sensor 221 adds a new data point.

[0117] While the systems and methods described herein are described as including monitoring bandwidth and / or power consumption, it should be understood that in some embodiments, other resources may be monitored in addition to or in lieu of bandwidth and power consumption. Such resources may include, for example, packet rate, buffer utilization, queue length, and / or any other type of resource that may be monitored in a device. The systems and methods described herein regarding the use of monitored bandwidth and / or power consumption may be implemented in a manner that also includes monitoring any other such resource in addition to or in addition to bandwidth and / or power consumption.

[0118] In some embodiments, the power analyzer controller 336 or the processing circuitry 209 can be enabled to correlate power consumption with bandwidth. As described above, since processing any given packet passing through the interconnect device 100 consumes power, the power consumption of the interconnect device can be used to determine or estimate the current bandwidth of the data currently passing through the interconnect device 100. In some embodiments, the power-to-bandwidth correlation can be a configuration setting written to the interconnect device 100 by another device (e.g., the client device 109). The power-to-bandwidth correlation data 218 can be stored in the memory 212 of the interconnect device 100. In some embodiments, the interconnect device 100 can update the power-to-bandwidth correlation data 218 over time as the interconnect device 100 collects more data (e.g., power consumption readings and bandwidth measurements) to address power leakage issues.

[0119] Using the power-to-bandwidth correlation data 218, the interconnect device can convert bandwidth thresholds into power thresholds, and vice versa. For example, the power-to-bandwidth correlation data 218 can be a linear function, where power and bandwidth are positively correlated or directly related. As the power consumption of the interconnect device 100 increases, the bandwidth of the data passing through the interconnect device 100 increases at the same rate or has a linear relationship with the power consumption. It should be understood that in some embodiments, bandwidth can have an exponential or other type of predictable relationship with power consumption.

[0120] At 509, the power analyzer controller 336 can determine whether the ingress bandwidth exceeds a bandwidth threshold and / or whether the power consumption of the interconnect device 100 exceeds a power threshold. The bandwidth threshold and / or the power threshold compared to the current bandwidth and / or power consumption measurement can be based on the currently effective power profile. For example, the power analyzer controller 336 can alternate between two or more thresholds over time based on the power profile. In some embodiments, alternating between thresholds can include switching between different distribution shapers 342. For example, a first distribution shaper 342 can be configured to throttle traffic above a first threshold, while a second distribution shaper 342 can be configured to throttle traffic above a second threshold. The power analyzer controller 336 can be enabled to switch the distribution shaper 342 in effect over time based on the power profile.

[0121] In some embodiments, the power threshold can be set as a percentage of a maximum power consumption. The maximum power consumption can be a physical limitation or a level set by a consumer or other user of the interconnected device 100.

[0122] In some embodiments, different power profiles and / or thresholds may be applied to different queues. For example, a first power profile may be applied to a queue designated as high priority and may allow such queue to have a relatively large bandwidth and / or power consumption, while a second power profile may be applied to a queue designated as low priority and may allow such low priority queue to have a relatively small bandwidth and / or power consumption. It should be understood that in the interconnect device 100, different power profiles may be in effect at any given time, and each power profile may be applied to one or more specific queues to provide greater system flexibility and reduce overall power consumption without affecting all flows and / or all queues passing through the interconnect device 100.

[0123] Furthermore, in some embodiments, different power profiles may be effective for different applications utilizing the interconnect device 100. For example, one or more processing devices 103 may execute multiple applications that involve transmitting data via the interconnect device 100. Each such application may be associated with a particular power profile. The interconnect device 100 may be enabled to simultaneously implement each power profile associated with each application, enabling the interconnect device 100 to provide the required bandwidth and / or power consumption for each application as needed.

[0124] At 512 , if the ingress bandwidth exceeds a bandwidth threshold and / or the power consumption exceeds a power threshold, the power analyzer controller 336 may use the distribution shaper 342 to limit data passing through the interconnect device 100 and, in effect, limit the power consumption of the interconnect device 100 .

[0125] For example, during a first time period indicated by the power profile, the profile shaper 342 may limit the outgoing processing of packets upon determining that the ingress bandwidth or power consumption exceeds a threshold. In some embodiments, limiting the outgoing processing of packets may involve storing the ingress packets in a shared buffer but delaying the scheduling of the outgoing packets. However, it should be understood that other methods of limiting the outgoing processing of packets may be implemented. In some embodiments, limiting the outgoing processing may include stopping the outgoing processing of packets, while in other embodiments, limiting the outgoing processing may include capping the outgoing bandwidth at a limited rate. In some embodiments, limiting the outgoing processing of packets may include throttling the traffic or dropping the packets.

[0126] Because the bandwidth and / or power consumption of the interconnect device 100 is throttled based on a specific power profile, the power consumed by the interconnect device 100 can be limited. Figure 1 As shown, power can be transferred from the interconnect device 100 to the processing device 103. Because the power profile of the interconnect device 100 allows for greater power consumption by the interconnect device 100, the power consumption of the processing device 103 can be expected to decrease as the processing device 103 awaits information from the interconnect device 100. During this time, power supplied to the processing device 103 by the power supply device 106 can be transferred to the interconnect device 100. In some embodiments, the power supply device 106 can be controlled by a controller device or the interconnect device 100 to synchronize the power supplied to the interconnect device 100 with one or more power profiles enforced by the interconnect device 100.

[0127] In some embodiments, when the interconnect device 100 receives power from a power supply device 106 that is shared by one or more other interconnect devices 100 and / or processing devices 103, the power consumption threshold of the interconnect device 100 can be associated with the amount of power consumed by the interconnect device 100 from the power supply 106. The power analysis performed by the interconnect device 100 can be on a per-power rail basis. If the interconnect device 100 includes two or more power rails, the power analysis system of the interconnect device 100 can take the additional power rails into account, for example, by adjusting the amount of power consumed from each rail separately.

[0128] Although the description provided herein refers to limiting the egress of packets, it should be understood that the bandwidth of data passing through the interconnect device 100 can be limited at any point in the interconnect device 100, whether in the ingress circuitry, the egress circuitry, or at a point between ingress and egress.

[0129] At the end of the first time period, the power analyzer controller 336 can change the threshold value in effect based on the effective power profile. Changing the threshold value can include switching the profile shaper 342 to a different profile shaper 342, where each profile shaper 342 is configured based on a specific bandwidth or power threshold, or changing the threshold value can include instructing the profile shaper 342 to change the threshold value. In some embodiments, a single profile shaper 342 can be capable of enforcing various threshold values. For example, the profile shaper 342 can be capable of limiting the amount of data that is passed using any one or more of a plurality of different threshold values.

[0130] To provide Figure 5 For additional explanation of the method 500 described above, consider an interconnect device 100 receiving a power profile. The example power profile includes a one-second interval and a fifty-millisecond high-bandwidth period. Based on the power profile, the interconnect device 100 compares the ingress bandwidth to a high-bandwidth threshold during the first 50 milliseconds of the one-second interval and compares the ingress bandwidth to a low-bandwidth threshold during the remaining 950 milliseconds of the one-second interval. The example power profile includes data indicating a high-bandwidth threshold of 26 Tbps and a low-bandwidth threshold of 5.6 Tbps.

[0131] After receiving the power profile, the interconnect device 100 can use a clock or clock signal to apply a high bandwidth threshold for the first 50 milliseconds of the one-second interval and a low bandwidth threshold for the remaining 950 milliseconds of the one-second interval. The interconnect device 100 can monitor the ingress bandwidth and compare the ingress bandwidth to the high bandwidth threshold or the low bandwidth threshold based on the clock. If the monitored ingress bandwidth exceeds the effective threshold, the egress bandwidth can be throttled to reduce or maintain the power consumption of the interconnect device 100.

[0132] As an example of a power profile that indicates a power threshold rather than a bandwidth threshold, consider interconnect device 100 receiving a power profile that includes a one-second interval and a fifty-millisecond high power consumption period. According to the power profile, interconnect device 100 compares power consumption to a high power consumption threshold during the first fifty milliseconds of the one-second interval and to a low power consumption threshold during the remaining 950 milliseconds of the one-second interval. The example power profile includes data indicating a high power consumption threshold of 26 watts and a low bandwidth threshold of 5.6 watts.

[0133] After receiving the power profile, the interconnect device 100 can use a clock or clock signal to apply a high power consumption threshold for the first 50 milliseconds of the one-second interval and a low power consumption threshold for the remaining 950 milliseconds of the one-second interval. The interconnect device 100 can monitor power consumption and compare the power consumption to the high power consumption threshold or the low power consumption threshold based on the clock. If the monitored power consumption exceeds the effective threshold, the egress bandwidth can be throttled to reduce or maintain the power consumption of the interconnect device 100.

[0134] In some embodiments, the interconnect device 100 can be enabled to convert a power consumption threshold into a bandwidth threshold or to convert a monitored ingress bandwidth into a power consumption estimate. For example, as described above, the interconnect can be enabled to correlate power consumption with bandwidth. In some embodiments, the interconnect device 100 can store a lookup table with power and bandwidth correlation data. The interconnect device can be enabled to convert a bandwidth threshold into a power consumption threshold or to convert a bandwidth measurement into a power consumption estimate.

[0135] In some embodiments, the interconnect device 100 as described herein may be able to update the threshold of the power profile over time using a control loop. Although it can be expected that the ratio of power consumption to bandwidth is based on a direct correlation, certain circumstances may affect this ratio. For example, atmospheric temperature may result in higher power consumption at lower bandwidths. By measuring actual power consumption (e.g., by using a current sensor), the interconnect device may be able to compensate for a specific power profile to account for temperature changes. For example, the interconnect device 100 may increase or decrease the threshold of a given power profile when a higher temperature is detected. Other factors may also affect the power-to-bandwidth ratio, such as packet size. In some scenarios, larger packets reduce the power-to-bandwidth ratio, while smaller packets increase the power-to-bandwidth ratio because larger packets reduce the amount of ingress and / or egress processing required for a given number of bits to pass through the interconnect device. To compensate for any such factors, a feedback loop may be implemented in which the interconnect device can measure actual power consumption and update the power profile over time to be more accurate.

[0136] This disclosure covers less than Figure 5 (and the corresponding description of method 500), and including all steps identified in Figure 5The present disclosure also encompasses methods comprising one or more steps of the methods described herein and one or more steps of any other methods described herein.

[0137] Specific details are given in the description to provide a thorough understanding of the embodiments. However, one of ordinary skill in the art will understand that the embodiments can be practiced without these specific details. In other cases, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail to avoid obscuring the embodiments.

[0138] Although exemplary embodiments of the present disclosure have been described in detail herein, it should be understood that the concepts of the present disclosure may be embodied and used in various other ways, and the appended claims are intended to be interpreted to include such variations unless limited by the prior art. It should be understood that any feature described herein may be claimed in combination with any other feature described herein, whether or not such features are from the same described embodiment.

Claims

1. A system comprising one or more circuits configured to: Received power distribution; monitoring one or more of data passing through the system and power consumption of the system; and During the first period: determining at least one of an ingress bandwidth exceeding a first bandwidth threshold and the power consumption exceeding a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile; and In response to determining that the ingress bandwidth exceeds the first bandwidth threshold and the power consumption exceeds the first power threshold, one or more of the data passing through the system and the power consumption of the system is restricted.

2. The system of claim 1 , wherein monitoring the data passing through the system comprises: One or more of bandwidth, packet rate, buffer utilization, and queue length are monitored.

3. The system of claim 1 , wherein the one or more circuits are further configured to: correlate the monitored data with the power consumption of the system through the system, and adjust one or more of the first power threshold and the first bandwidth threshold based on the correlation to address power leakage. 4 . The system of claim 1 , wherein the one or more circuits are further configured to update one or more of the first power threshold and the first bandwidth threshold based on a correlation of monitored data with the power consumption of the system by the system.

5. The system of claim 1 , wherein limiting the one or more of the data passing through the system and the power consumption of the system comprises: Limit one or more of ingress bandwidth and egress bandwidth. The system of claim 1 , wherein the first power threshold indicates a user-defined power consumption limit.

7. The system of claim 6, wherein the system receives power from a power supply shared by one or more interconnected devices and a processing device, wherein the power consumption limit is associated with an amount of power consumed by the system from the power supply.

8. The system of claim 1, wherein the first bandwidth threshold indicates a user-defined bandwidth limit.

9. The system of claim 8, wherein the one or more circuits are further configured to determine a power requirement based on the bandwidth limit.

10. The system of claim 1, wherein the one or more circuits are further configured to measure one or more of current and voltage and calculate a moving average power consumption.

11. The system of claim 1 , wherein the one or more circuits are further configured to: during a second time period, determining at least one of the ingress bandwidth exceeding a second bandwidth threshold and the power consumption exceeding a second power threshold, wherein at least one of the second bandwidth threshold and the second power threshold is defined in the power profile; and In response to determining at least one of the ingress bandwidth exceeds the second bandwidth threshold and the power consumption exceeds the second power threshold, egress of packets is restricted.

12. The system of claim 11, wherein at least one of the first bandwidth thresholds is greater than the second bandwidth threshold and the at least one of the first power thresholds is greater than the second power threshold.

13. The system of claim 11, wherein a duration of the first time period is less than a duration of the second time period.

14. The system of claim 11, wherein the shaper circuit determines that the ingress bandwidth exceeds the first bandwidth threshold and the power consumption exceeds the first power threshold and determines that the ingress bandwidth exceeds the second bandwidth threshold and the power consumption exceeds the second power threshold.

15. The system of claim 1, wherein limiting outflow of packets comprises: One or more of throttling traffic and dropping packets.

16. The system of claim 1, wherein the power profile specifies two or more time periods, wherein the first time period is associated with one or more of the first bandwidth threshold and the first power threshold, and the second time period is associated with one or more of a second bandwidth threshold and a second power threshold.

17. The system of claim 1, wherein the one or more circuits are further configured to monitor temperature and adjust one or more of the first bandwidth threshold and the first power threshold based on the temperature.

18. The system of claim 1 , wherein the power profile is one of a plurality of power profiles and each of the plurality of power profiles is associated with a corresponding application, wherein the one or more circuits are further configured to aggregate the plurality of power profiles and determine one or more of the first bandwidth threshold and the first power threshold based on the aggregated plurality of power profiles.

19. A method comprising: Received power distribution; monitoring one or more of data passing through a system and power consumption of the system; as well as During the first period: determining at least one of an ingress bandwidth exceeding a first bandwidth threshold and the power consumption exceeding a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile; as well as In response to determining that the ingress bandwidth exceeds the first bandwidth threshold and the power consumption exceeds the first power threshold, one or more of the data passing through the system and the power consumption of the system is restricted.

20. A switch comprising: one or more ports; as well as A power distribution controller, wherein the power distribution controller is used to: Received power distribution; monitoring one or more of data passing through the switch and power consumption of the switch; and During the first period: determining at least one of an ingress bandwidth exceeding a first bandwidth threshold and the power consumption exceeding a first power threshold, wherein at least one of the first bandwidth threshold and the first power threshold is defined in the power profile; as well as In response to determining that the ingress bandwidth exceeds the first bandwidth threshold and the power consumption exceeds the first power threshold, one or more of passage of the data through the switch and the power consumption of the switch is limited.

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