Display panel and electronic device including the same

Abstract

The invention relates to a display panel and an electronic device including the same. The display panel comprises a substrate, wherein the substrate comprises a first area, a second area and a third area between the first area and the second area; a display element disposed in the second area and including a pixel electrode, an opposite electrode, and an intermediate layer; a multilayer film disposed between the substrate and the pixel electrode, and including an organic insulating layer and an inorganic layer on the organic insulating layer; and at least one groove formed in the multilayer film and disposed in the third region, wherein the at least one organic material layer is included in the intermediate layer and broken by the at least one groove.

Description

[0001] Description of the case

[0002] This application is a divisional application of the invention patent application with an application date of January 17, 2020, national application number 202010050060.X, and invention name “Display Panel”.

[0003] CROSS-REFERENCE TO RELATED APPLICATIONS

[0004] This application claims the benefit of Korean Patent Application No. 10-2019-0006924, filed on January 18, 2019, and Korean Patent Application No. 10-2019-0053907, filed on May 8, 2019, in the Korean Intellectual Property Office, the entire contents of each of which are incorporated herein by reference. Technical Field

[0005] One or more aspects of embodiments of the present disclosure relate to a display panel including a first region inside a display area, and a display device including the display panel. Background Art

[0006] Recently, the purposes of display devices have become more diverse. Also, as display devices become thinner and lighter, their scope of use has gradually expanded.

[0007] As the display area of ​​a display device increases, functions that can be combined or associated with the display device are added. As a way of adding various functions while increasing the display area, research on a display device in which various elements can be arranged in the display area is underway. Summary of the Invention

[0008] One or more aspects of embodiments of the present disclosure relate to a display panel including a first region and a display device including the display panel, wherein the first region can be used for various purposes, such as an area for arranging various components within the display area. However, it should be understood that the embodiments described herein are to be considered merely illustrative and not intended to limit the present disclosure.

[0009] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments.

[0010] According to one or more embodiments, a display panel includes: a substrate including a first region in which a through hole is formed, and a second region and a third region, the third region being between the first region and the second region; a display element, the display element being arranged in the second region and including a pixel electrode, a relative electrode, and an intermediate layer, the intermediate layer being between the pixel electrode and the relative electrode; a multilayer film, the multilayer film being between the substrate and the pixel electrode and including an organic insulating layer and an inorganic layer on the organic insulating layer; and at least one groove, the at least one groove being formed in the multilayer film and in the third region, wherein at least one organic material layer included in the intermediate layer is disconnected by the at least one groove.

[0011] The inorganic layer may include at least one of a metal layer or an inorganic insulating layer.

[0012] The display panel may further include a pixel circuit including a thin film transistor and a storage capacitor each electrically connected to the display element, wherein the inorganic layer may include the same material as a contact metal layer connecting the pixel circuit and the thin film transistor.

[0013] The at least one organic material layer may include one or more selected from the group consisting of a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

[0014] The organic insulating layer may include at least one opening adjacent to the groove, and the inorganic layer may directly contact the lower layer disposed below the organic insulating layer through the at least one opening.

[0015] The at least one opening of the organic insulating layer may include a first opening and a second opening, at least one groove is between the first opening and the second opening, and the inorganic layer may directly contact the lower layer through the first opening and the second opening.

[0016] The lower layer may include an inorganic insulating layer.

[0017] The lower layer may include a metal layer.

[0018] The lower layer may include the same material as that of the inorganic layer.

[0019] The at least one groove may include: a first hole defined in the inorganic layer; and a second hole or recess defined in the organic insulating layer.

[0020] The multi-layer film may include at least one lower insulating layer disposed below the organic insulating layer, the at least one lower insulating layer including an inorganic insulating layer.

[0021] A bottom surface of the at least one groove may be disposed on a virtual surface between a top surface of the substrate and a top surface of the at least one lower insulating layer.

[0022] The at least one lower insulating layer may have an opening overlapping with the at least one groove.

[0023] The multi-layer film may further include at least one top insulating layer disposed on the organic insulating layer, the at least one top insulating layer including a hole overlapping the at least one groove.

[0024] At least one top insulating layer may cover a side of the inorganic layer defining the at least one groove.

[0025] According to one or more embodiments, a display panel includes: a substrate including a first region, a second region in which pixels are arranged, and a third region between the first region and the second region; a thin film transistor arranged in the second region; a multilayer film, the multilayer film being arranged in the third region and including an organic insulating layer and an inorganic layer, a portion of the organic insulating layer covering the thin film transistor, and the inorganic layer being on the organic insulating layer; at least one groove defined in the multilayer film; and a stack arranged on the multilayer film and including a pixel electrode, a relative electrode, and an intermediate layer, the pixel electrode corresponding to the pixel, and the intermediate layer between the pixel electrode and the relative electrode, wherein the intermediate layer may include at least one organic material layer disconnected around at least one groove.

[0026] At least one groove may have an undercut shape.

[0027] The inorganic layer of the multilayer film may include at least one of a metal or an inorganic insulating material.

[0028] The at least one organic material layer may include one or more selected from the group consisting of a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

[0029] The third region may include an inorganic contact region adjacent to the at least one trench.

[0030] The organic insulating layer may include at least one opening disposed in the third region and adjacent to the at least one groove, and the inorganic layer may define an inorganic contact region by directly contacting a lower inorganic layer disposed below the organic insulating layer through the at least one opening.

[0031] The lower inorganic layer may include an inorganic insulating layer.

[0032] The lower inorganic layer may include a metal layer.

[0033] The at least one trench may include a first trench and a second trench separated from each other, and the inorganic contact region may be between the first trench and the second trench.

[0034] The multilayer film may further include at least one top insulating layer disposed on the inorganic layer, and the at least one top insulating layer may include a hole corresponding to the at least one groove.

[0035] At least one top insulating layer may cover a side of an end of the inorganic layer facing a center of the at least one trench.

[0036] The at least one top insulating layer may include at least one of an organic insulating layer or an inorganic insulating layer.

[0037] The at least one groove may include a first hole defined in the inorganic layer; and a second hole or recess defined in the organic insulating layer.

[0038] The multi-layer film may include at least one lower insulating layer disposed below the organic insulating layer, the at least one lower insulating layer including an inorganic insulating layer.

[0039] The at least one lower insulating layer may have an opening overlapping with the at least one groove.

[0040] These and / or other aspects will become apparent and more readily appreciated from the following description of the embodiments taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] These and / or other aspects will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings, in which:

[0042] Figure 1 is a perspective view of a display device according to an embodiment;

[0043] Figure 2A and Figure 2B is a cross-sectional view of a display device according to an embodiment;

[0044] Figures 3A-3D is a cross-sectional view of a display panel according to an embodiment;

[0045] Figures 4A-4D is a cross-sectional view of a display panel according to another embodiment;

[0046] Figure 5 is a plan view of a display panel according to an embodiment;

[0047] Figure 6 is an equivalent circuit diagram of one of the pixels of the display panel according to the embodiment;

[0048] Figure 7 is a plan view of a portion of a display panel according to an embodiment;

[0049] Figure 8 is a cross-sectional view of a display panel according to an embodiment;

[0050] Figures 9A-9D is a cross-sectional view of actions of a process for manufacturing a display panel according to an embodiment;

[0051] Figure 10A is a cross-sectional view of a middle area of ​​a display panel according to another embodiment;

[0052] Figure 10B is a cross-sectional view of a middle area of ​​a display panel according to another embodiment;

[0053] Figure 11A 、 Figure 11B and Figure 11C is a cross-sectional view of actions of a process for manufacturing a display panel according to an embodiment;

[0054] Figure 12 is a cross-sectional view of a middle area of ​​a display panel according to another embodiment;

[0055] Figure 13A and Figure 13B is a cross-sectional view of actions of a process for manufacturing a display panel according to an embodiment;

[0056] Figure 14 is a cross-sectional view of a middle area of ​​a display panel according to another embodiment;

[0057] Figure 15A and Figures 15D-15F is a cross-sectional view of actions of a process for manufacturing a display panel according to an embodiment;

[0058] Figure 15B and Figure 15C It is modified Figure 15A A cross-sectional view of an embodiment of

[0059] Figure 15G The basis for modification Figure 15F A cross-sectional view of an embodiment of a display panel;

[0060] Figure 16 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0061] Figure 17 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0062] Figure 18 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0063] Figure 19 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0064] Figure 20 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0065] Figure 21 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0066] Figure 22 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0067] Figure 23 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0068] Figure 24 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0069] Figure 25 is a cross-sectional view of a display panel according to another embodiment;

[0070] Figure 26 is a cross-sectional view of a display panel according to another embodiment;

[0071] Figure 27 is a cross-sectional view of a display panel according to another embodiment;

[0072] Figure 28 is a cross-sectional view of a display panel according to another embodiment;

[0073] Figure 29 is a cross-sectional view of a display panel according to another embodiment; and

[0074] Figure 30 is a cross-sectional view of a display panel according to another embodiment. DETAILED DESCRIPTION

[0075] The embodiments shown in the accompanying drawings will now be described in more detail with reference to the examples, wherein the same reference numerals refer to the same elements throughout. In this regard, the present embodiments may have different forms and should not be construed as being limited to the description set forth herein. Therefore, the embodiments will be described below solely with reference to the accompanying drawings to explain aspects of the present description. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. In this specification, "A and / or B" represents A or B, or A and B. Throughout the disclosure, the expression "at least one of a, b or c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or variations thereof. In addition, when describing embodiments of the present invention, the use of "may" refers to "one or more embodiments of the present invention."

[0076] Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are shown. When describing with reference to the accompanying drawings, the same reference numerals in the drawings indicate the same or corresponding elements, and repeated description thereof will not be provided.

[0077] It should be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another.

[0078] As used herein, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0079] It will be further understood that the terms “comprises,” “includes,” “comprising,” and / or “including” used herein indicate the presence of recited features or components, but do not preclude the presence or addition of one or more other features or components.

[0080] It should be understood that when a layer, region, or component is referred to as being “formed on” or “on” another layer, region, or component, it can be formed directly or indirectly on the other layer, region, or component. That is, for example, intervening layers, regions, or components may be present. In contrast, when a layer, region, or component is referred to as being “formed directly on” or “directly on” another layer, region, or component, there may be no intervening layers, regions, or components.

[0081] For the convenience of explanation, the size of the elements in the drawings may be exaggerated. In other words, since the size and thickness of the components in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.

[0082] When a certain embodiment can be implemented differently, the specific process order can be performed differently from the described order. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of the described order.

[0083] It should be understood that when a layer, region, or component is referred to as being “connected” to another layer, region, or component, it may be “directly connected” to the other layer, region, or component, or it may be “indirectly connected” to the other layer, region, or component with other layers, regions, or components interposed therebetween. For example, it should be understood that when a layer, region, or component is referred to as being “connected or electrically connected” to another layer, region, or component, it may be “directly electrically connected” to the other layer, region, or component, or it may be “indirectly connected or indirectly electrically connected” to the other layer, region, or component with other layers, regions, or components interposed therebetween.

[0084] Figure 1 is a perspective view of a display device 1 according to an embodiment.

[0085] refer to Figure 1The display device 1 includes a first area OA and a display area DA (which may be referred to herein as a second area) at least partially surrounding the first area OA. The display device 1 can provide a predetermined (or set) image by using light emitted from a plurality of pixels arranged in the display area DA. Figure 1 2 , one first area OA is disposed inside the display area DA, and the first area OA may be entirely surrounded by the display area DA. The first area OA may be an area in which components to be described below with reference to FIG.

[0086] The middle area MA may be arranged as a third area between the first area OA and the display area DA, which is the second area. The display area DA may be surrounded by the peripheral area PA, which is the fourth area. The middle area MA and the peripheral area PA may be non-display areas in which no pixels are arranged. The middle area MA may be entirely surrounded by the display area DA, and the display area DA may be entirely surrounded by the peripheral area PA (for example, the peripheral area PA may completely surround the display area DA).

[0087] Hereinafter, although an organic light emitting display device is exemplarily described as the display device 1 according to an embodiment, the display device 1 is not limited thereto. In another embodiment, a display device such as a quantum dot light emitting display may be used.

[0088] Although Figure 1 , a first area OA is provided and is generally circular, but the present disclosure is not limited thereto. The number of first areas OA may be two or more, and the shape of each first area OA may be circular, elliptical, polygonal, star-shaped, and / or diamond-shaped, and may be modified variously.

[0089] Although Figure 1 In the embodiment shown in FIG. 1 , the first area OA is arranged on the upper left side of the display area DA, but the present disclosure is not limited thereto. In other embodiments, the first area OA may be arranged on the upper right side, lower left side, lower right side, or center (e.g., the upper center of the display area DA) of the display area DA without limitation. Figure 1 In the figure, the display area DA has a substantially rectangular shape, but the present disclosure is not limited thereto. The shape of the display area DA may be a circular shape, an elliptical shape, a polygonal shape, a star shape, and / or a diamond shape, and may be modified variously.

[0090] Figure 2A and Figure 2B It is along Figure 1 1 is a cross-sectional view of the display device 1 according to the embodiment taken along line II-II′.

[0091] refer to Figure 2AThe display device 1 may include a display panel 10, an input sensing layer 40 and an optical functional layer 50 disposed on the display panel 10. These layers may be covered by a window 60. The display device 1 may be included in various electronic devices, such as mobile phones, laptop computers, and / or smart watches.

[0092] The display panel 10 can display images. The display panel 10 includes pixels arranged in a display area DA. Each pixel may include a display element and a pixel circuit connected to the display element. The display element may include an organic light emitting diode and / or a quantum dot light emitting diode.

[0093] The input sensing layer 40 obtains coordinate information corresponding to external input, such as a touch event. The input sensing layer 40 may include sensing electrodes (or touch electrodes) and traces connected to the sensing electrodes. The input sensing layer 40 may be arranged on the display panel 10. The input sensing layer 40 may sense external input using a mutual capacitance method and / or a self-capacitance method.

[0094] The input sensing layer 40 may be formed directly on the display panel 10, or may be formed separately and then coupled to the display panel 10 by using an adhesive layer, such as an optically clear adhesive. For example, the input sensing layer 40 may be formed sequentially after the process of forming the display panel 10. In this case, the input sensing layer 40 may be part of the display panel 10, and the adhesive layer may not be disposed between the input sensing layer 40 and the display panel 10. Although Figure 2A In the illustrated embodiment, the input sensing layer 40 is disposed between the display panel 10 and the optical functional layer 50 . However, in another embodiment, the input sensing layer 40 may be disposed on the optical functional layer 50 .

[0095] The optical functional layer 50 may include a reflection prevention layer. The reflection prevention layer may reduce the reflectivity of light (external light) incident from the outside toward the display panel 10 through the window 60. The reflection prevention layer may include a retarder and a polarizer. The retarder may include a film retarder or a liquid crystal retarder. The retarder may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may include a film polarizer or a liquid crystal polarizer. The film polarizer may include a stretchable synthetic resin film, and the liquid crystal polarizer may include liquid crystals arranged in a predetermined (or set) arrangement. Each of the retarder and the polarizer may further include a protective film. The protective film of the retarder and the polarizer may be defined as a base layer of the reflection prevention layer.

[0096] In one or more embodiments, the anti-reflection layer may include a black matrix and a color filter. The color filter may be arranged by considering the color of light emitted from each pixel of the display panel 10. In another embodiment, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer arranged on different layers. The first reflected light and the second reflected light reflected by the first reflective layer and the second reflective layer, respectively, may generate destructive interference, thereby reducing the reflectivity of external light.

[0097] The optical function layer 50 may include a lens layer. The lens layer may improve the emission efficiency of light emitted from the display panel 10 or reduce color deviation of the light. The lens layer may include a layer having a concave lens shape or a convex lens shape and / or include multiple layers having different refractive indices. The optical function layer 50 may include both an anti-reflection layer and a lens layer, or include only one of the anti-reflection layer and the lens layer.

[0098] In one or more embodiments, the optical function layer 50 may be formed after forming the display panel 10 and / or the input sensing layer 40. In this case, no adhesive layer may be disposed between the optical function layer 50 and the input sensing layer 40 and / or the display panel 10.

[0099] The display panel 10, the input sensing layer 40 and / or the optical functional layer 50 may include openings (holes or through holes). Figure 2A , the display panel 10, the input sensing layer 40, and the optical function layer 50 include first to third openings 10H, 40H, and 50H, respectively, and the first to third openings 10H, 40H, and 50H overlap with each other. The first opening 10H may pass through the uppermost surface to the lowermost surface of the display panel 10, the second opening 40H may pass through the uppermost surface to the lowermost surface of the input sensing layer 40, and the third opening 50H may pass through the uppermost surface to the lowermost surface of the optical function layer 50. The first to third openings 10H, 40H, and 50H are set to correspond to the first area OA. In one or more embodiments, at least one selected from the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. For example, one or two selected from the display panel 10, the input sensing layer 40, and the optical function layer 50 may not include an opening. For example, as Figure 2B As shown in FIG. 5 , the display panel 10 , the input sensing layer 40 , and the optical function layer 50 may not include openings.

[0100] The first area OA may be a component area where components 20 for adding various functions to the display device 1 are disposed (eg, components such as sensors, cameras, speakers, etc.). Figure 2A As shown in FIG. 1 , the component 20 may be disposed in the first to third openings 10H, 40H, and 50H. Figure 2BAs shown in FIG. 1 , the component 20 may be disposed below the display panel 10 .

[0101] The component 20 may include an electronic component. For example, the component 20 may include an electronic component that uses light or sound. For example, the electronic component may be a sensor that emits and / or receives light, such as an infrared sensor, a camera that receives light and captures an image, a sensor that outputs and senses light or sound to measure distance or recognize a fingerprint, a small lamp that outputs light, or a speaker that outputs sound. The electronic component that uses light can use light of various wavelength bands, such as visible light, infrared light, and / or ultraviolet light. In one or more embodiments, the first area OA may be a transmission area, and light and / or sound output from the component 20 to the outside or transmitted from the outside toward the electronic component may pass through the transmission area.

[0102] In one or more embodiments, when the display device 1 is used as a smartwatch or an instrument panel for an automobile, the component 20 may be a member including a clock hand or a hand indicating predetermined (or set) information (e.g., the speed of the vehicle, etc.). When the display device 1 includes the component 20, such as a clock hand and / or an instrument panel for an automobile, the component 20 may be exposed to the outside through the window 60, and the window 60 may include an opening corresponding to the first area OA.

[0103] As described above, assembly 20 may include element(s) related to the functionality of display panel 10, or elements such as accessories that increase the aesthetic appeal of display panel 10. For example, an optically clear adhesive or the like may be provided between window 60 and optically functional layer 50.

[0104] Figures 3A to 3D is a cross-sectional view of a display panel 10 according to one or more embodiments.

[0105] refer to Figure 3A The display panel 10 includes a display layer 200 disposed on a substrate 100. The substrate 100 may include a glass material and / or a polymer resin. The substrate 100 may include (have) a multi-layer structure. For example, Figure 3A As shown in the enlarged view of FIG, the substrate 100 may include a first base layer 101, a first barrier layer 102, a second base layer 103 and a second barrier layer 104.

[0106] Each of the first substrate layer 101 and the second substrate layer 103 may include a polymer resin. For example, each of the first substrate layer 101 and the second substrate layer 103 may include a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), and / or cellulose acetate propionate (CAP). The polymer resin may be transparent.

[0107] The first barrier layer 102 and the second barrier layer 104 are barrier layers that prevent (or reduce) the penetration of external foreign substances, and may include a single layer or a multilayer including an inorganic material such as silicon nitride (SiN x , x>0), silicon oxynitride (SiON) and / or silicon oxide (SiO x , x>0).

[0108] The display layer 200 may include a plurality of pixels. The display layer 200 may include a display element layer 200A and a pixel circuit layer 200B. The display element layer 200A may include display elements arranged in pixels, and the pixel circuit layer 200B may include an insulating layer and a pixel circuit arranged in each pixel. Each pixel circuit may include a thin film transistor and a storage capacitor, and each display element may include an organic light emitting diode.

[0109] The display elements of the display layer 200 may be covered by an encapsulation member, such as a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display panel 10 includes a substrate 100 and a thin film encapsulation layer 300 (the substrate 100 includes a polymer resin, and the thin film encapsulation layer 300 includes an inorganic encapsulation layer and an organic encapsulation layer), the flexibility of the display panel 10 may be improved.

[0110] The display panel 10 may include a first opening 10H passing through the display panel 10. The first opening 10H may be provided in the first area OA (eg, may overlap with the first area OA). In this case, the first area OA may include an opening area. Figure 3A As shown in FIG, the substrate 100 and the thin film encapsulation layer 300 include through holes 100H and 300H, respectively, each corresponding to the first opening 10H of the display panel 10. The display layer 200 may also include a through hole 200H corresponding to the first area OA.

[0111] In one or more embodiments, Figure 3BAs shown in FIG, the substrate 100 may not include a through hole corresponding to the first area OA. The display layer 200 may include a through hole 200H corresponding to the first area OA. The thin film encapsulation layer 300 may not include a through hole corresponding to the first area OA. In one or more embodiments, as Figure 3C As shown in FIG. 2 , the display layer 200 may not include the through hole 200H corresponding to the first area OA, and the display element layer 200A may not be disposed in the first area OA.

[0112] Although Figures 3A to 3C , the display element layer 200A is not arranged in the first area OA, but the present disclosure is not limited thereto. In one or more embodiments, as Figure 3D In the display, the auxiliary display element layer 200C may be disposed in the first area OA. The auxiliary display element layer 200C may include display elements having a structure different from that of the display elements of the display element layer 200A and / or operating in a different manner.

[0113] In one or more embodiments, the display element layer 200A may include pixels, each pixel including an active organic light-emitting diode, and the auxiliary display element layer 200C may include pixels, each pixel including a passive organic light-emitting diode. In the case where the auxiliary display element layer 200C includes a passive organic light-emitting diode as a display element, the elements constituting the pixel circuit below the associated (corresponding) passive organic light-emitting diode may not be present. For example, a portion of the pixel circuit layer 200B below the auxiliary display element layer 200C does not include a transistor and a storage capacitor.

[0114] In one or more embodiments, although the auxiliary display element layer 200C may include a display element (e.g., an active organic light emitting diode) of the same type (or kind) as the display element of the display element layer 200A, the structure of the pixel circuit thereunder may be different. For example, the pixel circuit below the auxiliary display element layer 200C (e.g., a pixel circuit including a light-blocking layer between the substrate and the transistor) may include a structure different from the structure of the pixel circuit below the display element layer 200A. In one or more embodiments, the display element of the auxiliary display element layer 200C may be operated according to a control signal different from the control signal of the display element of the display element layer 200A. Components that do not require relatively high transmittance (e.g., infrared sensors) may be arranged (placed) in the first area OA in which the auxiliary display element layer 200C is arranged. In this case, the first area OA may be understood as (e.g., may be used as) a component area and an auxiliary display area.

[0115] Figures 4A to 4D is a cross-sectional view of a display panel 10' according to one or more embodiments. Figures 3A to 3D The display panel 10 including the thin film encapsulation layer 300 is described differently. Figures 4A to 4D The display panel 10 ′ may include an encapsulation substrate 300A and a sealant 340 .

[0116] like Figures 4A to 4C As shown in FIG, at least one selected from the substrate 100, the display layer 200, and the encapsulation substrate 300A may include through holes 100H, 200H, and 300AH corresponding to the first area OA. The display element layer 200A may not be arranged in the first area OA, or as shown in FIG. Figure 4D The auxiliary display element layer 200C may be arranged in the first area OA. Figure 3D The auxiliary display element layer 200C is described identically.

[0117] Figure 5 is a plan view of a display panel 10 according to one or more embodiments, and Figure 6 is an equivalent circuit diagram of one of the pixels of the display panel 10 according to one or more embodiments.

[0118] refer to Figure 5 , the display panel 10 may include a first area OA, a display area DA (which is a second area), a middle area MA (which is a third area), and a peripheral area PA (which is a fourth area). Figure 5 It can be understood as a diagram of the substrate 100 of the display panel 10. For example, it can be understood that the substrate 100 includes a first area OA, a display area DA, a middle area MA, and a peripheral area PA.

[0119] The display panel 10 includes a plurality of pixels P arranged in a display area DA. Figure 6 As shown in FIG. 1 , each pixel P may include a pixel circuit PC and an organic light emitting diode OLED connected to the pixel circuit PC as a display element. The pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each pixel P may emit, for example, red, green, or blue light, or red, green, blue, or white light through the organic light emitting diode OLED.

[0120] The second thin film transistor T2 is a switching thin film transistor and is connected to the scan line SL and the data line DL, and can transmit the data voltage input from the data line DL to the first thin film transistor T1 in response to the switching voltage input from the scan line SL. The storage capacitor Cst can be connected to the second thin film transistor T2 and the driving voltage line PL, and can store a voltage corresponding to the difference between the voltage transmitted from the second thin film transistor T2 and the first power supply voltage ELVDD supplied to the driving voltage line PL.

[0121] The first thin film transistor T1 is a driving thin film transistor and can be connected to the driving voltage line PL and the storage capacitor Cst. In response to the voltage value stored in the storage capacitor Cst, the first thin film transistor T1 can control the driving current flowing from the driving voltage line PL through the organic light emitting diode OLED. The organic light emitting diode OLED can emit light with a predetermined (or set) brightness by using the driving current. The opposite electrode (e.g., cathode) of the organic light emitting diode OLED can receive the second power supply voltage ELVSS.

[0122] Although Figure 6 , the pixel circuit PC includes two thin film transistors and one storage capacitor, but the present disclosure is not limited thereto. Depending on the design of the pixel circuit PC, the number of thin film transistors and the number of storage capacitors may be modified differently. For example, in addition to the two thin film transistors, the pixel circuit PC may further include four or five or more thin film transistors.

[0123] Reference again Figure 5 , in a plan view, the middle area MA may surround the first area OA. The middle area MA is an area in which display elements, such as organic light emitting diodes OLED, are not arranged. Track lines configured to provide signals to pixels P arranged around the first area OA may cross the middle area MA. A scan driver 1100 configured to provide a scan signal to each pixel P, a data driver 1200 configured to provide a data signal to each pixel P, a main power supply wiring configured to provide a first power supply voltage and a second power supply voltage, etc. may be arranged in the peripheral area PA. Although Figure 5 , the data driver 1200 is adjacent to one side of the substrate 100 , but according to one or more embodiments, the data driver 1200 may be disposed on a flexible printed circuit board (FPCB) electrically connected to a pad disposed on one side of the display panel 10 .

[0124] Figure 7 is a plan view of a portion of the display panel 10 according to one or more embodiments.

[0125] refer to Figure 7 , the pixels P may be arranged around the first area OA in the display area DA. Some pixels P may be spaced apart from each other around the first area OA, and the first area OA may be defined between the pixels P. For example, Figure 7 In a plan view, the pixels P may be spaced apart up and down around the first area OA, or spaced apart left and right around the first area OA.

[0126] A trace line adjacent to the first area OA among trace lines configured to supply signals to the pixels P may circle (or bypass) around the first area OA. Figure 7In a plan view of the display area DA, at least one of the data lines DL crossing the display area DA may extend in the y-direction to provide data signals to pixels P arranged above and below (with the first area OA being between the pixels P arranged above and below), and may detour along an edge of the first area OA in the middle area MA. At least one of the scan lines SL crossing the display area DA may extend in the x-direction to provide scan signals to pixels P arranged below and below (with the first area OA being between the pixels P arranged below and below), and may detour along an edge of the first area OA in the middle area MA.

[0127] The detour portion (detour portion or bypass portion) SL-D of the scan line SL may be arranged on the same layer as the layer on which the extension portion SL-L that traverses the display area DA is arranged, and may be formed as one piece with the extension portion SL-L. The detour portion DL-D1 of at least one of the data lines DL may be arranged on a layer different from the layer on which the extension portion DL-L1 that traverses the display area DA is arranged. The detour portion DL-D1 of the data line DL may be connected to the extension portion DL-L1 through a contact hole. The detour portion DL-D2 of at least one of the data lines DL may be arranged on the same layer as the layer on which the extension portion DL-L2 is arranged, and may be formed as one piece with the extension portion DL-L2.

[0128] One or more grooves G may be arranged between the first area OA and the middle area MA where the scan line SL and the data line DL detour. In a plan view, the groove G may have a ring shape surrounding the first area OA. The grooves G may be spaced apart from each other.

[0129] Figure 8 is a cross-sectional view of a display panel 10-1 according to one or more embodiments, and may correspond to a cross-sectional view taken along Figure 7 A cross section taken along line VIII-VIII'. 9A to 9D is a cross-sectional view of actions of a process of manufacturing the display panel 10 - 1 according to one or more embodiments, and shows the middle area MA.

[0130] refer to Figure 8 In one or more embodiments, the substrate 100 may include a glass material and / or a polymer resin. Figure 3A As shown in the enlarged view of FIG, the substrate 100 may include multiple sub-layers.

[0131] A buffer layer 201 may be provided on the substrate 100. The buffer layer 201 is configured to prevent or block impurities from penetrating into the semiconductor layer "Act" of the thin film transistor TFT. The buffer layer 201 may include an inorganic insulating material (e.g., silicon nitride, silicon oxynitride, and / or silicon oxide) and may include a single layer or multiple layers including the aforementioned inorganic insulating material.

[0132] The pixel circuit PC may be disposed on the buffer layer 201. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Figure 8 The thin film transistor TFT shown in FIG may correspond to the reference Figure 6 The driving thin film transistor described. The data line DL of the pixel circuit PC can be electrically connected to the switching thin film transistor included in the pixel circuit PC. Although the present embodiment shows a top-gate type (or type) thin film transistor in which the gate electrode GE is arranged above the semiconductor layer Act (with the gate insulating layer 203 between the gate electrode GE and the semiconductor layer Act), according to one or more embodiments, the thin film transistor TFT may be a bottom-gate type (or type) thin film transistor.

[0133] The semiconductor layer Act may include polycrystalline silicon. In one or more embodiments, the semiconductor layer Act may include amorphous silicon, an oxide semiconductor, and / or an organic semiconductor. The gate electrode GE may include a low-resistance metal material. The gate electrode GE may include a conductive material such as Mo, Al, Cu, and / or Ti. The gate electrode GE may include a single layer or multiple layers, each of which may include any of the above materials.

[0134] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The gate insulating layer 203 may include a single layer or multiple layers, each of which includes any of the above materials.

[0135] The source electrode SE and the drain electrode DE may be disposed on the same layer as the layer on which the data line DL is disposed, and may include the same material as that of the data line DL. The source electrode SE, the drain electrode DE, and the data line DL may include a material having excellent electrical conductivity. The source electrode SE and the drain electrode DE may include a conductive material including Mo, Al, Cu, and / or Ti. The source electrode SE and the drain electrode DE may include a single layer or multiple layers including any of the above materials. In one or more embodiments, the source electrode SE, the drain electrode DE, and the data line DL may have a multilayer structure of Ti / Al / Ti.

[0136] The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap each other, with the first interlayer insulating layer 205 between the lower electrode CE1 and the upper electrode CE2. The storage capacitor Cst may overlap with the thin film transistor TFT. In this regard, Figure 8, the gate electrode GE of the thin film transistor TFT serves as the lower electrode CE1 of the storage capacitor Cst. In one or more embodiments, the storage capacitor Cst may not overlap with the thin film transistor TFT. The storage capacitor Cst may be covered by the second interlayer insulating layer 207. The upper electrode CE2 of the storage capacitor Cst may include a conductive material including Mo, Al, Cu, and / or Ti, and may include a single layer or multiple layers including any of the above materials.

[0137] The first interlayer insulating layer 205 and the second interlayer insulating layer 207 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 may include a single layer or multiple layers, each of which includes any of the above materials.

[0138] The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst may be covered by the first organic insulating layer 209. The first organic insulating layer 209 may include a substantially (substantially) flat top surface.

[0139] The pixel circuit PC may be electrically connected to the pixel electrode 221. For example, Figure 8 As shown in FIG, a contact metal layer CM may be disposed between the thin film transistor TFT and the pixel electrode 221. The contact metal layer CM may be connected to the thin film transistor TFT via a contact hole formed in the first organic insulating layer 209, and the pixel electrode 221 may be connected to the contact metal layer CM via a contact hole formed in the second organic insulating layer 211. The contact metal layer CM may include a conductive material including Mo, Al, Cu, and / or Ti, and may include a single layer or multiple layers including any of the above materials. In one or more embodiments, the contact metal layer CM may include a multilayer of Ti / Al / Ti.

[0140] The first organic insulating layer 209 and the second organic insulating layer 211 may each independently include an organic insulating material, including a general polymer (e.g., polymethyl methacrylate (PMMA) and / or polystyrene (PS)), a polymer derivative having a phenolic group, an acryl polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, or a blend thereof. In one or more embodiments, the first organic insulating layer 209 and the second organic insulating layer 211 may include polyimide.

[0141] A pixel electrode 221 may be formed on the second organic insulating layer 211. The pixel electrode 221 may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). In one or more embodiments, the pixel electrode 221 may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr and / or compounds thereof. In one or more embodiments, the pixel electrode 221 may further include a layer above and / or below the reflective layer, the layer comprising ITO, IZO, ZnO and / or In2O3.

[0142] A pixel defining layer 215 may be formed on the pixel electrode 221. The pixel defining layer 215 may include an opening that exposes the top surface of the pixel electrode 221 and covers the edge of the pixel electrode 221. The pixel defining layer 215 may include an organic insulating material. In one or more embodiments, the pixel defining layer 215 may include an inorganic insulating material, such as silicon nitride (SiN x ,x>0), silicon oxynitride (SiON) and / or silicon oxide (SiO x , x>0). In one or more embodiments, the pixel defining layer 215 may include an organic insulating material and an inorganic insulating material.

[0143] The intermediate layer 222 includes an emission layer 222b. The intermediate layer 222 may include a first functional layer 222a disposed below the emission layer 222b and / or a second functional layer 222c disposed on the emission layer 222b. The emission layer 222b may include a low molecular weight organic material or a polymer organic material that emits light of a predetermined (or set) color.

[0144] The first functional layer 222a may include a single layer or multiple layers. For example, when the first functional layer 222a includes a polymer organic material, the first functional layer 222a includes a hole transport layer (HTL) having a single layer structure and may include poly-(3,4)-ethylenedihydroxythiophene (PEDOT) and / or polyaniline (PANI). When the first functional layer 222a includes a low molecular weight organic material, the first functional layer 222a may include a hole injection layer (HIL) and / or a hole transport layer (HTL).

[0145] The second functional layer 222c may be omitted. However, when the first functional layer 222a and the emission layer 222b include a polymer organic material, the second functional layer 222c is preferably provided. The second functional layer 222c may be a single layer or a multilayer. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0146] The emission layer 222b of the intermediate layer 222 may be disposed in all pixels in the display area DA. The emission layer 222b may be patterned to correspond to the pixel electrode 221. Unlike the emission layer 222b, the first functional layer 222a and / or the second functional layer 222c of the intermediate layer 222 may extend toward the middle area MA, such that the first functional layer 222a and / or the second functional layer 222c are disposed not only in the display area DA but also in the middle area MA.

[0147] The opposing electrode 223 may be arranged on the second functional layer 222c. The opposing electrode 223 may include a conductive material with a low work function. For example, the opposing electrode 223 may include a (semi) transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca and / or an alloy thereof. In one or more embodiments, the opposing electrode 223 may further include a layer on the (semi) transparent layer comprising any of the above-mentioned materials, the layer comprising ITO, IZO, ZnO and / or In2O3. The opposing electrode 223 may be provided not only in the display area DA but also in the intermediate area MA. The first functional layer 222a, the second functional layer 222c and the opposing electrode 223 may each be independently formed by a thermal deposition method.

[0148] The capping layer 230 may be disposed on the opposite electrode 223. For example, the capping layer 230 may include LiF and may be formed by a thermal deposition method. In one or more embodiments, the capping layer 230 may be omitted.

[0149] The spacer 217 may be provided on the pixel defining layer 215. The spacer 217 may include an organic insulating material such as polyimide. In one or more embodiments, the spacer 217 may include an inorganic insulating material, or include an organic insulating material and an inorganic insulating material.

[0150] The spacer 217 may include a material different from that of the pixel defining layer 215, or may include the same material as that of the pixel defining layer 215. In one or more embodiments, the pixel defining layer 215 and the spacer 217 may include polyimide. The pixel defining layer 215 and the spacer 217 may be formed simultaneously (or in parallel) during a mask process using a halftone mask.

[0151] The organic light emitting diode OLED is covered by a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer. In one or more embodiments, Figure 8, the thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. In one or more embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order may be modified.

[0152] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic materials, such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride and / or silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include a single layer or multiple layers, each of which includes any of the above materials. The organic encapsulation layer 320 may include a polymer material. The polymer material may include an acrylic resin, such as PMMA, polyacrylic acid, epoxy resin, polyimide and / or polyethylene. In one or more embodiments, the organic encapsulation layer 320 may include an acrylate polymer.

[0153] The materials of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be different from each other. For example, the first inorganic encapsulation layer 310 may include silicon oxynitride, and the second inorganic encapsulation layer 330 may include silicon nitride. The thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be different from each other. The thickness of the first inorganic encapsulation layer 310 may be greater than the thickness of the second inorganic encapsulation layer 330. Alternatively, the thickness of the second inorganic encapsulation layer 330 may be greater than the thickness of the first inorganic encapsulation layer 310, or the thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be the same.

[0154] refer to Figure 8 The middle area MA may include a first sub-middle area SMA1 relatively far from the first area OA and a second sub-middle area SMA2 relatively close to the first area OA. A line bypassing the first area OA and the groove G may be arranged in the middle area MA.

[0155] like Figure 8 A display line, for example, a data line DL may be disposed in the first sub-middle area SMA1. Figure 8 The data lines DL in the first sub-middle area SMA1 shown in FIG. Figure 7 The detour portions DL-D1 and DL-D2 of the data lines are described. The first sub-middle area SMA1 may be a line, such as a line area or a detour area where the data lines DL may detour.

[0156] The data lines DL may be arranged alternately with an insulating layer between the alternately arranged data lines DL. For example, since one of the adjacent data lines DL may be arranged below the insulating layer (e.g., the first organic insulating layer 209) and the other of the adjacent data lines DL may be arranged on the insulating layer (e.g., the first organic insulating layer 209), the data lines DL may be arranged alternately. In the case where the data lines DL are arranged alternately with an insulating layer between the alternately arranged data lines DL, the distance Δd (pitch) between the data lines DL may be reduced. Although Figure 8 The display data line DL is set in the first middle sub area SMA1, but has been referred to Figure 7 The described scan line SL, for example, a detour portion of the scan line SL may also be disposed in the first sub-middle area SMA1 .

[0157] One or more grooves G may be disposed in the second middle sub-area SMA2. The organic material layers included in the middle layer 222, for example, the first functional layer 222a and the second functional layer 222c, may be disconnected (or separated, or interrupted) by the grooves G. The second middle sub-area SMA2 may be a groove region or a disconnected region (or separated region) of the organic material layer.

[0158] A groove G may be formed in the multilayer film ML disposed between the substrate 100 and the pixel electrode 221. The multilayer film ML may include at least two layers, each of which includes different materials. The multilayer film ML may include a first sublayer and a second sublayer (e.g., a metal layer and / or an inorganic insulating layer), the first sublayer including an organic layer, and the second sublayer including an inorganic layer. The inorganic layer may include an inorganic material. The inorganic material may include a conductive inorganic material and / or a non-conductive inorganic material. The conductive inorganic material may include a metal material, and the non-conductive inorganic material may include an inorganic insulating material. The groove G includes a recess or hole formed in the first sublayer, and a hole formed in the second sublayer.

[0159] In one or more embodiments, Figure 8 , the multilayer film ML includes a first organic insulating layer 209 as an organic layer and a metal layer 210 as an inorganic layer. The metal layer 210 may be provided on the same layer as the layer on which the contact metal layer CM is disposed, and may be formed during the same mask process as that for forming the contact metal layer CM.

[0160] The metal layer 210 may include the same material as the contact metal layer CM. For example, the metal layer 210 may have a structure in which a titanium layer, an aluminum layer, and a titanium layer (Ti / Al / Ti) are stacked.

[0161] refer to Figure 8 and Figure 9A, the groove G of the multilayer film ML may be formed before the process of forming the intermediate layer 222. The groove G may have an undercut structure (or shape). The groove G may be formed by removing a portion of the multilayer film ML. Since the width of the hole of the metal layer 210 is formed to be smaller than the hole (or recess) of the first organic insulating layer 209, the groove G having an undercut structure may be formed. In one or more embodiments, Figure 9A , the first hole 210h formed in the metal layer 210 and the second hole 209h formed in the first organic insulating layer 209 overlap each other and constitute a groove G. The bottom surface of the groove G may be disposed on a virtual surface between the top surface of the substrate 100 and the top surface of the first organic insulating layer 209. In this regard, Figure 9A As shown in FIG. 2 , the bottom surface of the groove G is disposed on the same virtual surface as the top surface of the second interlayer insulating layer 207 .

[0162] The end of the metal layer 210 defining the first hole 210h may protrude further toward the center of the groove G than the inner side surface of the first organic insulating layer 209 disposed below the metal layer 210. For example, the first width W1 of the first hole 210h may have a value that is smaller than the second width W2 of the second hole 209h. Here, the second width W2 of the second hole 209h may be measured at a portion of the first organic insulating layer 209 directly below the end of the metal layer 210 defining the first hole 210h. The end of the metal layer 210 protruding toward the center of the groove G and / or the first hole 210h may form a pair of eaves (or a pair of protruding tips, or tips PT). The protruding length d1 of each tip PT may be less than the depth h1 of the second hole 209h described below. For example, the protruding length d1 of each tip PT may be less than 2 μm. For example, the length d1 of each tip PT may be less than 2.0 μm. In one or more embodiments, the protruding length d1 may be from about 1 μm to about 1.5 μm.

[0163] As described above, a first end of the metal layer 210 constituting the tip PT may be exposed, but another end, for example, a second end disposed opposite to the first end, may be covered by the second organic insulating layer 211, as shown in FIG. Figure 9A Displayed in.

[0164] The depth h1 of the second hole 209h may be the same as the thickness t1 of the first organic insulating layer 209. The depth h1 of the second hole 209h may correspond to the depth of the groove G. In one or more embodiments, the depth of the groove G may be 1.5 μm or greater. For example, the depth of the groove G may be 2 μm or greater.

[0165] The first organic insulating layer 209 may include an opening 209OD. The opening 209OD may be adjacent to the groove G and spaced apart from the groove G by a predetermined (or set) interval. Figure 9A, the openings 209OD may be arranged on two opposite sides of the groove G. For example, around the groove G, one opening 209OD may be arranged on the side of the display area DA, and another opening 209OD may be arranged on the side of the first area OA.

[0166] The metal layer 210 may directly contact the lower inorganic layer through the opening 209OD, for example, the second interlayer insulating layer 207 under the first organic insulating layer 209. The metal layer 210 and the second interlayer insulating layer 207 contacting each other through the opening 209OD may constitute an inorganic contact region ICR.

[0167] Among the layers above the substrate 100, a layer including an organic material may serve as a path through which moisture may advance. In one or more embodiments, as Figure 8 , when the display panel 10-1 includes the first opening 10H corresponding to the first area OA, moisture can advance in a direction (x-direction, hereinafter referred to as a lateral direction) parallel to the top surface of the substrate 100 through the first opening 10H. However, because the middle area MA includes the inorganic contact region ICR, the advancement of moisture through the first organic insulating layer 209 toward the display area DA can be blocked or reduced.

[0168] The partition wall PW may be disposed between the grooves G. The partition wall PW may include a plurality of sub-organic insulating layers stacked sequentially. Figure 9A , the partition wall PW may have a structure in which a portion 209P of the first organic insulating layer 209, a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. In one or more embodiments, at least one of the portion 209P of the first organic insulating layer 209, the portion 211P of the second organic insulating layer 211, the portion 215P of the pixel defining layer 215, and the portion 217P of the spacer 217 may be omitted. In this case, the height from the substrate 100 to the top surface of the partition wall PW may be less than the height from the substrate 100 to the top surface of the spacer 217.

[0169] refer to Figure 8 and Figure 9B , the intermediate layer 222 may be formed after the groove G is formed. Each of the first functional layer 222a and / or the second functional layer 222c of the intermediate layer 222 may be formed by using an open mask so that each of the first functional layer 222a and / or the second functional layer 222c is disposed in the display area DA and the intermediate area MA. In this case, the first functional layer 222a and / or the second functional layer 222c may be disconnected or separated (or interrupted or patterned) by the groove G.

[0170] Among the layers above the substrate 100, layers comprising organic materials can serve as pathways for moisture to pass through. Because the first functional layer 222a and / or the second functional layer 222c comprise organic materials, the first functional layer 222a and / or the second functional layer 222c can serve as pathways for moisture to pass through. However, because the first functional layer 222a and / or the second functional layer 222c are disconnected or separated (or interrupted or patterned) by the grooves G, the passage of moisture through the first functional layer 222a and / or the second functional layer 222c toward the organic light-emitting diode OLED can be prevented or reduced.

[0171] Like the first functional layer 222 a and / or the second functional layer 222 c , the opposite electrode 223 formed by the thermal deposition method may be disconnected by the groove G. The capping layer 230 including LiF may also be disconnected by the groove G.

[0172] In one or more embodiments, when the capping layer 230 includes an inorganic material, such as silicon nitride, silicon oxynitride, and / or silicon oxide, as shown in FIG. Figure 9C As shown in FIG, the capping layer 230 may be formed continuously without being interrupted by the groove G. In one or more embodiments, the capping layer 230 may be omitted. Figure 9B As shown in FIG, the capping layer 230 is disconnected by the groove G, but referring to FIG. Figure 9C The described structure is applicable to other embodiments described below and embodiments derived therefrom.

[0173] refer to Figure 8 and Figure 9D , a thin film encapsulation layer 300 may be formed. By covering the organic light emitting diode OLED of the display area DA, the thin film encapsulation layer 300 may prevent (or substantially prevent) the organic light emitting diode OLED from being damaged or degraded by external impurities.

[0174] The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer. Compared with the first functional layer 222a, the second functional layer 222c and the opposite electrode 223, the first inorganic encapsulation layer 310 formed by chemical vapor deposition (CVD) may have relatively excellent (or suitable) step coverage. Figure 9D As shown in FIG, the first inorganic encapsulation layer 310 may be continuously formed. For example, the first inorganic encapsulation layer 310 may cover the entire inner surface of the groove G.

[0175] The organic encapsulating layer 320 may be formed by coating a monomer and hardening the monomer. In some embodiments, the organic encapsulating layer 320 may be formed by coating a polymer. An end of the organic encapsulating layer 320 facing the first area OA may be adjacent to one side of the partition wall PW.

[0176] The second inorganic encapsulation layer 330 may be disposed on the organic encapsulation layer 320. In a partial region of the middle area MA, the second inorganic encapsulation layer 330 may directly contact the first inorganic encapsulation layer 310. For example, Figure 8 and Figure 9D As shown in FIG. 2 , in a partial region of the middle area MA adjacent to the first area OA, the first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may contact each other.

[0177] Although Figure 8 As shown in FIG. 1 , the display panel 10 - 1 includes a first opening 10H corresponding to the first area OA, but as shown in FIG. Figures 3B to 3D As described above, the display panel 10-1 may not include the first opening 10H corresponding to the first area OA. The above features also apply to reference Figures 10A to 30 The display panel (or multiple display panels) described.

[0178] Figure 8 The cross section of the display panel 10-1 shown in FIG can be understood as a structure surrounding the first area OA. Figure 7 As shown in FIG, when viewed in a direction perpendicular (or orthogonal) to the top surface of the substrate 100, Figure 8 Each of the grooves may have a ring shape surrounding the first area OA. Similarly, when viewed in a direction perpendicular to the top surface of the substrate 100, the partition wall PW may also have a ring shape surrounding the first area OA. Similarly, when viewed in a direction perpendicular to the top surface of the substrate 100, Figure 8 The elements shown in FIG. 1 , for example, the elements provided to the middle area MA (eg, the inorganic layer 210, etc.) may have a ring shape surrounding the first area OA. The above features also apply to the reference Figures 10A to 30 The display panel (or multiple display panels) described.

[0179] Figure 10A is a cross-sectional view of the middle area MA of the display panel 10 - 2 according to one or more embodiments, and Figure 10B is a cross-sectional view of a middle area MA of a display panel 10 - 2 ′ according to one or more embodiments.

[0180] Although Figures 8 to 9D As shown in FIG, in the display panel 10-1, in the inorganic contact region ICR, the metal layer 210 contacts the second interlayer insulating layer 207 which is an inorganic insulating layer, but the present disclosure is not limited thereto. In one or more embodiments, Figure 10A and Figure 10B As shown in FIG. 1 , the display panels 10 - 2 and 10 - 2 ′ may include a metal layer (hereinafter referred to as a lower metal layer 208 ) disposed in the middle area MA, and the metal layer 210 may contact the lower metal layer 208 in the inorganic contact region ICR.

[0181] refer to Figure 10A , the lower metal layer 208 may be disposed between the second interlayer insulating layer 207 and the first organic insulating layer 209. The lower metal layer 208 may be disposed only in the middle region MA. The lower metal layer 208 may include Figure 8 The data line DL, the source electrode SE and / or the drain electrode DE of the thin film transistor TFT in the pixel circuit PC are made of the same material. For example, the lower metal layer 208 may include three sub-layers of Ti / Al / Ti.

[0182] The metal layer 210 may directly contact the top surface of the lower metal layer 208 through the opening 209OD formed in the first organic insulating layer 209. The metal layer 210 and the lower metal layer 208 in contact with each other may constitute an inorganic contact region ICR. Figure 8 As described, the metal layer 210 may include the same material as the contact metal layer CM. Because both the metal layer 210 and the lower metal layer 208 include metal, the adhesion / coupling force between the metal layer 210 and the lower metal layer 208 may be adequate (e.g., relatively excellent). For example, the metal layer 210 may include the same material as the lower metal layer 208.

[0183] like Figure 10A As shown in FIG. 2 , in the middle area MA, the lower metal layer 208 as a single body may overlap with the opening 209OD and the groove G of the first organic insulating layer 209. In some embodiments, as shown in FIG. Figure 10B , the lower metal layer 208 of the display panel 10 - 2 ′ may include an opening 208OP overlapping the groove G, and may also include a plurality of spaced-apart features around the opening 208OP. The width of the opening 208OP may be greater than the width (e.g., the second width W2) of the portion of the groove G passing through the first organic insulating layer 209. In the opening 208OP of the lower metal layer 208, the first organic insulating layer 209 may contact the second interlayer insulating layer 207.

[0184] Although Figure 10A and Figure 10B The cross sections of the display panels 10-2 and 10-2' are shown respectively, but when viewed in a direction perpendicular to the top surface of the substrate 100 of the display panels 10-2 and 10-2', the lower metal layer 208 can be understood as having a ring shape surrounding the first area OA. In one or more embodiments, in a plan view, the lower metal layer 208 may include a ring having a predetermined (or set) width (see FIG. Figure 10A ), or a plurality of sub-rings formed by components spaced apart from each other while forming the opening 208OP (see Figure 10B ).

[0185] The contact between the metal layer 210 and the lower metal layer 208 is distinguished from the contact for electrical connection. Because each of the metal layer 210 and the lower metal layer 208 is provided in the middle area MA and has a ring shape when viewed in a direction perpendicular to the top surface of the substrate 100, the contact between the metal layer 210 and the lower metal layer 208 is distinguished from the contact between the metal and the metal intended to be used for applying an electrical signal and / or a set or predetermined voltage to the elements arranged in the display area DA.

[0186] like Figure 10A As shown in FIG, the bottom surface of the groove G may be disposed on the top surface of the lower metal layer 208, and the depth h1′ of the groove G may be less than the thickness t1 of the first organic insulating layer 209. In one or more embodiments, the lower metal layer 208 may overlap with the opening 209OD of the first organic insulating layer 209, and the depth h1′ of the groove G may be equal to or less than the thickness t1 of the first organic insulating layer 209. In one or more embodiments, Figure 10B As shown in FIG, the bottom surface of the groove G is set on the same plane as the top surface of the second interlayer insulating layer 207.

[0187] Figure 11A 、 Figure 11B and Figure 11C is a cross-sectional view of actions of a process of manufacturing a display panel according to one or more embodiments, and shows a middle area MA.

[0188] refer to Figure 11A and Figure 11B , a groove G is formed in a multilayer film ML including three or more layers. For example, the multilayer film ML may include a first sublayer including an organic layer; a second sublayer provided on the first sublayer and including an inorganic layer; and at least one lower insulating layer (or third sublayer) disposed below the organic layer, the at least one lower insulating layer including an inorganic insulating layer. In one or more embodiments, as Figure 11A As shown in FIG. 1 , the multilayer film ML may include a first organic insulating layer 209, a metal layer 210 on the first organic insulating layer 209, and a second interlayer insulating layer 207 below the first organic insulating layer 209. In one or more embodiments, as Figure 11B As shown in FIG, the multilayer film ML may include a first organic insulating layer 209 , a metal layer 210 on the first organic insulating layer 209 , and a gate insulating layer 203 , a first interlayer insulating layer 205 , and a second interlayer insulating layer 207 below the first organic insulating layer 209 .

[0189] During the process of forming the groove G, a portion of at least one inorganic insulating layer disposed below the first organic insulating layer 209 may be etched. For example, while etching a portion of the second interlayer insulating layer 207, a third hole 207h may be formed in the second interlayer insulating layer 207 (see FIG. Figure 11A In some embodiments, when etching portions of the second interlayer insulating layer 207, the first interlayer insulating layer 205, and the gate insulating layer 203, a third hole 207h may be formed in the second interlayer insulating layer 207, a fourth hole 205h may be formed in the first interlayer insulating layer 205, and a recess 203r may be formed in the gate insulating layer 203 (see FIG. Figure 11B In one or more embodiments, Figure 11A In one or more embodiments, a recess may be formed in the second interlayer insulating layer 207 shown in FIG. 2 instead of forming a third hole 207h through the second interlayer insulating layer 207. Figure 11B A hole is formed in the gate insulating layer 203 shown in FIG. 2 instead of the recess 203 r.

[0190] Because the groove is formed while removing a portion of at least one inorganic insulating layer disposed below the first organic insulating layer 209, the depth h2 of the groove G can be greater than the thickness t1 of the first organic insulating layer 209 (h2>t1) and less than the sum of the thickness t1 of the first organic insulating layer 209 and the thickness t2 of the at least one inorganic insulating layer (t1+t2>h2). The bottom surface of the groove G can be disposed on a virtual surface disposed between the top surface of the substrate 100 and the top surface of the second interlayer insulating layer 207. The depth h2 of the groove G can be 1.5 μm or greater. For example, the depth h2 of the groove G can be 2 μm or greater, or 2.5 μm or greater, or 3 μm or greater, or 3.5 μm or greater.

[0191] The groove G may have an undercut shape, and the tip PT of the metal layer 210 may extend toward the center of the groove G and may constitute an eaves shape. The protruding length d1 of the tip PT may be equal to or less than 2.0 μm and, for example, may be about 1 μm to about 1.5 μm.

[0192] Next, if Figure 11C As shown in FIG, an intermediate layer 222, an opposite electrode 223, and a capping layer 230 may be sequentially formed above the substrate 100 in which the groove is formed. In one or more embodiments, the first functional layer 222a, the second functional layer 222c, the opposite electrode 223, and the capping layer 230 may each be disconnected (or separated, or patterned) by the groove G in the middle area MA. In one or more embodiments, the capping layer 230 may be omitted, or as shown in FIG. Figure 9C As described, the capping layer 230 can be continuously formed without being interrupted by the groove G.

[0193] The partition wall PW may be disposed between the grooves G, and features of other elements of the display panel 10-3 (eg, an end of the organic encapsulation layer 320 adjacent to a side of the partition wall PW adjacent to the display area DA) are similar to those of the reference 10-3. Figures 8 to 9D The characteristics described are the same.

[0194] Figure 12 is a cross-sectional view of a middle area MA of a display panel 10 - 4 according to one or more embodiments.

[0195] refer to Figure 12 , the display panel 10 - 4 may include a lower metal layer 208 disposed in the middle area MA. The lower metal layer 208 may be disposed between the second interlayer insulating layer 207 and the first organic insulating layer 209 .

[0196] The metal layer 210 may directly contact the top surface of the lower metal layer 208 through the opening 209OD of the first organic insulating layer 209. The metal layer 210 and the lower metal layer 208 contacting each other may constitute an inorganic contact region ICR.

[0197] The lower metal layer 208 may include respective reference Figure 8 The data line DL, the source electrode SE, and / or the drain electrode DE of the thin film transistor TFT in the pixel circuit PC described above may be made of the same material. For example, the lower metal layer 208 may include three sub-layers of Ti / Al / Ti. The metal layer 210 may include the same material as the lower metal layer 208.

[0198] The lower metal layer 208 may not be formed in the region corresponding to the groove G. For example, the lower metal layer 208 may include an opening 208OP formed in the region corresponding to the groove G. The width of the opening 208OP may be greater than the width (e.g., the second width W2) of a portion of the groove G passing through the first organic insulating layer 209. In the opening 208OP of the lower metal layer 208, the first organic insulating layer 209 may contact the second interlayer insulating layer 207.

[0199] The bottom surface of the groove G may be disposed on a virtual surface between the top surface of the substrate 100 and the top surface of the lower metal layer 208. In one or more embodiments, Figure 12 , the bottom surface of the groove G is disposed below the bottom surface of the lower metal layer 208, for example, on the same virtual surface as the top surface of the first interlayer insulating layer 205. Depending on the degree of etching of the inorganic insulating layer(s) below the first organic insulating layer 209 during the process of forming the groove G, the bottom surface of the groove G may be disposed on one of the virtual surfaces disposed between the top surface of the substrate 100 and the top surface of the second interlayer insulating layer 207.

[0200] Figure 12The cross-sectional structure shown in FIG can be understood as a structure surrounding the first area OA. As described above, for example, when viewed in a direction perpendicular to the top surface of the substrate 100, Figure 12 The element shown in may have a ring shape surrounding the first area OA in a plan view.

[0201] Figure 13A and Figure 13B is a cross-sectional view of actions of a process of manufacturing a display panel according to one or more embodiments, and shows a middle area MA.

[0202] refer to Figure 13A , a groove G may be formed in the multilayer film ML including the first organic insulating layer 209 and the metal layer 210. The first hole 210h formed in the metal layer 210 and the recessed portion 209r formed in the first organic insulating layer 209 may constitute the groove G. The depth of the groove G, for example, the depth h3 of the recessed portion 209r may be less than the thickness t1 of the first organic insulating layer 209. The depth h3 of the recessed portion 209r may be 1.5 μm or more, for example, 2 μm or more.

[0203] like Figure 13A , when the depth h3 of the recess 209r is less than the thickness t1 of the first organic insulating layer 209, the bottom surface of the groove G may be disposed on a virtual surface between the top and bottom surfaces of the first organic insulating layer 209. In this case, a portion of the first organic insulating layer 209 below the bottom surface of the groove G may provide a path through which moisture may permeate. However, according to one or more embodiments, because the openings 209OD are disposed on opposite sides of the groove G, respectively, and the metal layer 210 and the inorganic insulating layer, such as the second interlayer insulating layer 207, are in direct contact with each other through the openings 209OD and thus constitute the inorganic contact region ICR, the aforementioned moisture transfer problem may be prevented or reduced.

[0204] The groove G may have an undercut structure. The end of the metal layer 210 protruding toward the center of the groove G and / or the first hole 210h may constitute a pair of eaves (or a pair of protruding tips, or tips PT). The protruding length d1 of each tip PT may be about 1 μm to about 1.5 μm.

[0205] refer to Figure 13B , an intermediate layer 222, an opposing electrode 223, and a capping layer 230 may be sequentially formed over the substrate 100 in which the groove G is formed. In the intermediate area MA, a portion of the intermediate layer 222, for example, the first functional layer 222a and / or the second functional layer 222c may be disconnected or separated by the groove G. Similarly, in the intermediate area MA, the opposing electrode 223 and the capping layer 230 may be disconnected or separated. In one or more embodiments, the capping layer 230 may be omitted, or as described in reference Figure 9CAs described above, the capping layer 230 including the inorganic insulating layer may be continuously formed. Thereafter, the thin film encapsulation layer 300 may be formed.

[0206] The partition wall PW may be disposed between the grooves G. Here, the features adjacent to one side of the partition wall PW where the end of the organic encapsulation layer 320 is adjacent to the display area DA, and the features of the elements of the display device 10-5 (e.g., the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330) are similar to those of the reference numerals. Figures 8 to 9D The characteristics described are the same.

[0207] Among them reference Figure 13A The features described above of the groove G including the recess 209r of the first organic insulating layer 209 and the first hole 210h of the metal layer 210, the depth of the groove G (i.e., the depth h3 of the recess 209r is less than the thickness t1 of the first organic insulating layer 209), and the feature that the bottom surface of the groove G is between the bottom surface and the top surface of the first organic insulating layer 209 are also applicable to the reference numerals. Figures 8 to 12 The embodiments described and / or referenced below Figures 14 to 30 One or more embodiments described.

[0208] Figure 14 is a cross-sectional view of a middle area MA of a display panel 10 - 6 according to one or more embodiments.

[0209] refer to Figure 14 , the display panel 10-6 may include a lower metal layer 208 disposed in the middle area MA. The lower metal layer 208 may be disposed between the second interlayer insulating layer 207 and the first organic insulating layer 209. The lower metal layer 208 may include Figure 8 The data line DL, the source electrode SE, and / or the drain electrode DE of the thin film transistor TFT in the pixel circuit PC described above may be made of the same material (or materials). For example, the lower metal layer 208 may include three sublayers of Ti / Al / Ti. The metal layer 210 may include the same material as the lower metal layer 208.

[0210] The lower metal layer 208 may include an opening 208OP formed in a region corresponding to the groove G, and a width of the opening 208OP may be greater than a width (eg, a second width W2 ) of a portion of the groove G passing through the first organic insulating layer 209 .

[0211] In one or more embodiments, as referenced Figure 10A As described, the lower metal layer 208 may be formed as a single body having a predetermined (or set) width so as to correspond to the middle area MA excluding the opening 208OP.

[0212] Figure 15A 、 Figures 15D to 15Fis a cross-sectional view of actions of a process for manufacturing a display panel according to one or more embodiments, Figure 15B and Figure 15C Corresponding to the modified Figure 15A a cross section of an embodiment of the present invention, and Figure 15G Corresponding to the basis for modification Figure 15F Embodiment of the display panel.

[0213] The multilayer film ML forming the groove G may include a first sublayer which is an organic layer; a second sublayer, which is arranged on the first sublayer and includes an inorganic layer; and at least one top insulating layer (or fourth sublayer) arranged on the second sublayer, the at least one top insulating layer including an organic insulating layer, an inorganic insulating layer, or an organic insulating layer and an inorganic insulating layer.

[0214] In one or more embodiments, Figure 15A , the multilayer film ML may include a first organic insulating layer 209, a metal layer 210 on the first organic insulating layer 209, and a second organic insulating layer 211 on the metal layer 210. As described above, the metal layer 210 may be provided on the same layer on which the contact metal layer CM is disposed, and may include the same material as that of the contact metal layer CM.

[0215] In one or more embodiments, Figure 15B As shown in FIG, at least one top insulating layer may include an inorganic insulating layer 212 and a second organic insulating layer 211. Therefore, the multilayer film ML may include a first organic insulating layer 209, a metal layer 210, an inorganic insulating layer 212, and a second organic insulating layer 211 stacked sequentially.

[0216] In one or more embodiments, Figure 15C , at least one top insulating layer may include an inorganic insulating layer 212. In this case, the multi-layer film ML may include a first organic insulating layer 209, a metal layer 210, and an inorganic insulating layer 212 that are sequentially stacked.

[0217] Hereinafter, for the convenience of description, the Figure 15A 2 shows a process for a case (one or more embodiments) in which the multilayer film ML includes a first organic insulating layer 209 , a metal layer 210 on the first organic insulating layer 209 , and a second organic insulating layer 211 on the metal layer 210 .

[0218] The groove G of the multilayer film ML can be formed by an etching process (eg, isotropic etching, etc.). Figure 15D, the overlapping first hole 210h of the metal layer 210, the second hole 209h of the first organic insulating layer 209, and the fifth hole 211h of the second organic insulating layer 211 may form a groove G. The features of the protruding length d1 of each of the pair of tips PT extending toward the center of the groove G, the first width W1 of the first hole 210h of the metal layer 210, and the width of the portion of the groove G passing through the first organic insulating layer 209 (e.g., the second width W2) are the same as those described above. Compared to the pair of tips PT, the side surfaces of the second organic insulating layer 211 defining the fifth hole 211h may not protrude further toward the center of the groove G. In other words, the width W3 of the fifth hole 211h (referred to as the third width) may be equal to or greater than the first width W1 of the first hole 210h of the metal layer 210. If the side surfaces of the second organic insulating layer 211 have inclined surfaces, it can be understood that the third width W3 of the fifth hole 211h is the minimum value between the side surfaces of the second organic insulating layer 211 defining the fifth hole 211h.

[0219] For example, Figure 15D As shown in FIG, the groove G may include a fifth hole 211h of the second organic insulating layer 211, a first hole 210h of the metal layer 210, and a second hole 209h of the first organic insulating layer 209. The bottom surface of the groove G may be disposed on the same virtual surface as the bottom surface of the first organic insulating layer 209.

[0220] In one or more embodiments, the groove G may include a first hole 210h of the metal layer 210, a first recess 209r of the first organic insulating layer 209 (see FIG. Figure 13A ) and the fifth hole 211h of the second organic insulating layer 211. In this case, the bottom surface of the groove G may be disposed on a virtual surface between the bottom surface and the top surface of the first organic insulating layer 209.

[0221] The inorganic insulating layer disposed below the first organic insulating layer 209, for example, the second interlayer insulating layer 207 and / or the first interlayer insulating layer 205, may include openings 207OP and 205OP respectively overlapping the groove G. In this case, the depth of the groove G may be correspondingly deepened. In one or more embodiments, as Figures 8 to 14 As shown in FIG. 2 , the inorganic insulating layer disposed below the first organic insulating layer 209 , for example, the second interlayer insulating layer 207 and / or the first interlayer insulating layer 205 , may not include the openings 207OP and 205OP overlapping with the groove G.

[0222] refer to 15A to 15D , before the etching process for forming the groove G, the top insulating layer, e.g. Figures 15A to 15C The inorganic insulating layer 212 and / or the second organic insulating layer 211 shown in FIG. 2 may cover the tip PT (see FIG. Figure 15D) of the metal layer 210. Therefore, it is possible to prevent (or avoid) the end of the metal layer 210 corresponding to the tip PT from being damaged during the process of manufacturing the display panel.

[0223] The partition wall PW may be adjacent to the groove G. For example, the partition wall PW may be formed on a portion of the multilayer film ML constituting the groove G, for example, on the second organic insulating layer 211. In one or more embodiments, the partition wall PW may be formed while stacking a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217. A portion of the metal layer 210 disposed below the portion 211P of the second organic insulating layer 211 may also constitute the partition wall PW.

[0224] The first organic insulating layer 209 may include an opening 209OD. The metal layer 210 and an inorganic layer below the first organic insulating layer 209, for example, the second interlayer insulating layer 207, may directly contact each other through the opening 209OD, thereby forming an inorganic contact region ICR.

[0225] refer to Figure 15E , the intermediate layer 222, the opposite electrode 223, and the capping layer 230 may be sequentially formed above the substrate 100 in which the groove G is formed. In the intermediate area MA, the first functional layer 222a, the second functional layer 222c, the opposite electrode 223, and the capping layer 230 may be disconnected or separated by the groove G. In one or more embodiments, the capping layer 230 may be omitted, or as shown in FIG. Figure 9C As described, the capping layer 230 can be continuously formed without being interrupted by the groove G.

[0226] refer to Figure 15F , a thin film encapsulation layer 300 is formed over the substrate 100. For example, a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 may be sequentially formed. Because the first and second inorganic encapsulation layers 310, 330 have appropriate (e.g., relatively excellent) step coverage, the first and second inorganic encapsulation layers 310, 330 may cover the entire inner surface of the groove G. An end of the organic encapsulation layer 320 may be adjacent to one side of the partition wall PW.

[0227] Although Figure 15F As shown in FIG. 1 , in the display panel 10-7, the inorganic contact region ICR is provided on one side of the groove G (for example, Figure 15F In one or more embodiments, reference is made to Figure 15GIn the display panel 10-8, the inorganic contact regions ICR may be disposed on two opposing sides around the groove G, namely, a first side adjacent to the display area DA and a second side adjacent to the first area OA. In the inorganic contact regions ICR, the metal layer 210 may contact the inorganic insulating layer, for example, the top surface of the second interlayer insulating layer 207 exposed through the opening of the first organic insulating layer 209. A portion of the metal layer 210 may correspond to a portion of a sub-layer of a partition wall PW including multiple layers.

[0228] Although in reference Figure 15A 、 Figure 15D 、 Figure 15E and Figure 15F In the display panel 10-7 described above, at least one top insulating layer of the multilayer film ML includes a second organic insulating layer 211, but the above process is also applicable to the reference Figure 15B or Figure 15C The embodiments described include a top insulating layer. Figures 16 to 24 , the structure of the multilayer film ML and the structure of the groove G may be variously modified depending on the stack structure of the insulating layers disposed on the metal layer 210 and the process of forming the same.

[0229] Figure 16 and Figure 17 is a selected cross-sectional view of a groove G of a display panel according to one or more embodiments.

[0230] refer to Figure 16 , a groove G is formed in the multilayer film ML disposed over the substrate 100. The multilayer film ML may include a first organic insulating layer 209, a metal layer 210, and a second organic insulating layer 211. The groove G may include a second hole 209h or a recessed portion of the first organic insulating layer 209, a first hole 210h of the metal layer 210, and a fifth hole 211h of the second organic insulating layer 211, which overlap with each other.

[0231] Although Figure 15D In the embodiment shown in FIG. 1 , the width W3 of the fifth hole 211h of the second organic insulating layer 211 is (see FIG. 1 ). Figure 15D ) is greater than the first width W1 of the first hole 210h of the metal layer 210, but Figure 16As shown in FIG, the width W3 of the fifth hole 211h of the second organic insulating layer 211 is less than the first width W1 of the first hole 210h of the metal layer 210. The side surface of the end of the metal layer 210 defining the first hole 210h may be covered by the second organic insulating layer 211, and the ends of the metal layer 210 and the second organic insulating layer 211 may form a tip PT. The protrusion length d1 of the tip PT is the distance in the horizontal direction from the inner surface of the first organic insulating layer 209, which is positioned directly below the tip PT, to the end of the tip PT. The protrusion length d1 may be the distance from the inner surface of the first organic insulating layer 209 to the side surface of the second organic insulating layer 211.

[0232] In one or more embodiments, reference Figure 17 , the third width W3 of the fifth hole 211h of the second organic insulating layer 211 may be substantially equal to the first width W1 of the first hole 210h of the metal layer 210. The second organic insulating layer 211 may cover the top surface of the end of the metal layer 210 defining the first hole 210h, but may not cover the side surface of the end of the metal layer 210. In this case, the protruding length d1 of the tip PT may be the distance from the inner surface of the first organic insulating layer 209 disposed directly below the tip PT to the side surface of the metal layer 210.

[0233] Figures 18 to 20 is a selected cross-sectional view of a groove G of a display panel according to one or more embodiments.

[0234] refer to Figures 18 to 20 , a groove G may be formed in the multilayer film ML disposed over the substrate 100. The multilayer film ML may include a first organic insulating layer 209, a metal layer 210, an inorganic insulating layer 212, and a second organic insulating layer 211. The holes or recesses formed in the first organic insulating layer 209, the holes of the metal layer 210, the holes of the inorganic insulating layer 212, and the holes of the second organic insulating layer 211 may overlap with each other and constitute the groove G.

[0235] refer to Figure 18 , the third width W3 of the hole in the second organic insulating layer 211 may be smaller than the fourth width W4 of the hole in the inorganic insulating layer 212 and the first width W1 of the first hole 210h in the metal layer 210. The fourth width W4 of the hole in the inorganic insulating layer 212 may be smaller than the first width W1 of the hole in the metal layer 210. The side surface of the end of the metal layer 210 facing the center of the groove G may be sequentially covered by the inorganic insulating layer 212 and the second organic insulating layer 211. The end of the metal layer 210, the end of the inorganic insulating layer 212, and the end of the second organic insulating layer 211 facing the center of the groove G may constitute a tip PT. The protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 to the side surface of the second organic insulating layer 211.

[0236] refer to Figure 19 , the side surface of the end of the metal layer 210 facing the center of the groove G may be covered by the inorganic insulating layer 212, but may not be covered by the second organic insulating layer 211. For example, the second organic insulating layer 211 may cover only the top surface of the inorganic insulating layer 212 and may not cover the side surface of the end of the inorganic insulating layer 212. The end of the metal layer 210 and the end of the inorganic insulating layer 212 may constitute a tip PT, and the protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 directly below the tip PT to the end of the inorganic insulating layer 212.

[0237] refer to Figure 20 Inorganic layers, for example, the metal layer 210 and the inorganic insulating layer 212 may be sequentially stacked and may extend further toward the center of the groove G than the inner surface of the first organic insulating layer 209 . The inorganic insulating layer 212 may cover only the top surface of the metal layer 210 .

[0238] The end of the inorganic layer facing the groove G (e.g., the end of the stacked structure including the metal layer 210 and the inorganic insulating layer 212) may be covered by the second organic insulating layer 211. The protruding length d1 of the tip PT corresponds to a horizontal distance from the inner surface of the first organic insulating layer 209 to the end of the second organic insulating layer 211.

[0239] Figures 21 to 24 is a selected cross-sectional view of a display panel according to one or more embodiments.

[0240] refer to Figure 21 The multilayer film ML may include a first organic insulating layer 209, which is an organic layer, and a metal layer 210 and an inorganic insulating layer 212, which are inorganic layers. Each of the metal layer 210 and the inorganic insulating layer 212 may constitute an inorganic layer, which is a second sublayer of the multilayer film ML.

[0241] A groove G is formed in the multilayer film ML, and a tip PT of the groove G is formed by a stacked structure including an inorganic layer, for example, a metal layer 210 and an inorganic insulating layer 212. For example, the stacked structure including the metal layer 210 and the inorganic insulating layer 212 may protrude from the inner surface of the first organic insulating layer 209 to the center of the groove G, thereby constituting the tip PT.

[0242] refer to Figure 22 , the multi-layer film ML may include a first organic insulating layer 209 which is an organic layer, and an inorganic insulating layer 212 which is an inorganic layer.

[0243] The second hole 209h of the first organic insulating layer 209 and the sixth hole 212h of the inorganic insulating layer 212 may overlap with each other and constitute the groove G formed in the multi-layer film ML. Figure 22 As shown in FIG, a second hole 209h is formed in the first organic insulating layer 209, but as shown in FIG. Figure 13A As described, in one or more embodiments, the first recess 209 r may be formed in the first organic insulating layer 209 without passing through the first organic insulating layer 209 .

[0244] The end of the inorganic insulating layer 212 defining the sixth hole 212h may protrude from the inner surface of the first organic insulating layer 209 to form a tip PT. As described above, the protrusion length d1 of the tip PT may be about 1 μm to about 1.5 μm.

[0245] refer to Figure 23 and Figure 24 , a second organic insulating layer 211 as a top insulating layer may be disposed on the inorganic insulating layer 212 .

[0246] In one or more embodiments, Figure 23 , the third width W3 of the fifth hole 211h of the second organic insulating layer 211 may be equal to or greater than the fifth width W5 of the sixth hole 212h of the inorganic insulating layer 212. In this case, the second organic insulating layer 211 may only cover the top surface of the end of the inorganic insulating layer 212.

[0247] In one or more embodiments, Figure 24 As shown in FIG, the third width W3 of the fifth hole 211h of the second organic insulating layer 211 may be smaller than the fifth width W5 of the sixth hole 212h of the inorganic insulating layer 212. In this case, the side surface of the end of the inorganic insulating layer 212 defining the sixth hole 212h may be covered by the second organic insulating layer 211. The end of the inorganic insulating layer 212 and the end of the second organic insulating layer 211 may constitute a tip PT. The protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 to the end of the second organic insulating layer 211.

[0248] Figure 25 is a cross-sectional view of a display panel 10 - 9 according to one or more embodiments.

[0249] refer to Figure 25 , in the display panel 10-9, the features of the other elements other than the groove G arranged in the middle area MA are similar to those of the reference Figure 8 The features of the display panel 10 - 1 described are substantially the same.

[0250] The display panel 10-9 may include three or more grooves G arranged in the middle area MA. The inorganic contact region ICR may be arranged between adjacent grooves G. The first functional layer 222a, the second functional layer 222c, the opposite electrode 223 and / or the capping layer 230 may be disconnected by each groove G. Although Figure 25 As shown in Figure 2, the groove G and the inorganic contact region ICR have the same Figures 8 to 9DThe structure described above is substantially the same as that of the structure described above, but the present disclosure is not limited thereto. In one or more embodiments, the groove G, the partition wall PW and / or the inorganic contact region ICR may have the same structure as that of the reference Figures 10A to 24 The structures of the described embodiment(s) are the same as or derived from the structures of the described embodiment(s).

[0251] The display panel 10-9 may include a first opening 10H disposed in the first area OA. The first opening 10H may be formed by removing elements disposed in the first area OA through a scribing or cutting process. The scribing or cutting process may be performed along the first line SCL1, and Figure 25 The display panel 10 - 9 is shown on which a scribing or cutting process or the like has been performed along the first lines SCL1 .

[0252] One of the grooves G' may pass through the first line SCL1. In this case, the stacked bodies including the first functional layer 222a, the second functional layer 222c, the opposite electrode 223, and the capping layer 230 may be each disconnected (or separated, or patterned) by the groove G' facing the first opening 10H. In one or more embodiments, the first line SCL1 may be disposed between two adjacent grooves G among the grooves G. In this case, the side of the display panel defining the first opening 10H may be aligned with the first opening 10H. Figure 8 The side of the display panel defining the first opening 10H is the same as shown in FIG. Figure 8 As shown in FIG, the structure disposed in the inorganic contact region ICR may face the first opening 10H.

[0253] Figure 26 is a cross-sectional view of a display panel 10 - 10 according to one or more embodiments.

[0254] refer to Figure 26 The organic element SW as a crack prevention (or reduction) structure may be provided in a portion of the middle area MA, for example, in a portion of the second sub-middle area SMA2 adjacent to the first area OA. The organic element SW may include a portion 209P2 of the first organic insulating layer 209 and a portion 211P2 of the second organic insulating layer 211 stacked.

[0255] As described above, the first opening 10H of the display panel 10-10 may be formed by removing elements disposed in the first area OA through a scribing or cutting process. Figure 26 , a scribing or cutting process is performed along the first line SCL1, but in one or more embodiments, a cutting process may be performed along one of the first to n-th lines SCL1 to SCLn. The area within the range from the first to n-th lines SCL1 to SCLn may be understood as a scribing or cutting area CA.

[0256] One or more organic elements SW may be arranged in the scribing or cutting area CA. The organic element SW may absorb or buffer impact that may occur during the scribing or cutting process and / or impact that may occur during or after the manufacture of the display panel 10-10. Therefore, the occurrence of cracks in the layer (or layers) including the inorganic material may be prevented, reduced, or minimized.

[0257] The portion 209P2 of the first organic insulating layer 209 and the portion 211P2 of the second organic insulating layer 211 included in the organic element SW may be in direct contact with each other. In one or more embodiments, since a hole is formed in the portion 209P2 of the first organic insulating layer 209 and the portion 211P2 of the second organic insulating layer 211 is disposed in the formed hole, the contact area thereof may be increased.

[0258] As described above, the first opening 10H of the display panel 10-10 can be formed by a scribing or cutting process. The cutting process can use a laser. When a layer including a metal is arranged between the portion 209P2 of the first organic insulating layer 209 and the portion 211P2 of the second organic insulating layer 211, the laser light may be reflected, making it difficult to form the first opening 10H. In contrast, according to the present disclosure, because the portion 211P2 of the second organic insulating layer 211 directly contacts the portion 209P2 of the first organic insulating layer 209, the reflection problem can be prevented or reduced.

[0259] The partition wall PW disposed between adjacent grooves G in the middle area MA may include a plurality of layers. Figure 25 As shown in FIG, the partition wall PW is arranged on the first organic insulating layer 209, and a portion of the first organic insulating layer 209 is an element of the partition wall PW, Figure 26 , the first organic insulating layer 209 may not be provided in the region where the partition wall PW is provided. For example, the first organic insulating layer 209 may include a spacer portion 209V that overlaps with the partition wall PW. The spacer portion 209V includes an opening (e.g., a hole or a through-hole) in the first organic insulating layer 209. The width of the spacer portion 209V may be greater than the width PW-W of the partition wall PW. The partition wall PW may be spaced apart from the side of the first organic insulating layer 209 that defines the spacer portion 209V.

[0260] The partition wall PW may have a structure in which a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. The height of the partition wall PW may be determined by the above portions.

[0261] Figure 27 is a cross-sectional view of a display panel 10 - 11 according to one or more embodiments.

[0262] refer to Figure 27 , except for the groove G arranged in the middle area MA, the features of other elements of the display panel 10-11 are the same as those of the reference Figure 26 The features of the display panel 10-10 described above are substantially the same. For example, the display panel 10-11 may include an organic element SW disposed in the middle area MA and adjacent to the first opening 10H. The region in which the organic element SW is disposed is the cutting area CA. Depending on the lines along which the scribing or cutting process is performed while manufacturing the display panel 10-11 (e.g., the first to nth lines SCL1 to SCLn), the display panel 10-11 may or may not include the organic element SW.

[0263] The groove G may be arranged in the middle area MA and between the organic element SW and the organic light emitting diode OLED in the display area DA. Each of the grooves G may be formed in the multilayer film ML including the first organic insulating layer 209, the metal layer 210, and the second organic insulating layer 211. The specific structure thereof may have a structure according to the reference Figure 15F 、 Figures 15G to 17 The structure of the described embodiment or an embodiment derived therefrom.

[0264] The partition walls PW may be disposed between adjacent grooves G. The first organic insulating layer 209 and the second organic insulating layer 211 may include spacers 209V and 211V, respectively, each corresponding to the partition walls PW (e.g., overlapping with the region where the partition walls PW are disposed). Each of the spacers 209V and 211V is an opening (e.g., a hole or a through-hole).

[0265] The spacer 209V of the first organic insulating layer 209 and the spacer 211V of the second organic insulating layer 211 may overlap with the partition wall PW. The width of the spacer 209V of the first organic insulating layer 209 may be greater than the width of the spacer 211V of the second organic insulating layer 211. The width of the spacer 211V of the second organic insulating layer 211 may be greater than the width PW-W of the partition wall PW. The partition wall PW may be spaced apart from the side surfaces of the first organic insulating layer 209 and the side surfaces of the second organic insulating layer 211 that define the spacers 209V and 211V, respectively.

[0266] Figure 28 is a cross-sectional view of a display panel 10 - 12 according to one or more embodiments.

[0267] refer to Figure 28 , and reference Figure 27 The display panel 10-11 is described as the same, and the display panel 10-12 includes an organic element SW, a groove G, and a partition wall PW arranged in the middle area MA. Since the structures of the organic element SW and the groove G are the same as those described above, the structure of the partition wall PW will be mainly described below.

[0268] The partition wall PW is arranged between adjacent grooves G. The first organic insulating layer 209 and the second organic insulating layer 211 may include spacer portions 209V and 211V, respectively, each overlapping the partition wall PW. The partition wall PW may have a structure in which a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. In this case, the portion 211P of the second organic insulating layer 211 may correspond to a sublayer of the multilayer film ML constituting the groove G.

[0269] Figure 29 is a cross-sectional view of a display panel 10 - 13 according to one or more embodiments.

[0270] refer to Figure 29 , the display panel 10-13 may include a groove G arranged in the middle area MA. The groove G may be formed in the multilayer film ML including the first organic insulating layer 209 and the inorganic insulating layer 212. The inorganic insulating layer 212 is a layer arranged between the first organic insulating layer 209 and the second organic insulating layer 211, and may be provided in the display area DA and the middle area MA. The inorganic insulating layer 212 may cover a portion of the contact metal layer CM in the display area DA. Because the specific structure of the groove G is similar to that of the reference Figure 22 The structures of the embodiments described are the same, so a repeated description thereof is not provided here. In one or more embodiments, the display panels 10-13 may have reference Figure 18 、 Figure 21 、 Figure 23 and Figure 24 The structure of one of the embodiments is described.

[0271] The display panel 10 - 13 may include an organic element SW disposed in the middle area MA and adjacent to the first opening 10H. Depending on the scribing or cutting process, the organic element SW may or may not be present in the display panel 10 - 13 . Figure 30 are cross-sectional views of display panels 10 - 14 according to one or more embodiments.

[0272] refer to Figure 30 , the display panels 10-14 may include a planarization layer 420 disposed over the thin film encapsulation layer 300 and provided in the middle area MA. In one or more embodiments, the planarization layer 420 may be disposed only in the middle area MA.

[0273] The planarization layer 420 may include an organic insulating layer. The planarization layer 420 may include a polymer material. For example, the planarization layer 420 may include a silicone resin, an acrylic resin, an epoxy resin, polyimide, and / or polyethylene. In one or more embodiments, the planarization layer 420 may include a material different from that of the organic encapsulation layer 320.

[0274] The planarization layer 420 may cover at least one groove G provided in the middle area MA. The planarization layer 420 may increase the flatness of the display panel 10-14 around the first opening OA by covering the area in the middle area MA that is not covered by the organic encapsulation layer 320. Therefore, the input sensing layer 40 (see FIG. 1 ) of the display panel 10-14 may be prevented or reduced. Figure 2A and / or 2B) and / or optical functional layer 50 (see Figure 2A A portion of the planarization layer 420 may overlap with the organic encapsulation layer 320. One end of the planarization layer 420, for example, a first edge 420e adjacent to the display area DA, may be disposed above the organic encapsulation layer 320.

[0275] The planarization layer 420 may be formed in the middle area MA through an exposure and development process, etc. In some processes (e.g., a washing process) for forming the planarization layer 420, if external foreign matter (e.g., moisture) advances in the lateral direction of the display panels 10-14, the organic light emitting diodes OLED in the display area DA may be damaged. In contrast, according to embodiments, since insulating layers (e.g., a first insulating layer 410 and a second insulating layer 430) are disposed below and on the planarization layer 420, respectively, the aforementioned problems caused by moisture penetration and / or floating of adjacent layers during and after the process of forming the planarization layer 420 may be prevented or reduced.

[0276] The first insulating layer 410 and the second insulating layer 430 may directly contact the bottom surface and the top surface of the planarization layer 420, respectively. The first insulating layer 410 and the second insulating layer 430 may each independently include an inorganic insulating material, such as silicon oxide, silicon nitride, and / or silicon oxynitride. Each of the first insulating layer 410 and the second insulating layer 430 may include a single layer or multiple layers, each of which includes any of the above materials.

[0277] The planarization layer 420 may have a step difference relative to the layer(s) below it. A portion of the planarization layer 420, including the first edge 420e, may have a step difference relative to the top surface of the first insulating layer 410. During and / or after the process of manufacturing the display panels 10-14, to prevent or reduce the planarization layer 420 from separating from or floating from the layers below it due to the step difference, a cover layer 440 may be disposed over the first edge 420e.

[0278] The cover layer 440 may include metal. Each of the first insulating layer 410, the second insulating layer 430, and the third insulating layer 450 described below extends not only to the middle area MA but also to the display area DA. In contrast, the cover layer 440 may cover the first edge 420e of the planarization layer 420 with a predetermined (or set) width. The cover layer 440 above the planarization layer 420 may extend toward the display area DA beyond the first edge 420e of the planarization layer 420, but may not extend toward the display area DA.

[0279] The third insulating layer 450 may be disposed on the capping layer 440. The third insulating layer 450 may include an organic insulating material. For example, the organic insulating material of the third insulating layer 450 may include a photoresist (negative photoresist or positive photoresist) and / or a polymer-based organic material, and may extend toward the display area DA to cover the display area DA.

[0280] refer to Figure 30 The features described also apply to Figures 8 to 29 Display panels of the described embodiments and embodiments derived therefrom.

[0281] The display panel according to the embodiment can block or reduce external foreign matter such as moisture that can damage the display element around the first area OA. However, this effect is provided as an example, and the embodiments of the present disclosure are not limited thereto.

[0282] As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively.

[0283] Additionally, the terms "substantially," "about," and similar terms are used as terms of approximation rather than terms of degree, and are intended to take into account the inherent variations in measurements or calculations that those skilled in the art will recognize.

[0284] In addition, any numerical range recited herein is intended to include all subranges of the same numerical precision that fall within the recited range. For example, a range of "1.0 to 10.0" is intended to include between the recited minimum value of 1.0 and the recited maximum value of 10.0 (and including 1.0 and 10.0), that is, all subranges having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum numerical limit recited herein is intended to include all lower numerical limits that fall therein, and any minimum numerical limit recited in this specification is intended to include all upper numerical limits that fall therein. Therefore, the applicant reserves the right to amend this specification, including the claims, to expressly recite any subrange that falls within the range expressly recited herein.

[0285] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. The description of features or aspects in each embodiment should generally be considered as applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it should be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the present disclosure as defined by the following claims and their equivalents.

Claims

1. A display panel, comprising: a substrate including a first region in which a through hole is formed, a second region, and a third region, the third region being between the first region and the second region; a display element in the second region and including a pixel electrode, an opposing electrode, and an intermediate layer between the pixel electrode and the opposing electrode; as well as a multilayer structure in the third region, the multilayer structure including a metal layer including a protrusion that protrudes laterally beyond a lower layer below the metal layer, At least one organic material layer of the intermediate layer is interrupted by the multi-layer structure.

2. The display panel according to claim 1, wherein The opposing electrodes are interrupted by the multi-layer structure.

3. The display panel according to claim 1, further comprising: an adjacent multilayer structure adjacent to the multilayer structure in the third region, The adjacent multi-layer structure includes a metal layer, and the metal layer includes a protrusion that protrudes in the lateral direction relative to a lower layer below the metal layer.

4. The display panel according to claim 3, wherein The protrusion of the multilayer structure and the protrusion of the adjacent multilayer structure face each other with a gap between the protrusion of the multilayer structure and the protrusion of the adjacent multilayer structure.

5. The display panel according to claim 4, wherein A portion of the at least one organic material layer is disconnected by the protrusions facing each other, and The portion of the at least one organic material layer is located in a region below the protrusions facing each other. The display panel according to claim 5 , wherein A portion of the opposing electrodes is interrupted by the protrusions facing each other, and The portion of the opposing electrodes is located in the region below the protrusions facing each other.

7. The display panel according to claim 6, wherein The portion of the opposing electrode overlaps the portion of the at least one organic material layer located in the region.

8. The display panel according to claim 5, wherein The other portions of the at least one organic material layer that are disconnected by the protrusions facing each other are respectively located on the protrusions facing each other.

9. The display panel according to claim 8, wherein The other portions of the opposing electrodes that are interrupted by the protrusions facing each other are respectively located above the protrusions facing each other.

10. The display panel according to claim 9, wherein The other portion of the opposing electrode overlaps with the other portion of the at least one organic material layer in the region above the protrusion.

11. The display panel according to claim 1, wherein The material of the metal layer is different from the material of the lower layer below the metal layer.

12. The display panel according to claim 1, further comprising: A first inorganic encapsulation layer is on the display element and extends toward the third region, wherein a portion of the first inorganic encapsulation layer is located on a top surface, a side surface, and a bottom surface of the protrusion.

13. The display panel according to claim 12, wherein The portion of the first inorganic encapsulating layer continuously extends so as to be located on the top surface, the side surface, and the bottom surface of the protrusion.

14. An electronic device comprising: The display panel according to any one of claims 1 to 13; and A camera is located below the display panel in the first area of ​​the display panel.

15. A display panel comprising: a substrate comprising a first region, a second region, and a third region, wherein a through hole is defined in the first region, and the third region is between the first region and the second region; a thin film transistor in the second region and including a semiconductor layer, a gate electrode, and a source electrode or a drain electrode; a first organic insulating layer on the thin film transistor; a contact metal layer on the first organic insulating layer and electrically connected to the source electrode or the drain electrode through a contact hole defined in the first organic insulating layer; a second organic insulating layer on the contact metal layer; a display element on the second organic insulating layer in the second region and comprising a pixel electrode, an opposite electrode, and an organic material layer between the pixel electrode and the opposite electrode; as well as A first metal layer, in the third region, wherein: The first organic insulating layer extends to the third region, A recess is defined in the first organic insulating layer in the third region, and The first metal layer is on the first organic insulating layer and includes a first protrusion that protrudes toward the recessed portion beyond a first point where an upper surface of the first organic insulating layer intersects a first side surface of the first organic insulating layer facing a first side of the recessed portion. The organic material layer is disconnected by the first protrusion of the first metal layer, and Each of the first metal layer and the contact metal layer has a structure in which a titanium layer, an aluminum layer, and another titanium layer are stacked.

16. The display panel according to claim 15, further comprising: a second metal layer on the first organic insulating layer in the third region and spaced apart from the first metal layer, wherein the recess is between the first metal layer and the second metal layer; wherein the second metal layer includes a second protrusion that protrudes toward the recessed portion beyond a second point where the upper surface of the first organic insulating layer intersects a second side surface of the first organic insulating layer facing a second side of the recessed portion opposite to the first side of the recessed portion, The organic material layer is disconnected by the second protrusion of the second metal layer, and The second metal layer has a structure in which a titanium layer, an aluminum layer, and another titanium layer are stacked. 17 . The display panel according to claim 16 , wherein the recessed portion comprises a hole passing from an upper surface to a lower surface of the first organic insulating layer. 18 . The display panel of claim 16 , wherein the recessed portion comprises a concave portion, and a bottom surface of the concave portion is above a lower surface of the first organic insulating layer. 19 . The display panel of claim 16 , wherein the opposing electrode includes a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer. 20 . The display panel of claim 17 , wherein the opposing electrode includes a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer. 21 . The display panel of claim 18 , wherein the opposing electrode comprises a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer.

22. The display panel according to claim 15, further comprising: an inorganic insulating layer between the substrate and the first organic insulating layer in the third region, The inorganic insulating layer has an opening overlapping with the recessed portion, and an edge of the inorganic insulating layer defining the opening is covered by the first organic insulating layer.

23. An electronic device comprising: The display panel includes a first area, a second area, and a third area, wherein the third area is between the first area and the second area; as well as a camera, in the first area below the display panel, The display panel comprises: a substrate having a through hole corresponding to the first area; a thin film transistor in the second region and including a semiconductor layer, a gate electrode, and a source electrode or a drain electrode; a first organic insulating layer on the thin film transistor; a contact metal layer on the first organic insulating layer and electrically connected to the source electrode or the drain electrode through a contact hole defined in the first organic insulating layer; a second organic insulating layer on the contact metal layer; a display element on the second organic insulating layer in the second region and including a pixel electrode, an opposite electrode, and an organic material layer between the pixel electrode and the opposite electrode; and a first metal layer on the first organic insulating layer in the third region, wherein: The first organic insulating layer extends to the third region, A recess is defined in the first organic insulating layer in the third region, and The first metal layer is on the first organic insulating layer and includes a first protrusion that protrudes toward the recessed portion beyond a first point where an upper surface of the first organic insulating layer intersects a first side surface of the first organic insulating layer facing a first side of the recessed portion. wherein the organic material layer is disconnected by the first protrusion of the first metal layer, and Each of the first metal layer and the contact metal layer has a structure in which a titanium layer, an aluminum layer, and another titanium layer are stacked. 24 . The electronic device according to claim 23 , wherein the electronic device is at least one selected from a mobile phone, a notebook computer, a smart watch, and an instrument panel for a car.

25. The electronic device according to claim 23, wherein the display panel further comprises: a second metal layer on the first organic insulating layer in the third region and spaced apart from the first metal layer, wherein the recess is between the first metal layer and the second metal layer; wherein the second metal layer includes a second protrusion that protrudes toward the recessed portion beyond a second point where the upper surface of the first organic insulating layer intersects a second side surface of the first organic insulating layer facing a second side of the recessed portion opposite to the first side of the recessed portion, The organic material layer is disconnected by the second protrusion of the second metal layer, and The second metal layer has a structure in which a titanium layer, an aluminum layer, and another titanium layer are stacked. 26 . The electronic device according to claim 25 , wherein the recess comprises a hole passing from an upper surface to a lower surface of the first organic insulating layer. 27 . The electronic device of claim 25 , wherein the recessed portion comprises a concave portion, and a bottom surface of the concave portion is above a lower surface of the first organic insulating layer. 28 . The electronic device according to claim 25 , wherein the opposing electrode includes a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer. 29 . The electronic device according to claim 26 , wherein the opposing electrode includes a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer. 30 . The electronic device according to claim 27 , wherein the opposing electrode includes a plurality of portions separated from each other by the first protrusion of the first metal layer and the second protrusion of the second metal layer.

31. The electronic device of claim 25, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

32. The electronic device of claim 26, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

33. The electronic device of claim 27, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

34. The electronic device of claim 28, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

35. The electronic device of claim 29, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

36. The electronic device of claim 30, wherein the electronic device is selected from at least one of a mobile phone, a laptop computer, a smart watch, and an instrument panel for a car.

37. The electronic device according to claim 23, wherein the display panel further comprises: an inorganic insulating layer between the substrate and the first organic insulating layer in the third region, The inorganic insulating layer has an opening overlapping with the recessed portion, and an edge of the inorganic insulating layer defining the opening is covered by the first organic insulating layer.

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