Branch optimization queue processing method and device, equipment, storage medium
By introducing branch optimization queues into the processor, including the jump-up optimization queue and the branch prefetch optimization queue, the pipeline interruption problem caused by branch instruction jumps is solved, achieving fast instruction fetching and improved processor efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI SMARTLOGIC TECHNOLOGY LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-04-17
AI Technical Summary
In processors that incorporate pipelined technology, branch instruction jumps can interrupt pipelined processing, leading to increased processor wait times, especially when the pipeline is long.
A branch optimization queue processing method is adopted, including an upward jump optimization queue and a branch prefetch optimization queue. By obtaining the branch optimization mode and the jump address, it is determined whether there is a hit in the queue, and the instruction corresponding to the jump address and subsequent instructions are stored in the corresponding queue to ensure fast instruction fetching during the instruction execution phase.
When there is no hit in the branch optimization queue, the instruction corresponding to the jump address in the instruction cache and subsequent instructions are quickly retrieved, reducing processor waiting time and improving processor execution efficiency.
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Figure CN120540715B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, and in particular to a branch optimization queue processing method, apparatus, device, and storage medium. Background Technology
[0002] In computer architecture, instruction execution can be divided into three stages: instruction fetch, instruction decoding, and instruction execution. In the instruction fetch stage, the processor retrieves the instruction from instruction memory based on its virtual address. In the instruction decoding stage, the fetched instruction is broken down and interpreted according to a predetermined instruction format, identifying different instruction categories and various methods for fetching operands. In the instruction execution stage, the processor performs the various operations specified by the instruction, specifically implementing the instruction's function. When the processor processes a branch instruction, a jump may occur depending on whether the condition is true or false.
[0003] When a processor with pipelined technology processes a branch instruction, it generates a jump based on the true / false condition. This jump interrupts the processing of instructions in the pipeline because the processor cannot determine the next instruction until the branch instruction is completed. The longer the pipeline, the longer the processor waits, because it must wait for the branch instruction to complete before determining the next instruction to enter the pipeline.
[0004] Therefore, a branch optimization queue is needed to handle this, so that when a branch instruction that requires a jump is found during the instruction execution phase, the instruction can be fetched quickly. Summary of the Invention
[0005] To address one of the aforementioned technical deficiencies, this application provides a branch optimization queue processing method, apparatus, device, and storage medium.
[0006] The first aspect of this application provides a branch optimization queue processing method, wherein the branch optimization queue is initially empty;
[0007] The branch optimization queue includes: the jump-up optimization queue and the branch prefetch optimization queue;
[0008] The method includes:
[0009] Obtain the branch optimization mode and jump address; where the branch optimization mode is jump up and / or branch prefetch;
[0010] Based on the branch optimization mode, determine whether there is a hit queue; where the hit queue contains the instruction corresponding to the jump address;
[0011] If no hit queue exists, then if the branch optimization mode is upward jump and the jump address is upward jump, the replacement queue is determined in the upward jump optimization queue; if the branch optimization mode is branch prefetch and the jump address is downward jump, the replacement queue is determined in the branch prefetch optimization queue; if the branch optimization mode is both upward jump and branch prefetch and the jump address is upward jump, the replacement queue is determined in the upward jump optimization queue; if the branch optimization mode is both upward jump and branch prefetch and the jump address is downward jump, the replacement queue is determined in the branch prefetch optimization queue.
[0012] Retrieve the instruction and subsequent instructions corresponding to the jump address from the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address into the replacement queue.
[0013] Optionally, there can be multiple branch optimization queues;
[0014] Before obtaining the branch optimization mode and jump address, it also includes:
[0015] Jump initial value read from register ;in, The configuration is made in the register by the configuration instructions of the program to which the instruction belongs;
[0016] One of the multiple branch optimization queues is selected as the branch prefetch optimization queue;
[0017] like Then, all other branch optimization queues will be designated as upward jump optimization queues; among them, Optimize the total number of queues for branching;
[0018] like Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue.
[0019] Optionally, the branch optimization queue includes: a maneuver queue;
[0020] The method also includes:
[0021] Determine the total number of hit checks for the upward jump optimization queue within a preset time period. The total number of times the judgment result indicates a hit and an upward jump to optimize the queue. 1. Perform branch prefetch optimization queue hit checks for a total number of times. The result indicates that there is a hit in the prefetch optimization queue. ;
[0022] like Then, a maneuver queue is designated as an upward jump optimization queue;
[0023] like Then, a maneuver queue is determined as a branch prefetch optimization queue.
[0024] Optionally, the method further includes:
[0025] Determine the optimal number of queues for upward jumps from a stationary position. Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period; the number of static branch prefetch optimization queues is determined. Among them, the static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period.
[0026] like ,and Then, a static upward jump optimization queue is determined as a mobile queue; To optimize the queue judgment threshold for upward jump, Optimize queue thresholds for static upward jumps;
[0027] like ,and Then, a static branch prefetch optimization queue is determined as a mobile queue; Optimize the threshold for the branch prefetch queue. Optimize the queue threshold for prefetching static branches.
[0028] Optionally, the replacement queue is determined in the upward jump optimization queue, including:
[0029] If an empty jump-up optimization queue exists, then an empty jump-up optimization queue is designated as the replacement queue.
[0030] If there is no empty upward jump optimization queue, then if there is only one upward jump optimization queue, it is designated as the replacement queue; if there are two upward jump optimization queues, the upward jump optimization queue that was not used as a replacement queue in the previous time is designated as the replacement queue; if there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue.
[0031] The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for any upward jump optimization queue;
[0032] The upward jump selection matrix is one Matrix, where, The total number of upward jump optimization queues is determined by the number of rows in the upward jump selection matrix; each row in the upward jump selection matrix uniquely corresponds to an upward jump optimization queue; the upward jump selection matrix is initially a 0 matrix; when a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix;
[0033] Determine the replacement queue in the branch prefetch optimization queue, including:
[0034] If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue.
[0035] If there is no empty branch prefetch optimization queue, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue; if there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not used as a replacement queue in the previous case is designated as the replacement queue; if there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue.
[0036] The selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix for any branch prefetch optimization queue.
[0037] The branch prefetch selection matrix is one Matrix, where, The total number of branch prefetch optimization queues; each row in the branch prefetch selection matrix uniquely corresponds to a branch prefetch optimization queue; the branch prefetch selection matrix is initially a 0 matrix; when a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix.
[0038] Optionally, the instruction corresponding to the jump address and subsequent instructions are stored in the replacement queue, including:
[0039] If the replacement queue is empty, the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0040] If the replacement queue is not empty, all instructions in the replacement queue are popped, and the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0041] Optionally, the method further includes:
[0042] If a hit queue exists, instructions are fetched sequentially starting from the head of the hit queue.
[0043] In a second aspect of this application, a branch optimization queue processing apparatus is provided, wherein the branch optimization queue is initially empty; the branch optimization queue includes: an upward jump optimization queue and a branch prefetch optimization queue.
[0044] The device includes:
[0045] The acquisition module is used to acquire the branch optimization mode and jump address; wherein, the branch optimization mode is upward jump and / or branch prefetch;
[0046] The first determining module is used to determine whether there is a hit queue based on the branch optimization mode; wherein, the hit queue contains instructions corresponding to the jump address;
[0047] The second determining module is used to determine the replacement queue in the upward jump optimization queue if there is no hit queue, if the branch optimization mode is upward jump and the jump address is upward jump; if the branch optimization mode is branch prefetch and the jump address is downward jump; if the branch optimization mode is both upward jump and branch prefetch and the jump address is upward jump; if the branch optimization mode is both upward jump and branch prefetch and the jump address is downward jump; and if the branch optimization mode is both upward jump and branch prefetch and the jump address is downward jump.
[0048] The processing module is used to obtain the instruction and subsequent instructions corresponding to the jump address in the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address into the replacement queue.
[0049] A third aspect of this application provides an electronic device, comprising:
[0050] Memory;
[0051] Processor; and
[0052] Computer programs;
[0053] The computer program is stored in the memory and configured to be executed by the processor to implement the method described in the first aspect above.
[0054] In a fourth aspect, this application provides a computer-readable storage medium having a computer program stored thereon; the computer program is executed by a processor to implement the method described in the first aspect above.
[0055] This application provides a branch optimization queue processing method, apparatus, device, and storage medium, wherein the branch optimization queue is initially empty; the branch optimization queue includes an upward jump optimization queue and a branch prefetch optimization queue; the method includes: obtaining a branch optimization mode and a jump address; wherein the branch optimization mode is upward jump and / or branch prefetch; determining whether a hit queue exists based on the branch optimization mode; wherein the hit queue contains the instruction corresponding to the jump address; if no hit queue exists, then if the branch optimization mode is upward jump and the jump address is upward jump, then in the upward jump optimization queue... The replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is branch prefetch and the jump address is a downward jump, the replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is upward jump and branch prefetch and the jump address is upward jump, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is upward jump and branch prefetch and the jump address is downward jump, the replacement queue is determined from the branch prefetch optimization queue. The instruction corresponding to the jump address and its subsequent instructions in the instruction cache are retrieved and stored in the replacement queue. In this application, when there is no hit queue in the branch optimization queue, the instruction corresponding to the jump address and its subsequent instructions in the instruction cache are retrieved from the branch optimization queue and stored in the replacement queue. This ensures that the branch optimization queue contains the instruction corresponding to the jump address and its subsequent instructions in the instruction cache, thus enabling rapid instruction fetching when a branch instruction requiring a jump is discovered during instruction execution. Attached Figure Description
[0056] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:
[0057] Figure 1 This is a schematic diagram of a queue in the Fetch module provided in an embodiment of this application;
[0058] Figure 2 This is a schematic diagram of another queue in the Fetch module provided in the embodiments of this application;
[0059] Figure 3 A flowchart illustrating a branch optimization queue processing method provided in an embodiment of this application;
[0060] Figure 4 A schematic diagram of sequential execution instructions provided in an embodiment of this application;
[0061] Figure 5 This is a schematic diagram illustrating a selection value determination process provided in an embodiment of this application;
[0062] Figure 6 A schematic diagram of instruction execution at time Clk0 provided in an embodiment of this application;
[0063] Figure 7 A schematic diagram of instruction execution at time step Clk1 provided in an embodiment of this application;
[0064] Figure 8 A schematic diagram of instruction execution at time step Clk2 is provided as an embodiment of this application;
[0065] Figure 9 A schematic diagram of instruction execution at time Clkx provided in an embodiment of this application;
[0066] Figure 10 A schematic diagram of instruction execution at time Clkx+1 provided for an embodiment of this application;
[0067] Figure 11 A schematic diagram of instruction execution at time Clkx+2 provided in this application embodiment;
[0068] Figure 12 A schematic diagram of instruction execution at time Clkx+3 provided for an embodiment of this application;
[0069] Figure 13 A schematic diagram of instruction execution at time Clkx+4 provided for an embodiment of this application;
[0070] Figure 14 A schematic diagram of instruction execution at time Clkx+5 provided for an embodiment of this application;
[0071] Figure 15 A schematic diagram of a branch optimization queue processing device provided in an embodiment of this application;
[0072] Figure 16 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0073] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.
[0074] In developing this application, the inventors discovered that when a processor incorporating pipelined technology processes a branch instruction, it generates a jump based on the true / false condition of the decision. This jump interrupts the processing of instructions in the pipeline because the processor cannot determine the next instruction until the branch instruction is completed. The longer the pipeline, the longer the processor waits, because the processor must wait for the branch instruction to complete before determining the next instruction to enter the pipeline.
[0075] This application provides a branch optimization queue processing method, apparatus, device, and storage medium, wherein the branch optimization queue is initially empty; the branch optimization queue includes an upward jump optimization queue and a branch prefetch optimization queue; the method includes: obtaining a branch optimization mode and a jump address; wherein the branch optimization mode is upward jump and / or branch prefetch; determining whether a hit queue exists based on the branch optimization mode; wherein the hit queue contains the instruction corresponding to the jump address; if no hit queue exists, then if the branch optimization mode is upward jump and the jump address is upward jump, then in the upward jump optimization queue... The replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is branch prefetch and the jump address is a downward jump, the replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is upward jump and branch prefetch and the jump address is upward jump, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is upward jump and branch prefetch and the jump address is downward jump, the replacement queue is determined from the branch prefetch optimization queue. The instruction corresponding to the jump address and its subsequent instructions in the instruction cache are retrieved and stored in the replacement queue. In this application, when there is no hit queue in the branch optimization queue, the instruction corresponding to the jump address and its subsequent instructions in the instruction cache are retrieved from the branch optimization queue and stored in the replacement queue. This ensures that the branch optimization queue contains the instruction corresponding to the jump address and its subsequent instructions in the instruction cache, thus enabling rapid instruction fetching when a branch instruction requiring a jump is discovered during instruction execution.
[0076] This embodiment provides a branch optimization queue processing method, wherein the branch optimization queue is located in the Fetch module, which also includes a sequential execution queue, and the branch optimization queue is initially empty. The fields of the branch optimization queue and the sequential execution queue of the Fetch module are identical.
[0077] There are multiple branch optimization queues, including at least one jump-up optimization queue and at least one branch prefetch optimization queue (e.g., ...). Figure 1 (As shown). In addition, it may include at least one mobile queue (such as...). Figure 2 (As shown).
[0078] The branch optimization queue does not actively initiate instruction fetch requests; it only passively receives instructions. The jump-up optimization queue only stores the jump address instructions for the previous branch, and the branch prefetch optimization queue only stores the jump address instructions for the next and longest branches.
[0079] In practice, the configuration instructions of the program to which the instruction belongs can configure the jump initial value in a register. For example, certain bit fields in the configuration command store... The program needs to add this configuration instruction to inform the hardware of the number of jump-up optimization queues to use. The hardware stores the current configuration in a register and uses the queues according to the configuration. For example, the initial jump value can be configured based on the loop state of the program to which the instruction belongs. .like The maximum value is 5, and the minimum value is 1. If the program to which the instruction belongs has many loops, and more than 5 different loops may be executed repeatedly within the same period of time, then... Configure it to 5. If the number of loops in the program to which the instruction belongs is average, and more than 2 / 3 / 4 different loops may be executed repeatedly within the same period of time, then... Configure it as 2 / 3 / 4. If loops are rarely encountered in the program containing the instruction, you can... Configured to 1.
[0080] Before executing the branch optimization queue processing method provided in this embodiment, the jump initial value is read from the register. .in, The configuration is made in the register by the configuration instructions of the program to which the instruction belongs.
[0081] One of the multiple branch optimization queues is designated as the branch prefetch optimization queue. In other words, there must be at least one branch prefetch optimization queue.
[0082] like This indicates that the number of non-branch prefetch optimization queues in the branch optimization queue is insufficient, or that it is exactly equal to the jump initial value. If this happens, then all other branch optimization queues will be designated as upward jump optimization queues. At this point, the branch optimization queues will contain only one upward jump optimization queue and at least one branch prefetch optimization queue.
[0083] in, Optimize the total number of queues for branching.
[0084] like This indicates that the number of non-branch prefetch optimization queues in the branch optimization queue is greater than the jump initial value. Then the remaining branches will be optimized randomly in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue. At this point, the branch optimization queue includes one upward jump optimization queue. One branch prefetch optimization queue and at least one maneuver queue.
[0085] The above process ensures that the hardware resource usage of the branch optimization queue is adapted to the program containing the instruction. Using more branch optimization queues is wasteful when the loop frequency is low; therefore, unnecessary hardware overhead can be reduced while making full use of existing resources. Each branch optimization queue is accessed in parallel. See also... Figure 3 The implementation process of the branch optimization queue processing method provided in this embodiment is as follows:
[0086] 301, retrieves the branch optimization mode and jump address.
[0087] The branch optimization mode in step 301 is the branch optimization mode used in the Fetch module. For example, if the Fetch module uses two branch optimization modes, namely jump-up optimization and branch prefetch optimization, then the branch optimization mode in step 301 is jump-up and / or branch prefetch.
[0088] In specific implementations, the branch optimization mode used in the Fetch module can also include other modes, and the corresponding branch optimization mode in step 301 is also another mode.
[0089] The optimization mode of the Fetch module is configurable and can be configured using specific commands.
[0090] If the Fetch module's sequential execution queue is in Figure 4 As shown, PC0, PC1, ..., PCM, PCM+1, SEQ, PCN, PCN+1... are all instruction addresses. During sequential instruction execution, instructions are fetched sequentially starting from PC0. After fetching, the instruction is dispatched. If the instruction is not a branch instruction (such as PC0, PC1, ..., PCM, PCM+1, PCN, PCN+1, etc.), it is executed at the execution unit or waits for transmission in the FIFO. If the instruction is a branch instruction (such as SEQ), a jump address is determined, and the jump address and branch optimization mode are set to return to the Fetch module. Then, the instruction corresponding to the jump address is fetched, and the instruction corresponding to the jump address and subsequent instructions are executed.
[0091] Each time a branch instruction is dispatched, the method provided in this embodiment is executed to process the branch optimization queue in order to fetch the instruction.
[0092] Additionally, branch instructions that appear in the program flow (such as...) Figure 1The SEQ instruction in the code can be either an upward or downward jump. If it's an upward jump, the branch optimization mode is upward jump; if it's a downward jump, the branch optimization mode is branch prefetch. Which scenario is known only after the branch instruction has been executed, and only then can the jump address be determined. Therefore, branch instructions can be fetched from the sequential execution queue of the Fetch module, and the jump address is determined during the execution of the branch instruction.
[0093] In addition, current branch prediction technology can predict the jump direction of branch instructions in advance, speeding up the operation. Based on this, the jump address can also be determined through branch prediction.
[0094] In practical implementation, the method provided in this embodiment can be executed by the Fetch module. Specifically, the Fetch module obtains the returned branch optimization mode and jump address, which is determined when executing branch instructions in the Fetch module's sequential execution queue; or, it can be determined through branch prediction. The branch optimization mode is determined based on the jump direction of the branch instruction.
[0095] 302. Based on the branch optimization mode, determine whether a hit queue exists.
[0096] As can be seen from the analysis in step 301, the branch optimization mode can be upward jump, branch prefetching, or a combination of upward jump and branch prefetching.
[0097] Specifically: If the branch optimization mode is upward jump and the jump address is upward, then check if the upward jump optimization queue has been hit. If the branch optimization mode is branch prefetch and the jump address is downward, then check if the branch prefetch optimization queue has been hit. If the branch optimization mode is both upward jump and branch prefetch and the jump address is upward, then check if the upward jump optimization queue has been hit. If the branch optimization mode is both upward jump and branch prefetch and the jump address is downward, then check if the branch prefetch optimization queue has been hit.
[0098] Among them, the hit queue contains instructions corresponding to the jump address.
[0099] In step 302, the Fetch module can determine whether a hit queue exists based on the branch optimization mode and the jump address. The hit queue is the queue in the branch optimization queue corresponding to the branch optimization mode obtained in step 301 that contains the instructions corresponding to the jump address. If a hit queue exists, it means that there is a queue storing the instructions corresponding to the jump address in the branch optimization queue. The instructions corresponding to the jump address and subsequent instructions can be directly retrieved from this queue for execution, achieving fast instruction fetching for branch instructions requiring jumps during the instruction execution phase.
[0100] If no matching queue is found, it means that no queue in the branch optimization queue stores the instruction corresponding to the jump address. The Fetch module will select a queue (i.e., the replacement queue) in the subsequent step 303, and store the instruction corresponding to the jump address and subsequent instructions into the replacement queue in step 304. This allows for quick instruction fetching when the same branch instruction is found during the instruction execution phase.
[0101] 303. If no hit queue exists, then if the branch optimization mode is an upward jump and the jump address is upward, determine the replacement queue in the upward jump optimization queue; if the branch optimization mode is a branch prefetch and the jump address is downward, determine the replacement queue in the branch prefetch optimization queue; if the branch optimization mode is both upward jump and branch prefetch and the jump address is upward, determine the replacement queue in the upward jump optimization queue; if the branch optimization mode is both upward jump and branch prefetch and the jump address is downward, determine the replacement queue in the branch prefetch optimization queue.
[0102] Through step 303, the Fetch module can determine the replacement queue from the branch optimization queue corresponding to the branch optimization mode obtained in step 301.
[0103] The process of determining the replacement queue in the upward jump optimization queue is as follows:
[0104] If an empty upward jump optimization queue exists, it means that an empty upward jump optimization queue exists. In this case, an empty upward jump optimization queue can be randomly selected as the replacement queue. That is, an empty upward jump optimization queue is preferred as the replacement queue.
[0105] If there is no empty jump-up optimization queue, then:
[0106] When there is only one queue for upward jump optimization, it is designated as the replacement queue.
[0107] When there are two upward jump optimization queues, the upward jump optimization queue that was not previously designated as a replacement queue will be designated as the replacement queue. For example, if the two upward jump optimization queues are upward jump optimization queue 0 and upward jump optimization queue 1, and upward jump optimization queue 0 was designated as the replacement queue in the previous instance, then upward jump optimization queue 1 will be designated as the replacement queue in this instance. Conversely, if upward jump optimization queue 1 was designated as the replacement queue in the previous instance, then upward jump optimization queue 0 will be designated as the replacement queue in this instance.
[0108] When there are two or more upward jump optimization queues, the upward jump optimization queue with the smallest value will be selected as the replacement queue.
[0109] The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for any upward jump optimization queue.
[0110] The upward jump selection matrix is one Matrix, where, The total number of upward jump optimization queues is determined. Each row in the upward jump selection matrix uniquely corresponds to an upward jump optimization queue. The upward jump selection matrix is initially a 0-matrix. When a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix.
[0111] For example, if there are 3 upward jump optimization queues, then Jump up to select the matrix as follows Figure 5 As shown, row 0 corresponds to upward jump optimization queue 0, row 1 corresponds to upward jump optimization queue 1, and row 2 corresponds to upward jump optimization queue 2. If upward jump optimization queue 0 was previously determined as the replacement queue, then the element in row 0 of the upward jump selection matrix will first be updated to 1, and then the element in column 0 of the upward jump selection matrix will be updated to 0.
[0112] In this execution, the selection value for upward jump optimization queue 0 is the sum of all elements in the 0th row of the upward jump selection matrix (i.e., 0+1+1=2), the selection value for upward jump optimization queue 1 is the sum of all elements in the 1st row of the upward jump selection matrix (i.e., 0+0+0=0), and the selection value for upward jump optimization queue 2 is the sum of all elements in the 2nd row of the upward jump selection matrix (i.e., 0+0+0=0). The upward jump optimization queue with the smallest selection value is determined as the replacement queue. If there are multiple upward jump optimization queues with the smallest selection value, one is randomly selected. In this case, upward jump optimization queue 2 is selected as the replacement queue.
[0113] The process of determining the replacement queue in the branch prefetch optimization queue is as follows:
[0114] If an empty branch prefetch optimization queue exists, it means that an empty branch prefetch optimization queue exists, and in this case, an empty branch prefetch optimization queue can be designated as the replacement queue. That is, an empty branch prefetch optimization queue is preferentially selected as the replacement queue.
[0115] If there is no empty branch prefetch optimization queue, then:
[0116] When there is only one branch prefetch optimization queue, it is designated as the replacement queue.
[0117] When there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. For example, if the two branch prefetch optimization queues are branch prefetch optimization queue 0 and branch prefetch optimization queue 1, and branch prefetch optimization queue 0 was designated as the replacement queue previously, then branch prefetch optimization queue 1 will be designated as the replacement queue this time. Conversely, if branch prefetch optimization queue 1 was designated as the replacement queue previously, then branch prefetch optimization queue 0 will be designated as the replacement queue this time.
[0118] When there are two or more branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is determined as the replacement queue.
[0119] The selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix for any branch prefetch optimization queue.
[0120] The branch prefetch selection matrix is one Matrix, where, This represents the total number of branch prefetch optimization queues. Each row in the branch prefetch selection matrix uniquely corresponds to a branch prefetch optimization queue. The branch prefetch selection matrix is initially a 0-matrix. When a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix.
[0121] The process of constructing the branch prefetch selection matrix is similar to that of constructing the upward jump selection matrix; please refer to the process of constructing the upward jump selection matrix. The process of determining the selection values for the branch prefetch optimization queue is similar to that of determining the selection values for the upward jump optimization queue; please refer to the process of determining the selection values for the upward jump optimization queue.
[0122] 304, retrieve the instruction and subsequent instructions corresponding to the jump address in the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address into the replacement queue.
[0123] In a 304 error, the Fetch module retrieves the instruction and subsequent instructions corresponding to the jump address from the instruction cache and stores them in the replacement queue.
[0124] The process of storing the instruction corresponding to the jump address and subsequent instructions into the replacement queue is as follows:
[0125] If the replacement queue is empty, the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0126] If the replacement queue is not empty, all instructions in the replacement queue are popped, and the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0127] In other words, the contents stored in the replacement queue only include the instruction corresponding to the jump address and subsequent instructions.
[0128] Alternatively, if a hit queue exists, proceed to step 305.
[0129] 305, starting from the head of the hit queue, fetch instructions sequentially.
[0130] If the instruction and subsequent instructions corresponding to the jump address are retrieved from the hit queue (the hit queue in the jump-up optimization queue and / or the hit queue in the branch prefetch optimization queue), the instruction and subsequent instructions corresponding to the jump address are written into the sequential execution queue of the Fetch module so that the instruction and subsequent instructions corresponding to the jump address can be executed.
[0131] The instruction corresponding to the jump address and its subsequent instructions are stored in the hit queue when the branch instruction is retrieved from the instruction cache.
[0132] When the instruction corresponding to the jump address does not exist in the sequential execution queue of the Fetch module, but does exist in the branch optimization queue, the Fetch module will fetch the instruction corresponding to the jump address and subsequent instructions from the hit queue. In other words, when the instruction corresponding to the jump address does not exist in the branch optimization queue of the Fetch module, it will not fetch instructions from the instruction cache, but will fetch the instruction corresponding to the jump address and subsequent instructions from the hit queue. This avoids the reduction in processor power consumption and execution efficiency caused by the prior art, which fetches instructions from the instruction cache whenever the instruction corresponding to the jump address does not exist in the branch optimization queue of the Fetch module.
[0133] Since the maneuver queue can be used as an upward jump optimization queue when the upward jump optimization queue cannot meet the actual needs of upward jump optimization, and as a branch prefetch optimization queue when the branch prefetch optimization queue cannot meet the actual needs of branch prefetch optimization, the method provided in this embodiment can also periodically adjust the maneuver queue through the following supplementary process.
[0134] 1. Determine the total number of hit checks for the upward jump optimization queue within a preset time period (e.g., the last 3 minutes). (Including the hit detection for branch optimization mode of upward jump, and the hit detection in the upward jump optimization queue during branch prefetching when the branch optimization mode is upward jump), the total number of times the detection result is a hit in the upward jump optimization queue. (Including hits in the upward jump optimization queue when the branch optimization mode is upward jump, and hits in the upward jump optimization queue when the branch optimization mode is upward jump and during branch prefetching), total number of hit checks in the branch prefetch optimization queue. (Including the hit detection for branch prefetching in the branch optimization mode, and the hit detection for branch prefetching in the branch optimization mode of jumping upwards), the total number of times the detection result indicates a hit in the branch prefetching optimization queue. (Including branch prefetch optimization queue hits when the branch optimization mode is branch prefetch, and branch prefetch optimization queue hits when the branch optimization mode is jump up and branch prefetch).
[0135] 2. If Then, a maneuver queue is designated as an upward jump optimization queue. If Then, a maneuver queue is determined as a branch prefetch optimization queue.
[0136] As can be seen from steps 301 to 304, when a branch instruction obtains the branch optimization mode and the jump address, a hit check will be performed (i.e., step 302 will be executed once). This represents the number of branch optimization requirements that generate upward jumps among all instructions executed by the program to which the instruction belongs within a preset time period. It represents the number of branch optimization requirements that generate branch prefetching among all instructions executed by the program to which the instruction belongs within a preset time period.
[0137] During the hit check, if the branch optimization mode is jump-up or branch prefetch, the result is either a hit or a miss. If the branch optimization mode is both jump-up and branch prefetch, the result is either a hit, a hit of one, a hit of the other, or a miss of both. For misses, a replacement queue is created. Therefore, each branch instruction generates a hit result, a miss result, or a hit and / or miss result. Each miss result indicates a replacement in the replacement queue. A hit result means the instruction corresponding to the jump address exists in the current branch optimization queue, meaning the jump-up optimization queue and / or branch prefetch optimization queue can meet the program requirements. A miss result means the instruction corresponding to the jump address does not exist in the current branch optimization queue, meaning the jump-up optimization queue and / or branch prefetch optimization queue cannot meet the program requirements.
[0138] Based on the above analysis This represents the number of times the upward jump optimization queue satisfies the branch instruction requirements within a preset time period (including the upward jump optimization queue hit when the branch optimization mode is upward jump, and the upward jump optimization queue hit when the branch optimization mode is upward jump and during branch prefetching). This represents the number of times the upward jump optimization queue fails to meet the branch instruction requirements within a preset time period. It represents the ratio of satisfaction to dissatisfaction. This indicates that within the preset time period, there are more cases where the upward jump optimization queue does not meet the branch instruction requirements. In this case, it is considered that the upward jump optimization queue is insufficient and the number of upward jump optimization queues needs to be increased. Therefore, a mobile queue is designated as the upward jump optimization queue.
[0139] It represents the number of times the branch prefetch optimization queue meets the branch instruction requirements within a preset time period (including the branch prefetch optimization queue hit when the branch optimization mode is branch prefetch, and the branch prefetch optimization queue hit when the branch optimization mode is jump upward and branch prefetch). This represents the number of times the branch prefetch optimization queue fails to meet the branch instruction requirements within a preset time period. It represents the ratio of satisfaction to dissatisfaction. This indicates that within the preset time period, there are more cases where the branch prefetch optimization queue does not meet the requirements of branch instructions. In this case, it is considered that the number of branch prefetch optimization queues is insufficient and the number of branch prefetch optimization queues needs to be increased. Therefore, a mobile queue is determined as the branch prefetch optimization queue.
[0140] The above is a supplementary process for the maneuver queue to the jump optimization queue and the branch prefetch optimization queue. In the method provided in this embodiment, the jump optimization queue and / or the branch prefetch optimization queue can also be periodically adjusted through the following process.
[0141] 1. Determine the optimal queue size for upward jumps from a stationary position. Determine the number of queues for prefetching optimization on static branches. .
[0142] Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period.
[0143] The static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period.
[0144] 2. If ,and Then, a static upward jump optimization queue is determined as a mobile queue. If ,and Then, a static branch prefetch optimization queue is determined as a mobile queue.
[0145] in, To optimize the upward jump queue, a threshold is set. This threshold is a standard for determining the optimization requirement of upward jump branches within a preset time period. If the optimization requirement of upward jump branches within the preset time period is less than... If the number of branches jumps upwards within the preset time period is low, it indicates that there is relatively little need for optimization of branches jumps upwards within the preset time period; otherwise, it indicates that there is relatively much need for optimization of branches jumps upwards within the preset time period. A threshold for the static upward jump optimization queue is set. This threshold is a standard for the number of unused upward jump optimization queues within a preset time period. If the number of unused upward jump optimization queues within the preset time period is less than... If the number of unused upward jump optimization queues is relatively small within the preset time period, then it indicates that the number of unused upward jump optimization queues is relatively large within the preset time period.
[0146] A threshold is set for the branch prefetch optimization queue. This threshold is a standard for determining the branch optimization demand during a preset time period. If the branch optimization demand during the preset time period is less than... If the result is positive, it indicates that there are relatively few branch optimization needs during the preset time period; otherwise, it indicates that there are relatively many branch optimization needs during the preset time period. The threshold for the static branch prefetch optimization queue is a standard for determining the number of unused branch prefetch optimization queues within a preset time period. If the number of unused branch prefetch optimization queues within the preset time period is less than... If the number of unused branch prefetch optimization queues is small within the preset time period, then the number of unused branch prefetch optimization queues is large within the preset time period.
[0147] The static upward jump optimization queue actually consists of upward jump optimization queues that have not been hit or selected as replacement queues within a preset time period. The more of these queues there are, the more unused upward jump optimization queues there are, necessitating a reduction in the number of upward jump optimization queues to release the resources they occupy. That is, if This indicates that there is relatively little need for branch optimization that jumps upwards within the preset time period. If simultaneously... If there are a large number of unused upward jump optimization queues within a preset time period, then there are few upward jump branch optimization needs and a large number of upward jump optimization queues. Therefore, it is necessary to reduce the number of upward jump optimization queues. Thus, a static upward jump optimization queue is designated as a mobile queue.
[0148] The static branch prefetch optimization queue is actually a branch prefetch optimization queue that has not been hit or selected as a replacement queue within a preset time period. The more of this queue there is, the more unused branch prefetch optimization queues there are, necessitating a reduction in the number of branch prefetch optimization queues and consequently, the resources occupied by them. That is, if This indicates that the branch optimization requirement for branch prefetching is relatively low within the preset time period. If simultaneously... If there are a large number of unused branch prefetch optimization queues within a preset time period, then the branch prefetch optimization needs are low and the number of branch prefetch optimization queues is large. Therefore, it is necessary to reduce the number of branch prefetch optimization queues. Thus, a static upward jump optimization queue is designated as a mobile queue.
[0149] Through the above process, the maneuver queue can dynamically adjust the number of the jump-optimized queue and the branch prefetch-optimized queue, thus ensuring fast instruction fetching while avoiding resource waste.
[0150] The branch optimization queue processing method provided in this embodiment can dynamically maintain the branch optimization queue. On the one hand, it maintains a reasonable number of upward jump optimization queues and branch prefetch optimization queues in the branch optimization queue. On the other hand, it ensures that the branch optimization queue contains the instruction corresponding to the jump address in the instruction cache and subsequent instructions, so that when a branch instruction that needs to jump is found during the instruction execution stage, the instruction can be quickly fetched.
[0151] The branch optimization queue processing method provided in this embodiment can be applied to the instruction fetching process for branch instructions. The specific implementation details are as follows:
[0152] 401, retrieves the branch optimization mode and jump address.
[0153] This step is step 301, and will not be elaborated here.
[0154] 402. The Fetch module determines whether there is an instruction corresponding to the jump address in the Fetch module's sequential execution queue.
[0155] 403. If the Fetch module's sequential execution queue contains instructions corresponding to the jump address, then retrieve the instructions corresponding to the jump address and subsequent instructions from the Fetch module's sequential execution queue.
[0156] In the actual implementation, if the instruction corresponding to the jump address is the head instruction of the sequential execution queue of the Fetch module, then the instructions are fetched sequentially starting from the head of the sequential execution queue of the Fetch module.
[0157] If the instruction corresponding to the jump address is not the head instruction of the sequential execution queue of the Fetch module, then (1) pop the instruction before the instruction corresponding to the jump address from the sequential execution queue of the Fetch module. (2) Start fetching instructions sequentially from the head of the sequential execution queue of the Fetch module.
[0158] In other words, the instruction corresponding to the jump address will be executed as the first instruction at the head of the sequential execution queue of the Fetch module.
[0159] 404. If the instruction corresponding to the jump address does not exist in the sequential execution queue of the Fetch module, proceed to step 302. That is, if the branch optimization mode is jump up, check if there is a hit in the jump up optimization queue. If the branch optimization mode is branch prefetch, check if there is a hit in the branch prefetch optimization queue. If the branch optimization mode is both jump up and branch prefetch, check if there is a hit in both the jump up optimization queue and the branch prefetch optimization queue.
[0160] If a hit queue exists, proceed to step 305, starting from the head of the hit queue, and fetch instructions sequentially.
[0161] If no match queue is found, then: 1) Execute step 303 to determine the replacement queue. 2) Execute step 304 to retrieve the instruction and subsequent instructions corresponding to the jump address in the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address in the replacement queue. At the same time, store the instruction and subsequent instructions corresponding to the jump address in the sequential execution queue of the Fetch module. 3) Retrieve the instruction and subsequent instructions corresponding to the jump address from the sequential execution queue of the Fetch module.
[0162] The process of storing the instruction corresponding to the jump address and subsequent instructions into the sequential execution queue of the Fetch module.
[0163] If the sequential execution queue of the Fetch module is empty, the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the sequential execution queue of the Fetch module.
[0164] If the sequential execution queue of the Fetch module is not empty, all instructions in the sequential execution queue of the Fetch module are popped, and the instructions corresponding to the jump address and subsequent instructions are sequentially stored into the sequential execution queue of the Fetch module.
[0165] In other words, the instruction corresponding to the jump address is the first instruction at the head of the sequential execution queue of the Fetch module.
[0166] Additionally, the implementation method for retrieving the instruction corresponding to the jump address and subsequent instructions from the sequential execution queue of the Fetch module is as follows:
[0167] If the instruction corresponding to the jump address is the head instruction of the sequential execution queue of the Fetch module, then the instructions are fetched sequentially starting from the head of the sequential execution queue of the Fetch module.
[0168] If the instruction corresponding to the jump address is not the head instruction of the sequential execution queue of the Fetch module, then (1) pop the instruction before the instruction corresponding to the jump address from the sequential execution queue of the Fetch module. (2) Start fetching instructions sequentially from the head of the sequential execution queue of the Fetch module.
[0169] In other words, if the Fetch module's sequential execution queue contains the instruction corresponding to the jump address, the instruction corresponding to the jump address and subsequent instructions will be retrieved from the Fetch module's sequential execution queue, regardless of whether the branch optimization queue contains such an instruction. Only when the Fetch module's sequential execution queue does not contain the instruction corresponding to the jump address, but the branch optimization queue contains the instruction corresponding to the jump address (which is stored in the hit queue or the replacement queue), will the branch optimization queue retrieve the instruction corresponding to the jump address and subsequent instructions.
[0170] In existing technologies, instructions are fetched from the instruction cache whenever the instruction corresponding to the jump address is not present in the sequential execution queue of the Fetch module. This embodiment provides a method that, even when the instruction corresponding to the jump address is not present in the sequential execution queue of the Fetch module, does not necessarily fetch from the instruction cache. Whether or not an instruction is fetched from the instruction cache depends on whether the instruction corresponding to the jump address is present in the branch optimization queue. If the instruction corresponding to the jump address is present in the branch optimization queue, the instruction cache will not be fetched; only if the instruction corresponding to the jump address is not present in the branch optimization queue will the instruction cache be fetched. This reduces the number of times instructions are fetched from the instruction cache during branch instruction execution, reduces processor power consumption, and improves execution efficiency.
[0171] The following describes in detail the process of retrieving values for the branch optimization queue processing method provided in this embodiment, taking the branch optimization mode as an upward jump, or, if the branch optimization mode is upward jump and branch prefetching, only the processing of the upward jump part as an example.
[0172] If the instructions in the sequential execution queue of the Fetch module are output from the InstrLatch register, after dispatch judgment, they are dispatched by the dispatch register, enter the Rename unit to output reg, and then output to other execution units / the issue FIFO of the execution unit, or SEQ execution. The upward jump optimization queue is 1.
[0173] Initially, the jump-up optimization queue is empty;
[0174] like Figure 6 As shown, at time Clk0, the first instruction in the current Fetch module's sequential execution queue is the SEQ instruction, which is currently being dispatched. The PCM instruction has arrived at the execution unit for execution or is waiting to be sent in the FIFO. The PCM+1 instruction is dispatched.
[0175] like Figure 7 As shown, at time Clk1, the SEQ instruction is dispatched to the Rename unit to output reg, and the PCN instruction performs dispatch determination;
[0176] like Figure 8 As shown, at time Clk2, SEQ executes the discovery instruction jump, and the jump address is PCM. Simultaneously, it returns the branch optimization mode and jump address to the Fetch module. At this point, the upward jump optimization queue is empty, and the Fetch module's sequential execution queue also lacks PCM instructions, requiring an instruction fetch request to be initiated. Instructions in the dispatch and rename categories are invalidated. At this time, the Fetch module executes step 401 to obtain the branch optimization mode and jump address.
[0177] like Figure 9 As shown, at time Clkx, the instruction PCM enters the sequential execution queue of the Fetch module from the instruction cache (such as ICache), and at the same time, the instruction is stored in the upward jump optimization queue. That is, the Fetch module executes the following process in step 404: "1) Execute step 303 to determine the replacement queue. 2) Execute step 304 to obtain the instruction and subsequent instructions corresponding to the jump address in the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address in the replacement queue, and at the same time, store the instruction and subsequent instructions corresponding to the jump address in the sequential execution queue of the Fetch module."
[0178] like Figure 10As shown, at time Clkx+1, the PCM+1 instruction enters two queues, and the PCM instruction is dispatched. That is, from time Clkx+1 onwards, the Fetch module executes step 404, specifically the process of "2) executing step 304 to obtain the instruction and subsequent instructions corresponding to the jump address in the instruction cache, and storing the instruction and subsequent instructions corresponding to the jump address in the replacement queue, and simultaneously storing the instruction and subsequent instructions corresponding to the jump address in the sequential execution queue of the Fetch module. 3) Retrieving the instruction and subsequent instructions corresponding to the jump address from the sequential execution queue of the Fetch module".
[0179] like Figure 11 As shown, at time Clkx+2, the SEQ instruction enters two queues, the PCM+1 instruction is dispatched, and the PCM instruction re-enters the execution unit for execution or waits for transmission in the FIFO.
[0180] like Figure 12 As shown, at time Clkx+3, the PCN instruction enters the sequential execution queue of the Fetch module, and the SEQ instruction is dispatched.
[0181] like Figure 13 As shown, at time Clkx+4, SEQ executes the discovery jump instruction with the jump address being PCM. At this time, it returns to the branch optimization mode and the jump address to the Fetch module. The hit queue is obtained through step 404. It is not necessary to re-initiate the PCM fetch request; it is only necessary to initiate the PCN fetch request.
[0182] like Figure 14 As shown, at time Clkx+5, the PCM and subsequent instructions are retrieved from the upward jump optimization queue. After retrieving the PCM and subsequent instructions from the upward jump optimization queue, the instructions are written into the sequential execution queue of the Fetch module. This corresponds to the process in step 404 of the Fetch module where "step 305 is executed, starting from the head of the hit queue, instructions are retrieved sequentially."
[0183] At time Clkx+6, PCM is executed to perform dispatch judgment and other subsequent processes.
[0184] The following describes in detail the process of obtaining values for the branch optimization queue processing method provided in this embodiment, taking branch prefetching as the branch optimization mode, or, if the branch optimization mode is upward jump and branch prefetching, only the processing of the branch prefetching part as an example.
[0185] Because the sequential execution queue of the Fetch module has a certain size, such as 20 instructions, it's possible that a jump address already exists in the Fetch module's sequential execution queue (this can be called a short jump). Figure 4As shown, the jump address obtained from SEQ is PCN+1. By executing step 401, it is determined that PCN+1 is already in the sequential execution queue of the Fetch module. Then, the Fetch module will execute step 403. For example, (1) the instructions before PCN+1 in the sequential execution queue of the Fetch module are popped (at this time, PCN+1 is the first instruction at the head of the Fetch module). (2) Starting from the head of the sequential execution queue of the Fetch module, instructions are fetched sequentially.
[0186] If the jump address is not in the sequential execution queue of the Fetch module (this can be called a long jump), the Fetch module executes step 404. If a hit queue exists, step 305 is executed, and instructions are fetched sequentially starting from the head of the hit queue. If no hit queue exists, then: 1) Step 303 is executed to determine the replacement queue. 2) Step 304 is executed to retrieve the instruction corresponding to the jump address and its subsequent instructions from the instruction cache, and stores the instruction corresponding to the jump address and its subsequent instructions into the replacement queue. At the same time, the instruction corresponding to the jump address and its subsequent instructions are stored into the sequential execution queue of the Fetch module. 3) The instruction corresponding to the jump address and its subsequent instructions are retrieved from the sequential execution queue of the Fetch module.
[0187] The Fetch module saves time by retrieving values using the branch-optimized queue processing method provided in this embodiment.
[0188] This embodiment provides a branch optimization queue processing method, wherein the branch optimization queue is initially empty; the branch optimization queue includes an upward jump optimization queue and a branch prefetch optimization queue; the method includes: obtaining the branch optimization mode and the jump address; wherein the branch optimization mode is upward jump and / or branch prefetch; determining whether there is a hit queue based on the branch optimization mode; wherein the hit queue contains the instruction corresponding to the jump address; if there is no hit queue, then if the branch optimization mode is upward jump and the jump address is upward jump, then the instruction corresponding to the jump address is found in the upward jump optimization queue. The method defines a replacement queue. If the branch optimization mode is branch prefetching and the jump address is a downward jump, the replacement queue is determined in the branch prefetch optimization queue. If the branch optimization mode is upward jump and branch prefetching and the jump address is upward jump, the replacement queue is determined in the upward jump optimization queue. If the branch optimization mode is upward jump and branch prefetching and the jump address is downward jump, the replacement queue is determined in the branch prefetch optimization queue. The method retrieves the instruction corresponding to the jump address and its subsequent instructions from the instruction cache and stores them in the replacement queue. In this embodiment, when there is no hit queue in the branch optimization queue, the method retrieves the instruction corresponding to the jump address and its subsequent instructions from the instruction cache and stores them in the replacement queue. This ensures that the branch optimization queue contains the instruction corresponding to the jump address and its subsequent instructions from the instruction cache, allowing for rapid instruction fetching when a branch instruction requiring a jump is detected during instruction execution.
[0189] Based on the same inventive concept as the branch optimization queue processing method, this embodiment provides a branch optimization queue processing apparatus, wherein the branch optimization queue is initially empty. The branch optimization queue includes an upward jump optimization queue and a branch prefetch optimization queue.
[0190] See Figure 15 The device includes:
[0191] Module 1501 is used to obtain the branch optimization mode and jump address. The branch optimization mode is either jump up or branch prefetch.
[0192] The first determining module 1502 is used to determine whether a hit queue exists based on the branch optimization mode. The hit queue contains instructions corresponding to the jump addresses.
[0193] The second determining module 1503 is used for
[0194] If no hit queue exists, then if the branch optimization mode is an upward jump and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is a branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue.
[0195] The processing module 1504 is used to obtain the instruction corresponding to the jump address and the subsequent instructions in the instruction cache, and store the instruction corresponding to the jump address and the subsequent instructions into the replacement queue.
[0196] There are multiple branch optimization queues.
[0197] The device also includes a branch optimization queue configuration module for reading jump initial values from registers. .in, The configuration is made in the register by the configuration instructions of the program to which the instruction belongs.
[0198] One of the multiple branch optimization queues is selected as the branch prefetch optimization queue.
[0199] like Then, all other branch optimization queues are designated as upward jump optimization queues. Optimize the total number of queues for branching.
[0200] like Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue.
[0201] Among them, the branch optimization queue includes: the maneuver queue.
[0202] The device also includes: a first adjustment module, used to determine the total number of hit checks for the upward jump optimization queue within a preset time period. The total number of times the judgment result indicates a hit and an upward jump to optimize the queue. 1. Perform branch prefetch optimization queue hit checks for a total number of times. The result indicates that there is a hit in the prefetch optimization queue. .
[0203] like Then, a maneuver queue is determined as an upward jump optimization queue.
[0204] like Then, a maneuver queue is determined as a branch prefetch optimization queue.
[0205] The device also includes: a second adjustment module for determining the number of stationary upward jump optimization queues. Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period. The number of static branch prefetch optimization queues is determined. Among them, the static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period.
[0206] like ,and Then, a static upward jump optimization queue is determined as a mobile queue. To optimize the queue judgment threshold for upward jump, Optimize the queue threshold for static upward jumps.
[0207] like ,and Then, a static branch prefetch optimization queue is determined as a mobile queue. Optimize the threshold for the branch prefetch queue. Optimize the queue threshold for prefetching static branches.
[0208] Among them, the second determining module 1503, if there is an empty upward jump optimization queue, determines an empty upward jump optimization queue as a replacement queue.
[0209] If no empty upward jump optimization queue exists, then if there is only one upward jump optimization queue, it is designated as the replacement queue. If there are two upward jump optimization queues, the upward jump optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue.
[0210] The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for any upward jump optimization queue.
[0211] The upward jump selection matrix is one Matrix, where, The total number of upward jump optimization queues is determined. Each row in the upward jump selection matrix uniquely corresponds to an upward jump optimization queue. The upward jump selection matrix is initially a 0-matrix. When a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix.
[0212] If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue.
[0213] If no empty branch prefetch optimization queue exists, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue. If there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue.
[0214] The selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix for any branch prefetch optimization queue.
[0215] The branch prefetch selection matrix is one Matrix, where, This represents the total number of branch prefetch optimization queues. Each row in the branch prefetch selection matrix uniquely corresponds to a branch prefetch optimization queue. The branch prefetch selection matrix is initially a 0-matrix. When a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix.
[0216] The processing module 1504 is used to store the instruction corresponding to the jump address and subsequent instructions sequentially into the replacement queue if the replacement queue is empty.
[0217] If the replacement queue is not empty, all instructions in the replacement queue are popped, and the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0218] The device also includes a value retrieval module, which, if a hit queue exists, retrieves instructions sequentially starting from the head of the hit queue.
[0219] The apparatus provided in this embodiment, when there is no hit queue in the branch optimization queue, retrieves the instruction corresponding to the jump address and subsequent instructions from the instruction cache in the branch optimization queue, and stores the instruction corresponding to the jump address and subsequent instructions into the replacement queue, so that there is an instruction corresponding to the jump address and subsequent instructions in the instruction cache in the branch optimization queue, and then quickly fetches the instruction when a branch instruction that needs to jump is found during the instruction execution stage.
[0220] Based on the same inventive concept as the branch optimization queue processing method, this embodiment provides an electronic device, which is as follows: Figure 16 As shown, it includes: a memory 1601, a processor 1602, and a computer program.
[0221] The computer program is stored in memory 1601 and configured to be executed by processor 1602 to implement the branch optimization queue processing method described above.
[0222] Specifically, the branch optimization queue is initially empty. The branch optimization queue includes: the jump-up optimization queue and the branch prefetch optimization queue.
[0223] The above-mentioned branch optimization queue processing methods include:
[0224] Obtain the branch optimization mode and jump address. The branch optimization mode is either jump up and / or branch prefetch.
[0225] Based on the branch optimization pattern, determine whether a hit queue exists. The hit queue contains the instructions corresponding to the jump addresses.
[0226] If no hit queue exists, then if the branch optimization mode is an upward jump and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is a branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue.
[0227] Retrieve the instruction and subsequent instructions corresponding to the jump address from the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address into the replacement queue.
[0228] Optionally, there can be multiple branch optimization queues.
[0229] Before obtaining the branch optimization mode and jump address, it also includes:
[0230] Jump initial value read from register .in, The configuration is made in the register by the configuration instructions of the program to which the instruction belongs.
[0231] One of the multiple branch optimization queues is selected as the branch prefetch optimization queue.
[0232] like Then, all other branch optimization queues are designated as upward jump optimization queues. Optimize the total number of queues for branching.
[0233] like Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue.
[0234] Optionally, the branch optimization queue includes: a maneuver queue.
[0235] The method also includes:
[0236] Determine the total number of hit checks for the upward jump optimization queue within a preset time period. The total number of times the judgment result indicates a hit and an upward jump to optimize the queue. 1. Perform branch prefetch optimization queue hit checks for a total number of times. The result indicates that there is a hit in the prefetch optimization queue. .
[0237] like Then, a maneuver queue is determined as an upward jump optimization queue.
[0238] like Then, a maneuver queue is determined as a branch prefetch optimization queue.
[0239] Optionally, the method further includes:
[0240] Determine the optimal number of queues for upward jumps from a stationary position. Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period. The number of static branch prefetch optimization queues is determined. Among them, the static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period.
[0241] like ,and Then, a static upward jump optimization queue is determined as a mobile queue. To optimize the queue judgment threshold for upward jump, Optimize the queue threshold for static upward jumps.
[0242] like ,and Then, a static branch prefetch optimization queue is determined as a mobile queue. Optimize the threshold for the branch prefetch queue. Optimize the queue threshold for prefetching static branches.
[0243] Optionally, the replacement queue is determined in the upward jump optimization queue, including:
[0244] If an empty jump-up optimization queue exists, then an empty jump-up optimization queue is designated as the replacement queue.
[0245] If no empty upward jump optimization queue exists, then if there is only one upward jump optimization queue, it is designated as the replacement queue. If there are two upward jump optimization queues, the upward jump optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue.
[0246] The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for any upward jump optimization queue.
[0247] The upward jump selection matrix is one Matrix, where, The total number of upward jump optimization queues is determined. Each row in the upward jump selection matrix uniquely corresponds to an upward jump optimization queue. The upward jump selection matrix is initially a 0-matrix. When a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix.
[0248] Determine the replacement queue in the branch prefetch optimization queue, including:
[0249] If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue.
[0250] If no empty branch prefetch optimization queue exists, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue. If there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue.
[0251] The selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix for any branch prefetch optimization queue.
[0252] The branch prefetch selection matrix is one Matrix, where, This represents the total number of branch prefetch optimization queues. Each row in the branch prefetch selection matrix uniquely corresponds to a branch prefetch optimization queue. The branch prefetch selection matrix is initially a 0-matrix. When a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix.
[0253] Optionally, the instruction corresponding to the jump address and subsequent instructions are stored in the replacement queue, including:
[0254] If the replacement queue is empty, the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0255] If the replacement queue is not empty, all instructions in the replacement queue are popped, and the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0256] Optionally, the method further includes:
[0257] If a hit queue exists, instructions are fetched sequentially starting from the head of the hit queue.
[0258] The electronic device provided in this embodiment has a computer program executed by a processor to retrieve the instruction and subsequent instructions corresponding to the jump address in the instruction cache from the branch optimization queue when there is no hit queue in the branch optimization queue, and store the instruction and subsequent instructions corresponding to the jump address in the replacement queue, so that there is an instruction and subsequent instructions corresponding to the jump address in the instruction cache in the branch optimization queue, and then quickly fetches the instruction when a branch instruction that needs to jump is found during the instruction execution stage.
[0259] Based on the same inventive concept as the branch-optimized queue processing method, this embodiment provides a computer-readable storage medium on which a computer program is stored. The computer program is executed by a processor to implement the aforementioned branch-optimized queue processing method.
[0260] Specifically, the branch optimization queue is initially empty. The branch optimization queue includes: the jump-up optimization queue and the branch prefetch optimization queue.
[0261] The above-mentioned branch optimization queue processing methods include:
[0262] Obtain the branch optimization mode and jump address. The branch optimization mode is either jump up and / or branch prefetch.
[0263] If no hit queue exists, then if the branch optimization mode is an upward jump and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is a branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is upward, the replacement queue is determined from the upward jump optimization queue. If the branch optimization mode is both upward jump and branch prefetch and the jump address is downward, the replacement queue is determined from the branch prefetch optimization queue.
[0264] Retrieve the instruction and subsequent instructions corresponding to the jump address from the instruction cache, and store the instruction and subsequent instructions corresponding to the jump address into the replacement queue.
[0265] Optionally, there can be multiple branch optimization queues.
[0266] Before obtaining the branch optimization mode and jump address, it also includes:
[0267] Jump initial value read from register .in, The configuration is made in the register by the configuration instructions of the program to which the instruction belongs.
[0268] One of the multiple branch optimization queues is selected as the branch prefetch optimization queue.
[0269] like Then, all other branch optimization queues are designated as upward jump optimization queues. Optimize the total number of queues for branching.
[0270] like Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue.
[0271] Optionally, the branch optimization queue includes: a maneuver queue.
[0272] The method also includes:
[0273] Determine the total number of hit checks for the upward jump optimization queue within a preset time period. The total number of times the judgment result indicates a hit and an upward jump to optimize the queue. 1. Perform branch prefetch optimization queue hit checks for a total number of times. The result indicates that there is a hit in the prefetch optimization queue. .
[0274] like Then, a maneuver queue is determined as an upward jump optimization queue.
[0275] like Then, a maneuver queue is determined as a branch prefetch optimization queue.
[0276] Optionally, the method further includes:
[0277] Determine the optimal number of queues for upward jumps from a stationary position. Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period. The number of static branch prefetch optimization queues is determined. Among them, the static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period.
[0278] like ,and Then, a static upward jump optimization queue is determined as a mobile queue. To optimize the queue judgment threshold for upward jump, Optimize the queue threshold for static upward jumps.
[0279] like ,and Then, a static branch prefetch optimization queue is determined as a mobile queue. Optimize the threshold for the branch prefetch queue. Optimize the queue threshold for prefetching static branches.
[0280] Optionally, the replacement queue is determined in the upward jump optimization queue, including:
[0281] If an empty jump-up optimization queue exists, then an empty jump-up optimization queue is designated as the replacement queue.
[0282] If no empty upward jump optimization queue exists, then if there is only one upward jump optimization queue, it is designated as the replacement queue. If there are two upward jump optimization queues, the upward jump optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue.
[0283] The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for any upward jump optimization queue.
[0284] The upward jump selection matrix is one Matrix, where, The total number of upward jump optimization queues is determined. Each row in the upward jump selection matrix uniquely corresponds to an upward jump optimization queue. The upward jump selection matrix is initially a 0-matrix. When a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix.
[0285] Determine the replacement queue in the branch prefetch optimization queue, including:
[0286] If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue.
[0287] If no empty branch prefetch optimization queue exists, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue. If there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not previously designated as a replacement queue is designated as the replacement queue. If there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue.
[0288] The selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix for any branch prefetch optimization queue.
[0289] The branch prefetch selection matrix is one Matrix, where, This represents the total number of branch prefetch optimization queues. Each row in the branch prefetch selection matrix uniquely corresponds to a branch prefetch optimization queue. The branch prefetch selection matrix is initially a 0-matrix. When a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix.
[0290] Optionally, the instruction corresponding to the jump address and subsequent instructions are stored in the replacement queue, including:
[0291] If the replacement queue is empty, the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0292] If the replacement queue is not empty, all instructions in the replacement queue are popped, and the instruction corresponding to the jump address and subsequent instructions are sequentially stored in the replacement queue.
[0293] Optionally, the method further includes:
[0294] If a hit queue exists, instructions are fetched sequentially starting from the head of the hit queue.
[0295] The computer-readable storage medium provided in this embodiment has a computer program thereon that is executed by a processor to retrieve the instruction corresponding to the jump address in the instruction cache and subsequent instructions from the branch optimization queue when there is no hit queue in the branch optimization queue, and store the instruction corresponding to the jump address and subsequent instructions into the replacement queue, so that there is an instruction corresponding to the jump address in the instruction cache in the branch optimization queue, and then quickly fetches the instruction when a branch instruction that needs to jump is found during the instruction execution stage.
[0296] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of this application can be implemented in various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.
[0297] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0298] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0299] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0300] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0301] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. A branch-optimized queue processing method, characterized in that, The branch optimization queue is initially empty; There are multiple branch optimization queues; the branch optimization queues include: an upward jump optimization queue and a branch prefetch optimization queue; wherein: the branch optimization queue does not actively initiate instruction fetch requests, but only passively receives instructions; the upward jump optimization queue only stores the jump address instructions of the upward jump branch, and the branch prefetch optimization queue only stores the jump address instructions of the downward and long branches; the method includes: Jump initial value read from register ; wherein, the The configuration is made in the register by the configuration instructions of the program to which the instruction belongs; One of the multiple branch optimization queues is selected as the branch prefetch optimization queue; like Then, all other branch optimization queues will be designated as upward jump optimization queues; among them, Optimize the total number of queues for branching; like Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue; Obtain the branch optimization mode and jump address; where the branch optimization mode is jump up and / or branch prefetch; Based on the branch optimization mode, determine whether there is a hit queue; wherein, the hit queue contains the instruction corresponding to the jump address; If no hit queue exists, then if the branch optimization mode is an upward jump and the jump address is an upward jump, a replacement queue is determined in the upward jump optimization queue; if the branch optimization mode is a branch prefetch and the jump address is a downward jump, a replacement queue is determined in the branch prefetch optimization queue; if the branch optimization mode is both an upward jump and a branch prefetch and the jump address is an upward jump, a replacement queue is determined in the upward jump optimization queue; if the branch optimization mode is both an upward jump and a branch prefetch and the jump address is a downward jump, a replacement queue is determined in the branch prefetch optimization queue; wherein, determining the replacement queue in the upward jump optimization queue includes: If an empty jump-up optimization queue exists, then an empty jump-up optimization queue is designated as the replacement queue. If there is no empty upward jump optimization queue, then if there is only one upward jump optimization queue, it is designated as the replacement queue; if there are two upward jump optimization queues, the upward jump optimization queue that was not used as a replacement queue in the previous time is designated as the replacement queue; if there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue. The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for that any upward jump optimization queue; The upward jump selection matrix is a Matrix, where, The total number of upward jump optimization queues; each row in the upward jump selection matrix uniquely corresponds to one upward jump optimization queue; the upward jump selection matrix is initially a 0 matrix; when a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix; The step of determining the replacement queue in the branch prefetch optimization queue includes: If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue. If there is no empty branch prefetch optimization queue, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue; if there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not used as a replacement queue in the previous case is designated as the replacement queue; if there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue. Wherein, the selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix of any branch prefetch optimization queue; The branch prefetch selection matrix is a Matrix, where, The total number of branch prefetch optimization queues; each row in the branch prefetch selection matrix uniquely corresponds to one branch prefetch optimization queue; the branch prefetch selection matrix is initially a 0 matrix; when a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix; Retrieving the instruction and subsequent instructions corresponding to the jump address from the instruction cache, and storing the instruction and subsequent instructions corresponding to the jump address into the replacement queue, includes: if the replacement queue is empty, storing the instruction and subsequent instructions corresponding to the jump address into the replacement queue in sequence; if the replacement queue is not empty, popping all instructions from the replacement queue, and storing the instruction and subsequent instructions corresponding to the jump address into the replacement queue in sequence.
2. The method according to claim 1, characterized in that, The branch optimization queue includes: a maneuver queue; The method further includes: Determine the total number of hit checks for the upward jump optimization queue within a preset time period. The total number of times the judgment result indicates a hit and an upward jump to optimize the queue.
1. Perform branch prefetch optimization queue hit checks for a total number of times. The result indicates that there is a hit in the prefetch optimization queue. ; like Then, a maneuver queue is designated as an upward jump optimization queue; like Then, a maneuver queue is determined as a branch prefetch optimization queue.
3. The method according to claim 2, characterized in that, The method further includes: Determine the optimal number of queues for upward jumps from a stationary position. Among them, the static upward jump optimization queue is the upward jump optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each upward jump optimization queue within a preset time period; the number of static branch prefetch optimization queues is determined. Among them, the static branch prefetch optimization queue is the branch prefetch optimization queue that is neither a hit queue nor a replacement queue in the hit judgment of each branch prefetch optimization queue within a preset time period. like ,and Then, a static upward jump optimization queue is determined as a mobile queue; To optimize the queue judgment threshold for upward jump, Optimize queue thresholds for static upward jumps; like ,and Then, a static branch prefetch optimization queue is determined as a mobile queue; Optimize the threshold for the branch prefetch queue. Optimize the queue threshold for prefetching static branches.
4. The method according to claim 1, characterized in that, The method further includes: If a hit queue exists, instructions are fetched sequentially starting from the head of the hit queue.
5. A branch optimization queue processing device, characterized in that, The branch optimization queue is initially empty; There are multiple branch optimization queues; the branch optimization queues include: an upward jump optimization queue and a branch prefetch optimization queue; wherein: the branch optimization queue does not actively initiate instruction fetch requests, but only passively receives instructions; the upward jump optimization queue only stores the jump address instructions of the upward jump branch, and the branch prefetch optimization queue only stores the jump address instructions of the downward and long branches; the device includes: The module is used to retrieve the jump initial value from the register. ; wherein, the The configuration instructions of the program to which the instruction belongs configure the register; one of the multiple branch optimization queues is determined as the branch prefetch optimization queue; if Then, all other branch optimization queues will be designated as upward jump optimization queues; among them, Optimize the total number of queues for branching; if Then optimize the remaining branches in the queue. One queue is designated as the upward jump optimization queue, and the remaining branch optimization queue is designated as the maneuver queue; obtain the branch optimization mode and jump address; wherein, the branch optimization mode is upward jump and / or branch prefetch; The first determining module is used to determine whether a hit queue exists based on the branch optimization mode; wherein the hit queue contains the instruction corresponding to the jump address; The second determining module is configured to, if no hit queue exists, determine a replacement queue in the upward jump optimization queue if the branch optimization mode is upward jump and the jump address is upward jump; determine a replacement queue in the branch prefetch optimization queue if the branch optimization mode is branch prefetch and the jump address is downward jump; determine a replacement queue in the upward jump optimization queue if the branch optimization mode is both upward jump and branch prefetch and the jump address is upward jump; and determine a replacement queue in the branch prefetch optimization queue if the branch optimization mode is both upward jump and branch prefetch and the jump address is downward jump. The determination of the replacement queue in the upward jump optimization queue includes: If an empty jump-up optimization queue exists, then an empty jump-up optimization queue is designated as the replacement queue. If there is no empty upward jump optimization queue, then if there is only one upward jump optimization queue, it is designated as the replacement queue; if there are two upward jump optimization queues, the upward jump optimization queue that was not used as a replacement queue in the previous time is designated as the replacement queue; if there are more than two upward jump optimization queues, the upward jump optimization queue with the smallest value is selected as the replacement queue. The selection value of any upward jump optimization queue is the sum of all elements in the corresponding row of the upward jump selection matrix for that any upward jump optimization queue; The upward jump selection matrix is a Matrix, where, The total number of upward jump optimization queues; each row in the upward jump selection matrix uniquely corresponds to one upward jump optimization queue; the upward jump selection matrix is initially a 0 matrix; when a certain upward jump optimization queue... When a queue is selected for replacement, jump up to the selection matrix. The elements in the first row are updated to 1, then the selection is moved up to the next element in the matrix. The elements of the column are then updated to 0, where the first element is... Behavior-based upward jump optimization queue Jump up to select the corresponding row in the matrix; The step of determining the replacement queue in the branch prefetch optimization queue includes: If an empty branch prefetch optimization queue exists, then an empty branch prefetch optimization queue is designated as the replacement queue. If there is no empty branch prefetch optimization queue, then if there is only one branch prefetch optimization queue, it is designated as the replacement queue; if there are two branch prefetch optimization queues, the branch prefetch optimization queue that was not used as a replacement queue in the previous case is designated as the replacement queue; if there are more than two branch prefetch optimization queues, the branch prefetch optimization queue with the smallest selection value is designated as the replacement queue. Wherein, the selection value of any branch prefetch optimization queue is the sum of all elements in the corresponding row of the branch prefetch selection matrix of any branch prefetch optimization queue; The branch prefetch selection matrix is a Matrix, where, The total number of branch prefetch optimization queues; each row in the branch prefetch selection matrix uniquely corresponds to one branch prefetch optimization queue; the branch prefetch selection matrix is initially a 0 matrix; when a certain branch prefetch optimization queue... When a queue is identified as a replacement queue, the branch prefetch selection matrix is... The elements of the first row are updated to 1, and the branch prefetch selection matrix is then used. The elements of the column are then updated to 0, where the first element is... Behavior branch prefetch optimization queue The corresponding row in the branch prefetch selection matrix; The processing module is used to obtain the instruction corresponding to the jump address and subsequent instructions from the instruction cache, and store the instruction corresponding to the jump address and subsequent instructions into the replacement queue, including: if the replacement queue is empty, then storing the instruction corresponding to the jump address and subsequent instructions into the replacement queue in sequence; if the replacement queue is not empty, then popping all instructions from the replacement queue, and storing the instruction corresponding to the jump address and subsequent instructions into the replacement queue in sequence.
6. An electronic device, characterized in that, include: Memory; processor; as well as Computer programs; The computer program is stored in the memory and configured to be executed by the processor to implement the method as described in any one of claims 1-4.
7. A computer-readable storage medium, characterized in that, It stores a computer program thereon; the computer program is executed by a processor to implement the method as described in any one of claims 1-4.
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