Page missing interruption processing method and electronic equipment

Abstract

The invention provides a missing page interrupt processing method and electronic equipment, and relates to the field of computer system management. The method comprises the steps that information of missing page interruption is received, the information represents that missing page interruption occurs in the process of accessing a first virtual memory page, the information comprises a second virtual memory page, and the second virtual memory page is obtained through mapping based on a target physical memory page allocated by the missing page interruption; writing data corresponding to the first virtual memory page into the second virtual memory page; and in response to completion of writing the data into the second virtual memory page, sending exception handling information of the missing page interruption.

Description

Technical Field

[0001] The present disclosure relates to the technical field of computer system management, and in particular to a page fault interrupt processing method and electronic device. Background Art

[0002] In modern computer systems, page fault interrupt is a major problem in virtual memory management technology. It is an exception triggered when accessing a virtual memory page that does not have a corresponding physical memory page.

[0003] In the prior art, processing a page fault interrupt requires a large number of memory copies and system call operations, resulting in an excessively long processing time for the page fault interrupt. Summary of the Invention

[0004] In view of this, the present disclosure provides a page fault interrupt processing method and an electronic device.

[0005] One aspect of the present disclosure provides a method for handling a page fault interrupt, comprising: receiving information about a page fault interrupt, the information indicating that a page fault interrupt occurs during access to a first virtual memory page, the information including a second virtual memory page, the second virtual memory page being obtained by mapping a target physical memory page allocated based on the page fault interrupt; writing data corresponding to the first virtual memory page into the second virtual memory page; and sending exception handling information of the page fault interrupt in response to completion of writing the data into the second virtual memory page.

[0006] According to an embodiment of the present disclosure, writing the data corresponding to the first virtual memory page into the second virtual memory page includes: determining the device type of the target storage device, which is used to store the data corresponding to the first virtual memory page; based on the device type, using a write operation that matches the device type, writing the data to the second virtual memory page.

[0007] According to an embodiment of the present disclosure, the device type includes a first type, the storage medium of the first type is locally connected to the user-state memory library and performs a write operation through a virtual memory page; based on the device type, the data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the target storage device is the first type, using a memory read and write interface to write the data corresponding to the first virtual memory page to the second virtual memory page.

[0008] According to an embodiment of the present disclosure, the device type includes a second type, and the storage medium of the second type is a remote device; based on the device type, the data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the target storage device is the second type, the data corresponding to the first virtual memory page is written to the second virtual memory page using remote direct memory access technology.

[0009] According to an embodiment of the present disclosure, the device type includes a third type, and the storage device of the third type is locally connected to the user-state memory library and supports writing operations using physical memory; based on the device type, the data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the target storage device is the third type, the physical memory access technology is used to write the data corresponding to the first virtual memory page to the target physical memory page mapped to obtain the second virtual memory page.

[0010] According to an embodiment of the present disclosure, the third type of storage device is a user-state non-volatile memory or a memory connected to a computing fast link, and the physical memory access technology is a direct memory access technology.

[0011] According to an embodiment of the present disclosure, the third type of storage device is a graphics card memory, and the physical memory access technology is a point-to-point image processor direct communication technology.

[0012] According to an embodiment of the present disclosure, the exception handling information includes an end flag bit, and the end flag bit is used by the kernel to determine whether the data corresponding to the first virtual memory page is written into the second virtual memory page.

[0013] Another aspect of the present disclosure also provides a page fault interrupt processing method, which is applied to a kernel, including: in response to a page fault interrupt occurring during access to a first virtual memory page, allocating a target physical memory page and a second virtual memory page for the page fault interrupt, wherein the second virtual memory page is obtained by mapping based on the target physical memory page allocated by the page fault interrupt; sending page fault interrupt information to a target memory pool, wherein the page fault interrupt information indicates that a page fault interrupt occurs during access to the first virtual memory page, and the information includes the second virtual memory page; in response to receiving exception handling information of the page fault interrupt, creating a mapping relationship between the first virtual memory page and the target physical memory page.

[0014] Another aspect of the present disclosure also provides a page fault interrupt processing device, including: a receiving module, used to receive page fault interrupt information, the information indicating that a page fault interrupt occurs during access to a first virtual memory page, the information including a second virtual memory page, the second virtual memory page being obtained by mapping the target physical memory page allocated based on the page fault interrupt; a first processing module, used to write data corresponding to the first virtual memory page into the second virtual memory page; and a first sending module, used to send exception handling information of the page fault interrupt in response to completing writing the data into the second virtual memory page.

[0015] According to an embodiment of the present disclosure, the first processing module writes the data corresponding to the first virtual memory page into the second virtual memory page in the following manner: determining the device type of the target storage device, the target storage device being used to store the data corresponding to the first virtual memory page; based on the device type, using a write operation that matches the device type, writing the data into the second virtual memory page.

[0016] According to an embodiment of the present disclosure, the device type includes a first type, the storage medium of the first type is locally connected to the user-state memory library and performs write operations through virtual memory pages; the first processing module adopts the following method based on the device type, using a write operation matching the device type to write the data to the second virtual memory page: when the device type of the target storage device is the first type, use the memory read and write interface to write the data corresponding to the first virtual memory page to the second virtual memory page.

[0017] According to an embodiment of the present disclosure, the device type includes a second type, and the storage medium of the second type is a remote device; the first processing module adopts the following method based on the device type, using a write operation matching the device type to write the data to the second virtual memory page: when the device type of the target storage device is the second type, remote direct memory access technology is used to write the data corresponding to the first virtual memory page into the second virtual memory page.

[0018] According to an embodiment of the present disclosure, the device type includes a third type, and the third type of storage device is locally connected to the user-state memory library and supports write operations using physical memory; the first processing module adopts the following method based on the device type, using a write operation matching the device type to write the data to the second virtual memory page: when the device type of the target storage device is the third type, use physical memory access technology to write the data corresponding to the first virtual memory page to the target physical memory page mapped to obtain the second virtual memory page.

[0019] According to an embodiment of the present disclosure, the third type of storage device is a user-state non-volatile memory or a memory connected to a computing fast link, and the physical memory access technology is a direct memory access technology.

[0020] According to an embodiment of the present disclosure, the third type of storage device is a graphics card memory, and the physical memory access technology is a point-to-point image processor direct communication technology.

[0021] According to an embodiment of the present disclosure, the exception handling information includes an end flag bit, and the end flag bit is used by the kernel to determine whether the data corresponding to the first virtual memory page is written into the second virtual memory page.

[0022] Another aspect of the present disclosure also provides a page fault interrupt processing device, which is applied to a kernel, including: an allocation module, which is used to allocate a target physical memory page and a second virtual memory page for the page fault interrupt in response to a page fault interrupt occurring during access to a first virtual memory page, and the second virtual memory page is obtained by mapping the target physical memory page allocated by the page fault interrupt; a second sending module, which is used to send page fault interrupt information to a target memory pool, and the page fault interrupt information indicates that a page fault interrupt occurs during access to the first virtual memory page, and the information includes the second virtual memory page; a second processing module, which is used to create a mapping relationship between the first virtual memory page and the target physical memory page in response to receiving exception handling information of the page fault interrupt.

[0023] Another aspect of the present disclosure provides an electronic device, comprising: one or more processors; and a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors are caused to perform the above method.

[0024] Another aspect of the present disclosure further provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to perform the above method.

[0025] Another aspect of the present disclosure provides a computer program product, including a computer program, which implements the above method when executed by a processor.

[0026] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0028] Figure 1 1 is a schematic diagram of an exemplary system architecture to which a page fault interrupt processing method and apparatus can be applied according to an embodiment of the present disclosure.

[0029] Figure 2 FIG. 1 is a schematic diagram illustrating an exemplary method for handling a page fault interrupt.

[0030] Figure 3 The flowchart of the page fault interrupt processing method according to the embodiment of the present disclosure is schematically shown.

[0031] Figure 4 This is a schematic diagram exemplarily showing a method of writing data into a second virtual memory page.

[0032] Figure 5 The flowchart of the page fault interrupt processing method according to the embodiment of the present disclosure is schematically shown.

[0033] Figure 6 FIG. 1 is a schematic diagram illustrating an exemplary method for handling a page fault interrupt.

[0034] Figure 7 The module diagram of the page fault interrupt processing device according to the embodiment of the present disclosure is schematically shown.

[0035] Figure 8 The module diagram of the page fault interrupt processing device according to the embodiment of the present disclosure is schematically shown.

[0036] Figure 9 A schematic block diagram of an electronic device that can be used to implement the page fault interrupt processing method of an embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0037] Embodiments of the present disclosure are described below with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to aid understanding, and should be considered merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted from the following description.

[0038] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise," "include," etc. used herein indicate the presence of features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0039] All terms used herein, including technical and scientific terms, have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0040] When expressions such as “at least one of A, B, and C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, and C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc. When expressions such as “at least one of A, B, or C, etc.” are used, they should generally be interpreted in accordance with the meaning commonly understood by those skilled in the art. For example, “a system having at least one of A, B, or C” should include but is not limited to systems having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, and C, etc.

[0041] It should also be noted that directional terms such as "upper," "lower," "front," "back," "left," and "right" mentioned in the embodiments are merely references to the directions in the accompanying drawings and are not intended to limit the scope of protection of this disclosure. Throughout the drawings, identical elements are represented by identical or similar reference numerals. Conventional structures or configurations will be omitted where they may cause confusion in understanding this disclosure.

[0042] In the technical solutions disclosed herein, the collection, storage, use, processing, transmission, provision, disclosure and application of the data involved (including but not limited to user personal information) comply with the provisions of relevant laws and regulations, take necessary confidentiality measures, and do not violate public order and good morals.

[0043] Figure 1 This is a schematic diagram of an exemplary system architecture to which a page fault interrupt processing method and apparatus can be applied according to an embodiment of the present disclosure. It should be noted that: Figure 1 The examples shown are merely examples of system architectures to which the embodiments of the present disclosure may be applied, to help those skilled in the art understand the technical content of the present disclosure, but do not mean that the embodiments of the present disclosure may not be used in other devices, systems, environments or scenarios.

[0044] like Figure 1 As shown, the system architecture 100 according to this embodiment may include a core 110, a memory 120, and a storage medium 130. The core 110, the memory 120, and the storage medium 130 are connected via a bus, which may be a wired bus or a wireless bus, and is used for data transmission between the core 110, the memory 120, and the storage medium 130.

[0045] For example, data read and write operations between the memory 120 and the storage medium 130 can be implemented through data copy operations by the kernel 110, and the memory 120 and the storage medium 10 can also perform data transmission through other read and write controllers, such as a direct memory access (DMA) controller.

[0046] The system architecture 100 can be deployed on various electronic devices that have a display screen and support web browsing, including but not limited to smart phones, tablet computers, laptop computers, desktop computers, and the like.

[0047] In practical scenarios where electronic devices use memory to read and write data, programs in these devices are allowed to use more memory space than the actual physical memory. This is achieved by swapping out infrequently used pages to storage devices, including disks. However, when accessing a virtual memory page that is not mapped to physical memory, a page fault interrupt is triggered.

[0048] For ease of description, the virtual memory page accessed to cause a page fault interrupt will be referred to as a first virtual memory page hereinafter.

[0049] In some methods for handling page fault interrupts, if a page fault occurs while accessing a first virtual memory page, the kernel sends the page fault event to a user-mode memory library. The user-mode memory library receives the page fault event, determines the data corresponding to the first virtual memory page, and writes the data corresponding to the first virtual memory page into a preset virtual memory cache. After writing the data corresponding to the first virtual memory page into the preset virtual memory cache, the kernel allocates physical memory to the first virtual memory page and, using memory copy technology, copies the data in the virtual memory cache to the first virtual memory page, thereby handling the page fault event.

[0050] For example, Figure 2 FIG. 1 is a schematic diagram illustrating a method for handling a page fault interrupt. Figure 2In the process, the user-state program or user-state memory library maps the first virtual memory page to the address space of the process through memory mapping to access the first virtual memory page. And through the user-state page fault mechanism, set the user fault descriptor (userfaultfd), create a page fault exception file descriptor, and set it to non-blocking mode to access the first virtual memory page. The physical memory page corresponding to the first virtual memory page is obtained through the page table, and the data in the physical memory page is accessed. Since there is no physical memory page corresponding to the first virtual memory page in the page table, that is, the user-state program accesses the unmapped first virtual memory page, a page fault interrupt is triggered, and control is transferred to the kernel, which performs page fault processing. The kernel calls the user-state memory library to handle the page fault interrupt event and sends page fault interrupt information to the user-state memory library, wherein the page fault interrupt information includes the first virtual memory page.

[0051] exist Figure 2 In the process, the user-state memory library is activated, receives information about the page fault interrupt, and begins to process the page fault interrupt event. The user-state memory library uses the memory allocation function to allocate buffer memory for the page fault interrupt in the user-state memory buffer. In addition, the data corresponding to the first virtual memory page in the information about the page fault interrupt is determined. Through the read instruction, the data corresponding to the first virtual memory page is read from the disk, remote server, or other storage device into the allocated buffer memory. After the read is completed, the user-state memory library sends a data copy instruction (UFFDIO_COPY) to the kernel to instruct the kernel to write the data in the allocated buffer memory to the first virtual memory page.

[0052] After receiving the data copy instruction, the kernel allocates a corresponding physical memory page for the first virtual memory page, and copies the data in the allocated buffer memory to the physical memory page, establishes a page table entry in the page table that represents the mapping relationship between the first virtual memory page and the physical memory page, realizes the mapping of the first virtual memory page and the physical memory page, and obtains the data corresponding to the first virtual memory page by accessing the first virtual memory page, thereby resolving the page fault interrupt.

[0053] However, in a scenario where multiple threads read data concurrently, if all accessible virtual memory pages are used to read the data corresponding to the first virtual memory page, if in the process of reading the virtual memory page, the virtual memory page of other threads reads incomplete and erroneous data, concurrent access problems will occur.

[0054] In view of this, an embodiment of the present disclosure provides a page fault interrupt processing method applied to a user-mode memory library. By receiving information about a page fault interrupt, data corresponding to a first virtual memory page is written into a second virtual memory page obtained by mapping a pre-allocated physical address as indicated in the information about the page fault interrupt, thereby avoiding conflicts with other processes accessing the first virtual memory page due to long-term processing of the first virtual memory page and reducing concurrent access problems.

[0055] The user-mode memory pool, also known as a memory pool, is a technology that pre-allocates, centrally manages, and efficiently reuses memory resources. This avoids the performance overhead associated with frequent dynamic memory allocation. Artificial intelligence (AI) and machine learning (ML) tasks often require large amounts of memory allocation and release. Using a memory pool can reduce fragmentation and improve computing stability.

[0056] Figure 3 The flowchart of the page fault interrupt processing method according to the embodiment of the present disclosure is schematically shown.

[0057] like Figure 3 As shown, the method includes: operations S301 to S303.

[0058] In operation S301 , page fault interrupt information is received, where the information indicates that a page fault occurs during access to a first virtual memory page. The information includes a second virtual memory page, which is obtained by mapping a target physical memory page allocated based on the page fault interrupt.

[0059] The user-mode memory library can determine the first virtual memory page where the page fault occurs based on the page fault information, or can determine the second virtual memory page mapped to the target physical memory page allocated for the page fault based on the page fault information. The target physical memory page is the physical memory page allocated by the kernel when a page fault is detected when accessing the first virtual memory page.

[0060] The second virtual memory page can be obtained by mapping the target physical memory page using mapping methods such as kmap and ioremap. It should be understood that other mapping methods can also be used to map the target physical memory page to obtain the second virtual memory page. The above mapping methods are only used for exemplary description and are not limited in this disclosure.

[0061] In operation S302 , data corresponding to the first virtual memory page is written into the second virtual memory page.

[0062] The data corresponding to the first virtual memory page is the data written from the storage medium to the physical memory page corresponding to the first virtual memory page before the page fault occurs. The data corresponding to the first virtual memory page can be obtained by parsing the information of the first virtual memory page, for example, determining the file and location of the corresponding information based on the file descriptor and offset of the first virtual memory page in the page table; or loading data from the file system based on the file information in the page table through the file system interface.

[0063] The data corresponding to the first virtual memory page is written into the second virtual memory page, and the physical address having a mapping relationship with the second virtual memory page is used as the target physical address, so that the target physical address includes the data corresponding to the first virtual memory page.

[0064] In operation S303 , in response to completion of writing the data into the second virtual memory page, exception handling information of a page fault interrupt is sent.

[0065] The exception handling information of the page fault interrupt is used by the kernel to determine that data writing to the second virtual memory page is completed, and is used to instruct the kernel to perform subsequent operations such as page table setting.

[0066] When a page fault occurs when accessing the first virtual memory, the data missing from the first memory page due to the page fault is saved by using the second virtual memory page mapped by the physical memory page newly allocated for the page fault, so that the second memory page used to read data cannot be accessed by other threads, avoiding the concurrent access problem in multi-threaded scenarios.

[0067] The data corresponding to the first virtual memory page may be stored in target storage devices of different types.

[0068] In an embodiment of the present disclosure, writing data corresponding to a first virtual memory page into a second virtual memory page includes: determining a device type of a target storage device, where the target storage device is used to store data corresponding to the first virtual memory page; and based on the device type, using a write operation that matches the device type, writing the data into the second virtual memory page.

[0069] The device type of the target storage device can be determined by parsing metadata of the file where the data corresponding to the first virtual memory page is located.

[0070] For example, the device type of the target storage device is determined by querying the file system, reading the device identifier, and detecting the hardware.

[0071] The target storage device of a device type with data processing permission can write data in the target storage device into the second virtual memory page by performing at least one write operation. If a target storage device of a device type exists that can write data to the memory through multiple write operations, a preset correspondence between the device type and the write operation can be used to determine the write operation that matches the device type.

[0072] The target storage device can be a storage device locally connected to the user-state memory bank, a storage device remotely connected to the user-state memory bank, or a non-conventional storage medium such as user-state non-volatile memory, memory connected to Compute Express Link (CXL), or graphics card memory.

[0073] By using a write operation that matches the device type of the target storage device to write data, data corresponding to the first virtual memory page in the target storage device is written to the second virtual memory page, thereby improving the versatility of writing data to the second virtual memory.

[0074] The following describes the process of writing data to the second virtual memory page using write operations that match the device type, using user-mode non-volatile memory, memory connected to a Compute Express Link (CXL), and graphics card memory as examples.

[0075] In an embodiment of the present disclosure, the device type includes a first type, the storage medium of the first type is locally connected to the user-state memory library and performs write operations through a virtual memory page; based on the device type, data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the target storage device is the first type, using a memory read and write interface to write data corresponding to the first virtual memory page to the second virtual memory page.

[0076] The local connection indicates that the first type of storage medium is connected to the user-mode memory bank via a wired connection. The write operation via virtual memory page indicates that the user-mode memory bank can use the data in the target storage medium and the virtual memory page to write the data in the target storage medium into the memory.

[0077] The first type of storage medium may be, for example, a hard disk installed in a motherboard, a user-mode non-volatile memory, a CXL-connected memory, or a graphics card memory.

[0078] CXL-connected memory utilizes tiered memory technology, organizing storage media of varying performance, capacity, and cost into hierarchical layers to improve data access efficiency. For example, CXL-connected memory can be organized into different tiers, including local DRAM, high-speed CXL remote memory, and NVM (non-volatile memory).

[0079] The memory read and write interface may be, for example, a memory interface such as memcpy and memfd.

[0080] In an embodiment of the present disclosure, the device type includes a second type, and the storage medium of the second type is a remote device; based on the device type, data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the target storage device is the second type, remote direct memory access technology is used to write the data corresponding to the first virtual memory page into the second virtual memory page.

[0081] A remote device can be connected to a user-mode memory library through a network. For example, if the electronic device on which the user-mode memory library is deployed includes a Remote Direct Memory Access (RDMA) network card and the remote device supports remote direct memory access technology, the user-mode memory library can transmit data to the remote device through RDMA technology.

[0082] It should be understood that if RDMA technology is used to write data corresponding to the first virtual memory page to the second virtual memory page, the electronic device that deploys the user-mode memory library needs to set the remote device to have permission to access and write data to the second virtual memory page before sending a data write request to the remote device.

[0083] In an embodiment of the present disclosure, the device type includes a third type, and the third type of storage device is locally connected to the user-mode memory library and supports write operations using physical memory; based on the device type, data is written to the second virtual memory page using a write operation that matches the device type, including: when the device type of the storage device is the third type, physical memory access technology is used to write the data corresponding to the first virtual memory page into the target physical memory page mapped to the second virtual memory page.

[0084] The third type of storage device is a storage device that is wired to the user-mode memory bank and can write data directly into the physical memory without the need for a virtual address.

[0085] The information of the page fault interrupt can also include the target physical memory page to which the second virtual memory page is mapped. The user-state memory library can write the data corresponding to the first virtual memory page in the target virtual memory page to the target physical memory page based on the target physical memory page and physical memory access technology, thereby reducing one system call operation for calling the kernel to determine the corresponding target physical memory page based on the second virtual memory page, and simplifying the operational process of writing the data corresponding to the first virtual memory page.

[0086] In one example, the third type of storage device may be a user-mode non-volatile memory (NVM) or a memory connected to a computing fast link, and the physical memory access technology is DMA technology.

[0087] In another example, the third type of storage device may also be a graphics card memory, and the physical memory access technology is a peer-to-peer graphics processor direct communication (P2P GPU Direct) technology.

[0088] Figure 4 FIG. 1 is a schematic diagram showing an exemplary method of writing data into a second virtual memory page. Figure 4 In the process, after receiving the page fault interrupt information, the user-mode memory library begins to process the page fault interrupt. The current page number is calculated based on the first virtual memory page and the starting address when the user allocated memory, and the location of the data to be written to the second virtual address (i.e., the data corresponding to the first virtual memory page) is obtained. For ordinary disk files or device files (such as / dev / nvme0n1), user-mode NVM, CXL-connected memory, or graphics card memory, the second virtual memory page can be used to directly read and write files for data exchange, eliminating the need to copy the data corresponding to the first virtual memory page to the target physical memory page allocated by the kernel through a memory copy operation, thus avoiding a memory copy.

[0089] For remote devices that support RDMA technology, the second virtual memory page is registered with the network card, allowing the remote device to write data to the second virtual memory page. The user-mode memory library sends a request to the remote device through rdma_send. The remote device receives the request through rdma_recv, determines the data corresponding to the first virtual memory page and the second virtual memory page, and sends the write data element 1 (the data corresponding to the first virtual memory page) to virtual address 2 (the second virtual memory page) of the user-mode memory library through a scatter / gather list (sgl).

[0090] For user-state NVM, CXL-connected memory, or graphics card memory, the user-state memory library uses the GPU driver, user-state NVMe driver, and CXL technology to write data in the user-state NVM, CXL-connected memory, or graphics card memory to the physical memory page (i.e., the target physical memory page) that is mapped to the second virtual memory page.

[0091] The exception handling information used by the kernel to determine that data writing to the second virtual memory page is completed may be an instruction sent by the user-mode memory library to the kernel indicating that data writing is completed. After receiving the instruction, the kernel executes page table setting and other page fault handling operations.

[0092] In the disclosed embodiment, an end flag bit that can be recognized by both the kernel and the user-mode memory library can be set, and the end flag bit can be included in the exception handling information. The end flag bit is used by the kernel to determine whether the data corresponding to the first virtual memory page is written to the second virtual memory page. The end flag bit is used to convey the completion information of writing the second virtual memory page to the kernel.

[0093] For example, the information of the received page fault interrupt can be set to include a virtual memory page for storing the end flag. After the user-mode memory library completes writing the data corresponding to the first virtual memory page to the second virtual memory page, it writes the end flag in the virtual memory page. The kernel can start the polling mode and query the virtual memory page at a fixed time interval. When the kernel detects the end flag, it determines that the data writing of the second virtual memory page is completed.

[0094] For another example, if the target storage device is a remote device, the remote device may further send and write the write data element 2 (ie, the end flag) to the virtual address for storing the end flag.

[0095] By setting the end flag after the data corresponding to the first virtual memory page is written to the second virtual memory page, the kernel can detect through polling that the user-state memory library has completed the data writing operation on the second virtual memory page, thereby sending the exception handling information to the kernel and avoiding the interaction between the user-state memory library and the kernel, thereby reducing the exception handling delay of the page fault interrupt.

[0096] The embodiment of the present disclosure also provides a page fault interrupt processing method applied to a kernel.

[0097] Figure 5 The flowchart of the page fault interrupt processing method according to the embodiment of the present disclosure is schematically shown.

[0098] like Figure 5 As shown, the method includes: operations S501 to S503.

[0099] In operation S501, in response to a page fault occurring during access to a first virtual memory page, a target physical memory page and a second virtual memory page are allocated for the page fault, and the second virtual memory page is mapped based on the target physical memory page allocated for the page fault.

[0100] The second virtual memory page can be obtained by mapping the target physical memory page using mapping methods such as kmap and ioremap. It should be understood that other mapping methods can also be used to map the target physical memory page to obtain the second virtual memory page. The above mapping methods are only used for exemplary description and are not limited in this disclosure.

[0101] In operation S502 , page fault information is sent to the target memory pool. The page fault information indicates that a page fault occurs during access to the first virtual memory page. The information includes the second virtual memory page.

[0102] The second virtual memory page is a virtual memory page allocated to the current page fault interrupt process. The second virtual memory page can be used to obtain the user-state memory library thread that handles the page fault interrupt exception. Other user-state memory library processes or threads in the electronic device cannot obtain the second virtual memory page.

[0103] In operation S503 , in response to receiving the exception handling information of the page fault interrupt, a mapping relationship between the first virtual memory page and the physical memory page is created.

[0104] The user-mode memory library writes the data corresponding to the first virtual memory page to the second virtual memory page, and the second virtual memory page is obtained based on the target physical memory page mapping, that is, the target physical memory page stores the data corresponding to the first virtual memory page. By creating a mapping relationship between the first virtual memory page and the physical memory page, the data in the target physical memory page can be accessed by accessing the first virtual memory page.

[0105] For example, the Linux kernel provides a user-mode page fault handling mechanism called userfaultfd, which allows user-mode processes to handle page fault exceptions in a specific virtual address range, thereby executing custom logic when a page fault occurs.

[0106] Before sending the page fault interrupt information to the user-state memory library, the target physical memory page and the second virtual memory page mapped from the target physical memory page are allocated to the page fault interrupt, so that the user-state memory library can write the data to the second virtual memory page, thereby reducing the number of system calls. Furthermore, after the user-state memory library completes writing the data to the second virtual memory page, a mapping relationship between the first virtual memory page and the target physical memory page is created, so that the data corresponding to the first virtual memory page stored in the target physical memory page can be obtained by accessing the first virtual memory page without requiring a memory copy operation.

[0107] It should be understood that if the mapping relationship between virtual memory pages and physical memory pages is one-to-one, the mapping relationship between the second virtual memory page and the physical memory page can be deleted before the mapping relationship between the first virtual memory page and the physical memory page is created.

[0108] The information of sending a page fault interrupt to the user-mode memory bank may also include a first virtual memory page for determining data corresponding to the first virtual memory page and a target physical memory page for supporting a write operation using physical memory when a target storage medium storing data corresponding to the first virtual memory page supports such operation.

[0109] For example, Figure 6 FIG. 1 is a schematic diagram illustrating a method for handling a page fault interrupt. Figure 6 In the example, the first virtual memory page can also be referred to as virtual address 1, and the second virtual memory page can also be referred to as virtual address 2. The user-mode program uses memory mapping to map virtual address 1 to the process's address space to access virtual address 1. The user-mode page fault mechanism sets a user fault descriptor (userfaultfd), creates a page fault exception file descriptor, and sets it to non-blocking mode. When a page fault interrupt occurs, the page fault exception file descriptor is set to blocking mode, blocking the thread currently accessing the faulted page. To access virtual address 1, the user-mode program retrieves the physical memory page corresponding to virtual address 1 from the page table and accesses the data in that physical memory page. Since there is no physical memory page corresponding to virtual address 1 in the page table, the user-mode program accesses an unmapped virtual address 1, triggering a page fault interrupt and transferring control to the kernel. The kernel allocates a target physical memory page for the page fault interrupt and maps the target physical memory page using kmap. The mapped virtual address is used as virtual address 2, and a page table entry is created in the page table to represent the mapping between virtual address 2 and the target physical memory page. After completing the allocation and mapping of the physical memory page, the user fault handler is called to send page fault interrupt information to the user state memory library, where the page fault interrupt information includes virtual address 1, virtual address 2, target physical memory page and virtual address 3 for storing the end flag.

[0110] exist Figure 6 In the process, the user-mode memory bank is activated, receives the page fault interrupt information, and begins processing the page fault interrupt event. Using virtual address 1, it determines the data to be read (written) to virtual address 2. Using virtual address 2 in the page fault interrupt information and a read instruction, the data corresponding to virtual address 1 is read from the disk, remote server, or other storage device to virtual address 2. After the read is complete, the user-mode memory bank writes the end flag to virtual address 3.

[0111] The kernel queries the physical address corresponding to virtual address 3 in polling mode. In response to the query end flag, it determines that the user state has completed writing the data to virtual address 2. The kernel deletes the page table entry representing the mapping relationship between virtual address 2 and the target physical memory page in the page table, and establishes a page table entry representing the mapping relationship between virtual address 1 and the target physical memory page, realizing the mapping between virtual address 1 and the physical memory page, and obtaining the data corresponding to virtual address 1 by accessing virtual address 1, thus resolving the page fault interrupt.

[0112] Figure 7 The module diagram of the page fault interrupt processing device 700 according to an embodiment of the present disclosure is schematically shown.

[0113] like Figure 7 As described above, the device includes a receiving module 710 , a first processing module 720 and a first sending module 730 .

[0114] The receiving module 710 is configured to receive page fault interrupt information, the information indicating that a page fault interrupt occurs during access to a first virtual memory page, and the information includes a second virtual memory page, which is obtained by mapping a target physical memory page allocated based on the page fault interrupt.

[0115] The first processing module 720 is configured to write data corresponding to the first virtual memory page into the second virtual memory page.

[0116] The first sending module 730 is configured to send exception handling information of a page fault interrupt in response to completion of writing data into the second virtual memory page.

[0117] According to an embodiment of the present disclosure, the first processing module 720 writes the data corresponding to the first virtual memory page to the second virtual memory page in the following manner: determining the device type of the target storage device, which is for storing the data corresponding to the first virtual memory page; based on the device type, using a write operation that matches the device type, writing the data to the second virtual memory page.

[0118] According to an embodiment of the present disclosure, the device type includes a first type, the storage medium of the first type is locally connected to the user-mode memory library and performs write operations through virtual memory pages; the first processing module 720 adopts the following method based on the device type, using a write operation that matches the device type to write data to the second virtual memory page: when the device type of the target storage device is the first type, use the memory read and write interface to write the data corresponding to the first virtual memory page to the second virtual memory page.

[0119] According to an embodiment of the present disclosure, the device type includes a second type, and the storage medium of the second type is a remote device; the first processing module 720 adopts the following method based on the device type, using a write operation that matches the device type to write data to the second virtual memory page: when the device type of the target storage device is the second type, remote direct memory access technology is used to write the data corresponding to the first virtual memory page to the second virtual memory page.

[0120] According to an embodiment of the present disclosure, the device type includes a third type, and the third type of storage device is locally connected to the user-mode memory library and supports writing operations using physical memory; the first processing module 720 adopts the following method based on the device type, using a write operation that matches the device type to write data to the second virtual memory page: when the device type of the target storage device is the third type, physical memory access technology is used to write the data corresponding to the first virtual memory page to the target physical memory page mapped to obtain the second virtual memory page.

[0121] According to an embodiment of the present disclosure, the third type of storage device is a user-mode non-volatile memory or a memory connected to a computing fast link, and the physical memory access technology is a direct memory access technology.

[0122] According to an embodiment of the present disclosure, the third type of storage device is a graphics card memory, and the physical memory access technology is a point-to-point image processor direct communication technology.

[0123] According to an embodiment of the present disclosure, the exception handling information includes an end flag bit, and the end flag bit is used by the kernel to determine whether the data corresponding to the first virtual memory page is written into the second virtual memory page.

[0124] Figure 8 The module diagram of the page fault interrupt processing device 800 according to an embodiment of the present disclosure is schematically shown.

[0125] like Figure 8 As described above, the device includes an allocating module 810 , a second sending module 820 and a second processing module 830 .

[0126] The allocation module 810 is configured to allocate a target physical memory page and a second virtual memory page for the page fault in response to a page fault occurring during access to the first virtual memory page, wherein the second virtual memory page is mapped based on the target physical memory page allocated by the page fault.

[0127] The second sending module 820 is configured to send page fault information to the target memory pool. The page fault information indicates that a page fault occurs during access to the first virtual memory page, and the information includes the second virtual memory page.

[0128] The second processing module 830 is configured to create a mapping relationship between the first virtual memory page and the target physical memory page in response to receiving the exception processing information of the page fault interrupt.

[0129] Figure 9 A schematic block diagram of an electronic device that can be used to implement the page fault interrupt processing method of an embodiment of the present disclosure is schematically shown.

[0130] like Figure 9As shown, the electronic device 900 according to an embodiment of the present disclosure includes a processor 901, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 902 or a program loaded from a storage unit 908 into a random access memory (RAM) 903. The processor 901 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or a related chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 901 may also include onboard memory for caching purposes. The processor 901 may include a single processing unit or multiple processing units for performing different actions of the method flow according to the embodiment of the present disclosure.

[0131] Various programs and data required for the operation of the electronic device 900 are stored in the RAM 903. The processor 901, ROM 902, and RAM 903 are connected to each other via a bus 904. The processor 901 performs various operations according to the method flow of the embodiment of the present disclosure by executing the programs in the ROM 902 and / or RAM 903. It should be noted that the programs may also be stored in one or more memories other than the ROM 902 and RAM 903. The processor 901 may also implement the method provided by the embodiment of the present disclosure by executing the programs stored in the one or more memories.

[0132] According to an embodiment of the present disclosure, the electronic device 900 may further include an input / output (I / O) interface 905, which is also connected to the bus 904. The electronic device 900 may further include one or more of the following components connected to the I / O interface 905: an input section 906 including a keyboard, a mouse, etc.; an output section 907 including devices such as a cathode ray tube (CRT), a liquid crystal display (LCD), and speakers; a storage section 908 including a hard disk; and a communication section 909 including a network interface card such as a LAN card or a modem. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the I / O interface 905 as needed. Removable media 911, such as a magnetic disk, an optical disk, a magneto-optical disk, or a semiconductor memory, is installed in the drive 910 as needed, so that computer programs read from the removable media can be installed in the storage section 908 as needed.

[0133] The present disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments, or may exist independently and not be incorporated into the device / apparatus / system. The computer-readable storage medium carries one or more programs, and when executed, implements the method according to the embodiments of the present disclosure.

[0134] According to an embodiment of the present disclosure, a computer-readable storage medium may be a non-volatile computer-readable storage medium, and may include, for example, but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present disclosure, a computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to an embodiment of the present disclosure, a computer-readable storage medium may include the ROM 902 and / or RAM 903 described above, and / or one or more memories other than ROM 902 and RAM 903.

[0135] The embodiments of the present disclosure also include a computer program product, which includes a computer program containing program code for executing the method shown in the flowchart. When the computer program product is run in a computer system, the program code is used to enable the computer system to implement the method provided by the embodiments of the present disclosure.

[0136] The computer program executes the above functions defined in the system / device of the embodiment of the present disclosure when the processor 901 executes the computer program. According to the embodiment of the present disclosure, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0137] In one embodiment, the computer program may be stored on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may be transmitted and distributed in the form of a signal on a network medium, downloaded and installed via the communication portion 909, and / or installed from a removable medium 911. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to wireless, wired, or any suitable combination thereof.

[0138] In such an embodiment, the computer program can be downloaded and installed from a network via the communication section 909, and / or installed from a removable medium 911. When the computer program is executed by the processor 901, the above-described functions defined in the system of the embodiment of the present disclosure are performed. According to the embodiment of the present disclosure, the systems, devices, means, modules, units, etc. described above can be implemented by computer program modules.

[0139] It should be noted that the collection, storage, use, processing, transmission, provision, disclosure, and application of user personal information in the technical solutions disclosed herein comply with relevant laws and regulations, employ necessary confidentiality measures, and do not violate public order and good morals. In the technical solutions disclosed herein, user authorization or consent is obtained before obtaining or collecting user personal information.

[0140] According to an embodiment of the present disclosure, the program code for executing the computer program provided by the embodiment of the present disclosure can be written in any combination of one or more programming languages. Specifically, these computer programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C" or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect via the Internet).

[0141] The flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the above-mentioned module, program segment, or a part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0142] Those skilled in the art will appreciate that the features described in the various embodiments and / or claims of this disclosure may be combined and / or coupled in various ways, even if such combinations and / or couplings are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure may be combined and / or coupled in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or couplings fall within the scope of this disclosure.

[0143] The embodiments of the present disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be advantageously used in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A page fault interrupt processing method, applied to a user-mode memory library, comprising: Receive page fault interrupt information, where the information indicates that a page fault occurs during access to a first virtual memory page, and the information includes a second virtual memory page, where the second virtual memory page is obtained by mapping a target physical memory page allocated by the page fault interrupt; Writing data corresponding to the first virtual memory page into the second virtual memory page; In response to completing writing the data into the second virtual memory page, sending exception handling information of the page fault interrupt.

2. The method according to claim 1, wherein writing the data corresponding to the first virtual memory page into the second virtual memory page comprises: Determining a device type of a target storage device, where the target storage device is used to store data corresponding to the first virtual memory page; Based on the device type, the data is written to the second virtual memory page using a write operation matching the device type.

3. The method according to claim 2, wherein the device type comprises a first type, the storage medium of the first type is locally connected to the user-mode memory bank and performs a write operation through a virtual memory page; The step of writing the data to the second virtual memory page based on the device type and using a write operation matching the device type includes: In a case where the device type of the target storage device is the first type, the data corresponding to the first virtual memory page is written into the second virtual memory page using a memory read / write interface.

4. The method according to claim 2, wherein the device type includes a second type, and the storage medium of the second type is a remote device; The step of writing the data to the second virtual memory page based on the device type and using a write operation matching the device type includes: In a case where the device type of the target storage device is the second type, the data corresponding to the first virtual memory page is written into the second virtual memory page using remote direct memory access technology.

5. The method according to claim 2, wherein the device type comprises a third type, the third type storage device is locally connected to the user-mode memory bank and supports writing operations using physical memory; The step of writing the data to the second virtual memory page based on the device type and using a write operation matching the device type includes: In a case where the device type of the target storage device is the third type, a physical memory access technology is used to write data corresponding to the first virtual memory page into a target physical memory page mapped to obtain the second virtual memory page.

6. The method according to claim 5, wherein the third type of storage device is a user-mode non-volatile memory or a memory connected to a computing fast link, and the physical memory access technology is a direct memory access technology.

7. The method according to claim 5, wherein the third type of storage device is a graphics card memory, and the physical memory access technology is a point-to-point image processor direct communication technology.

8. The method according to claim 1, wherein the exception handling information comprises an end flag, and the end flag is used by the kernel to determine whether the data corresponding to the first virtual memory page is written into the second virtual memory page.

9. A page fault interrupt processing method, applied to a kernel, comprising: In response to a page fault interruption occurring during access to a first virtual memory page, allocating a target physical memory page and a second virtual memory page for the page fault interruption, the second virtual memory page being obtained by mapping based on the target physical memory page allocated by the page fault interruption; Sending page fault interrupt information to the target memory pool, wherein the page fault interrupt information indicates that a page fault interrupt occurs during access to the first virtual memory page, and the information includes the second virtual memory page; In response to receiving the exception handling information of the page fault interrupt, a mapping relationship between the first virtual memory page and the target physical memory page is created.

10. An electronic device comprising: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors are enabled to perform the method according to any one of claims 1 to 9.

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