Fence type packaging method for improving underfill excessive glue and product thereof

Abstract

The invention discloses a fence-type packaging method for improving underfill excessive glue and a product thereof, and the method comprises the following steps: pasting a first functional chip on a glass substrate, and carrying out the plastic packaging to form a first plastic packaging body; grinding and thinning the first plastic package body, and manufacturing a metal rewiring layer; connecting a second functional chip on the metal rewiring layer; a fence is formed around the second functional chip; filling a gap between the metal rewiring layer and the second functional chip with underfill; forming a second plastic package body; and grinding and thinning the second plastic package body, exposing the second functional chip, removing the glass substrate, and forming a rewiring metal structure. According to the invention, the fence is formed by using the bare silicon, and the underfill glue is dispensed between the functional chip and the fence, so that the glue overflow width of the dispensing edge can be reduced, the design security level of the chip can be increased, the glue connection phenomenon of the underfill glue at the cutting channel can be avoided, the post-process operation difficulty is reduced, and the product yield and reliability are improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor packaging, and particularly relates to a barrier-type packaging method for improving underfill overflow and a product thereof. Background Art

[0002] With the continuous advancement of technology, the importance of chips is self-evident. During the development of chip technology, the chip manufacturing process not only affects chip performance but also directly impacts chip yield. Furthermore, chip size and shape also impact final yield. Chips with different functions require different sizes and circuit designs, which results in different scrap when dicing on the wafer. Generally speaking, arranging square chips on a round wafer results in a large amount of scrap, which reduces chip yield. Therefore, in actual production, it is necessary to comprehensively consider the chip's functional requirements and manufacturing costs to determine the optimal chip size and shape. With increasingly compact chip designs, the requirements for chip packaging processes are becoming increasingly stringent. With increasingly dense chip sizes, the dispensing process may not allow sufficient dispensing width, resulting in the underfill filling or glue bridging the dicing lanes. This can affect the subsequent dicing process, affecting product yield and reliability. Therefore, there is an urgent need to develop barrier packaging methods that can improve underfill overflow. Summary of the Invention

[0003] In order to solve the technical problems existing in the prior art, the object of the present invention is to provide a barrier type packaging method and product thereof for improving underfill overflow.

[0004] In order to achieve the above-mentioned purpose and the above-mentioned technical effect, the technical solution adopted by the present invention is:

[0005] A barrier-type packaging method for improving underfill overflow comprises the following steps:

[0006] Step 1: forming a temporary bonding layer on a glass substrate;

[0007] Step 2: forming an anti-reflection layer and a PI passivation layer in sequence on the temporary bonding layer, and forming a conductive opening on the PI passivation layer;

[0008] Step 3: forming metal bumps at the conductive openings by electroplating, pressing dry film on the surface of the PI passivation layer 4 and forming TMV through-holes by photolithography;

[0009] Step 4: forming a metal pillar structure in the TMV through hole;

[0010] Step 5: Remove the dry film and fix several first function chips on the surface of the PI passivation layer;

[0011] Step 6: Plastic-sealing the semi-finished product obtained in step 5 to form a first plastic-sealed body;

[0012] Step 7: Grind and thin the first plastic package body, and then make a metal redistribution layer;

[0013] Step 8: Connecting a second functional chip to the metal redistribution layer;

[0014] Step 9: forming a fence around the second functional chip;

[0015] Step 10: Using underfill technology, fill the gap between the metal redistribution layer and the second function chip with underfill glue;

[0016] Step 11: Plastic-sealing the semi-finished product obtained in step 10 to form a second plastic-sealed body;

[0017] Step 12: Cut off the edge of the second plastic package;

[0018] Step 13: Grind and thin the second plastic package to expose the second functional chip, remove the glass substrate, temporary bonding layer and anti-reflection layer, form a redistribution metal structure on the PI passivation layer and make a conductive structure on the redistribution metal structure.

[0019] Furthermore, in step 2, an anti-reflection layer is first formed on the temporary bonding layer by a magnetron sputtering process, and then a PI passivation layer is covered on the anti-reflection layer by a coating or lamination process, and a conductive opening is formed on the PI passivation layer by a photolithography process.

[0020] Furthermore, in step four, a seed layer is firstly sputtered in the TMV through hole, and then a metal column structure is formed by electroplating.

[0021] Furthermore, in step five, the dry film is first removed by an etching process, and then a plurality of first functional chips are fixed on the surface of the PI passivation layer through the DAF film.

[0022] Furthermore, in step seven, after the first plastic package is ground and thinned, a passivation layer and a metal redistribution layer are formed on the surface of the first plastic package through magnetron sputtering, photolithography and electroplating processes, and metal bumps are formed on the top metal redistribution layer to facilitate subsequent electrical connection with the second functional chip.

[0023] Furthermore, in step eight, the second functional chip is bonded to the metal redistribution layer through metal bumps through a flip-chip bonding process, and then wafer reconstruction is achieved through thermal reflow.

[0024] Furthermore, in step nine, the bare silicon with the DAF film layer is fixed around the second functional chip through a chip mounting process to form a fence, and the height of the fence is 60%-100% of the height of the second functional chip.

[0025] Furthermore, in step ten, if the glue dispensing width left for the bottom filling is sufficient, glue is dispensed directly from the gap between the fence and the second functional chip; if the chip design is very compact and the functional chip is too large, glue is dispensed directly from the side wall of the fence, and then the bottom filling is completed by gravity and the capillary action of glue dispensing, and the glue dispensing height H3 does not exceed 60% of the height of the second functional chip.

[0026] Furthermore, in step thirteen, the glass substrate is removed by laser debonding, thermal release, chemical release or mechanical release process, the temporary bonding layer is cleaned with a cleaning solution, and the anti-reflection layer is removed by an etching process. Then, a passivation film layer is coated on the PI passivation layer, a multi-layer rewiring metal structure is formed on the passivation film layer, and a conductive structure is made on the top of the rewiring metal structure.

[0027] The present invention also discloses a fence-type packaging structure prepared by a fence-type packaging method for improving bottom fill overflow, which is characterized in that it includes a PI passivation layer and a second plastic packaging body thereon, a plurality of first function chips and a plurality of second function chips are arranged in the second plastic packaging body, the first function chip is coated in the first plastic packaging body, a metal column structure is also provided in the first plastic packaging body, a metal redistribution layer is provided on the surface of the first plastic packaging body, the metal column structure is interconnected with the metal redistribution layer, a plurality of second function chips are connected to the metal redistribution layer, a fence formed by bare silicon with a DAF film layer is provided around the second function chip, the gap between the metal redistribution layer and the second function chip is filled with bottom fill glue, a passivation film layer is provided on the side of the PI passivation layer away from the second plastic packaging body, a multi-layer redistribution metal structure is formed on the passivation film layer, and a conductive structure is made on the top of the redistribution metal structure.

[0028] Compared with the prior art, the present invention has the following beneficial effects:

[0029] The present invention discloses a fence-type packaging method and product for improving underfill overflow. Bare silicon is mounted between a functional chip and a cutting path through a Die Attach (DA) process, a fence is formed using the bare silicon, and underfill glue is dotted between the functional chip and the fence. If the gap is not large enough for glue dotting, the underfill glue can be directly dotted on the inner wall of the fence. Gravity and the capillary effect of glue dotting are utilized to complete the bottom filling of the flip chip. This method can not only reduce the glue overflow width at the glue dotting edge and increase the chip design density, but also avoid the phenomenon of underfill glue connecting at the cutting path, reduce the difficulty of post-process operations, and increase product yield and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a schematic structural diagram of step 1 of the present invention;

[0031] Figure 2 This is a schematic structural diagram of step 2 of the present invention;

[0032] Figure 3 This is a schematic structural diagram of step three of the present invention;

[0033] Figure 4 This is a schematic structural diagram of step four of the present invention;

[0034] Figure 5-6 This is a schematic structural diagram of step five of the present invention;

[0035] Figure 7 This is a schematic structural diagram of step six of the present invention;

[0036] Figure 8 This is a schematic structural diagram of step seven of the present invention;

[0037] Figure 9 This is a schematic structural diagram of step eight of the present invention;

[0038] Figure 10-13 This is a schematic structural diagram of step nine of the present invention;

[0039] Figure 14-17 This is a schematic structural diagram of step 10 of the present invention;

[0040] Figure 18 This is a schematic structural diagram of step 11 of the present invention;

[0041] Figure 19 This is a schematic structural diagram of step 12 of the present invention;

[0042] Figure 20 This is a structural diagram of step 13 of the present invention. DETAILED DESCRIPTION

[0043] The present invention is described in detail below so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more precise definition of the protection scope of the present invention.

[0044] The following is a brief summary of one or more aspects to provide a basic understanding of these aspects. This summary is not an exhaustive overview of all conceivable aspects and is neither intended to identify key or critical elements of all aspects nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that will be provided later.

[0045] like Figure 1-20 As shown, the present invention discloses a barrier type packaging method for improving underfill overflow, comprising the following steps:

[0046] Step 1: If Figure 1As shown, a polymer such as a temporary bonding glue is coated on a glass substrate 1 to form a temporary bonding layer 2, and the polymer such as the temporary bonding glue is cured by heating, laser, etc.;

[0047] Step 2: If Figure 2 As shown, an anti-reflection layer 3 is formed on the temporary bonding layer 2 by a magnetron sputtering process. The material of the anti-reflection layer 3 can be a metal such as Al, Ti, or Cu. Then, a PI passivation layer 4 is covered on the anti-reflection layer 3 by a coating or lamination process. A conductive opening is formed on the PI passivation layer 4 by a photolithography process.

[0048] Step 3: If Figure 3 As shown, a metal bump 5 is formed by electroplating at the conductive opening to facilitate subsequent electrical connection with the metal in the TMV through-hole. A dry film 6 is pressed on the surface of the PI passivation layer 4, and a TMV through-hole is formed thereon by a photolithography process;

[0049] Step 4: If Figure 4 As shown, a seed layer is sputtered in the TMV through-hole of the dry film 6 by PVD technology. The material is Ti, Cu, etc., with a thickness of 1-3 microns, and then a metal column structure 7 is formed by electroplating;

[0050] Step 5: If Figure 5-6 As shown, the dry film 6 is removed by an etching process, and then a plurality of first function chips 8 with DAF films 801 are fixed on the surface of the PI passivation layer 4 by a DA (Die attach) process;

[0051] Step 6: If Figure 7 As shown, the semi-finished product obtained in step 5 is plastic-sealed using the flange mold technology to form a first plastic-sealed body 9;

[0052] Step 7: If Figure 8 As shown, the first plastic package 9 is ground and thinned, and the metal on the surface (from the metal pillar structure 7) can be removed by wet etching or chemical mechanical polishing (CMP). Then, a passivation layer and a metal redistribution layer 10 are formed on the surface of the first plastic package 9 through a combination of magnetron sputtering, photolithography, and electroplating processes. Metal bumps are formed on the top metal redistribution layer 10 to facilitate subsequent electrical connection with the second functional chip 11.

[0053] Step 8: If Figure 9 As shown, a second functional chip 11 is connected to the metal redistribution layer 10. The second functional chip 11 can be bonded to the pad of the metal redistribution layer 10 through the metal bumps below by flip-chip bonding technology, and then the wafer is reconstructed by thermal reflow.

[0054] Step 9: If Figure 10As shown, the bare silicon 12 with DAF film layer is fixed around the second functional chip 11 through DA (Die attach) process to form a fence. According to different chip arrangements, different edge die arrangements are designed, such as Figure 11-13 For large-sized chips, double-sided dispensing is usually performed, such as Figure 12 Glue is dispensed at position 1 and position 2 in the process, but if the size of H1 is not enough, glue can be dispensed multiple times at position 3 and position 4 by calculating the glue amount. Due to the addition of bare silicon 12, there is no need to consider the impact of excessive glue overflow width. This solution can prevent the bottom fill from being connected and causing excessive glue overflow width due to the two adjacent dies being too close to each other. The fence is composed of bare silicon 12, and its CTE (coefficient of thermal expansion) is similar to that of the functional chip, which can release stress better and more evenly. The CTE of the plastic encapsulation compound is higher than that of bare silicon. The increase in the number of fences is conducive to increasing the proportion of bare silicon, reducing the amount of plastic encapsulation compound, saving costs, reducing the warping of a single chip, and ensuring the chip yield and reliability;

[0055] Step 10: If Figure 14-17 As shown, the gap between the metal redistribution layer 10 and the second functional chip 11 is filled with underfill glue 13 by using underfill technology to block water vapor and improve reliability. Figure 15 The glue is dispensed directly from the gap between the fence and the second functional chip 11. If the chip design is very compact and the chip is too large, Figure 12 If dispensing at position 3 and position 4 cannot be done without void, you can follow the following steps: Figure 16 The glue dispensing method is to directly dispense glue on the sidewalls of the bare silicon 12, and then complete the bottom filling through gravity and the capillary action of the glue dispensing. The height and width of the bare silicon 12 are designed according to the chip size. The glue dispensing height H3 should not exceed 60% of the height of the second functional chip 11. The fence height is 60%-100% of the height of the second functional chip 11.

[0056] Step 11: If Figure 18 As shown, the semi-finished product obtained in step 10 is plastic-sealed using full mold technology to form a second plastic-sealed body 14;

[0057] Step 12: Figure 19 As shown, a knife wheel circular cutting technology is used to cut off a circle of plastic sealing material at the edge of the second plastic sealing body 14 to facilitate the subsequent debonding of the glass substrate 1;

[0058] Step 13: If Figure 20As shown, the second plastic package 14 is ground and thinned to expose the second functional chip 11, and the glass substrate 1 is removed by laser debonding, thermal release, chemical release or mechanical release, and the temporary bonding layer 2 is cleaned with a cleaning solution, and the anti-reflection layer 3 is etched away. Then, a passivation film layer 15 is coated on the PI passivation layer 4, and a multi-layer rewiring metal structure is formed on the passivation film layer 15. A conductive structure 16 (such as an under-bump metal pad) is made on the top of the rewiring metal structure.

[0059] The present invention also discloses a fence-type packaging structure prepared by a fence-type packaging method for improving bottom fill overflow, comprising a PI passivation layer 4 and a second plastic packaging body 14 thereon, wherein a plurality of first function chips 8 and a plurality of second function chips 11 are arranged in the second plastic packaging body 14, the first function chip 8 is encapsulated in the first plastic packaging body 9, a metal column structure 7 is also arranged in the first plastic packaging body 9, a metal redistribution layer 10 is arranged on the surface of the first plastic packaging body 9, the metal column structure 7 is interconnected with the metal redistribution layer 10, a plurality of second function chips 11 are connected to the metal redistribution layer 10, a fence formed by bare silicon 12 with a DAF film layer is arranged around the second function chip 11, the gap between the metal redistribution layer 10 and the second function chip 11 is filled with bottom fill 13, a passivation film layer 15 is provided on the side of the PI passivation layer 4 away from the second plastic packaging body 14, a multi-layer redistribution metal structure is formed on the passivation film layer 15, and a conductive structure 16 is made on the top of the redistribution metal structure.

[0060] Example 1

[0061] like Figure 1-20 As shown, a barrier type packaging method for improving underfill overflow includes the following steps:

[0062] Step 1: If Figure 1 As shown, a conventional temporary bonding adhesive is coated on a glass substrate 1 to form a temporary bonding layer 2, and the temporary bonding adhesive or other polymer is cured by heating, laser or other methods;

[0063] Step 2: If Figure 2 As shown, an anti-reflection layer 3 is formed on the temporary bonding layer 2 by a magnetron sputtering process, and its material is Al metal. Then, a PI passivation layer 4 is covered on the anti-reflection layer 3 by a coating or lamination process, and a conductive opening is formed on the PI passivation layer 4 by a photolithography process;

[0064] Step 3: If Figure 3 As shown, a metal bump 5 is formed by electroplating at the conductive opening to facilitate subsequent electrical connection with the metal in the TMV through-hole. A dry film 6 is pressed on the surface of the PI passivation layer 4, and a TMV through-hole is formed thereon by a photolithography process;

[0065] Step 4: If Figure 4As shown, a seed layer made of Ti with a thickness of 2 microns is sputtered in the TMV through-hole of the dry film 6 by PVD technology, and then a metal column structure 7 is formed by electroplating Ti;

[0066] Step 5: If Figure 5-6 As shown, the dry film 6 is removed by an etching process, and then a plurality of first function chips 8 with DAF films 801 are fixed on the surface of the PI passivation layer 4 by a DA (Die attach) process;

[0067] Step 6: If Figure 7 As shown, the semi-finished product obtained in step 5 is plastic-sealed using the flange mold technology to form a first plastic-sealed body 9;

[0068] Step 7: If Figure 8 As shown, the first plastic package 9 is ground and thinned, and the metal on the surface (from the metal pillar structure 7) can be removed by wet etching or chemical mechanical polishing (CMP). Then, a passivation layer is formed on the surface of the first plastic package 9 through a combination of magnetron sputtering, photolithography, and electroplating processes. A metal redistribution layer 10 is formed on the passivation layer. Metal bumps are formed on the topmost metal redistribution layer 10 to facilitate subsequent electrical connection with the second functional chip 11.

[0069] Step 8: If Figure 9 As shown, a second functional chip 11 is connected to the metal redistribution layer 10. The second functional chip 11 can be bonded to the pad of the metal redistribution layer 10 through the metal bumps below by flip-chip bonding technology, and then the wafer is reconstructed by thermal reflow.

[0070] Step 9: If Figure 10 As shown, the bare silicon 12 with DAF film layer is fixed around the second functional chip 11 through DA (Die attach) process to form a fence. According to different chip arrangements, different edge die arrangements are designed, such as Figure 11-13 For large-sized chips, double-sided dispensing is usually performed, such as Figure 12 Glue is dispensed at positions 1 and 2 in the process. However, if the H1 size is insufficient, glue can be dispensed multiple times at positions 3 and 4 by calculating the glue volume. Due to the addition of bare silicon 12, there is no need to consider the impact of excessive glue overflow width. This solution can prevent the underfill from connecting glue and excessive glue overflow width due to the close proximity of two adjacent dies. The fence is composed of bare silicon 12, and its CTE is similar to that of the functional chip, which can better and more evenly release stress. The increase in the number of fences also helps to reduce the amount of plastic encapsulation material used, saving costs and reducing the warping of a single chip.

[0071] Step 10: If Figure 14 As shown, the gap between the metal redistribution layer 10 and the second functional chip 11 is filled with underfill glue 13 by using underfill technology to block water vapor and improve reliability. Figure 15 The glue is dispensed directly from the gap between the fence and the second functional chip 11. If the chip design is very compact and the chip is too large, Figure 12 If dispensing at position 3 and position 4 cannot be done without void, you can follow the following steps: Figure 16 The glue dispensing method is to directly dispense glue on the sidewalls of the bare silicon 12, and then complete the bottom filling through gravity and the capillary action of the glue dispensing. The height and width of the bare silicon 12 are designed according to the chip size. The glue dispensing height H3 is 60% of the height of the second functional chip 11, and the fence height is 80% of the height of the second functional chip 11.

[0072] Step 11: If Figure 18 As shown, the semi-finished product obtained in step 10 is plastic-sealed using full mold technology to form a second plastic-sealed body 14;

[0073] Step 12: Figure 19 As shown, a knife wheel circular cutting technology is used to cut off a circle of plastic sealing material at the edge of the second plastic sealing body 14 to facilitate the subsequent debonding of the glass substrate 1;

[0074] Step 13: If Figure 20 As shown, the second plastic package 14 is ground and thinned to expose the second functional chip 11, and the glass substrate 1 is removed by laser debonding, thermal release, chemical release or mechanical release, and the temporary bonding layer 2 is cleaned with a conventional cleaning solution, and the anti-reflection layer 3 is etched away. Then, a passivation film layer 15 is coated on the PI passivation layer 4, and a multi-layer rewiring metal structure is formed on the passivation film layer 15, and a conductive structure 16 (under bump metal pad) is made on the top of the rewiring metal structure.

[0075] A fence-type packaging structure prepared by a fence-type packaging method for improving underfill overflow comprises a PI passivation layer 4 and a second plastic packaging body 14 thereon, wherein a plurality of first function chips 8 and a plurality of second function chips 11 are arranged in the second plastic packaging body 14, the first function chip 8 is encapsulated in the first plastic packaging body 9, a metal column structure 7 is further arranged in the first plastic packaging body 9, a metal redistribution layer 10 is arranged on the surface of the first plastic packaging body 9, the metal column structure 7 is interconnected with the metal redistribution layer 10, a plurality of second function chips 11 are connected to the metal redistribution layer 10, a fence formed by bare silicon 12 with a DAF film layer is arranged around the second function chip 11, the gap between the metal redistribution layer 10 and the second function chip 11 is filled with underfill 13, a passivation film layer 15 is provided on the side of the PI passivation layer 4 away from the second plastic packaging body 14, a multi-layer redistribution metal structure is formed on the passivation film layer 15, and a conductive structure 16 is made on the top of the redistribution metal structure.

[0076] Parts or structures not specifically described in the present invention may adopt existing technologies or existing products and will not be described in detail here.

[0077] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A barrier type packaging method for improving underfill overflow, characterized in that: The following steps are involved: Step 1: forming a temporary bonding layer on a glass substrate; Step 2: forming an anti-reflection layer and a PI passivation layer in sequence on the temporary bonding layer, and forming a conductive opening on the PI passivation layer; Step 3: forming metal bumps at the conductive openings by electroplating, pressing dry film on the surface of the PI passivation layer 4 and forming TMV through-holes by photolithography; Step 4: forming a metal pillar structure in the TMV through hole; Step 5: Remove the dry film and fix several first function chips on the surface of the PI passivation layer; Step 6: Plastic-sealing the semi-finished product obtained in step 5 to form a first plastic-sealed body; Step 7: Grind and thin the first plastic package body, and then make a metal redistribution layer; Step 8: Connecting a second functional chip to the metal redistribution layer; Step 9: forming a fence around the second functional chip; Step 10: Using underfill technology, fill the gap between the metal redistribution layer and the second function chip with underfill glue; Step 11: Plastic-sealing the semi-finished product obtained in step 10 to form a second plastic-sealed body; Step 12: Cut off the edge of the second plastic package; Step 13: Grind and thin the second plastic package to expose the second functional chip, remove the glass substrate, temporary bonding layer and anti-reflection layer, form a redistribution metal structure on the PI passivation layer and make a conductive structure on the redistribution metal structure.

2. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step 2, an anti-reflection layer is first formed on the temporary bonding layer by a magnetron sputtering process, and then a PI passivation layer is covered on the anti-reflection layer by a coating or lamination process, and a conductive opening is formed on the PI passivation layer by a photolithography process.

3. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step 4, a seed layer is first sputtered in the TMV through hole, and then a metal column structure is formed by electroplating.

4. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step five, the dry film is first removed by an etching process, and then a plurality of first function chips are fixed on the surface of the PI passivation layer through the DAF film.

5. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step seven, after the first plastic package is ground and thinned, a passivation layer and a metal redistribution layer are formed on the surface of the first plastic package through magnetron sputtering, photolithography and electroplating processes, and metal bumps are formed on the top metal redistribution layer to facilitate subsequent electrical connection with the second functional chip.

6. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step eight, the second functional chip is bonded to the metal redistribution layer via metal bumps through a flip-chip bonding process, and then wafer reconstruction is achieved through thermal reflow.

7. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step nine, the bare silicon with the DAF film layer is fixed around the second functional chip through a chip mounting process to form a fence, and the height of the fence is 60%-100% of the height of the second functional chip.

8. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step 10, if the glue dispensing width left for the bottom fill is sufficient, glue is dispensed directly from the gap between the fence and the second functional chip; if the chip design is very compact and the functional chip is too large, glue is dispensed directly from the side wall of the fence, and then the bottom filling is completed by gravity and the capillary action of glue dispensing, and the glue dispensing height H3 does not exceed 60% of the height of the second functional chip.

9. The barrier type packaging method for improving underfill overflow according to claim 1, characterized in that: In step thirteen, the glass substrate is removed by laser debonding, thermal release, chemical release or mechanical release process, the temporary bonding layer is cleaned with a cleaning solution, and the anti-reflection layer is removed by an etching process. Then, a passivation film layer is coated on the PI passivation layer, and a multi-layer rewiring metal structure is formed on the passivation film layer, and a conductive structure is made on the top of the rewiring metal structure.

10. The barrier type packaging structure prepared by the barrier type packaging method for improving underfill overflow according to any one of claims 1 to 9, characterized in that: It includes a PI passivation layer and a second plastic package body thereon, wherein a plurality of first function chips and a plurality of second function chips are arranged in the second plastic package body, the first function chip is coated in the first plastic package body, a metal column structure is also arranged in the first plastic package body, a metal redistribution layer is arranged on the surface of the first plastic package body, the metal column structure is interconnected with the metal redistribution layer, a plurality of second function chips are connected to the metal redistribution layer, a fence formed by bare silicon with a DAF film layer is arranged around the second function chip, the gap between the metal redistribution layer and the second function chip is filled with bottom fill glue, a passivation film layer is provided on the side of the PI passivation layer away from the second plastic package body, a multi-layer redistribution metal structure is formed on the passivation film layer, and a conductive structure is made on the top of the redistribution metal structure.

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