Stacked optical MOS (Metal Oxide Semiconductor) solid relay with ceramic packaging structure

Through the stacked structure, the chip layout of the ceramic tube shell is optimized, and the problem of difficult to miniaturize the volume of the ceramic packaged optical MOS solid relay is achieved, which significantly reduces the relay volume and improves the production efficiency.

CN120545253APending Publication Date: 2025-08-26THE 44TH INST OF CHINA ELECTRONICS TECH GROUP CORP
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Patent Information

Application Number
CN202510690409.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-27
Publication Date
2025-08-26

AI Technical Summary

Technical Problem

The existing ceramic packaged optical MOS solid relays have difficulty miniaturizing the product volume due to the targeted structure, which limits the development of relays in small-volume applications.

Method used

The stacked structure is used to optimize the internal chip layout of the ceramic tube shell. The MOS chip is soldered at the bottom of the inner cavity of the ceramic tube shell. The photocell chip and light-emitting diode chip are fixed on the top of the MOS chip and directly above the photosensitive area through insulating glue. The quartz sheet provides voltage isolation, the transparent glue covers the photosensitive area to enhance the light response, and the gold wire bonding achieves electrical connection.

Benefits of technology

The volume reduction of optical MOS solid relay by more than 50%, simplifies the production process, reduces material costs, and improves the isolation voltage and the response efficiency of photocell chips.

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Abstract

The invention relates to a stacked optical MOS solid-state relay with a ceramic packaging structure, and belongs to the technical field of solid-state relays. Comprising a ceramic tube shell, a light emitting diode chip, a photocell chip and an MOS chip which are packaged in an inner cavity of the ceramic tube shell, and an input pin and an output pin which are fixed on the outer wall of the ceramic tube shell. Wherein the MOS chip is welded and fixed at the bottom of an inner cavity of the ceramic tube shell, the photocell chip is fixed above the MOS chip through insulation paste, and the light-emitting diode chip is fixed right above a photosensitive area of the photocell chip. The light emitting diode chip is connected with the input pin through the first metal conduction band, and the MOS chip is connected with the output pin through the second metal conduction band. According to the invention, the size of the optical MOS solid state relay can be reduced by more than 50% through the structural optimization of the ceramic tube shell and the stacked structure of the internal chip.
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Description

Technical Field

[0001] The invention belongs to the technical field of relays and relates to a stacked optical MOS solid-state relay with a ceramic packaging structure. Background Art

[0002] A photoMOS solid-state relay is a contactless switching device that uses light signals to control the on / off switching of a MOSFET. Specifically, an internal light-emitting chip converts the electrical signal at the input end into an optical signal. When this light signal shines on the photosensitive surface of the photocell chip, the photocell generates a driving voltage that is applied to the gate of the MOSFET chip, thereby turning the MOSFET chip on or off, and thus controlling the on / off of the load circuit. Compared to traditional mechanical relays, photoMOS solid-state relays offer advantages such as longer service life, faster response speed, and lower power consumption. Therefore, they are widely used in various fields such as communications, computers, industrial automation, automotive electronics, and medical equipment. Furthermore, photoMOS solid-state relays combine the isolation characteristics of optocouplers with the switching characteristics of MOSFETs, enabling efficient, reliable, and safe circuit control.

[0003] With the development of optical MOS solid-state relay technology, various control circuits and electronic devices are placing increasing demands on small-sized optical MOS solid-state relays. First, small-sized solid-state relays can better adapt to the design trend of miniaturization and lightweighting of modern electronic equipment products, enabling systems to achieve higher functional density within limited space and greatly improving system integration. Second, small-sized designs help reduce material costs and simplify production and assembly processes, thereby improving production efficiency and reducing costs. Finally, small-sized designs combined with advanced manufacturing processes can achieve lower power consumption.

[0004] In the current ceramic packaged photo MOS solid state relay, the MOS chip and the photocell chip are arranged horizontally, and the light emitting diode chip and the photocell chip are placed opposite each other. The light emitted by the light emitting diode chip directly irradiates the photosensitive surface of the photocell chip to generate a photo-generated voltage, thereby driving the MOS chip at the rear electrode to complete the opening or closing action. The current ceramic packaged photo MOS solid state relay structure is as follows: Figure 1 shown.

[0005] Based on the above, existing ceramic-packaged photoMOS solid-state relay products utilize a beam-to-beam structure. Even ignoring the horizontal spacing between the chips, the beam-to-beam structure's width is at least the sum of the MOS chip width, the photovoltaic cell chip width, and the width of the single-sided internal ceramic step. Furthermore, because the LED chip utilizes a light source with a non-uniform electrode structure and is positioned relative to the photovoltaic cell chip, a significant vertical distance must exist between the LED chip and the photovoltaic cell chip to ensure that the vertical isolation voltage requirements are met and that the light emitted by the LED chip completely covers the photosensitive area of ​​the photovoltaic cell chip. These two factors limit the horizontal and vertical dimensions of the photoMOS solid-state relay with this structural layout. In summary, for photoMOS solid-state relays with ceramic packaging structures, under the condition that the internal chip model is fixed, the beam-to-beam structure directly restricts the miniaturization of the relay product. Summary of the Invention

[0006] In view of this, the object of the present invention is to provide a stacked optical MOS solid-state relay with a ceramic packaging structure, by optimizing the structure of the ceramic tube shell and adopting a stacked structure for the chip layout inside the ceramic tube shell, thereby greatly reducing the volume of the optical MOS solid-state relay.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] A stacked optical MOS solid-state relay with a ceramic packaging structure comprises a ceramic tube shell, a light-emitting diode chip, a photocell chip and a MOS chip packaged in the inner cavity of the ceramic tube shell, and input pins and output pins fixed to the outer wall of the ceramic tube shell.

[0009] The MOS chip is soldered to the bottom of the ceramic tube cavity, the photovoltaic cell chip is fixed above the MOS chip using insulating adhesive, and the light-emitting diode chip is fixed directly above the photosensitive area of ​​the photovoltaic cell chip. The light-emitting diode chip is connected to the input pin via a first metal conductive strip, and the MOS chip is connected to the output pin via a second metal conductive strip.

[0010] Furthermore, a quartz sheet is provided between the photovoltaic cell chip and the light-emitting diode chip, and the quartz sheet is fixed directly above the photosensitive area of ​​the photovoltaic cell chip by transparent adhesive. The light-emitting diode chip is fixed above the quartz sheet by transparent adhesive, and the light-emitting diode chip is directly opposite to the photosensitive area of ​​the photovoltaic cell chip.

[0011] The quartz sheet can be used to provide voltage isolation.

[0012] Furthermore, the light emitting diode chip and the photosensitive area of ​​the photocell chip are completely covered by transparent adhesive to increase the light entering the photosensitive area of ​​the photocell chip.

[0013] Furthermore, a side boss is provided on a side wall of the inner cavity of the ceramic tube shell, and two first metal guide strips are provided on the side boss.

[0014] Furthermore, a bottom boss is provided on the bottom surface of the inner cavity of the ceramic tube shell, and the second metal conductive strips are respectively provided on both sides of the bottom boss, and one MOS chip is respectively welded and fixed to the second metal conductive strips on both sides.

[0015] The MOS chips are symmetrically arranged on both sides of the bottom boss.

[0016] Furthermore, the light-emitting diode chip, the photovoltaic cell chip and the MOS chip are electrically connected to each other through gold wire bonding.

[0017] The beneficial effects of the present invention are:

[0018] (1) The present invention provides a boss on only one side wall of the inner cavity of the ceramic tube shell, simplifying the common structure of the ceramic tube shell with bosses on both inner side walls, and further reducing the size of the optical MOS solid-state relay in a single direction;

[0019] (2) A boss is provided at the bottom of the inner cavity of the ceramic tube shell. On the one hand, the boss can maintain good electrical insulation between the two MOS chips fixed by welding, and on the other hand, it can greatly improve the isolation voltage between the two MOS chips;

[0020] (3) In the present invention, a symmetrical chip layout is adopted when the MOS chip is welded and fixed, which can easily complete the bonding and reduce the overall size of the ceramic tube shell;

[0021] (4) The present invention provides a quartz sheet between the light-emitting diode chip and the photovoltaic cell chip, which can ensure the high isolation voltage requirement of the relay product;

[0022] (5) The present invention can increase the light entering the photocell chip by providing transparent glue to cover the light-emitting diode chip and the photosensitive area of ​​the photocell chip, thereby improving the response of the photocell chip.

[0023] While maintaining the same design requirements such as shell wall thickness and isolation voltage, the present invention achieves a volume reduction of over 50% compared to similar optical MOS solid-state relays by optimizing the ceramic shell structure and adopting a stacked internal chip structure.

[0024] Other advantages, objects, and features of the present invention will be described in part in the following description and, in part, will be apparent to those skilled in the art upon examination of the following description or may be learned from practice of the present invention. The objects and other advantages of the present invention may be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below with reference to the accompanying drawings, in which:

[0026] Figure 1 This is a schematic diagram of the structure of a conventional through-beam optical MOS solid-state relay;

[0027] Figure 2 A ceramic tube shell structure of a photo MOS solid-state relay provided in one embodiment of the present invention;

[0028] Figure 3 Schematic diagram of chip stacking structure;

[0029] Figure 4 and Figure 5 Schematic diagrams of the overall structure of the stacked photo-MOS solid-state relay provided by an embodiment of the present invention from different viewing angles.

[0030] Figure numerals: 1 - ceramic tube shell; 2 - light-emitting diode chip; 3 - photocell chip; 4 - quartz wafer; 5 - MOS chip; 6 - covering transparent adhesive; 7 - pin; 8 - first metal conduction strip; 9 - second metal conduction strip. DETAILED DESCRIPTION

[0031] The following describes the embodiments of the present invention by means of specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0032] Among them, the accompanying drawings are only for illustrative purposes and represent only schematic diagrams rather than actual pictures, and should not be understood as limiting the present invention. In order to better illustrate the embodiments of the present invention, some parts of the accompanying drawings may be omitted, enlarged or reduced, and do not represent the dimensions of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions may be omitted in the accompanying drawings.

[0033] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "back", etc. indicating directions or positional relationships, they are based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operate in a specific direction. Therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0034] In order to solve the problem that existing ceramic packaged optical MOS solid-state relays are difficult to miniaturize due to the use of a through-beam structure, the present invention proposes an internal chip stacking structure and optimizes the ceramic tube shell, thereby greatly reducing the volume of the optical MOS solid-state relay.

[0035] See also Figures 2 to 5 The stacked photo-MOS solid-state relay provided in one embodiment of the present invention includes a ceramic tube shell 1, a light-emitting diode chip 2, a photocell chip 3, a MOS chip 5 and input and output pins.

[0036] An independent boss is provided on one inner sidewall of the inner cavity of the ceramic tube housing 1, simplifying the common structure of a beam-type ceramic tube housing with a boss on both inner sidewalls and further reducing the product's dimensions in a single direction. Furthermore, two independent first metal conductive strips 8 are provided on the surface of this independent boss, electrically connecting the first and second pins on the exterior of the ceramic tube housing 1, respectively.

[0037] The first pin and the second pin serve as input pins of the optical MOS solid-state relay to receive a control signal sent by the front-end circuit.

[0038] In addition, a 0.2mm wide and 0.1mm high boss is located in the center of the bottom of the ceramic tube housing 1. A second metal strip 9 is located on each side of the bottom of the ceramic tube housing 1, electrically connected to the third and fourth pins of the ceramic tube housing 1, respectively. Furthermore, a MOS chip 5 is soldered to each of the second metal strips 9 on either side of the boss using gold-tin solder. This boss ensures good electrical insulation between the two MOS chips 5, which are secured via gold-tin solder. Furthermore, the isolation voltage between the two MOS chips 5 is significantly increased.

[0039] The third and fourth pins serve as output pins of the optical MOS solid-state relay, outputting control signals to subsequent circuits. Each of the two MOS chips 5 is connected to a pin, thereby outputting control signals to subsequent circuits through the third and fourth pins.

[0040] In this embodiment, the stacked structure of the internal chips is as follows Figure 3 As shown, specifically, the MOS chip 5 is first fixed to the second metal conductive strip 9 provided on the bottom surface of the inner cavity of the ceramic tube shell 1 by welding with gold-tin solder. Then, the photovoltaic cell chip 3 is overlapped and fixed above the two MOS chips 5 using insulating glue. To ensure the isolation voltage requirement, a quartz sheet 4 is adhered to the photosensitive area of ​​the photovoltaic cell chip 3 using transparent glue. Then, the light-emitting diode chip 2 is adhered to the quartz sheet 4 using transparent glue, and the light-emitting diode chip 2 is kept facing the photosensitive area of ​​the photovoltaic cell chip 3. Because the light-emitting diode chip 2 adopts a special light field design and emits light on all four sides, in order to improve the response of the photovoltaic cell chip 3, a layer of covering transparent glue 6 is provided on the photosensitive area of ​​the photovoltaic cell chip 3 and above the light-emitting diode chip 2. The light emitted by the light-emitting diode chip 2 is reflected and refracted within the covering transparent glue 6, thereby increasing the amount of light entering the photovoltaic cell chip 3 and enhancing the response of the photovoltaic cell chip 3.

[0041] After the stacking structure of each chip is completed, the electrical connections between the chips are completed using gold wire bonding technology. Specifically, the positive and negative electrodes of the LED chip 2 are connected to the two first metal conductive strips 8 of the independent boss, respectively, receiving the control signal of the front-end circuit and converting the control signal into an optical signal. The output end of the photovoltaic chip 3 is connected to the gate and source of the MOS chip 5. Under the stimulation of the optical signal of the LED chip 2, the voltage signal used to turn on the MOS chip 5 is generated.

[0042] The light emitting diode chip 2 adopts a coplanar electrode structure light source so as to complete the electrical connection of the light emitting diode chip 2 on a single surface.

[0043] The two MOS chips 5 adopt a symmetrical chip structure, which can easily complete the bonding and reduce the overall size of the ceramic tube shell.

[0044] The working mode of the optical MOS solid-state relay proposed in the present invention is as follows:

[0045] The front circuit of the optical MOS solid-state relay sends a control signal (the control signal is an electrical signal). The control signal is input into the first metal conductive strip 8 of the independent boss through the first and second pins of the ceramic tube shell 1. The control signal is then transmitted to the light-emitting diode chip 2 by the first metal conductive strip 8. The light-emitting diode chip 2 emits light under the excitation of the current. The light signal is incident on the photosensitive area of ​​the photocell chip 3. The photocell chip 3 generates a photogenerated electrical signal under the excitation of the light signal. The electrical signal is transmitted to the gate of the MOS chip 5, causing the MOS chip 5 to conduct and output an electrical signal for driving the subsequent circuit.

[0046] In summary, the present invention provides a stacked optical MOS solid-state relay with a ceramic package structure. By designing the chip portion as a stacked structure, the present invention can greatly reduce the space occupied by the chip. At the same time, the present invention only provides an independent boss on one side wall of the ceramic tube housing accommodating groove, simplifying the common structure of providing a boss on both inner side walls of the ceramic tube housing of the through-beam structure, further reducing the size of the product in a single direction.

[0047] While maintaining the same design requirements such as shell wall thickness and isolation voltage, the present invention optimizes the ceramic shell structure and adopts an internal chip stacking structure. Compared with similar optical MOS solid-state relay products, the volume of the optical MOS solid-state relay of the present invention can be reduced by more than 50%.

[0048] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.

Claims

1. A stacked photo MOS solid state relay with a ceramic package structure, characterized in that: It includes a ceramic tube shell, a light-emitting diode chip, a photocell chip and a MOS chip encapsulated in the inner cavity of the ceramic tube shell, and input pins and output pins fixed on the outer wall of the ceramic tube shell; The MOS chip is welded and fixed to the bottom of the ceramic tube shell accommodating groove, the photovoltaic cell chip is fixed above the MOS chip through insulating glue, and the light-emitting diode chip is fixed directly above the photosensitive area of ​​the photovoltaic cell chip; the light-emitting diode chip is connected to the input pin through a first metal conduction strip, and the MOS chip is connected to the output pin through a second metal conduction strip.

2. The optical MOS solid-state relay according to claim 1, characterized in that: A quartz sheet is provided between the photovoltaic cell chip and the light-emitting diode chip. The quartz sheet is fixed directly above the photosensitive area of ​​the photovoltaic cell chip by transparent adhesive. The light-emitting diode chip is fixed above the quartz sheet by transparent adhesive, and the light-emitting diode chip is directly opposite to the photosensitive area of ​​the photovoltaic cell chip.

3. The optical MOS solid-state relay according to claim 2, characterized in that: The light emitting diode chip and the photosensitive area of ​​the photocell chip are completely covered by transparent adhesive to increase the light entering the photosensitive area of ​​the photocell chip.

4. The optical MOS solid-state relay according to claim 1, wherein: A side boss is provided on a side wall of the inner cavity of the ceramic tube shell, and two first metal guide strips are provided on the side boss.

5. The optical MOS solid state relay according to claim 1, wherein: A bottom boss is provided on the bottom surface of the inner cavity of the ceramic tube shell. The second metal conductive strips are respectively provided on both sides of the bottom boss. One MOS chip is respectively welded and fixed to the second metal conductive strips on both sides.

6. The optical MOS solid-state relay according to claim 5, characterized in that: The MOS chip has a symmetrical structure on both sides of the bottom boss.

7. The photo MOS solid state relay according to claim 1, characterized in that: The light emitting diode chip, the photovoltaic cell chip and the MOS chip are electrically connected to each other through gold wire bonding.

Citation Information

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