Memory fault management system and method, server and electronic equipment
Through the coordinated work of the hardware layer, kernel layer and user layer, the hierarchical detection and automatic isolation of memory errors are achieved, solving the problem of memory failures that cannot be detected in advance, resulting in server downtime, and improving system stability and reliability.
CN120560894AActive Publication Date: 2025-08-29INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information
- Application Number
- CN202511055326.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-30
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2045-07-30
AI Technical Summary
Technical Problem
In the prior art, memory failures cannot be detected in advance, resulting in the problem of server being easily downtime.
Method used
Memory error data is detected through the hardware layer, and classified in the input and output layer, protected processing is performed by the kernel layer, and visual display and isolation of the user layer to realize hierarchical detection and automatic isolation.
Benefits of technology
It improves the stability and reliability of the system, reduces the probability of system crash, enhances the monitoring and maintainability of memory errors, and reduces operation and maintenance costs.
✦ Generated by Eureka AI based on patent content.
Abstract
The invention discloses a memory fault management system and method, a server and electronic equipment, and relates to the technical field of computers, the memory fault management system comprises a processing circuit of a hardware memory, a hardware layer and a processor are arranged on the processing circuit, and the processor is further divided into a kernel layer, a user layer and an input and output layer. Through cooperative work of the hardware layer and each software layer, hierarchical detection, classified processing and automatic isolation of memory error data are realized, and server downtime caused by memory fault error data is effectively prevented. And meanwhile, through a linkage mechanism of a kernel mode and a user mode and in combination with visual display, the monitorability and maintainability of memory errors are enhanced, operation and maintenance personnel can quickly position and repair problems conveniently, and the operation and maintenance cost of the system is reduced.
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