Variable capacitor bank

Abstract

The variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and is coupled to the port. The variable capacitor bank further includes a capacitor module disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor leg electrically coupled to the module input, the switched capacitor leg including a capacitor and a switching element in series with the capacitor. In some embodiments, one or more of the capacitor modules may include at least one second switched capacitor leg. The capacitor module may further include a switchless or'bottom 'capacitor that provides a minimum capacitance or other known capacitance of the capacitor module. Each capacitor module may be further grounded by being electrically coupled to the conductive housing.

Description

[0001] This application is a divisional application of the invention patent application with the application date of September 4, 2019, named "Variable Capacitor Bank" and application number 201980059067.3.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This Patent Cooperation Treaty (PCT) patent application claims priority to U.S. Non-Provisional Application No. 16 / 126,955, filed on September 10, 2018, entitled “Variable Capacitor Bank,” the entire contents of which are incorporated herein by reference for all purposes. Technical Field

[0004] Various aspects of the present disclosure relate to variable capacitor banks, and in particular to variable capacitor banks for impedance matching systems. Background Art

[0005] Plasma chambers have a variety of potential uses in semiconductor manufacturing, as well as other fields. For example, plasma-enhanced chemical vapor deposition (CVD) is a process for depositing thin films on substrates using a plasma chamber. At a high level, a radio frequency (RF) power supply is coupled to the plasma chamber to supply power to ignite and maintain a plasma from a reactant gas within the chamber, and from this plasma, deposition occurs on the substrate within the chamber. To achieve efficient and accurate power transfer between the RF power supply and the plasma load, an impedance matching network is typically used to match the load impedance (including the impedance of the plasma) to the output impedance of the power supply.

[0006] The source impedance of an RF power supply can vary depending on the application; however, the industry standard is to have a source impedance of 50 ohms for most RF generators. The load impedance, on the other hand, can vary widely based on a range of variables, including but not limited to generator frequency, power, chamber pressure, gas composition, plasma ignition, and other changes in plasma loading during processing. Therefore, in most applications, a matching network is used to adjust the load impedance so that it remains as close as possible to the source impedance (e.g., 50 ohms in most, but not all, cases). The matching network accounts for these changes in load impedance by changing electrical components to match the varying load impedance to the generator's output impedance.

[0007] Matching networks typically contain reactive elements, meaning elements that store energy in electric and magnetic fields, as opposed to resistive elements that dissipate power. The most common reactive elements are capacitors, inductors, and coupled inductors, but other elements such as distributed circuits can also be used. Matching networks can also include lossless elements, including transmission lines and transformers. The only resistive elements in a matching network are typically associated with losses in components that are non-ideal, reactive, and lossless or that do not participate in impedance transformation (for example, components used to sense voltage, current, power, or temperature).

[0008] The matching network can include multiple variable reactive elements. For example, vacuum variable capacitors can be used. However, these are bulky and expensive. Alternatively, parallel capacitor banks with varying capacitances that are added or removed from the parallel circuit via electrical switches are also typical. Typically, such capacitor banks use high-power PIN diodes (controlled by transistors) to switch capacitors in and out of the parallel system.

[0009] Accurate impedance matching using matching networks generally requires a thorough understanding of the characteristics of the reactive elements within the matching network. For example, such characteristics may include the change in reactance of a variable capacitor when in different switching states. However, during operation, the interaction between the electromagnetic fields of the various reactive elements within a given matching network can cause unpredictable and highly variable changes in the reactive element characteristics.

[0010] It is with these observations and others in mind that various aspects of the present disclosure were conceived. Summary of the Invention

[0011] In one aspect of the present disclosure, a variable capacitor bank is provided. The variable capacitor bank includes a conductive housing and a port extending through the housing. An electrical bus is disposed within the conductive housing and coupled to the port. The variable capacitor bank further includes capacitor modules disposed within the housing. Each capacitor module includes a module input electrically coupled to the electrical bus and a switched capacitor branch electrically coupled to the module input, the switched capacitor branch including a capacitor and a switching element connected in series with the capacitor. In certain embodiments, one or more of the capacitor modules may include at least one second switched capacitor branch. The capacitor module may further include an unswitched or "floor" capacitor that provides a minimum capacitance or other known capacitance of the capacitor module. Each capacitor module may further be grounded by being electrically coupled to the conductive housing.

[0012] In such an embodiment, the variable capacitor bank can have a single port through which the controllable reactive element within the module is coupled to external circuit elements (e.g., those of a matching network). In addition to the shielding provided by the conductive housing, such a single-port arrangement isolates the variable capacitor bank of the present disclosure from interactions with other elements of the circuit in which they are disposed, thereby improving the accuracy with which the variable capacitor bank can be characterized. However, in alternative embodiments, the variable capacitor bank can be configured in a two-port arrangement with improved characterization resulting from the conductive housing.

[0013] In another aspect of the present disclosure, a variable capacitor bank is provided, comprising: a conductive housing, a port extending through the housing, and an electrical bus disposed within the conductive housing and coupled to the port. The variable capacitor bank further comprises a plurality of capacitor modules disposed within the housing and coupled to each of the electrical bus and the conductive housing, each of the capacitor modules comprising a switched capacitor branch. A respective conductive path is defined between the port and the conductive housing through each of the capacitor modules, such that each of the respective conductive paths has a substantially equal length.

[0014] In another aspect of the present disclosure, an impedance matching module is provided, comprising a variable capacitor bank. The variable capacitor bank further comprises a conductive housing, a port extending through the housing, and an electrical bus disposed within the conductive housing and coupled to the port. A capacitor module is disposed within the housing and coupled to each of the electrical bus and the conductive housing. Each capacitor module comprises a module input, a switched capacitor branch coupled to the module input, and the conductive housing, the switched capacitor branch comprising a capacitor and a switching element connected in series with the capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The various features and advantages of the technology of the present disclosure will be apparent from the following description of specific embodiments of those technologies, as illustrated in the accompanying drawings. It should be noted that the drawings are not necessarily to scale; however, emphasis is instead placed on illustrating the principles of the technical concepts. Moreover, in the drawings, like reference numerals may refer to the same components throughout the different views. The drawings depict only typical embodiments of the present disclosure and, therefore, should not be considered limiting of the scope.

[0016] Figure 1 is a block diagram of a plasma processing system including a matching network.

[0017] Figure 2 yes Figure 1 Circuit diagram of the matching network.

[0018] Figure 3 yes Figure 2Schematic diagram of a variable capacitor bank of a matching network, the variable capacitor bank including multiple capacitor modules and corresponding driving circuits.

[0019] Figure 4 yes Figure 3 Circuit diagram of the capacitor module and driving circuit of the variable capacitor bank.

[0020] Figure 5 is a circuit diagram of a replacement capacitor module including a plurality of switched capacitor branches and an unswitched capacitor branch.

[0021] Figure 6 yes Figure 4 Schematic diagram of the capacitor module.

[0022] Figure 7 yes Figure 5 Schematic diagram of the capacitor module.

[0023] Figure 8A and Figure 8B is a cross-sectional view of a variable capacitor bank having a substantially rectangular arrangement of capacitor modules according to the present disclosure.

[0024] Figure 8C yes Figure 8A and Figure 8B Side view of a variable capacitor bank.

[0025] Figure 9 is a diagram showing one possible mounting arrangement for the capacitor module. Figure 8A and Figure 8B Cross-sectional side view of a capacitor module of a variable capacitor bank.

[0026] Figure 10 is a cross-sectional view of an alternative variable capacitor bank having an asymmetric capacitor module arrangement according to the present disclosure.

[0027] Figure 11 is a cross-sectional view of an alternative variable capacitor bank having a circular capacitor module arrangement according to the present disclosure.

[0028] Figure 12 is a schematic diagram of a two-port variable capacitor bank according to the present disclosure.

[0029] Figure 13 is a block diagram of a computer system that may be used, among other things, to selectively control the variable capacitor bank of the present disclosure. DETAILED DESCRIPTION

[0030] Embodiments of the present disclosure provide a variable capacitor bank that can be used, for example, in an impedance matching system for a plasma chamber. The variable capacitor bank includes a grounded housing within which a plurality of capacitor modules are disposed. The capacitor modules share a bus and each include one or more switched capacitors such that, by selectively switching the capacitors, the variable capacitor modules can provide a range of capacitances. The housing of the variable capacitor bank is formed from a conductive material such that the various components contained therein are shielded from potential interactions caused by adjacent reactive elements (e.g., inductors or other capacitors). In certain embodiments, each of the capacitor modules is electrically coupled to the housing such that the housing provides a ground for the capacitor modules.

[0031] In various embodiments, the variable capacitor bank can have a single-port configuration, which, combined with the shielding effect of the housing, significantly improves the ability to accurately and reliably characterize the variable capacitor bank. In other words, the variable capacitor elements can be enclosed within a common housing, and connections to those variable capacitor elements can be provided through a single port in the housing. The single port can at least partially include a connection to a single conductive element or feature, which can be referred to as a bus, wherein the variable capacitive elements are each coupled to the conductive feature and operably coupled to external circuit elements through the port. In general, the characterization of the variable capacitor bank disclosed herein is enhanced by improving isolation from other elements included in the circuit in which the variable capacitor bank may be included. For example, the conductive housing shields the capacitors of the variable capacitor bank from parasitic effects that would otherwise be caused by electromagnetic fields generated by adjacent reactive components and that would otherwise introduce significant variability into the performance of the capacitor bank.

[0032] Matching circuits used in radio frequency (RF) applications may include at least one variable capacitor element for dynamically adjusting the impedance provided by the matching circuit. Typically, such an element is disposed within a module or similar housing along with other reactive elements and, therefore, is typically subject to the various electromagnetic fields generated by the other reactive elements of the matching circuit during operation. Such interactions are complex and highly variable and often preclude or significantly challenge accurate characterization of matching circuits and their components, including any variable capacitor elements that may be included in the matching circuit. Furthermore, to the extent that characterization of conventional variable capacitors is possible, such variable capacitors are typically required to include multiple ports to perform the required analysis, which is impractical.

[0033] Although a two-port configuration can be used to measure the entire matching network, isolating the effect of changing each element to adjust the tuning to the desired range and efficiency typically requires that each component react fully independently of the others. Conventional matching network designs are typically insufficient to isolate individual components such as variable capacitors from other elements, and therefore, there are no clear "ports" that enable independent measurement and characterization of certain components within the matching network. For example, the performance and characteristics of a variable capacitor of a conventional matching network that is open or unshielded from surrounding reactive elements are affected each time a different capacitor of the matching network is switched in or out of the matching circuit. Therefore, depending on the state of the other capacitors, the characteristics of the variable capacitor (e.g., overall impedance) may be significantly affected. Furthermore, even if a physical port could be defined for each switched capacitor within the variable capacitor of a conventional matching network, the number of measurement setups would approach 2^n (where "n" is the number of switchable capacitors) in order to fully and accurately characterize the variable capacitor. To achieve a practical solution, typically more than 30 switched capacitors are required, and therefore, such characterization methods are extremely complex and expensive. Ultimately, meaningful characterization of variable capacitors is difficult to achieve, and matching circuit engineers and designers often have to rely on their experience to determine a workable, but often suboptimal, solution for a particular application.

[0034] To address the aforementioned issues, a variable capacitor bank according to the present disclosure includes an array of switched capacitors enclosed in a grounded housing. In certain embodiments, the variable capacitor bank is further configured to include a single port extending outside the housing for coupling the variable capacitor bank to a matching circuit or other components of other circuits. Combined, these features significantly reduce the effects of other matching circuit components on the variable capacitor, thereby enabling accurate characterization of the variable capacitor in each of its states.

[0035] In certain embodiments, the switched capacitors of the variable capacitor can be arranged in an array of capacitor modules that are coupled to a shared electrical bus and each of the housings. Each capacitor module can include one or more parallel switched capacitors that can be selectively switched / presented into or out of parallel connection with other switched capacitors to change the capacitance of the capacitor module and, therefore, the total capacitance of the variable capacitor. In certain embodiments, each capacitor module can also include one or more unswitched capacitor branches that provide the minimum capacitance or "bottom" capacitance of the capacitor module.

[0036] In relatively low-frequency operation, the distribution of the capacitor modules within the housing is relatively unimportant because parasitic losses are relatively low. Therefore, the capacitor modules can be distributed within the housing at varying distances from the ports. However, as the frequency increases, the difference in distance between the ports and the capacitor modules can cause significantly greater impedance changes. To reduce such variations, certain embodiments of the present disclosure include a circular or similar arrangement in which each capacitor module is substantially equidistant from the ports of the variable capacitor. Regardless of whether an equidistant arrangement is implemented, the distance from each capacitor module to the ground can also be minimized to limit the inductance to the ground.

[0037] Although the present disclosure primarily focuses on plasma systems, and more specifically, on matching networks for use in plasma systems, the variable capacitor banks of the present disclosure are not limited to such applications. For example, but not limited to, in addition to impedance matching applications, the variable capacitor banks according to the present disclosure may also be implemented in tuning circuits or similar circuits.

[0038] Figure 1 1 is a block diagram 100 of a plasma processing system according to one embodiment of the present invention. A generator 102 transmits RF power via a transmission line 108 (e.g., a coaxial cable) to a matching network 104, and then to a plasma load 106 via an electrical connection 110. The matching network 104 changes its internal electrical components to match the input impedance to the plasma load and to account for changes in the input impedance caused by load changes, etc. Generally, the load is monitored to identify such changes, and control signals to the matching network cause changes to the components (e.g., switched capacitors) to alter the impedance from the matching network.

[0039] Figure 2 is a circuit diagram 200 showing one possible representative arrangement of components of the matching network 104. Although other configurations of the matching network 104 are possible, Figure 2 The matching network 104 includes the following elements coupled in parallel: two variable capacitance elements 112, 114, a fixed capacitance element 116, and an inductor 118. The matching network 104 further includes a plurality of series inductors 120-124 and a series capacitor 126. The impedance of the matching network is controlled by changing the capacitance of one or both of the variable capacitance elements.

[0040] Figure 2The matching network 104 is intended to illustrate one example of a matching network according to the present disclosure. More generally, a matching network according to the present disclosure includes at least one variable capacitance element. Generally speaking, a variable capacitor can be electrically variable or mechanically variable. The variable capacitance elements can be connected in parallel or in series, as described in more detail below. The type and number of the remaining components of the matching network can vary depending on the specific application requirements. For example, the number and value of the other inductors and capacitors can vary depending on the specific application. Moreover, each of the other inductors and capacitors of the matching network can be variable or fixed.

[0041] As previously mentioned, matching network 104 may include one or more variable capacitance elements, such as variable capacitance elements 112 and 114. The following discussion describes variable capacitance element 112 in detail; however, it should be understood that various features of variable capacitance element 112 may also be included in variable capacitance element 114 or any other variable capacitance element within matching network 104.

[0042] Figure 3 FIG3 is a schematic diagram 300 of a variable capacitance element 112 in the form of a variable capacitor bank. Variable capacitor bank 112 includes a plurality of capacitor modules 302A-302N arranged in parallel and sharing a bus 303. Each of capacitor modules 302A-302N is disposed within a grounded housing 306 such that each of capacitor modules 302A-302N is shielded from external electromagnetic radiation. Each of capacitor modules 302A-302N is electrically coupled to a corresponding driver circuit 304A-304N.

[0043] Figure 4 is a circuit diagram of a capacitor module 302A and a corresponding drive circuit 304A, and shows Figure 3 Other capacitor modules and corresponding drive circuits. Figure 4As shown, capacitor module 302A includes at least one switched capacitor branch 307, including capacitor 308, which may be a solid-state capacitor, and a switching element 310. In the illustrated embodiment, switching element 310 includes a PIN diode 312, which is controlled by driver circuit 304A. In other embodiments, alternative types of switches may be used in place of PIN diode 312. For example, but not limited to, field-effect transistors (FETs) and electromechanical switches may be used in place of PIN diodes. Driver circuit 304A generally includes a pair of transistors 314 and 316 that can be selectively activated to apply forward and reverse bias to PIN diode 312, respectively. In one embodiment, transistor 314 can be electrically coupled to a current source to forward bias PIN diode 312, while transistor 316 can be electrically coupled to a voltage source to reverse bias PIN diode 312. When PIN diode 312 is forward biased, current is allowed to flow through capacitor branch 307, causing the capacitance of capacitor 308 to be added to the total capacitance of variable capacitor bank 112. In other words, when the PIN diode is conducting, capacitor 308 is switched into the bank, thereby affecting the total capacitance through any other capacitors connected in parallel to the bank that are also switched in. Conversely, when PIN diode 312 is reverse biased, the current is sufficiently limited due to the high impedance presented by the "off" state of switching element 310 that the capacitance of capacitor 308 is effectively / substantially excluded from the total capacitance of variable capacitor bank 112. While other sources can be used to apply forward and reverse bias to PIN diode 312, in one specific embodiment, transistor 314 can be electrically coupled to a current source, while transistor 316 can be electrically coupled to a sufficiently negative voltage source. In another embodiment, a voltage source can be used to set the forward bias on PIN diode 312 and ensure that the DC resistance of the circuit provides sufficient current to ensure consistent operation. Notably, the functionality of PIN diode 312 will generally become asymptotic above a certain current level, thus providing a measure of error tolerance.

[0044] like Figure 3As shown, each of the driver circuits 304A-304N can be disposed externally to the housing 306 and can be electrically coupled to one of the capacitor modules 302A-302N via a wire or cable extending through the housing 306. For example, in one embodiment, the housing 306 can include a small opening through which the terminals of the driver circuits 304A-304N can be fed to allow connection between the driver circuits 304A-304N and their respective switches. Such openings are preferably minimized to reduce the radiation of RF signals into the compartment containing one or more of the driver circuits 304A-304N, as such radiation could corrupt or otherwise interfere with the drive signals. For example, in some embodiments, the driver circuits 304A-304N can be DC circuits and, therefore, can be susceptible to noise generated by RF currents passing through their respective capacitor modules 302A-302N. This noise can be attenuated in various ways, including by locating the driver circuits 304A-304N outside of the housing 306 (and possibly in a separate electrically grounded housing), and by including filtering circuitry to effectively block or otherwise significantly reduce the DC component of the RF current flowing to the driver circuits 304A-304N. For example, Figure 4 As shown, the drive circuit 302A includes each of an inductor 326 and a high capacitance shunt capacitor 328 , which, in combination, significantly impede RF current from reaching the transistors 314 , 316 .

[0045] Back again Figure 3In the variable capacitor bank 112, capacitors within each of the capacitor modules 302A-302N can be selectively switched by their corresponding driver circuits 304A-304N to change the total capacitance of the variable capacitor bank 112. For example, each of the driver circuits 304A-304N can be communicatively coupled to a control module 350 or a similar computing device, which selectively activates and deactivates the driver circuits 304A-304N to change the total capacitance of the variable capacitor bank 112. In one embodiment, the control module 350 can be communicatively coupled to one or more sensors or computing devices that measure reflected power, such that the control module 350 can selectively control the driver circuits 304A-304N in response. In other embodiments, other operating parameters can be used to selectively control the driver circuits 304A-304N, including but not limited to one or more of input impedance magnitude, input impedance phase shift, and incident power. In other embodiments, the control module 350 can be configured to change the state of the driver circuits 304A-304N in response to a change in the operating mode of the broader system. For example, the control module 350 can change the state of one or more of the driver circuits 304A-304N in response to an operator changing between two or more processes, each of which produces a different load impedance.

[0046] As previously described, each of the capacitor modules 302A-302N is disposed within a housing 306. The housing 306 substantially encapsulates the capacitor modules 302A-302N and provides electromagnetic shielding for the capacitor modules 302A-302N. Due to this shielding, potential electromagnetic interactions between the capacitor modules 302A-302N and other components of the matching network 104 are minimized.

[0047] In some embodiments, the housing 306 is formed of a conductive material, such as, but not limited to, aluminum or copper. The housing 306 is grounded, for example, by being coupled to a chassis ground 318. Figure 3 In the illustrated embodiment, the housing 306 defines a single port 320 adapted to electrically couple the variable capacitor bank 112 to a wider matching network circuit. In the single-port configuration, each of the capacitor modules 302A-302N is electrically coupled to the housing 306 such that each of the capacitor modules 302A-302N is grounded through the housing 306.

[0048] The specific capacitance of the capacitors used in the capacitor modules of the variable capacitors of the present disclosure may vary. Figure 3In the embodiment shown, some or all of the capacitor modules 302A-302N may include capacitors of different values. Similarly, in embodiments where a capacitor module includes multiple capacitors (e.g., Figure 5 In the case of capacitor modules 500, each capacitor within a given capacitor module can have the same or different values. Furthermore, each capacitor module as a whole can have the same or different capacitance as the other capacitor modules within a given variable capacitor bank. In other words, embodiments of the present disclosure are not limited to: any particular capacitance value for any of the individual capacitors used within a given capacitor module; the total capacitance provided by any capacitor module of a variable capacitor bank; or the total capacitance that can be provided by a variable capacitor bank.

[0049] In certain embodiments, multiple capacitors or capacitor modules providing varying levels of capacitance may be included in a variable capacitor bank to provide increased resolution or control over the capacitance provided by the variable capacitor bank. For example, a variable capacitor bank may include capacitors having relatively high capacitance to facilitate large, step-wise increases in capacitance provided by the variable capacitor bank, but may also include capacitors having lower capacitance that can be switched in or out to provide smaller, incremental changes in the total capacitance of the variable capacitor bank. Thus, high-capacitance elements and low-capacitance elements may be selectively switched to provide a wide range of capacitance values ​​while still achieving relatively small step sizes between successive capacitance values.

[0050] In addition to providing greater control over the capacitance provided by a variable capacitor bank, varying the values ​​of individual capacitors or capacitor modules can be used to address asymmetrical distribution of capacitors and / or capacitor modules within the housing of the variable capacitor module. For example, and particularly in high-frequency applications, the impedance provided by a pair of otherwise identical switched capacitors may vary due to differences in the length of the conductive paths through each switched capacitor. Such variations can be accommodated by varying the capacitance of the switched capacitors. Similarly, each switched capacitor may experience varying levels of stray inductance, which can also be accommodated by adjusting the capacitance of each capacitor.

[0051] Figure 6 yes Figure 4 1 . As shown, capacitor module 302A can be implemented on a printed circuit board (PCB). In other embodiments, each capacitor module 302A can alternatively be coupled to an alternative substrate. Capacitor module 302A includes an input 322 adapted to be coupled to bus 303 of variable capacitor bank 112. Capacitor module 302A further includes pads 324 (or similar contacts) to which capacitor 308 is coupled. Capacitor 308, in turn, is coupled to PIN diode 312. Figures 8A-8B and Figure 9 As further shown and discussed in the context of FIG, capacitor module 302A is grounded by coupling capacitor module 302A to housing 306 of the variable capacitor bank using a conductive bracket or similar support.

[0052] Figure 4 The illustrated capacitor module 302A includes a single switched capacitor branch 307; however, a capacitor module according to the present disclosure may include multiple capacitor branches, each of which may be switched or unswitched. For example, Figure 5 is a schematic diagram of an alternative capacitor module 500 including a plurality of capacitor branches. More specifically, capacitor module 500 includes a first switched capacitor branch 502 and a second switched capacitor branch 552 connected in parallel with first switched capacitor branch 502. As shown, first switched capacitor branch 502 includes a first capacitor 504 connected in series with a first PIN diode 506 (or similar switching element). Similarly, second switched capacitor branch 552 includes a second capacitor 554 connected in series with a second PIN diode 556. Each of first switched capacitor branch 502 and second switched capacitor branch 552 may also be electrically coupled to a corresponding drive circuit (e.g., Figure 4 The driver circuit 304A shown is used to selectively control the bias of the PIN diodes 506, 556 and, therefore, control the current flowing through the capacitor module 500.

[0053] Capacitor module 500 also includes a third capacitor branch 520, which includes a third capacitor 522. Notably, third capacitor branch 520 is switchless, and therefore, when current is supplied to capacitor module 500, the current always flows through third capacitor branch 520. Thus, third capacitor 522 acts as a "base" or "bottom" capacitor for capacitor module 500, which, combined with the "off-state" capacitance of the PIN diode and any other "stray" capacitance and inductance within the circuit, whether intentional or unintentional, provides the minimum capacitance of capacitor module 500.

[0054] Capacitor module 500 is intended to illustrate another example of a capacitor module according to the present disclosure that includes multiple capacitor branches. Other capacitor modules according to the present disclosure may include one or more switched capacitor branches and any suitable number of unswitched capacitor branches, including branches without any unswitched capacitors.

[0055] Figure 7 yes Figure 51 . The circuit diagram of FIG. 1 shows an example embodiment of a capacitor module 500 shown in FIG. 1 . As shown, the capacitor module 500 can be implemented on a PCB. The capacitor module 500 includes an input 580 adapted to be coupled to a bus of a variable capacitor bank (e.g., bus 303 of the variable capacitor bank 112). The capacitor module 500 further includes a plurality of pads 582-588 (or similar contacts) to which capacitors 504, 522, and 554 are electrically coupled. As shown, pad 584 is further coupled to a PIN diode 506, thereby forming a first switched capacitor branch 502, and pad 586 is further coupled to a PIN diode 526, thereby forming a second switched capacitor branch 552. Similarly, a third capacitor 522 extends between pad 582 and pad 588, thereby forming a third unswitched capacitor branch 520.

[0056] Figure 8A and Figure 8B One embodiment of a variable capacitor bank 112 according to the present disclosure is depicted. Specifically, Figure 8A and Figure 8B Each of the figures is a cross-sectional view of a capacitor bank 800, which shows the arrangement of the internal components of the variable capacitor bank 800. As shown in the figure, the variable capacitor bank 800 includes a housing 802, and a plurality of capacitor modules 804A-804F are arranged in the housing 802. The housing 802 further includes a bus 806. Figure 8A As shown, bus 806 can be in the form of a plate that extends through housing 802. For example, bus 806 can extend within housing 802 such that bus 806 extends over each of capacitor modules 804A-804F. Although shown as a substantially rectangular planar conductive structure, bus 806 can take other shapes to accommodate alternative arrangements of capacitor modules 804A-804F. Figure 8B Bus 806 is shown in dashed lines to provide further detail of potential capacitor modules 804A-804F.

[0057] First reference Figure 8A , bus 806 is shown as a plate 806 extending through the interior of housing 802. As shown, bus 806 can extend at least partially to the housing 802 or to the exterior of housing 802. Thus, the portion of bus 806 extending from housing 802 and housing 802 itself can together define a single port 850 to facilitate connection of bus 806 to matching circuitry (e.g., Figure 1 and Figure 2 For example, Figure 8C8 is a side view of the variable capacitor bank 800 showing the port 850. As shown, the port 850 is formed by a bus 806 that extends through the housing 802 and defines a conductive interface to which a connector, cable, or other electrical coupling can be attached. In such an embodiment, the electrical coupling can include a first contact for connecting a first conductor carrying an RF signal to the bus 806 and a second contact for connecting a second conductor to the housing 802 (ground).

[0058] Now refer to Figure 8B , each of the capacitor modules 804A-804F is shown as being substantially similar to Figure 5 8. The capacitor module 500 includes a pair of switched capacitor branches connected in parallel and a "bottom" capacitor branch without switches. Each of the capacitor modules 804A-804F is electrically coupled to the bus 806 and each of the housings 802 such that current flows from the bus 806 to ground via the housings 802.

[0059] exist Figure 9 A method of coupling a capacitor module to a bus 806 and a housing 802 is shown in FIG. Figure 9 8 is a cross-sectional view of variable capacitor bank 800, and in particular, illustrates the coupling of capacitor module 804A. As shown, capacitor module 804A is suspended between bus 806 and housing 802 via various conductive structural elements. In particular, conductive posts 808 or fasteners may extend from bus 806 to input 810 of capacitor module 804A, thereby physically and electrically coupling capacitor module 804A to bus 806.

[0060] To ground the capacitor module 804A, one or more conductive brackets or supports may be used to couple the capacitor module 804A to the housing 802. For example, Figure 8B and Figure 9 As shown in both figures, each branch of the capacitor module 804A can be coupled to the housing 802 via a corresponding conductive bracket 820A-820C and / or fastener. Similar to the support 808, the brackets 820A-820C provide both electrical and physical coupling between the capacitor module 804A and the housing 802. It is worth noting that any two or more branches of a capacitor module according to the present disclosure can also share a given conductive bracket or fastener for coupling the branches to the housing 802.

[0061] Grounding elements can add inductance, and this inductance can create a voltage offset relative to ground that can affect the ability to accurately characterize capacitor modules 804A-804F. Therefore, in embodiments of the present disclosure, the conductive supports 820A-820C, and more generally any path to ground through the variable capacitor bank 800 of the capacitor modules 804A-804F to ground, can be minimized. By minimizing the distance from each capacitor module 804A-804F to ground, the impact of any voltage offset created by the inductance of the path to ground can be reduced and / or made negligible.

[0062] Figure 10 is a cross-sectional view of an alternative variable capacitor bank 1000 according to the present disclosure. Figure 8A and Figure 8B The variable capacitor bank 800 includes a housing 1002 in which a plurality of capacitor modules 1004A-1004F are disposed. The housing 1002 further includes a bus 1006 (shown in dashed lines for clarity). Figure 10 As shown, capacitor modules 1004A-1004F are asymmetrically distributed within housing 1002. Specifically, capacitor modules 1004A and 1004B are arranged in a first column, while capacitor modules 1004C-1004F are arranged in a second column.

[0063] Figure 10 The two columns of capacitor modules are arranged asymmetrically and Figure 8A and Figure 8B The rectangular arrangement of capacitor modules is intended merely as an example of a potential capacitor module distribution in a variable capacitor bank according to the present disclosure. In other embodiments, the number and location of capacitor modules may be varied. For example, in applications requiring more discrete impedance control, the variable capacitor bank may include a larger number of capacitor modules, and / or each capacitor module may include a larger number of switched capacitor branches. Conversely, in applications where the capacitance range may be relatively limited, the variable capacitor bank may include fewer capacitor modules, each of which may include only a single switched capacitor.

[0064] As mentioned above, the specific arrangement of the capacitor modules within the housing of the variable capacitor bank may also vary. In some cases, the overall shape of the housing, and therefore the distribution of the capacitor modules within the housing, may be dictated by the available space within a rack, module, or similar enclosure. In such cases, the housing may include various cutouts or be otherwise shaped to fit within the housing and around any adjacent equipment.

[0065] The distribution of capacitor modules within the housing can also be dictated by the frequency of the RF signal being supplied to the variable capacitor bank. For example, at relatively high frequencies, even when the capacitor modules themselves are substantially identical (i.e., they contain capacitors with substantially the same capacitance), differences in the distance between the ports of the variable capacitor bank and each capacitor module can cause non-negligible variations in the impedance provided by switching the capacitor modules. Due to such variations, the resolution of the variable capacitor bank may not be consistent across its full range, as each capacitor module can provide a slightly different capacitance change when its state is changed. This effect is primarily due to the inductance provided by the conductive path defined between the ports of the variable capacitor bank and each switched capacitor / capacitor module. This inductance causes the apparent capacitance of the switched capacitor / capacitor module to differ from its actual rated capacitance. This variation is particularly significant if high-frequency signals are used or the capacitance values ​​of the switched capacitors are particularly large.

[0066] One approach to addressing the aforementioned problem is to select the capacitors of the capacitor modules to account for any such variations. However, this approach can be complex and may require the use of custom or other non-standard capacitors. An alternative approach is to design the variable capacitor bank so that each of the capacitor modules is substantially equidistant from the ports of the variable capacitor bank. For the purposes of this disclosure, substantially equidistant is intended to be as equal as possible given variations caused by manufacturing tolerances, structural limitations (e.g., traces that must be routed around the physical structure of the capacitor modules), and other similar factors. By arranging the modules to be substantially equidistant, the conductive paths extending from the ports of the variable capacitor bank through each respective capacitor module are substantially identical and, therefore, provide substantially the same inductance. Thus, when operating the variable capacitor bank, the effects of the inductance associated with the conductors coupling each capacitor module to the bus can be known, uniform, and easily accounted for.

[0067] exist Figure 11 One such embodiment is shown in FIG. Figure 11 1 is a cross-sectional view of another variable capacitor bank 1100 according to the present disclosure. Variable capacitor bank 1100 includes a housing 1102, within which capacitor modules 1104A-1104L and a bus 1106 are disposed. Each of capacitor modules 1104A-1104L is electrically coupled to bus 1106 and each of housing 1102. Capacitor bank 1100 further includes a port 1108 electrically coupled to bus 1106 and adapted to couple variable capacitor bank 1100 to a matching circuit or other components of other circuits.

[0068] like Figure 11As shown, each of the housing 1102 and bus 1106 is circular in shape and coaxial with respect to one another, such that they are disposed along a shared axis 1111. Ports 1108 are similarly disposed along shared axis 1111. Capacitor modules 1104A-1104L are arranged in a circular array around ports 1108, such that each of capacitor modules 1104A-1104L is disposed substantially equidistant from port 1108. By doing so, the inductance generated by the conductive path between ports 1108 and each respective capacitor module 1104A-1104L is substantially equal for each capacitor module 1104A-1104L and can be easily accounted for when characterizing variable capacitor bank 1100. However, across the full operating range of variable capacitor bank 1100, the inductance and its effect on the apparent capacitance of each capacitor module 1104A-1104L is preferably minimized. For example, in certain embodiments, each of the capacitor modules 1104A-1104L is positioned relative to the port 1108 such that the resulting inductance does not cause the actual capacitance of the individual capacitor modules 1104A-1104L to vary by more than 5% from the apparent capacitance during operation.

[0069] Although the present disclosure has primarily focused on single-port configurations, the variable capacitor banks of the present disclosure may also be configured in multi-port configurations. As opposed to single-port configurations, which are typically implemented as parallel shunts, multi-port configurations may allow the variable capacitor bank to be connected in series with one or more other electrical components, and so on.

[0070] Figure 12 12 is a schematic diagram of a two-port variable capacitor bank 1200 according to the present disclosure. The variable capacitor bank 1200 includes a plurality of capacitor modules 1202A-1202N arranged in parallel and sharing each of a first bus 1203 and a second bus 1205. Each of the capacitor modules 1202A-1202N is disposed within a grounded housing 1206 such that each of the capacitor modules 1202A-1202N is shielded from external electromagnetic radiation. The first bus 1203 is coupled to an input port 1207, while the second bus 1205 is coupled to an output port 1209, each of which may be similar to Figure 8C Port 850 is shown.

[0071] Each capacitor module 1202A-1202N is electrically coupled to a corresponding drive circuit to control the operation of the capacitor module 1202A-1202N. For example, each capacitor module 1202A-1202N may include a connection 1204A-1204N for coupling to a drive circuit. Figure 3 and Figure 4As discussed in the context of , each driver circuit can be disposed externally to the housing 1206 and can be coupled to a corresponding one of the capacitor modules 1202A-1202N using filtering circuitry to minimize interference with the driver circuit from other components of the variable capacitor bank 1200. Each of the driver circuits can be communicatively coupled to a control module or similar computing device (e.g., Figure 3 A control module 350) is provided to selectively control each of the capacitor modules 1202A-1202N.

[0072] When implemented in a two-port configuration, e.g. Figure 12 As shown, the variable capacitor bank 1200 can be coupled in series with other components of the matching network. For example, the input port 1207 of the variable capacitor 1200 can be coupled to a first component or bus of the matching network, while the output port 1209 can be electrically coupled to a second element in the matching network (e.g., an adjacent capacitor or inductor). Compared to the shunt arrangement shown in the previous embodiments discussed in this disclosure, in this arrangement, the variable capacitor 1200 will be connected in series with the adjacent components.

[0073] The above description includes example systems, methods, techniques, instruction sequences, and / or computer program products that embody techniques of the present disclosure. However, it should be understood that the described disclosure can be practiced without these specific details.

[0074] In the present disclosure, the disclosed methods can be implemented as a device-readable instruction set or software. In addition, it should be understood that the specific order or hierarchy of steps in the disclosed methods is an example of an exemplary method. Based on design preferences, it should be understood that the specific order or hierarchy of steps in the method can be rearranged while remaining within the disclosed subject matter. The attached method claims present the elements of the various steps in an exemplary order and are not necessarily meant to be limited to the specific order or hierarchy presented.

[0075] The described disclosure may be provided as a computer program product or software, which may include a machine-readable medium having stored thereon instructions that may be used to program a computer system (or other electronic device) to perform processes according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). A machine-readable medium may include, but is not limited to, magnetic storage media (e.g., a hard drive), optical storage media (e.g., a CD-ROM); magneto-optical storage media, read-only memory (ROM); random access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; or other types of media suitable for storing electronic instructions.

[0076] For example, Figure 13 is to show an embodiment that can be used to implement the present disclosure (for example, Figure 3 350). The computer system (system) includes one or more processors 1302-1306. The processors 1302-1306 may include one or more internal cache levels (not shown) and a bus controller or bus interface unit to direct interactions with a processor bus 1312. The processor bus 1312 (also known as a host bus or front-side bus) can be used to couple the processors 1302-1306 with a system interface 1314. The system interface 1314 can be connected to the processor bus 1312 to interface other components of the system 1300 with the processor bus 1312. For example, the system interface 1314 may include a memory controller 1313 to interface a main memory 1316 with the processor bus 1312. The main memory 1316 typically includes one or more memory cards and control circuitry (not shown). System interface 1314 may also include an input / output (I / O) interface 1320 to interface one or more I / O bridges or I / O devices with processor bus 1312. One or more I / O controllers and / or I / O devices (e.g., I / O controller 1328 and I / O device 1330) may be connected to I / O bus 1326 as shown.

[0077] The I / O devices 1330 may also include input devices (not shown), such as alphanumeric input devices including alphanumeric and other keys for communicating information and / or command selections to the processors 1302-1306. Another type of user input device includes a cursor control (e.g., a mouse, trackball, or cursor direction keys) for communicating direction information and command selections to the processors 1302-1306 and for controlling cursor movement on a display device.

[0078] The system 1300 may include a dynamic storage device, referred to as main memory 1316, or random access memory (RAM), or other computer-readable device, coupled to the processor bus 1312 for storing information and instructions to be executed by the processors 1302-1306. The main memory 1316 may also be used to store temporary variables or other intermediate information during execution of instructions by the processors 1302-1306. The system 1300 may include a read-only memory (ROM) and / or other static storage device coupled to the processor bus 1312 for storing static information and instructions for the processors 1302-1306. Figure 13 The system set forth in is but one possible example of a computer system that may employ or be configured in accordance with various aspects of the present disclosure.

[0079] According to one embodiment, the above techniques can be performed by the computer system 1300 in response to the processor 1304 executing one or more sequences of one or more instructions contained in the main memory 1316. These instructions can be read into the main memory 1316 from another machine-readable medium such as a storage device. Executing the sequence of instructions contained in the main memory 1316 can cause the processors 1302-1306 to perform the process steps described herein. In alternative embodiments, circuits can be used in place of or in combination with software instructions. Thus, embodiments of the present disclosure may include both hardware components and software components.

[0080] Computer-readable media include any mechanism for storing or transmitting information in a form (e.g., software, processing application) readable by a machine (e.g., a computer). Such media may take the form of, but is not limited to, non-volatile media and volatile media. Non-volatile media include optical or magnetic disks. Volatile media include dynamic memory (e.g., main memory 1316). Common forms of machine-readable media may include, but are not limited to, magnetic storage media (e.g., hard drives); optical storage media (e.g., CD-ROMs); magneto-optical storage media; read-only memory (ROM); random access memory (RAM); erasable programmable memory (e.g., EPROM and EEPROM); flash memory; or other types of media suitable for storing electronic instructions.

[0081] The embodiments of the present disclosure include various operations or steps described in this specification. These steps can be performed by hardware components or can be embodied in machine-executable instructions, which can be used to cause a general-purpose processor or a special-purpose processor programmed with the instructions to perform these steps. Alternatively, these steps can be performed by a combination of hardware, software, and / or firmware.

[0082] It is believed that the present disclosure and its many attendant advantages will be understood from the foregoing description, and it will be apparent that various changes in the form, construction and arrangement of components can be made without departing from the disclosed subject matter or sacrificing all of its important advantages. The form described is illustrative only, and it is intended that the appended claims encompass and include such changes.

[0083] Although the present disclosure has been described with reference to various embodiments, it will be understood that these embodiments are illustrative and the scope of the present disclosure is not limited to them. Many variations, modifications, additions, and improvements are possible. More generally, embodiments according to the present disclosure have been described in the context of specific embodiments. In various embodiments of the present disclosure, functions may be separated or combined differently in the box, or described using different terms. These and other variations, modifications, additions, and improvements may fall within the scope of the disclosure as defined in the appended claims.

Claims

1. A variable capacitor bank, comprising: a conductive housing defining an interior volume; an electrical bus comprising a first portion disposed within the conductive housing and a second portion extending through the conductive housing such that the second portion of the bus and the housing form a port; as well as A switched capacitor is disposed within the conductive housing and electrically coupled to the first portion of the electrical bus.

2. The variable capacitor bank according to claim 1, wherein: The conductive housing provides an electromagnetic barrier between the interior volume and an exterior of the conductive housing.

3. The variable capacitor bank according to claim 1, wherein: The switched capacitor is further electrically coupled to the conductive housing.

4. The variable capacitor bank according to claim 1, wherein: The switching element is a PIN diode. 5 . The variable capacitor bank of claim 1 , further comprising a capacitor connected in parallel with the switching capacitor.

6. The variable capacitor bank of claim 5, further comprising a capacitor input, wherein The switched capacitor and each of the capacitors in parallel with the switched capacitor are coupled to the capacitor input.

7. The variable capacitor bank according to claim 6, wherein: The switched capacitor is a first switched capacitor, and the capacitor connected in parallel with the switched capacitor is a second switched capacitor.

8. The variable capacitor bank according to claim 1, wherein: The switched capacitor includes a switching element coupled to a drive circuit adapted to induce each of a forward bias and a reverse bias on the switching element.

9. The variable capacitor bank according to claim 8, wherein: The drive circuit is disposed outside the conductive housing and is coupled to the switched capacitor via a conductor extending through the conductive housing.

10. The variable capacitor bank according to claim 1, wherein The switched capacitor is coupled to a substrate to form a capacitor module, and the capacitor module is one of a plurality of capacitor modules disposed within the conductive housing.

11. The variable capacitor bank according to claim 10, wherein: The plurality of capacitor modules are arranged in a rectangular array.

12. The variable capacitor bank according to claim 10, wherein: Each of the plurality of capacitor modules is coupled to the electrical bus via a respective conductive path, each conductive path being substantially equal in length such that each conductive path provides a common inductance.

13. The variable capacitor bank according to claim 12, wherein: The port is disposed along a common axis of the bus and the housing, and the plurality of capacitor modules are disposed in a circular array around the port.

14. The variable capacitor bank according to claim 1, wherein The electrical bus further includes a third portion extending through the conductive housing such that the bus and the third portion of the bus define a second port.

15. A variable capacitor bank, comprising: Conductive shell; a port extending through the housing; as well as A plurality of switched capacitors are disposed within the housing and electrically coupled to the conductive housing and the port, wherein each switched capacitor is coupled to the port via a corresponding conductive path, each conductive path being substantially equal in length such that each conductive path provides a common inductance.

16. The variable capacitor bank according to claim 12, wherein: The plurality of switched capacitors are arranged in a circular array around the port.

17. An impedance matching module, comprising: A variable capacitor bank comprising: Conductive shell; an electrical bus comprising a first portion disposed within the conductive housing and a second portion extending through the conductive housing such that the second portion of the bus and the housing form a port; and A plurality of switched capacitors are disposed within the housing and coupled to each of the electrical bus and the conductive housing.

18. The impedance matching module according to claim 17, wherein: Each of the switched capacitors is connected in parallel with a corresponding capacitor, each corresponding capacitor being one of a switched capacitor or an unswitched capacitor.

19. The impedance matching module of claim 17, further comprising an input and an output, the variable capacitor bank being disposed in a shunt between the input and the output.

20. The impedance matching module of claim 17, further comprising an input and an output, the variable capacitor bank being arranged in series with the input and the output.

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