Single-ended signal crosstalk suppression method, device and equipment based on PCB, medium and product

Abstract

The invention discloses a single-ended signal crosstalk suppression method and device based on a PCB, equipment, a medium and a product, and relates to the technical field of printed circuit, and the method comprises the steps: determining a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; determining bit rates and signal propagation speeds of the first single-ended signal line and the second single-ended signal line; determining a target length according to the bit rate and the signal propagation speed; a first signal extension line with the length being the target length is added to one end of the first single-end signal line, and a second signal extension line with the length being the target length is added to the other end of the second single-end signal line, so that single-end signal crosstalk in the PCB can be inhibited, the performance and the stability of the PCB are further improved, and the reliability of the PCB is improved. And stable operation of the electronic equipment in a complex signal environment is ensured.

Description

Technical Field

[0001] The present application relates to the field of printed circuit technology, and in particular to a method, device, equipment, medium and product for suppressing single-ended signal crosstalk based on PCB (Printed Circuit Board). Background Art

[0002] In today's electronic equipment sector, speed and miniaturization have become an unstoppable trend. This trend has significantly increased signal transmission rates in PCBs, while also dramatically increasing wiring density. However, while this performance improvement has brought significant challenges to signal integrity, crosstalk between adjacent PCB traces is particularly prominent and has become a core issue affecting signal integrity.

[0003] To reduce crosstalk, traditional methods primarily increase the spacing between PCB traces and reduce mutual interference between signal traces by adding shielding layers or isolation structures. However, physical space limitations make spacing expansion extremely difficult due to the high-density wiring requirements of PCBs, severely impacting PCB performance and stability. Summary of the Invention

[0004] The purpose of this application is to provide a PCB-based single-ended signal crosstalk suppression method, device, equipment, medium and product, which can suppress single-ended signal crosstalk in the PCB, thereby improving the performance and stability of the PCB.

[0005] To achieve the above objectives, this application provides the following solutions: In a first aspect, the present application provides a method for suppressing single-ended signal crosstalk based on a PCB, comprising: Determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein signal crosstalk occurs between the first single-ended signal line and the second single-ended signal line; determining a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; determining a target length based on the bit rate and the signal propagation speed; A first signal extension line having a target length is added to one end of the first single-ended signal line, and a second signal extension line having a target length is added to the other end of the second single-ended signal line.

[0006] Optionally, determining the target length according to the bit rate and the signal propagation speed specifically includes: determining, according to the bit rate, a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line; A target length is determined according to the bit width and the signal propagation speed.

[0007] Optionally, the calculation formula of the bit width is specifically: ; Wherein, T represents the bit width.

[0008] Optionally, the target length is calculated as follows: W = T × v; Wherein, W represents the target length, and v represents the signal propagation speed.

[0009] Optionally, one end of the first single-ended signal line connected to the first signal source is a first starting end, and the other end of the first single-ended signal line is a first ending end; one end of the second single-ended signal line connected to the second signal source is a second starting end, and the other end of the second single-ended signal line is a second ending end; Adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line, specifically comprising: Adding a first signal extension line having a target length at the first starting end of the first single-ended signal line; A second signal extension line having a target length is added to the second tail end of the second single-ended signal line.

[0010] Optionally, adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line, specifically includes: Adding a first signal extension line having a target length at the first end of the first single-ended signal line; A second signal extension line having a target length is added to the second starting end of the second single-ended signal line.

[0011] In a second aspect, the present application provides a PCB-based single-ended signal crosstalk suppression device, comprising: A first determining unit is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; a second determining unit, configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; a third determining unit, configured to determine a target length according to the bit rate and the signal propagation speed; The adding unit is configured to add a first signal extension line having a target length at one end of the first single-ended signal line, and to add a second signal extension line having a target length at the other end of the second single-ended signal line.

[0012] In a third aspect, the present application provides a computer device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of any one of the above-mentioned methods for suppressing single-ended signal crosstalk based on PCB.

[0013] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any one of the above-mentioned methods for suppressing single-ended signal crosstalk based on PCB.

[0014] In a fifth aspect, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of any one of the above-mentioned methods for suppressing single-ended signal crosstalk based on PCB.

[0015] In a sixth aspect, the present application provides a chip, which includes a processor and a communication interface, the communication interface and the processor are coupled, the processor is used to run a program or instruction, and when the processor executes the program or instruction, it implements the steps of any one of the above-mentioned PCB-based single-ended signal crosstalk suppression methods.

[0016] According to the specific embodiments provided in this application, this application discloses the following technical effects: This application provides a method, apparatus, device, medium, and product for suppressing single-ended signal crosstalk on a PCB. By precisely identifying signal lines experiencing crosstalk, determining target lengths based on bit rate and signal propagation speed, and adding signal extension cables of a specific length to the ends of the corresponding signal lines, this targeted approach cleverly adjusts signal transmission paths and timing, effectively balancing mutual interference between signals. This approach suppresses single-ended signal crosstalk in the PCB, thereby improving the performance and stability of the PCB and ensuring stable operation of electronic equipment in complex signal environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0018] Figure 1This is a flow chart of a method for suppressing single-ended signal crosstalk based on PCB in one embodiment of the present application; Figure 2 A schematic diagram of a first single-ended signal line and a second single-ended signal line in a target PCB provided in an embodiment of the present application; Figure 3 for Figure 2 Schematic diagram of a signal crosstalk phenomenon between the first single-ended signal line and the second single-ended signal line; Figure 4 for Figure 2 Schematic diagram of implementing single-ended signal crosstalk suppression between the first single-ended signal line and the second single-ended signal; Figure 5 A schematic diagram of the functional modules of a PCB-based single-ended signal crosstalk suppression device provided in one embodiment of the present application; Figure 6 A schematic diagram of the structure of a computer device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0020] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0021] In an exemplary embodiment, Figure 1 As shown, a method for suppressing single-ended signal crosstalk based on PCB is provided. The method is executed by a computer device, specifically, a computer device such as a terminal or a server, or a terminal and a server. In the embodiment of the present application, the method includes the following steps 101 to 104. Among them: Step 101: Determine a first single-ended signal line and a second single-ended signal line in a target PCB.

[0022] There is signal crosstalk between the first single-ended signal line and the second single-ended signal line.

[0023] Please also refer to Figure 2 and Figure 3 , Figure 2 A schematic diagram of a first single-ended signal line and a second single-ended signal line in a target PCB provided in an embodiment of the present application; Figure 3 for Figure 2Schematic diagram showing signal crosstalk between the first single-ended signal line and the second single-ended signal line.

[0024] Among them, S1 represents the first signal source, S2 represents the second signal source, one end of S1 is grounded, and the other end of S1 is connected to the first starting end of the first single-ended signal line L1, the first end of the first single-ended signal line L1 is connected to the resistor Z1, and the other end of the resistor Z1 is grounded; one end of S2 is grounded, and the other end of S2 is connected to the second starting end of the second single-ended signal line L2, the second end of the second single-ended signal line L2 is connected to the resistor Z2, and the other end of the resistor Z2 is grounded.

[0025] from Figure 2 As can be seen from FIG, the first single-ended signal line L1 and the second single-ended signal line L2 are in the high and low level states. Figure 3 It can be seen from the figure that high-level signals and low-level signals will generate signal crosstalk in adjacent traces L1 and L2. The signal crosstalk amplitude can be measured by The signal level difference will generate capacitive coupling signal crosstalk, and the signal crosstalk amplitude is proportional to the signal level difference, as shown in the following formula:

[0026]

[0027] in, Indicates the signal level difference, represents the signal level of the first single-ended signal line L1 at time t, represents the signal level of the second single-ended signal line L2 at time t.

[0028] It can be seen that the smaller the signal level difference, the smaller the signal crosstalk amplitude. Therefore, the single-ended signal crosstalk can be suppressed by adjusting the length of the first single-ended signal line and the second single-ended signal line in the target PCB.

[0029] Step 102 : Determine the bit rate and signal propagation speed of the first single-ended signal line and the second single-ended signal line.

[0030] In the embodiment of the present application, the bit rate is the speed at which the system transmits bits, which is defined by the system operating protocol. The preset bit rate in one operating protocol of DDR4 memory is 3200Mbps (3200M bits transmitted per second).

[0031] The signal propagation speed is related to the propagation material. In this application, the propagation material is a PCB board, which is usually made of FR-4 material with a dielectric constant in the range of 4.0-4.5. The calculation formula for the signal propagation speed v is:

[0032] in, represents the dielectric constant, Represents the speed of light.

[0033] For example, when the dielectric constant is 4.0, the speed of light is approximately equal to 12 inches / ns (12 inches / nanosecond). Substituting this into the formula, we can calculate that the signal propagation speed of a PCB board made of FR-4 material is half the speed of light, that is, the signal propagation speed on an FR-4 board is approximately 6 inches / ns.

[0034] Step 103: Determine a target length according to the bit rate and the signal propagation speed.

[0035] As an optional implementation, in step 103, determining the target length according to the bit rate and the signal propagation speed may include: determining a bit width (Bit Width) of a signal transmitted in the first single-ended signal line and the second single-ended signal line according to the bit rate; A target length is determined according to the bit width and the signal propagation speed.

[0036] This implementation accurately infers signal width from bit rate, providing a clear understanding of signal characteristics during transmission. By combining this with the signal propagation speed to determine the target length, the added signal extension line is precisely adapted to the actual signal transmission conditions. This effectively adjusts interference relationships between signals and precisely suppresses crosstalk between the first and second single-ended signal lines on the PCB, significantly improving PCB performance and stability and ensuring reliable circuit system operation.

[0037] The calculation formula for bit width is: ; Wherein, T represents the bit width.

[0038] And the calculation formula of target length is: W = T × v; Wherein, W represents the target length, and v represents the signal propagation speed.

[0039] For example, the bit rate can be 3200Mbps, bit width = 1 / 3200M = 0.3125ns. The signal propagation speed can be 85ps / in.

[0040] Step 104 : adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line.

[0041] In an embodiment of the present application, one end of the first single-ended signal line connected to the first signal source is the first starting end, and the other end of the first single-ended signal line is the first ending end. One end of the second single-ended signal line connected to the second signal source is the second starting end, and the other end of the second single-ended signal line is the second ending end.

[0042] As an optional implementation, step 104 of adding a first signal extension line having a target length at one end of the first single-ended signal line and adding a second signal extension line having a target length at the other end of the second single-ended signal line may include: Adding a first signal extension line having a target length at the first starting end of the first single-ended signal line; A second signal extension line having a target length is added to the second tail end of the second single-ended signal line.

[0043] This implementation, by precisely adding extension lines at specific endpoints, allows for targeted adjustments to the signal propagation path and timing based on the starting and ending characteristics of signal transmission. This adjustment effectively balances signal interference between the two signal lines, significantly reducing mutual influence during transmission. This effectively suppresses crosstalk between the first and second single-ended signal lines on the PCB, significantly improving PCB performance and stability, and ensuring efficient and reliable operation of the electronic device's internal circuit systems.

[0044] Alternatively, step 104 may include adding a first signal extension line having the target length at one end of the first single-ended signal line and adding a second signal extension line having the target length at the other end of the second single-ended signal line. Adding a first signal extension line having a target length at the first end of the first single-ended signal line; A second signal extension line having a target length is added to the second starting end of the second single-ended signal line.

[0045] This implementation, based on the principles of signal transmission, cleverly alters the signal's reflection and coupling characteristics by adding extension lines at both the end and the beginning of the signal transmission path. This specifically positioned extension line effectively disrupts the interfering signal rhythm, readjusts the phase relationship between the signals, and significantly reduces the crosstalk between the first and second single-ended signal lines. This not only improves the purity of PCB signal transmission but also significantly enhances the PCB's performance and stability, ensuring stable and efficient operation of electronic devices in complex signal environments.

[0046] Please also refer to Figure 4 , Figure 4 for Figure 2 Schematic diagram of implementing single-ended signal crosstalk suppression between the first single-ended signal line and the second single-ended signal; wherein: S1' represents Figure 2 The first signal source S1, S2' represents Figure 2 In represents the second signal source S2, L1' represents Figure 2 The first single-ended signal line L1, L2' represents Figure 2 The second single-ended signal line L2, Z1' in Figure 2 The resistors Z1 and Z2' in the Figure 2 Resistor Z2 in.

[0047] W1 represents a first signal extension line, W2 represents a second signal extension line, and the lengths of W1 and W2 are both target lengths, that is, the lengths of W1 and W2 are equal.

[0048] from Figure 4 As can be seen in the figure, W1 is added to the first starting end of the first single-ended signal line L1', and W2 is added to the second ending end of the second single-ended signal line L2'. In this way, the signal logic relationship of the signals sent by S1' and S2' reaching the ends of the first single-ended signal line L1' and the second single-ended signal line L2' will be restored to the original relationship; this can also maintain the relationship of equal length of the lines, thereby achieving the suppression of single-ended signal crosstalk between the first single-ended signal line L1' and the second single-ended signal line L2'.

[0049] In the embodiments of the present application, crosstalk can be efficiently suppressed. Through the dual mechanisms of timing misalignment and dynamic compensation, the crosstalk amplitude between single-ended signal lines can be reduced, significantly improving the signal-to-noise ratio. Compatibility and flexibility can also be achieved without changing the existing single-ended signal system architecture. It can be directly integrated into the driver or receiver circuit, supporting high-density wiring design and suitable for PCB, flexible circuit, and chip-level interconnects. Furthermore, low cost and low power consumption can be achieved. The compensation circuit (i.e., the signal extension line) is implemented using a standard CMOS process, with an area overhead less than 30% of that of traditional shielding solutions. Dynamic impedance matching is only activated during the signal transition phase, resulting in near-zero static power consumption and an overall energy efficiency improvement of over 25%.

[0050] Implementing steps 101 to 104 above can suppress single-ended signal crosstalk in the PCB, thereby improving the performance and stability of the PCB and ensuring stable operation of electronic devices in complex signal environments. Furthermore, the present application can more effectively adjust the interference relationship between signals, precisely suppressing the crosstalk between the first and second single-ended signal lines in the PCB, significantly improving the performance and stability of the PCB and ensuring reliable operation of the circuit system. Furthermore, the present application can effectively balance the signal interference between the two signal lines, significantly reducing the mutual influence of the signals during transmission, thereby effectively suppressing the crosstalk between the first and second single-ended signal lines in the PCB. Furthermore, the present application can effectively disrupt the rhythm of the originally interfering signals and readjust the phase relationship between the signals, thereby significantly reducing the crosstalk effect between the first and second single-ended signal lines. This not only helps to improve the purity of PCB signal transmission, but also significantly enhances the performance and stability of the PCB, ensuring that electronic devices can continue to operate stably and efficiently in complex signal environments.

[0051] Based on the same inventive concept, embodiments of the present application further provide a PCB-based single-ended signal crosstalk suppression device for implementing the aforementioned PCB-based single-ended signal crosstalk suppression method. The solution provided by this device is similar to the solution described in the aforementioned method. Therefore, the specific limitations of one or more PCB-based single-ended signal crosstalk suppression device embodiments provided below can be found in the aforementioned limitations of the PCB-based single-ended signal crosstalk suppression method and will not be further elaborated here.

[0052] In an exemplary embodiment, Figure 5 As shown, a single-ended signal crosstalk suppression device based on PCB is provided, comprising: The first determining unit 501 is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have signal crosstalk; A second determining unit 502 is configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; A third determining unit 503 is configured to determine a target length according to the bit rate and the signal propagation speed; The adding unit 504 is configured to add a first signal extension line having a target length to one end of the first single-ended signal line, and to add a second signal extension line having a target length to the other end of the second single-ended signal line. The end of the first single-ended signal line connected to the first signal source is a first starting end, and the other end of the first single-ended signal line is a first ending end. The end of the second single-ended signal line connected to the second signal source is a second starting end, and the other end of the second single-ended signal line is a second ending end.

[0053] As an optional implementation manner, the third determining unit 503 may determine the target length according to the bit rate and the signal propagation speed in the following manner: determining, according to the bit rate, a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line; A target length is determined according to the bit width and the signal propagation speed.

[0054] This implementation accurately infers signal width from bit rate, providing a clear understanding of signal characteristics during transmission. By combining this with the signal propagation speed to determine the target length, the added signal extension line is precisely adapted to the actual signal transmission conditions. This effectively adjusts interference relationships between signals and precisely suppresses crosstalk between the first and second single-ended signal lines on the PCB, significantly improving PCB performance and stability and ensuring reliable circuit system operation.

[0055] The calculation formula for bit width is: ; Wherein, T represents the bit width.

[0056] And the calculation formula of target length is: W = T × v; Wherein, W represents the target length, and v represents the signal propagation speed.

[0057] As an optional implementation manner, the adding unit 504 adds a first signal extension line having a target length at one end of the first single-ended signal line, and adds a second signal extension line having a target length at the other end of the second single-ended signal line. Specifically, the method may be: Adding a first signal extension line having a target length at the first starting end of the first single-ended signal line; A second signal extension line having a target length is added to the second tail end of the second single-ended signal line.

[0058] This implementation, by precisely adding extension lines at specific endpoints, allows for targeted adjustments to the signal propagation path and timing based on the starting and ending characteristics of signal transmission. This adjustment effectively balances signal interference between the two signal lines, significantly reducing mutual influence during transmission. This effectively suppresses crosstalk between the first and second single-ended signal lines on the PCB, significantly improving PCB performance and stability, and ensuring efficient and reliable operation of the electronic device's internal circuit systems.

[0059] As an optional implementation manner, the adding unit 504 adds a first signal extension line having a target length at one end of the first single-ended signal line, and adds a second signal extension line having a target length at the other end of the second single-ended signal line. Specifically, the method may be: Adding a first signal extension line having a target length at the first end of the first single-ended signal line; A second signal extension line having a target length is added to the second starting end of the second single-ended signal line.

[0060] This implementation, based on the principles of signal transmission, cleverly alters the signal's reflection and coupling characteristics by adding extension lines at both the end and the beginning of the signal transmission path. This specifically positioned extension line effectively disrupts the interfering signal rhythm, readjusts the phase relationship between the signals, and significantly reduces the crosstalk between the first and second single-ended signal lines. This not only improves the purity of PCB signal transmission but also significantly enhances the PCB's performance and stability, ensuring stable and efficient operation of electronic devices in complex signal environments.

[0061] Implementing the above-described embodiment can suppress single-ended signal crosstalk in a PCB, thereby improving the performance and stability of the PCB and ensuring stable operation of electronic devices in complex signal environments. Furthermore, the present application can more effectively adjust the interference relationship between signals, precisely suppressing the crosstalk between the first and second single-ended signal lines in the PCB, significantly improving the performance and stability of the PCB and ensuring reliable operation of the circuit system. Furthermore, the present application can effectively balance the signal interference between the two signal lines, significantly reducing the mutual influence of the signals during transmission, thereby effectively suppressing the crosstalk between the first and second single-ended signal lines in the PCB. Furthermore, the present application can effectively disrupt the rhythm of signals that originally interfere with each other and readjust the phase relationship between the signals, thereby significantly reducing the crosstalk effect between the first and second single-ended signal lines. This not only helps to improve the purity of PCB signal transmission, but also significantly enhances the performance and stability of the PCB, ensuring that electronic devices can continue to operate stably and efficiently in complex signal environments.

[0062] In an exemplary embodiment, a computer device is provided. The computer device may be a server or a terminal. The internal structure diagram thereof may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O) and a communication interface. The processor, memory and input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the computer device is used to store PCB-based single-ended signal crosstalk suppression data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a single-ended signal crosstalk suppression method based on PCB is implemented.

[0063] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0064] In an exemplary embodiment, a computer device is further provided, including a memory and a processor. The memory stores a computer program, and the processor implements the steps in the above method embodiments when executing the computer program.

[0065] In an exemplary embodiment, a computer-readable storage medium is provided, storing a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0066] In an exemplary embodiment, a computer program product is provided, including a computer program. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.

[0067] In an exemplary embodiment, a chip is provided, which includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the steps in the above-mentioned method embodiments and achieve the same technical effects. To avoid repetition, they are not described here.

[0068] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0069] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0070] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the above-mentioned embodiments. In particular, any reference to memory, database, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM may be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0071] The databases involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processors involved in the various embodiments provided herein may include, but are not limited to, general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic units, data processing logic units based on quantum computing, and the like.

[0072] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0073] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A single-ended signal crosstalk suppression method based on PCB, characterized in that: The PCB-based single-ended signal crosstalk suppression method includes: Determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein signal crosstalk occurs between the first single-ended signal line and the second single-ended signal line; determining a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; determining a target length based on the bit rate and the signal propagation speed; A first signal extension line having a target length is added to one end of the first single-ended signal line, and a second signal extension line having a target length is added to the other end of the second single-ended signal line.

2. The method for suppressing single-ended signal crosstalk based on PCB according to claim 1, characterized in that: Determining the target length according to the bit rate and the signal propagation speed specifically includes: determining, according to the bit rate, a bit width of a signal transmitted in the first single-ended signal line and the second single-ended signal line; A target length is determined according to the bit width and the signal propagation speed.

3. The method for suppressing single-ended signal crosstalk based on PCB according to claim 2, characterized in that: The calculation formula of the bit width is specifically: ； Wherein, T represents the bit width.

4. The method for suppressing single-ended signal crosstalk based on PCB according to claim 2, characterized in that: The calculation formula of the target length is specifically: W = T × v; Wherein, W represents the target length, and v represents the signal propagation speed.

5. The method for suppressing single-ended signal crosstalk based on PCB according to claim 1, characterized in that: One end of the first single-ended signal line connected to the first signal source is a first starting end, and the other end of the first single-ended signal line is a first ending end; one end of the second single-ended signal line connected to the second signal source is a second starting end, and the other end of the second single-ended signal line is a second ending end; Adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line, specifically comprising: Adding a first signal extension line having a target length at the first starting end of the first single-ended signal line; A second signal extension line having a target length is added to the second tail end of the second single-ended signal line.

6. The method for suppressing single-ended signal crosstalk based on PCB according to claim 5, characterized in that: The step of adding a first signal extension line having a target length at one end of the first single-ended signal line, and adding a second signal extension line having a target length at the other end of the second single-ended signal line, specifically includes: Adding a first signal extension line having a target length at the first end of the first single-ended signal line; A second signal extension line having a target length is added to the second starting end of the second single-ended signal line.

7. A PCB-based single-ended signal crosstalk suppression device, the device applying the PCB-based single-ended signal crosstalk suppression method according to any one of claims 1 to 6, characterized in that: The PCB-based single-ended signal crosstalk suppression device includes: A first determining unit is configured to determine a first single-ended signal line and a second single-ended signal line in a target PCB; wherein the first single-ended signal line and the second single-ended signal line have a signal crosstalk phenomenon; a second determining unit, configured to determine a bit rate and a signal propagation speed of the first single-ended signal line and the second single-ended signal line; a third determining unit, configured to determine a target length according to the bit rate and the signal propagation speed; The adding unit is configured to add a first signal extension line having a target length at one end of the first single-ended signal line, and to add a second signal extension line having a target length at the other end of the second single-ended signal line.

8. A computer device comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of claims 1 to 6 are implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the PCB-based single-ended signal crosstalk suppression method according to any one of claims 1 to 6 are implemented.

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