Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. The display device includes: a substrate having a display area including a plurality of sub-pixels and a non-display area adjacent to the display area; a bank layer on the substrate to define a plurality of sub-pixels; a transistor and a light emitting diode in each of the plurality of sub-pixels; a stopper in the non-display area; and an encapsulation layer on the light emitting diode and surrounded by the stopper, where the encapsulation layer includes an epoxy resin, and where the stopper includes a material that cures the epoxy resin due to contact of the epoxy resin and the stopper.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority from Korean Patent Application No. 10-2024-0027728, filed in Korea on February 27, 2024, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device, and more particularly, to a display device with a reduced bezel, and also to a method of manufacturing the display device. Background Art

[0004] Recently, with the development of multimedia, the importance of display devices has increased. Therefore, flat panel displays such as liquid crystal displays (LCDs), plasma display panels (PDPs), and organic light emitting diode (OLED) displays have been commercialized.

[0005] When display devices are applied to small-sized portable electronic devices such as smartphones and tablet computers, bezels of the display devices are minimized or removed to obtain a relatively large-sized display area and an elegant appearance even in relatively small-sized display devices. Summary of the Invention

[0006] Accordingly, the present disclosure is directed to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0007] An object of the present disclosure is to provide a display device with a reduced bezel.

[0008] Additional features and advantages of the present disclosure will be set forth in the following description, and in part will become apparent from the description, or may be understood through practice of the present disclosure. These and other advantages of the present disclosure will be realized and obtained through the structures particularly pointed out in the written description and its claims and drawings.

[0009] To achieve these and other advantages, and in accordance with the purposes of the present disclosure, a display device, as embodied and broadly described herein, includes: a substrate having a display area including a plurality of sub-pixels and a non-display area adjacent to the display area; a levee layer on the substrate defining the plurality of sub-pixels; a transistor and a light-emitting diode in each of the plurality of sub-pixels; a blocking member in the non-display area; and an encapsulation layer on the light-emitting diode and surrounded by the blocking member, wherein the encapsulation layer includes an epoxy resin, and wherein the blocking member includes a material that causes the epoxy resin to cure due to contact between the epoxy resin and the blocking member.

[0010] To achieve these and other advantages, the present disclosure also provides a method for manufacturing a display device, comprising: forming a transistor on a substrate having a display area and a non-display area adjacent to the display area, the display area having a plurality of sub-pixels, and a transistor being arranged in each pixel of the plurality of sub-pixels; forming a planarization layer on the transistor; forming a light-emitting diode on the planarization layer; forming a blocking member in the non-display area; and forming an encapsulation layer on the light-emitting diode, the encapsulation layer comprising an epoxy resin and surrounded by the blocking member; wherein the blocking member comprises a material that causes the epoxy resin to solidify due to contact between the epoxy resin and the blocking member.

[0011] It is to be understood that both the foregoing general description and the following detailed description are explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0013] Figure 1 is a diagram showing a display device according to a first embodiment of the present disclosure;

[0014] Figure 2 is a diagram illustrating a sub-pixel of a display device according to a first embodiment of the present disclosure;

[0015] Figure 3 is a circuit diagram showing a sub-pixel of a display device according to a first embodiment of the present disclosure;

[0016] Figure 4 is a plan view showing a display device according to a first embodiment of the present disclosure;

[0017] Figure 5 It is along Figure 4 a cross-sectional view taken along line VV of ;

[0018] Figure 6 is a cross-sectional view illustrating a stopper of a display device according to a second embodiment of the present disclosure; and

[0019] 7A to 7F is a cross-sectional view illustrating a method of manufacturing the display device according to the first embodiment of the present disclosure. DETAILED DESCRIPTION

[0020] The advantages and features of the present disclosure and their implementation methods will be illustrated by the following example embodiments described with reference to the accompanying drawings. However, the present disclosure can be implemented in different forms and should not be construed as limited to the example embodiments set forth herein. On the contrary, these example embodiments are provided to make the present disclosure sufficiently thorough and complete to help those skilled in the art fully understand the scope of the present disclosure. Furthermore, the present disclosure is limited only by the scope of the claims.

[0021] The shapes, sizes, ratios, angles, quantities, etc. shown in the drawings for describing various exemplary embodiments of the present disclosure are given as examples only. Therefore, the present disclosure is not limited to the illustrations in the drawings. Unless otherwise specified, similar reference numerals refer to similar elements throughout the specification.

[0022] In the following description, where a detailed description of related known functions or configurations may unnecessarily obscure features or aspects of the present disclosure, a detailed description of such known functions or configurations may be omitted, or a brief description may be provided.

[0023] Where the terms “including,” “having,” “comprising,” etc. are used, one or more other elements may be added unless a term such as “only” is used. Elements described in the singular are intended to include plural elements and vice versa unless the context clearly indicates otherwise.

[0024] When explaining an element, the element should be interpreted as including an error or tolerance range even in the case where an explicit description of such an error or tolerance range is not provided.

[0025] In the case of describing a positional relationship, for example, when using “on,” “over,” “under,” “above,” “below,” “beside,” “immediately thereafter,” etc. to describe the positional relationship between two components, one or more other components may be located between the two components, unless more restrictive terms such as “immediately,” “directly,” or “closely” are used. For example, when one element or layer is disposed “on” another element or layer, a third layer or element may be interposed therebetween.

[0026] Although the terms "first," "second," "A," "B," "(a)," "(b)," etc., may be used herein to refer to various elements, these elements should not be construed as limited by these terms because they are not used to define a particular order or precedence. These terms are only used to distinguish one element from another. For example, a first element could be referred to as a second element, and similarly, a second element could be referred to as a first element without departing from the scope of this disclosure.

[0027] The term "at least one" should be understood to include all combinations of one or more related elements. For example, the term "at least one of a first element, a second element, and a third element" may include all combinations of two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0028] The term "display device" may include display devices in a narrow sense such as liquid crystal modules (LCMs), organic light emitting diode (OLED) modules, and quantum dot (QD) modules, which include a display panel and a driving unit for driving the display panel. In addition, the term "display device" may include: complete products (or final products) including LCMs, OLED modules, and QD modules, for example, notebook computers, televisions, computer monitors, including automotive display devices or equipment display devices in shapes other than vehicles, and complete electronic devices or complete devices (or complete devices), such as mobile electronic devices such as smart phones or electronic tablets.

[0029] Therefore, the display device of the present disclosure may include an application product or a complete device including an LCM, an OLED module, and a QD module of an end-user device, as well as a narrowly defined display device such as an LCM, an OLED module, and a QD module.

[0030] Depending on the circumstances, an LCM, OLED module, and QD module having a display panel and a drive unit may be referred to as a "display device," and an electronic device comprising a complete product of an LCM, OLED module, and QD module may be referred to as a "set." For example, a display device in a narrow sense may include a display panel of liquid crystal, organic light-emitting diodes, and quantum dots, and a source printed circuit board (PCB) for a control unit driving the display panel, while a set may further include a set PCB for a control unit electrically connected to the source PCB for controlling the entire set.

[0031] The display panel of the present disclosure may include various display panels such as a liquid crystal display panel, an organic light emitting diode display panel, a quantum dot display panel, and an electroluminescent display panel. The display panel of the present disclosure is not limited to a specific display panel having a flexible substrate and a lower backplane support for an organic light emitting diode display panel with a curved frame. The shape or size of the display panel used in the display device of the present disclosure is also not limited thereto.

[0032] For example, when the display panel is an organic light emitting diode display panel, the display panel may include a plurality of gate lines, a plurality of data lines, and sub-pixels in the intersection area of ​​the plurality of gate lines and the plurality of data lines. The display panel may include: an array having a thin film transistor having an element for selectively applying a voltage to each sub-pixel; an emission element layer on the array; and a packaging substrate or packaging component covering the emission element layer. The packaging component can protect the thin film transistor and the emission element layer from external impact and can prevent or at least reduce the penetration of moisture or oxygen into the emission element layer. In addition, the layer on the array may include an inorganic light emitting layer, such as a nano-sized material layer or quantum dots.

[0033] The thin film transistor of the present disclosure may include one of an oxide thin film transistor, an amorphous silicon thin film transistor, and a low-temperature polysilicon thin film transistor.

[0034] The features of the various embodiments of the present disclosure may be coupled or combined with each other in part or in whole. They may be technically linked and operated in various ways that will be fully understood by those skilled in the art. These embodiments may be performed independently of each other or in association with each other in various combinations.

[0035] Hereinafter, a display device according to various example embodiments of the present disclosure will be described in detail with reference to the accompanying drawings, in which the influence on the oxide semiconductor layer of the thin film transistor of the driving element part is reduced by shielding light emitted and transmitted from the sub-pixels and / or light input from the outside.

[0036] Figure 1 is a diagram showing a display device according to a first embodiment of the present disclosure, and Figure 2 is a diagram illustrating sub-pixels of a display device according to a first embodiment of the present disclosure.

[0037] exist Figure 1 , the display device 100 according to the first embodiment of the present disclosure includes an image processing unit 102 , a timing control unit 104 , a gate driving unit 106 , a data driving unit 107 , a power supply unit 108 , and a display panel 109 .

[0038] The image processing unit 102 outputs a plurality of timing signals for various units and an image signal supplied from the outside. For example, the plurality of timing signals may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, and a clock signal.

[0039] The timing control unit 104 receives an image signal and a plurality of timing signals from the image processing unit 102. The timing control unit 104 uses the image signal and the plurality of timing signals to generate image data DATA, a gate control signal GDC, and a data control signal DDC. The timing control unit 104 transmits the gate control signal GDC to the gate driving unit 106 and transmits the image data and the data control signal DDC to the data driving unit 107.

[0040] The gate driving unit 106 generates gate signals (gate voltage, scan signal) using the gate control signal GDC transmitted from the timing control unit 104 and applies the gate signals to the plurality of gate lines GL1 to GLm of the display panel 109. Although the gate driving unit 106 may be formed as an integrated circuit (IC), it is not limited thereto.

[0041] The gate driving unit 106 may have a gate-in-panel (GIP) type in which the gate driving unit 106 is provided on a substrate of the display panel 109 .

[0042] The data driving unit 107 generates a data signal (data voltage) using the data control signal DDC and the image data DATA sent from the timing control unit 104, and applies the data signal to the plurality of data lines DL1 to DLn of the display panel 109. The data driving unit 107 samples and latches the digital image data DATA to output an analog data signal based on the gamma reference voltage. Although the data driving unit 107 can be formed as an integrated circuit (IC), it is not limited thereto.

[0043] The power supply unit 108 outputs a high-level voltage Vdd and a low-level voltage Vss. The power supply unit 108 supplies the high-level voltage Vdd to the display panel 109 through the first power line EVDD, and supplies the low-level voltage Vss to the display panel 109 through the second power line EVSS. In addition, the high-level voltage Vdd and the low-level voltage Vss of the power supply unit 108 can be supplied to the gate driving unit 106 or the data driving unit 107 for driving.

[0044] The display panel 109 displays an image using the gate signal of the gate driving unit 106 , the data signal of the data driving unit 107 , and the high-level voltage Vdd and the low-level voltage Vss of the power supply unit 108 .

[0045] The display panel 109 includes a plurality of sub-pixels SP, a plurality of gate lines GL1 to GLm, and a plurality of data lines DL1 to DLn. The plurality of sub-pixels SP may include a red sub-pixel SP, a green sub-pixel SP, and a blue sub-pixel SP, or a white sub-pixel SP, a red sub-pixel SP, a green sub-pixel SP, and a blue sub-pixel SP. The white sub-pixel SP, the red sub-pixel SP, the green sub-pixel SP, and the blue sub-pixel SP may have the same area as each other, or may have different areas from each other.

[0046] exist Figure 2 In the embodiment, a single sub-pixel SP can be connected to a gate line GL1, a data line DL1, a first power line EVDD, and a second power line EVSS. The driving method of the sub-pixel SP and the number of transistors and capacitors can be determined according to the structure of the sub-pixel circuit. For example, the sub-pixel SP can have a 2T1C structure including two transistors and one capacitor. In another embodiment, the sub-pixel SP can have a structure selected from the group consisting of 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2C, and 8T2C.

[0047] Figure 3 is a circuit diagram illustrating a sub-pixel of a display device according to a first embodiment of the present disclosure.

[0048] exist Figure 3 , the display device 100 includes a gate line GL, a data line DL, and a power line PL crossing each other to define a sub-pixel SP. A switching transistor Ts, a driving transistor Td, a storage capacitor Cst, and a light emitting diode D are provided in the sub-pixel SP.

[0049] The switching transistor Ts is connected to the gate line GL and the data line DL. The driving transistor Td and the storage capacitor Cst are connected between the switching transistor Ts and the power line PL. The light emitting diode D is connected to the driving transistor Td.

[0050] When the switching transistor Ts is turned on according to the gate signal of the gate line GL, the data signal of the data line DL is applied to the gate electrode of the driving transistor Td and one capacitor electrode of the storage capacitor Cst through the switching transistor Ts.

[0051] Since the driving transistor Td is turned on according to the data signal, current proportional to the data signal flows from the power line PL to the light emitting diode D through the driving transistor Td, and the light emitting diode D emits light with brightness proportional to the current flowing through the driving transistor Td.

[0052] The storage capacitor Cst is charged with a voltage proportional to the data signal to maintain a constant voltage of the gate electrode of the driving transistor Td within one frame.

[0053] Despite Figure 3 In one embodiment, the sub-pixel SP includes two transistors Td and one capacitor Cst, but in another embodiment, the sub-pixel SP may include three or more transistors and two or more capacitors.

[0054] Figure 4 is a plan view showing a display device according to a first embodiment of the present disclosure.

[0055] exist Figure 4 In the embodiment, the display device 100 according to the first embodiment of the present disclosure includes a display area AA displaying an image and a non-display area NA surrounding and adjacent to the display area AA.

[0056] The display area AA includes a plurality of sub-pixels SP. The plurality of sub-pixels SP may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. The plurality of sub-pixels SP may also include a white sub-pixel.

[0057] A plurality of gate lines and a plurality of data lines crossing each other are provided in the display area AA, and each sub-pixel SP is connected to the gate lines and the data lines. A thin film transistor of a switching element and a display element displaying an image are provided in each sub-pixel SP.

[0058] The display element may include various devices. For example, the display element may be an organic light emitting diode, a liquid crystal, a quantum dot, a micro light emitting diode (LED), or a mini LED.

[0059] A gate driving unit and a data driving unit supplying various signals to the plurality of sub-pixels SP are provided in the non-display area NA. The gate driving unit supplies gate signals to the plurality of sub-pixels SP through gate lines, and the data driving unit supplies data signals to the plurality of sub-pixels SP through data lines.

[0060] The blocking member STP surrounding the display area AA is provided in the non-display area NA. When the thin film transistor or organic light-emitting diode is exposed to external impurities such as moisture, hydrogen, and oxygen, the thin film transistor or organic light-emitting diode may degrade, causing degradation of the display device 100. Therefore, the display device 100 includes an encapsulation layer (not shown) to encapsulate the display device 100 from the external environment. When the encapsulation material is applied in the step of forming the encapsulation layer, the blocking member STP in the non-display area NA blocks the flow of the encapsulation material to prevent the encapsulation material from overflowing outside the display device 100.

[0061] In the display device according to the comparative example, in order to well prevent the encapsulation material from overflowing to the outside of the display device, a plurality of dams are provided to surround the display area AA.

[0062] When the encapsulation layer does not have a uniform thickness throughout the display device according to the comparative example, the image may be degraded due to light refraction in the encapsulation layer. Since the coated encapsulation material is expanded at a non-uniform expansion speed throughout the display device according to the comparative example, the encapsulation layer is formed with a non-uniform thickness. When the encapsulation material is expanded in different directions, the encapsulation material has different expansion speeds depending on the direction. Therefore, the encapsulation material may be applied in a relatively small amount in an area, and the encapsulation material may not be applied in another area. Since the encapsulation layer with a relatively small thickness or the area without the encapsulation layer has stains due to light refraction, the display quality of the display device according to the comparative example may be degraded.

[0063] To form an encapsulation layer having a thickness greater than a predetermined value, an encapsulation material is applied in an amount greater than a predetermined value based on a diffusion rate, and a plurality of dams are formed to prevent the encapsulation material from overflowing outside the display device according to the comparative example. However, since the plurality of dams are provided in the non-display area NA, the bezel of the display device according to the comparative example is increased.

[0064] In the display device 100 according to the first embodiment of the present disclosure, since the single stopper STP, rather than a plurality of dams, prevents the encapsulation material from overflowing outside the display device 100 , the size and area of ​​the bezel are reduced or minimized.

[0065] The stopper STP includes a curing material that solidifies (hardens) the encapsulating material when it contacts the encapsulating material. Therefore, when the encapsulating material spreads and contacts the stopper STP, it solidifies without overflowing beyond the stopper STP to the outside of the display device 100. Since the encapsulating material is confined to a predetermined area by the simply structured stopper STP, the bezel is reduced or minimized.

[0066] Despite Figure 4 In the first embodiment, the stopper STP is formed in the non-display area NA with a uniform width along the boundary of the display area AA, but in another embodiment, the stopper STP may be formed with different widths according to positions.

[0067] Figure 5 It is along Figure 4 Although a plurality of thin film transistors and a plurality of conductive lines are provided in the display area AA and the non-display area NA, for convenience of description, the thin film transistors and the light emitting diodes in the display area AA are shown.

[0068] exist Figure 5 In the embodiment, the substrate 140 has a display area AA and a non-display area NA. The substrate 140 may include a hard material such as glass or a soft material such as plastic.

[0069] When the substrate 140 includes a plastic material, the substrate 140 may include at least one of polyimide (PI), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone (PES), and polycarbonate (PC), but is not limited thereto.

[0070] For example, when the substrate 140 includes polyimide, the substrate 140 may include a plurality of polyimide layers. In addition, an inorganic layer may be provided between the polyimide layers, and is not limited thereto.

[0071] The buffer layer 142 is provided on the substrate 140. The buffer layer 142 may be provided on the entire substrate 140 to increase the adhesive strength between the layer and the substrate 140 and to block alkali components released from the substrate 140. In addition, the buffer layer 142 may delay the dispersion of moisture or oxygen penetrating the substrate 140.

[0072] The buffer layer 142 may include a single layer or multiple layers of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx). When the buffer layer 142 includes multiple layers, the layers of silicon nitride (SiNx) and silicon oxide (SiOx) may alternate with each other. The buffer layer 142 may be omitted depending on the type and material of the substrate 140 and the structure and type of the thin film transistor.

[0073] The thin film transistor T is disposed on the buffer layer 142 in the display area AA. Figure 5 FIG shows a driving thin film transistor among the plurality of thin film transistors in the display area AA, but other thin film transistors such as a switch thin film transistor may also be provided in the display area AA. Figure 5 The thin film transistor T has a top gate structure, but the thin film transistor T may also have other structures, for example, a bottom gate structure.

[0074] The thin film transistor T includes a semiconductor layer 112 on the buffer layer 142 , a gate insulating layer 144 on the semiconductor layer 112 , a gate electrode 114 on the gate insulating layer 144 , an interlayer insulating layer 146 on the gate electrode 114 , and a source electrode 115 and a drain electrode 116 on the interlayer insulating layer 146 .

[0075] The semiconductor layer 112 may include a polycrystalline semiconductor material. For example, the polycrystalline semiconductor material may include polysilicon having relatively high mobility, but is not limited thereto.

[0076] The semiconductor layer 112 may include an oxide semiconductor material. For example, the oxide semiconductor material may include one of indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO), and is not limited thereto. The semiconductor layer 112 has a channel region 112 a of an intrinsic material at its central portion, and has a source region 112 b and a drain region 112 c of an impurity material on both sides of the channel region 112 a.

[0077] The gate insulating layer 144 may be provided in both the display area AA and the non-display area NA, or only in the display area AA. The gate insulating layer 144 may have a single layer or multiple layers of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx), and is not limited thereto.

[0078] The interlayer insulating layer 146 may be provided in both the display area AA and the non-display area NA, or only in the display area AA. The interlayer insulating layer 146 may have a single layer or multiple layers of an organic insulating material such as photo acrylic or an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx). In addition, the interlayer insulating layer 146 may have multiple layers of organic layers and inorganic layers, and is not limited thereto.

[0079] The source electrode 115 and the drain electrode 116 may include a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof, and are not limited thereto. The source electrode 115 and the drain electrode 116 may be connected to the source region 112 b and the drain region 112 c of the semiconductor layer 112, respectively, through contact holes in the gate insulating layer 144 and the interlayer insulating layer 146.

[0080] Although not shown, a bottom shield metal layer may be provided on the substrate 140 below the semiconductor layer 112. The bottom shield metal layer may minimize a back channel phenomenon caused by charges trapped in the substrate 140 to prevent residual images or degradation of transistors. The bottom shield metal layer may include a single layer or multiple layers of one of titanium (Ti), molybdenum (Mo), and alloys thereof, and is not limited thereto.

[0081] The planarization layer 148 is disposed on the thin film transistor T above the substrate 140. The planarization layer 148 may include an organic insulating material such as photo acrylic, and is not limited thereto. The planarization layer 148 may have multiple layers of an inorganic layer and an organic layer.

[0082] The light emitting diode D is disposed on the planarization layer 148 in the display area AA. The light emitting diode D includes a first electrode 132, an emission layer 134, and a second electrode 136.

[0083] The first electrode 132 is provided on the planarization layer 148 and is electrically connected to the drain electrode 116 of the thin film transistor T through a contact hole in the planarization layer 148. The first electrode 132 may include at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), and alloys thereof. Alternatively, the first electrode 132 may include a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0084] When the display device 100 has a top emission type, the first electrode 132 may further include an opaque conductive material for using the first electrode 132 as a reflective layer. When the display device 100 has a bottom emission type, the first electrode 132 may include a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0085] The bank layer BNK is provided in a boundary region of each sub-pixel. The bank layer BNK may be a kind of wall defining the sub-pixel. The bank layer BNK may prevent mixing of light of various colors emitted from adjacent sub-pixels SP.

[0086] The bank layer BNK may include at least one of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx), an organic insulating material such as benzocyclobutene (BCB), acrylic resin, epoxy resin, phenolic resin, polyamide resin and polyimide resin, and a photosensitive material including a black pigment, and is not limited thereto.

[0087] The emission layer 134 may be disposed on a top surface of the first electrode 132 , a side surface of the bank layer BNK, and a top surface of the bank layer BNK in the display area AA to extend toward the non-display area NA.

[0088] The emission layer 134 may include a red emission layer that emits red light in the red sub-pixel SP, a green emission layer that emits green light in the green sub-pixel SP, and a blue emission layer that emits blue light in the blue sub-pixel SP. For example, the emission layer 134 includes an organic emission layer, an inorganic emission layer, a nano-sized material layer, a quantum dot layer, an emission layer of a micro light emitting diode (LED), and an emission layer of a mini-LED, but is not limited thereto.

[0089] The emission layer 134 may include an emission material layer, an electron injection layer that injects electrons, a hole injection layer that injects holes, an electron transport layer that transports electrons, a hole blocking layer that blocks holes, an electron blocking layer that blocks electrons, and a hole transport layer that transports holes, and is not limited thereto.

[0090] The second electrode 136 is provided on the emission layer 134. The second electrode 136 may include a single layer or multiple layers of a metal material or an alloy of a metal material. Alternatively, the second electrode 136 may include a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0091] When the display device 100 has a top emission type, the second electrode 136 may include a semi-transmissive conductive material that transmits light. For example, the second electrode 136 may include at least one of LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and an alloy of LiF / Ca:Ag.

[0092] When the display device 100 has a bottom emission type, the second electrode 136 may include an opaque conductive material for using the second electrode 136 as a reflective layer. For example, the second electrode 136 may include at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), and alloys thereof.

[0093] The light-emitting diode D may have a series structure. The series structure may include a plurality of emission layers and a charge generation layer between the plurality of emission layers. The charge generation layer for adjusting the charge balance of the plurality of organic layers may have a multilayer including a first charge generation layer and a second charge generation layer. The charge generation layer may include a negative (N) type charge generation layer and a positive (P) type charge generation layer. For example, the charge generation layer may include an emission layer doped with an alkali metal such as lithium (Li), sodium (Na), potassium (K) and cesium (Cs) or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba) and radium (Ra), and is not limited thereto.

[0094] Encapsulation layer 180 is provided over the LEDs D in display area AA and non-display area NA to encapsulate the LEDs D. When the LEDs D are exposed to moisture or oxygen, pixel shrinkage, which can reduce the emission area or cause dark spots within the emission area, can occur. Furthermore, moisture or oxygen can oxidize metal electrodes. Encapsulation layer 180 blocks external moisture or oxygen penetration, preventing degradation of the LEDs D and electrodes.

[0095] Although the encapsulation layer 180 has three layers of the first encapsulation layer 182 , the second encapsulation layer 184 , and the third encapsulation layer 186 in the first embodiment, the encapsulation layer 180 may have two or four layers in another embodiment.

[0096] The first encapsulation layer 182 and the third encapsulation layer 186 may include a single layer or multiple layers of an inorganic material such as silicon oxide (SiOx), silicon oxynitride (SiON), and silicon nitride (SiNx). The first encapsulation layer 182 and the third encapsulation layer 186 may also include an organic material between the inorganic materials, but are not limited thereto. The second encapsulation layer 184 may include epoxy resin.

[0097] Although not shown, the display device 100 may include a touch unit. The touch unit may be provided in the display area to sense touch input. For example, the touch unit may sense external touch information using a user's finger or a touch pen.

[0098] The stopper STP is provided in the non-display area NA. The stopper STP is provided on the first encapsulation layer 182 above the bank layer BNK. The planarization layer 148 and the bank layer BNK are provided on the interlayer insulating layer 146 in the portion of the non-display area NA adjacent to the display area AA, and the planarization layer 148 and the bank layer BNK are removed in the other portions of the non-display area NA. In the non-display area NA adjacent to the display area AA, the stopper STP is provided above the bank layer BNK.

[0099] Since the encapsulation material used for the second encapsulation layer 184 has fluidity, the encapsulation material may overflow outside the substrate 140 through the periphery of the non-display area NA due to the fluidity while forming the second encapsulation layer 184. The stopper STP is formed to surround the display area AA to limit the encapsulation material from overflowing outside the substrate 140 while forming the second encapsulation layer 184. Therefore, the encapsulation material is prevented from overflowing outside the substrate 140 by the stopper STP.

[0100] The blocking member STP may include a material that chemically cures the encapsulation material (e.g., epoxy resin) used for the second encapsulation layer 184. That is, the blocking member STP may be formed from an organic material containing a curing agent. For example, the blocking member STP may be formed from an organic material containing silicon and a curing agent. In addition, the curing agent may be a compound containing active hydrogen, and the compound containing active hydrogen may have one of an amine type, an amide type, an anhydride type, a mercapto type, and a silane type. For example, the curing agent may include one of a polyamine, a polyacid, a polyphenol, a polythiol, a β-hydroxylamine, an ester, a thiol, and a β-phenyl ether.

[0101] During the step of forming the second encapsulation layer 184, when the encapsulation material coated on the substrate 140 and diffused toward the non-display area NA contacts the stopper STP, the encapsulation material in the contact area is cured. Since the encapsulation material includes epoxy resin and the stopper STP includes a compound having active hydrogen, a chemical reaction occurs in the contact area between the encapsulation material and the stopper STP.

[0102] When the encapsulating material contacts the curing agent in the STP stopper, the epoxy groups in the organic material bond with the active hydrogens in the curing agent. Each epoxy group and curing agent molecule contains one or more reactive moieties, and the multiple reactions between the epoxy molecules and the curing agent form a three-dimensional network. Consequently, the encapsulating material begins to cure in the contact area between the encapsulating material and the STP stopper.

[0103] When the epoxy resin and curing agent mix, they form a polymer structure with a three-dimensional network due to cross-linking, causing the epoxy resin to cure. In display device 100, after the epoxy resin of second encapsulation layer 184 for epoxy resin is applied to substrate 140, the epoxy resin spreads throughout substrate 140. The epoxy resin that reaches non-display area NA combines with the curing agent of stopper STP in the contact area. As a result, the epoxy resin that reaches the side surface of stopper STP facing display area AA cures.

[0104] When the encapsulation material contacts the stopper STP, curing begins to occur. Since the frontmost portion of the encapsulation material diffused toward the non-display area NA begins to solidify, the flow of the encapsulation material is stopped by the solidified encapsulation material.

[0105] The encapsulation material is cured by chemical curing only in an area within a predetermined distance from the stopper STP. Thus, a portion of the encapsulation material is cured to block the flow of the encapsulation material, and the other portion of the encapsulation material is cured by a second curing method different from the chemical curing method to form the second encapsulation layer 184. For example, the second curing method may be light curing using ultraviolet (UV) rays or heat curing.

[0106] The first encapsulation layer 182 extends from a portion corresponding to the stopper STP to an end portion of the substrate 140 in the non-display area NA. The third encapsulation layer 186 extends from a portion corresponding to the stopper STP to an end portion of the substrate 140 in the non-display area NA. Therefore, the first encapsulation layer 182 and the third encapsulation layer 186 are in direct contact with each other from this portion to the end portion of the substrate 140 in the non-display area NA.

[0107] In the display device according to the comparative example, the plurality of dams of organic material on the bank layer of organic material prevent the encapsulation material used in the encapsulation layer from overflowing outside the substrate. However, in the display device according to the comparative example, since the bank layer and the plurality of dams constitute the interface of the organic material, there is a limitation in preventing moisture or oxygen from permeating through the interface between the bank layer and the plurality of dams.

[0108] In the display device 100 according to the first embodiment of the present disclosure, since the stopper STP of the organic material is provided on the first encapsulation layer 182 of the inorganic material, the first encapsulation layer 182 and the stopper STP constitute the interface between the inorganic material and the organic material. Therefore, the penetration of moisture or oxygen through the interface between the first encapsulation layer 182 and the stopper STP is completely prevented.

[0109] Furthermore, since the first encapsulation layer 182 and the third encapsulation layer 186 are provided in the end portion of the substrate 140 , the penetration of moisture or oxygen through the side surface of the substrate 140 is also completely blocked.

[0110] Although the blocking software STP Figure 5 The blocking member STP has a triangular cross-sectional shape, but is not limited thereto. For example, in other embodiments, the blocking member STP may have various polygonal cross-sectional shapes such as a square or a rectangle.

[0111] Figure 6 is a cross-sectional view illustrating a stopper of a display device according to a second embodiment of the present disclosure.

[0112] Despite Figure 5 The entire stopper STP is formed of a single material such as a curing agent, but in Figure 6 The middle stopper STP includes a first stopper STP1 and a second stopper STP2.

[0113] The first stopper STP1 is provided as a dummy stopper, and the second stopper STP2 is provided on the surface of the first stopper STP1 with a predetermined thickness. The first stopper STP1 is formed on the first encapsulation layer 182 at a predetermined height to block and limit the encapsulation material for the second encapsulation layer 184. The second stopper STP2 chemically bonds with the encapsulation material for the second encapsulation layer 184 and cures it to prevent the encapsulation material for the second encapsulation layer 184 from overflowing over the stopper STP.

[0114] The first stopper STP1 may include an inorganic material or an organic material. Alternatively, the first stopper STP1 may include a metal material.

[0115] The second blocking member STP2 may be formed of an organic material containing a curing agent, and the curing agent may be a compound containing active hydrogen. The compound containing active hydrogen may be of an amine type, an amide type, an anhydride type, a mercapto type, and a silane type. For example, the curing agent may include one of a polyamine, a polyacid, a polyphenol, a polymercaptan, a beta hydroxylamine, an ester, a mercaptan, and a beta phenyl ether.

[0116] In the display devices according to the first and second embodiments of the present disclosure, a stopper STP of a material that allows the encapsulation material for the second encapsulation layer to solidify in the contact region is formed on the first encapsulation layer instead of a plurality of dams. Therefore, the flow of the encapsulation material for the second encapsulation layer is prevented. Since the area for the stopper STP is smaller than the area for the plurality of dams, the area of ​​the non-display area NA and the area of ​​the bezel of the display device are reduced or minimized.

[0117] Hereinafter, a method of manufacturing the display device 100 will be described.

[0118] 7A to 7F is a cross-sectional view illustrating a method of manufacturing the display device according to the first embodiment of the present disclosure.

[0119] exist Figure 7A In the embodiment of the present invention, a buffer layer 142 is formed on the entire substrate 140 having the display area AA and the non-display area NA. The substrate 140 may include a hard material such as glass or a plastic material such as polyimide (PI), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone (PES), and polycarbonate (PC). The buffer layer 142 may have a single layer or multiple layers of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx).

[0120] Next, after a semiconductor material layer of a polycrystalline semiconductor material such as polysilicon or an oxide semiconductor material such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO) is formed on the buffer layer 142 in the display area AA, the semiconductor material layer is patterned to form a semiconductor layer 112 on the buffer layer 142 in each sub-pixel SP. Next, a channel region 112 a, a source region 112 b, and a drain region 112 c are formed in the semiconductor layer 112 by doping side portions of the semiconductor layer 112 with impurities.

[0121] Next, a gate insulating layer 144 of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx) is formed on the semiconductor layer 112 over the entire substrate 140. Next, after a metal material layer of a metal material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) is formed on the gate insulating layer 144, the gate electrode 114 is formed on the gate insulating layer 144 in each sub-pixel SP by patterning the metal material layer. Next, after an interlayer insulating layer 146 of an organic insulating material such as photoacrylic or an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx) is formed on the gate electrode 114 above the entire substrate 140, contact holes exposing the source region 112b and the drain region 112c are formed in the interlayer insulating layer 146 and the gate insulating layer 144 by patterning the interlayer insulating layer 146 and the gate insulating layer 144.

[0122] Next, after a metal material layer of a metal material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) is formed on the interlayer insulating layer 146, the metal material layer is patterned to form a source electrode 115 and a drain electrode 116 on the interlayer insulating layer 146 in each sub-pixel SP, respectively contacting the source region 112b and the drain region 112c of the semiconductor layer 112 through the contact holes. The semiconductor layer 112, the gate insulating layer 144, the gate electrode 114, the source electrode 115, and the drain electrode 116 constitute a thin film transistor T.

[0123] Next, after forming a planarization layer 148 of an organic insulating material such as photoacrylic on the entire thin film transistor T over the substrate 140 , the planarization layer 148 is patterned to form a contact hole exposing the drain electrode 116 in the planarization layer 148 .

[0124] Next, after forming a metal material layer of a metal material such as silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W) and chromium (Cr) or a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO) on the planarization layer 148, the metal material layer is patterned to form a first electrode 132 on the planarization layer 148 to contact the drain electrode 116 of the thin film transistor T through the contact hole.

[0125] Next, an insulating material layer of an inorganic insulating material such as silicon nitride (SiNx) and silicon oxide (SiOx), an organic insulating material such as benzocyclobutene (BCB), acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin, or a photosensitive material including a black pigment is formed on the planarization layer 148 and the first electrode 132 over the entire substrate 140. Then, the insulating material layer is patterned to form a bank layer BNK on the edge portions of the planarization layer 148 and the first electrode 132. The bank layer BNK has an opening that exposes the central portion of the first electrode 132.

[0126] Next, an emission material is deposited and patterned to form an emission layer 134 on the first electrode 132 in the display area AA. Next, after a metal material layer of a metal material or a transparent conductive material is formed on the emission layer 134, the metal material layer is patterned to form a second electrode 136 on the side surfaces and top surfaces of the emission layer 134 and the bank layer BNK. The first electrode 132, the emission layer 134, and the second electrode 136 constitute a light-emitting diode D.

[0127] Next, a first encapsulation layer 182 is formed on the light emitting diodes D over the entire substrate 140 by depositing an inorganic material.

[0128] exist Figure 7B In this embodiment, after an organic material layer including a curing agent is formed on the first encapsulation layer 182 over the entire substrate 140, a stopper STP is formed on the first encapsulation layer 182 over the bank layer BNK in the non-display area NA.

[0129] The curing agent may be a compound containing active hydrogen, and the compound containing active hydrogen may be of one of amine type, amide type, acid anhydride type, mercapto type, and silane type. For example, the curing agent may include one of polyamine, polyacid, polyphenol, polythiol, β-hydroxylamine, ester, thiol, and β-phenyl ether.

[0130] In the display device according to the second embodiment of the present disclosure, after an organic material layer or an inorganic material layer is formed on the first encapsulation layer 182 over the entire substrate 140, a first stopper STP1 is formed on the first encapsulation layer 182 over the bank layer BNK in the non-display area NA by patterning the organic material layer or the inorganic material layer. Next, after an organic material layer containing a curing agent is formed on the first stopper STP1 over the entire substrate 140, a second stopper STP2 is formed on the first stopper STP1 over the bank layer BNK in the non-display area NA. The first stopper STP1 and the second stopper STP2 constitute a stopper STP.

[0131] The curing agent may be a compound containing active hydrogen, and the compound containing active hydrogen may be of one of amine type, amide type, acid anhydride type, mercapto type, and silane type. For example, the curing agent may include one of polyamine, polyacid, polyphenol, polythiol, β-hydroxylamine, ester, thiol, and β-phenyl ether.

[0132] exist Figure 7C In the embodiment of the present invention, an encapsulation material 190 such as epoxy resin is dropped on the first encapsulation layer 182 in a predetermined area (e.g., a dropping area). For example, the dropping area may be a central area of ​​the display area AA. The dropped encapsulation material 190 may spread or flow from the display area AA to the non-display area NA.

[0133] exist Figure 7D In the embodiment of the present invention, when the encapsulation material 190 diffused from the display area AA to the non-display area NA reaches and contacts the stopper STP in the non-display area NA, the encapsulation material 190 begins to solidify due to chemical bonding between the encapsulation material 190 and the stopper STP. Therefore, at the frontmost portion of the encapsulation material 190 diffused toward the non-display area NA, a solidified layer 192 is formed in the contact area between the encapsulation material 190 and the stopper STP.

[0134] Since the flow of the encapsulation material 190 is blocked due to the solidified layer 192 , the encapsulation material 190 does not overflow over the stopper STP but is confined in a predetermined area surrounded by the stopper STP.

[0135] exist Figure 7E In the process, by irradiating light such as ultraviolet rays onto the diffused encapsulation material 190 or by applying heat to the diffused encapsulation material 190 , the encapsulation material 190 is completely cured to form the second encapsulation layer 184 .

[0136] A portion of the encapsulation material 190 in the contact area between the second encapsulation layer 184 and the stopper STP is cured by chemical curing, and the other portion of the encapsulation material 190 is cured by light curing or thermal curing. Therefore, the second encapsulation layer 184 may include a first portion cured by chemical curing in the interface between the second encapsulation layer 184 and the stopper STP and a second portion cured by light curing or thermal curing.

[0137] exist Figure 7F In the process, a third encapsulation layer 186 of an inorganic material is formed on the second encapsulation layer 184 , and the display device 100 is completed.

[0138] In the display device 100 according to the first embodiment of the present disclosure, curing of the second encapsulation layer 184 includes a first step and a second step. In the first step, the flow of the encapsulation material 190 is stopped by curing the frontmost portion of the encapsulation material 190 using the stopper STP. In the second step, the stopped encapsulation material 190 is completely cured.

[0139] Therefore, in the display device according to the first and second embodiments of the present disclosure, since the encapsulation material 190 for the second encapsulation layer 184 is prevented from overflowing outside the display device 100 due to the single stopper STP in the non-display area NA, the size and area of ​​the frame are reduced or minimized.

[0140] Furthermore, since the flow of the encapsulating material 190 is stopped by the stopper STP, excessive use of the encapsulating material 190 is prevented and waste of the encapsulating material is minimized. Therefore, discharge of toxic waste is minimized, resulting in an environmentally friendly process.

[0141] It will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they fall within the scope of the appended claims and their equivalents.

Claims

1. A display device comprising: a substrate having a display area including a plurality of sub-pixels and a non-display area adjacent to the display area; a bank layer on the substrate, for defining the plurality of sub-pixels; a transistor and a light emitting diode in each of the plurality of sub-pixels; a stopper in the non-display area; as well as an encapsulation layer on the light emitting diode and surrounded by the blocking member, Wherein, the encapsulation layer comprises epoxy resin, and The preventing member includes a material that solidifies the epoxy resin due to contact between the epoxy resin and the preventing member.

2. The display device according to claim 1, wherein The stopper is disposed on the bank layer in the non-display area.

3. The display device according to claim 1, wherein The encapsulation layer includes: a first encapsulation layer comprising an inorganic material and disposed on the bank layer; a second encapsulation layer comprising epoxy resin on the first encapsulation layer; and The third encapsulation layer includes an inorganic material and is disposed on the second encapsulation layer.

4. The display device according to claim 3, wherein The preventing member is disposed on the first encapsulation layer in the non-display area.

5. The display device according to claim 3, wherein The second encapsulation layer includes: a first portion that contacts a surface of the stopper; and A second part other than the first part. The display device according to claim 5 , wherein: The first portion is cured by chemical curing.

7. The display device according to claim 5, wherein: The second portion is cured by one of light curing and heat curing.

8. The display device according to claim 1, wherein The blocking member includes an organic material including a curing agent.

9. The display device according to claim 8, wherein The curing agent includes a compound containing active hydrogen.

10. The display device according to claim 9, wherein The active hydrogen-containing compound has one of an amine type, an amide type, an acid anhydride type, a mercapto type, and a silane type.

11. The display device according to claim 8, wherein The curing agent includes one of polyamine, polyacid, polyphenol and polythiol, beta hydroxylamine, ester, thiol and beta phenyl ether.

12. The display device according to claim 1, wherein The blocking member comprises: a first stopper as a dummy stopper on the bank layer; and A second stopper is on a surface of the first stopper.

13. The display device according to claim 12, wherein: The first preventing member includes one of an inorganic material and an organic material.

14. The display device according to claim 12, wherein: The second preventing member includes a material that cures the epoxy resin due to contact between the epoxy resin and the second preventing member.

15. The display device according to claim 3, wherein: The first and third encapsulation layers extend from a portion corresponding to the stopper to an end portion of the substrate in the non-display area and directly contact each other from the portion corresponding to the stopper to the end portion of the substrate in the non-display area.

16. A method for manufacturing a display device, comprising: forming a transistor on a substrate having a display area and a non-display area adjacent to the display area, wherein the display area has a plurality of sub-pixels, and the transistor is provided in each of the plurality of sub-pixels; forming a planarization layer on the transistor; forming a light emitting diode on the planarization layer; forming a stopper in the non-display area; as well as an encapsulation layer formed on the light emitting diode, comprising epoxy resin and surrounded by the blocking member; The preventing member includes a material that solidifies the epoxy resin due to contact between the epoxy resin and the preventing member.

17. The method according to claim 16, wherein Forming a light emitting diode includes: forming a first electrode on the planarization layer; forming a light-emitting layer on the first electrode; and A second electrode is formed on the light emitting layer.

18. The method according to claim 17, further comprising: forming a buffer layer on the substrate; as well as A bank layer is formed on the planarization layer and edge portions of the first electrode.

19. The method according to claim 18, wherein The encapsulation layer at least includes: a first encapsulation layer comprising an inorganic material and disposed on the bank layer; and A second encapsulation layer including epoxy resin is disposed on the first encapsulation layer.

20. The method according to claim 19, wherein The second encapsulation layer includes a first portion that is cured by contact of epoxy resin with the stopper, and a second portion that is cured by light curing or heat curing the epoxy resin.

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