A light-emitting diode epitaxial structure and preparation method thereof

Abstract

The present invention relates to the field of semiconductor device technology, and in particular to a light-emitting diode epitaxial structure and a method for preparing the same. The light-emitting diode epitaxial structure comprises a substrate, an h-BN / O2 layer, a low-temperature GaN buffer layer, an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer, which are arranged in sequence. The present invention inserts an oxygen plasma-treated h-BN / O2 layer between a heterogeneous substrate and a GaN epitaxial layer, and controls process conditions to grow a low-temperature GaN buffer layer thereon. The combination of the two can effectively modulate the lattice mismatch dislocations, residual stress, and thermal mismatch of the epitaxial material grown on the heterogeneous substrate, thereby improving the scattering efficiency under high current, increasing the probability of radiative recombination of the heteroepitaxial material, and relaxing the requirements for heteroepitaxial growth.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a light emitting diode epitaxial structure and a preparation method thereof. Background Art

[0002] Third-generation semiconductors, represented by GaN, hold great promise. However, due to the lack of commercially available GaN homogeneous substrates, heterogeneous substrates such as Si, SiC, or sapphire are typically used. These substrates suffer from lattice mismatch with GaN epitaxy and thermal mismatch due to differences in thermal expansion coefficients, leading to high residual stress in GaN epitaxial materials. This residual stress generates a high density of threading dislocation (TD) defects, cracks, and wafer warpage, significantly impacting the performance of GaN-based devices. In GaN optoelectronic devices, stress induces piezoelectric polarization effects in quantum wells (QWs). This, combined with spontaneous polarization, causes electron and hole wave functions to misalign, resulting in charge separation, reducing the probability of radiative recombination and significantly lowering the internal quantum efficiency of optoelectronic devices. Current proposals include AlN and Al low-temperature GaN buffer layers, but these still present a high lattice mismatch. Furthermore, the introduction of new heterojunctions creates a large number of dislocations, which reduces the breakdown voltage. Summary of the Invention

[0003] In view of the above-mentioned deficiencies in the prior art, the object of the present invention is to propose a light-emitting diode epitaxial structure and a preparation method thereof, which can effectively modulate the lattice mismatch dislocations, residual stress and thermal mismatch of the epitaxial material grown on the heterogeneous substrate, improve the scattering efficiency under high current, increase the probability of radiative recombination of the heteroepitaxial material, and at the same time relax the requirements for heteroepitaxial growth.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] A first aspect of the present invention provides a method for preparing a light-emitting diode epitaxial structure, comprising the following steps:

[0006] S1 provides a substrate;

[0007] S2 depositing an h-BN layer on the substrate, and then treating the surface of the h-BN layer with oxygen plasma to form an h-BN / O2 layer;

[0008] S3 depositing a low-temperature GaN buffer layer on the h-BN / O2 layer, wherein the deposition temperature of the low-temperature GaN buffer layer is 300° C.-760° C.;

[0009] S4 deposits an N-type semiconductor layer on the low-temperature GaN buffer layer;

[0010] S5 depositing a multi-quantum well layer on the N-type semiconductor layer;

[0011] S6 deposits a P-type semiconductor layer on the multi-quantum well layer.

[0012] This fabrication method involves inserting an oxygen plasma-treated h-BN layer between the substrate and the epitaxial layer, and growing a low-temperature GaN buffer layer on top. Through process control, multiple GaN nucleation islands are generated along the edges of the h-BN, facilitating the formation of a continuous, flat GaN film laterally during the subsequent deposition of the N-type semiconductor layer, thereby forming quasi-van der Waals epitaxy. Compared to traditional heteroepitaxial growth, the interaction between the substrate and the epitaxial layer is two orders of magnitude weaker, and thermal conductivity is improved. This fabrication method can modulate the lattice mismatch, dislocations, residual stress, and thermal mismatch of epitaxial materials grown on heterogeneous substrates, improving scattering efficiency at high currents and the probability of radiative recombination in heteroepitaxial materials, while also relaxing the requirements for heteroepitaxial growth.

[0013] In some embodiments, in step S2, the h-BN layer is deposited using B2H6 and NH3 as raw materials, the reaction temperature is 600°C to 2000°C, and the pressure is 7×10 -6 torr~8torr (about 10 -3 Pa ~1KPa), RF power 50W~300W, wherein the flow rate of raw material B2H6 can be 100sccm~2000sccm, and the flow rate of NH3 can be 100sccm~2000sccm.

[0014] In some embodiments, in step S2, the power of the oxygen plasma treatment is 50W-200W, the flow rate of the introduced oxygen is controlled at 10 sccm-200 sccm, and the vacuum environment pressure is 1 Pa-20 Pa.

[0015] In some embodiments, in step S3, the deposition temperature of the low-temperature GaN buffer layer is 300°C to 660°C to further reduce stress. For example, in a preferred embodiment of the present invention, the deposition temperature of the low-temperature GaN buffer layer is 460°C.

[0016] In some embodiments, in step S4, NH3 is used as the nitrogen source, TMGa is used as the gallium source, SiH4 is used as the N-type dopant, and the reaction temperature is 1000°C to 1200°C.

[0017] In some embodiments, in step S5, the multi-quantum well layer is formed by periodically alternating the growth of a quantum barrier layer and a quantum well layer. When depositing the quantum well layer, NH3 is used as a nitrogen source, TEGa is used as a gallium source, and TMIn is used as an indium source. The reaction temperature is 760°C to 800°C and the pressure is 150 torr to 250 torr. When depositing the quantum barrier layer, NH3 is used as a nitrogen source, TEGa is used as a gallium source, the reaction temperature is 860°C to 900°C, and the pressure is 150 torr to 250 torr.

[0018] In some embodiments, in step S6, the reaction temperature when depositing the P-type semiconductor layer is 980°C~1050°C, NH3 is used as the nitrogen source, TEGa is used as the gallium source, CP2Mg is used as the P-type dopant, and the deposition thickness is controlled under H2 atmosphere.

[0019] The present invention also provides a light-emitting diode epitaxial structure prepared by the above preparation method, which includes a substrate, an h-BN / O2 layer, a low-temperature GaN buffer layer, an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer arranged in sequence.

[0020] In some embodiments, the h-BN / O2 layer has more than 2 atomic layers and a thickness between 20 nm and 150 nm. For example, the h-BN / O2 layer may have a thickness of 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, etc.

[0021] In some embodiments, the low-temperature GaN buffer layer has a thickness of 100 nm to 500 nm. For example, the low-temperature GaN buffer layer may have a thickness of 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, etc.

[0022] In some embodiments, the doping concentration of Si in the N-type semiconductor layer is 5×10 17 atoms / cm 3 ~1×10 19 atoms / cm 3 The thickness of the N-type semiconductor layer is 1.0 μm to 3.0 μm.

[0023] In some embodiments, the stacking period number of the quantum barrier layer and the quantum well layer in the multi-quantum well layer is ≥8, the thickness of the quantum well layer is 2nm-4nm, and the thickness of the quantum barrier layer is 8nm-12nm.

[0024] In some embodiments, the P-type semiconductor layer is a Mg-doped GaN layer with a thickness of 15 nm to 20 nm and a Mg doping concentration of 5×10 18 atoms / cm 3 ~5×10 21 atoms / cm 3 .

[0025] The beneficial effects of the present invention are:

[0026] The present invention inserts an h-BN / O2 layer treated with oxygen plasma between the heterogeneous substrate and the GaN epitaxial layer. Since h-BN is composed of N atoms and B atoms in the form of sp2 The hybridization process alternates to form a hexagonal ring network 2D crystal structure, with the atomic layers bound by weak van der Waals forces and arranged in an ABAB pattern. Oxygen plasma treatment of the surface produces BO\NO dangling bonds and corrugated atomic steps. Further, by controlling process conditions, a low-temperature GaN buffer layer is grown on top, allowing GaN to nucleate along the h-BN corrugations and exhibit consistent crystal orientation, a vertical growth pattern. Low-temperature epitaxy generates multiple GaN nucleation islands along the corrugations, ultimately facilitating the formation of a continuous, flat GaN film laterally after deposition of an N-type semiconductor layer, forming quasi-van der Waals epitaxy. Compared to traditional heteroepitaxial growth, the interaction between the substrate and the epitaxial layer is two orders of magnitude weaker, and thermal conductivity is improved. By modulating the lattice mismatch, dislocations, residual stress, and thermal mismatch of the epitaxial material grown on the heterogeneous substrate, the present preparation method can improve scattering efficiency at high currents and increase the probability of radiative recombination in the heteroepitaxial material, while also relaxing the requirements for heteroepitaxial growth. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Schematic diagram of the epitaxial structure of a light emitting diode according to the present invention;

[0028] Figure 2 A schematic diagram of the multi-quantum well layer structure of the light-emitting diode epitaxial structure of the present invention;

[0029] Figure 3 This is a SEM image of the light-emitting diode epitaxial structure during the deposition process of the present invention. DETAILED DESCRIPTION

[0030] To make the objectives, technical solutions, and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present invention.

[0031] If no specific techniques or conditions are specified in the examples, the techniques or conditions described in the literature in this field or the product instructions were used. Raw materials used without manufacturer specified are all commercially available conventional products.

[0032] The technical solution of the present invention is further described below with reference to specific embodiments and comparative examples.

[0033] Example 1

[0034] A method for preparing a light-emitting diode epitaxial structure comprises the following steps:

[0035] S1 prepares the sapphire substrate;

[0036] S2 forms an h-BN / O2 layer on a sapphire substrate;

[0037] The specific deposition process is to place the sapphire substrate in a CVD reaction chamber with a reaction chamber temperature of 1200°C and a reaction chamber pressure of 1.2×10 -3 tor, RF power of 100W, B2H6 and NH3 at a flow rate of about 1000sccm, and h-BN layer was deposited on the substrate. Then the vacuum pressure in the reaction chamber was controlled to 10Pa, and oxygen was introduced at a flow rate of 100sccm. When the power dropped to 120W, the oxygen was ionized into free oxygen atoms, which mixed with oxygen molecules and electrons to form a plasma, bombarding the h-BN surface to form an h-BN / O2 layer with a thickness of about 20nm.

[0038] S3 deposits a low-temperature GaN buffer layer on the h-BN / O2 layer;

[0039] Specifically, the deposition process is as follows: lowering the reaction chamber temperature to a low temperature of 300°C, using NH3 as the N (nitrogen) source and TMGa as the Ga (gallium) source, growing GaN by low-temperature deposition, and controlling the thickness of the deposited GaN layer to be 100nm.

[0040] S4 deposits an N-type semiconductor layer on the low-temperature GaN buffer layer;

[0041] Specifically, the deposition process is as follows: the reaction chamber temperature is lowered to 1100 °C, NH3 is used as the N (nitrogen) source, TMGa is used as the Ga (gallium) source, SiH4 is used as the N-type dopant, and a Si-doped N-type GaN layer is deposited. The Si doping concentration is 5×10 18 atoms / cm 3 , and the thickness of the deposited N-type GaN layer is controlled to be about 2μm.

[0042] S5 depositing a multi-quantum well layer on the N-type semiconductor layer;

[0043] The specific deposition process is as follows: when growing the quantum well layer, the N (nitrogen) source is NH3, the Ga (gallium) source is TEGa, and the In (indium) source is TMIn. The temperature of the reaction chamber is controlled at 780°C and the pressure is controlled at 200 torr. The thickness of the deposited InGaN quantum well layer is controlled to be approximately 3nm. When growing the quantum barrier layer, the N (nitrogen) source is NH3, the Ga (gallium) source is TEGa, the temperature of the reaction chamber is controlled at 880°C and the pressure is controlled at 200 torr. The thickness of the deposited GaN quantum barrier layer is controlled to be 10nm. The quantum well layer and quantum barrier layer are alternately deposited and stacked 10 times to obtain a multi-quantum well layer.

[0044] S6 depositing a P-type semiconductor layer on the multi-quantum well layer;

[0045] The specific deposition process is: NH3 as N (nitrogen) source, TEGa as Ga (gallium) source, CP2Mg as P-type dopant, controlling the reaction chamber temperature to 1000℃, and controlling the deposition thickness in H2 atmosphere. The deposited P-type low Mg-doped GaN layer has a thickness of 17nm and a Mg doping concentration of 5×10 20 atoms / cm 3 .

[0046] The obtained light emitting diode epitaxial structure is as follows Figure 1-Figure 2 As shown, it includes a substrate 1, an h-BN / O2 layer 2, a low-temperature GaN buffer layer 3, an N-type semiconductor layer 4, a multi-quantum well layer 5, and a P-type semiconductor layer 6 arranged in sequence; the multi-quantum well layer 5 includes quantum barrier layers 51 and quantum well layers 52 that are periodically and alternately stacked in sequence; wherein the substrate 1 is a sapphire substrate, the h-BN / O2 layer 2 has more than 2 atomic layers and a thickness of about 20 nm; the low-temperature GaN buffer layer 3 has a thickness of about 100 nm; the N-type semiconductor layer 4 is a Si-doped GaN layer, wherein the Si doping concentration is 5×10 18 atoms / cm 3 , with a thickness of about 2 μm; the stacking period of the quantum barrier layer 51 and the quantum well layer 52 in the multi-quantum well layer 5 is 10, the quantum well layer is InGaN with a thickness of about 3 nm, and the quantum barrier layer is GaN with a thickness of about 10 nm; the P-type semiconductor layer 6 is a Mg-doped GaN layer with a thickness of about 17 nm and a Mg doping concentration of 5×10 20 atoms / cm 3 .

[0047] Example 2

[0048] The difference from Example 1 is that the deposition temperature of the low-temperature GaN buffer layer is 400°C.

[0049] Example 3

[0050] The difference from Example 1 is that the deposition temperature of the low-temperature GaN buffer layer is 460°C.

[0051] Example 4

[0052] The difference from Example 1 is that the deposition temperature of the low-temperature GaN buffer layer is 560°C.

[0053] Example 5

[0054] The difference from Example 1 is that the deposition temperature of the low-temperature GaN buffer layer is 660°C.

[0055] Example 6

[0056] The difference from Example 1 is that the deposition temperature of the low-temperature GaN buffer layer is 760°C.

[0057] Example 7

[0058] The difference from Example 3 is that the thickness of the h-BN / O2 layer is 50 nm, and the oxygen plasma treatment conditions are: ambient vacuum pressure of 10 Pa, oxygen flow rate of 80 sccm, and plasma power of 80 W.

[0059] Example 8

[0060] The difference from Example 3 is that the thickness of the h-BN / O2 layer is 100 nm, and the oxygen plasma treatment conditions are: ambient vacuum pressure of 10 Pa, oxygen flow rate of 130 sccm, and plasma power of 150 W.

[0061] Example 9

[0062] The difference from Example 3 is that the thickness of the h-BN / O2 layer is 150 nm, and the oxygen plasma treatment conditions are: ambient vacuum pressure of 10 Pa, oxygen flow rate of 180 sccm, and plasma power of 200 W.

[0063] Example 10

[0064] The difference from Example 8 is that the thickness of the low-temperature GaN buffer layer is 150 nm.

[0065] Example 11

[0066] The difference from Example 8 is that the thickness of the low-temperature GaN buffer layer is 200 nm.

[0067] Example 12

[0068] The difference from Example 8 is that the thickness of the low-temperature GaN buffer layer is 400 nm.

[0069] Comparative Example 1

[0070] The structural composition and preparation method of the epitaxial structure of this comparative example are substantially the same as those of Example 1, except that this comparative example does not have a low-temperature GaN buffer layer.

[0071] Comparative Example 2

[0072] The structural composition and preparation method of the epitaxial structure of this comparative example are basically the same as those of Example 1, except that this comparative example does not have the h-BN / O2 layer and the low-temperature GaN buffer layer.

[0073] Performance testing:

[0074] (1) Stress test: Raman spectroscopy (RS) non-destructive testing technology is used to characterize the epitaxial structure composition and crystal quality. The stress of the GaN epitaxial structure is quantitatively calculated based on the E2-high peak position shift on the Raman spectrum graph. , the calculation formula is as follows: ;in, is the shift of the E2-high peak relative to the stress-free state, k a is a constant, k a =4.2 cm -1 GPa.

[0075] (2) The epitaxial structures obtained in the embodiment and the comparative example were prepared into 3 mil × 5 mil chips using the same chip process conditions, and the photoelectric performance was tested at an operating current of 2 mA using the same Micro LED spot tester.

[0076] Specifically, the performance test results are shown in Table 1 below.

[0077] By comparing the examples and comparative examples, it can be seen that the stress is significantly reduced after adding the h-BN\O2 layer. After combining with the low-temperature GaN buffer layer, the stress value can be further reduced to below 0.2, and the light efficiency can be further improved. Combining the results of Examples 1-6, it can be seen that the growth temperature of the low-temperature GaN buffer layer also has a significant impact on stress. The stress of the chip obtained at 300℃-760℃ is relatively small, but too high or too low growth temperature also affects stress. Among them, 760℃ is close to 0.2. Therefore, preferably, the low-temperature GaN buffer layer growth temperature can be 300℃-660℃, so that the stress is even lower. In Example 2, the stress value of the epitaxial structure grown at 460℃ is the lowest.

[0078] The results of Examples 7-12 show that the thickness of the h-BN / O2 layer and the low-temperature GaN buffer layer also have a certain impact on stress and also have a significant effect on the light efficiency. When the h-BN / O2 layer thickness is ≥ 100nm and the low-temperature GaN buffer layer thickness is ≥ 100nm, the light efficiency is ≥ 89%. For example, in Example 11, when the h-BN / O2 layer thickness is 100nm and the low-temperature GaN buffer layer thickness is 200nm, the light efficiency is > 90%, and the stress value is also relatively low.

[0079] Figure 3 Figure 2 shows SEM images of the epitaxial structure deposition process of an embodiment of the present invention, wherein (a) is a SEM image of the epitaxial structure after the low-temperature buffer layer is deposited, (b) is a SEM image of the N-type semiconductor layer at the beginning of its growth, and (c) is a SEM image of the epitaxial structure at the end of its growth. It can be seen that the low-temperature GaN buffer layer has multiple continuous core island structures. When the N-type semiconductor layer is deposited and grown, it can grow along these core islands, and finally form a continuous and flat GaN film laterally, thereby reducing the stress between the substrate and the epitaxial layer, improving the scattering efficiency under high current, and increasing the probability of radiative recombination of heteroepitaxial materials.

[0080] Table 1 Performance test results of various embodiments and comparative examples

[0081]

[0082] The technical features of the above-described embodiments can be combined in any combination. To simplify the description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification. It should be pointed out that for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent of this invention shall be based on the attached claims.

Claims

1. A method for preparing a light-emitting diode epitaxial structure, characterized in that: The steps include: S1 provides a substrate; S2 depositing an h-BN layer on the substrate, and then treating the surface of the h-BN layer with oxygen plasma to form an h-BN / O2 layer; S3 depositing a low-temperature GaN buffer layer on the h-BN / O2 layer, wherein the deposition temperature of the low-temperature GaN buffer layer is 300° C.-760° C.; S4 deposits an N-type semiconductor layer on the low-temperature GaN buffer layer; S5 depositing a multi-quantum well layer on the N-type semiconductor layer; S6 depositing a P-type semiconductor layer on the multi-quantum well layer; In step S2, the h-BN layer is deposited using B2H6 and NH3 as raw materials, the reaction temperature is 600℃-2000℃, and the pressure is 7×10 -6 torr~8torr, RF power 50W-300W; the power of the oxygen plasma treatment is 50W-200W, the oxygen flow rate is 10sccm~200sccm, and the vacuum environment pressure is 1Pa~20Pa; In step S4, NH3 is used as the nitrogen source, TMGa is used as the gallium source, SiH4 is used as the N-type dopant, and the reaction temperature is 1000°C to 1200°C; In step S5, the multi-quantum well layer is formed by periodically alternating the growth of a quantum barrier layer and a quantum well layer. When depositing the quantum well layer, NH3 is used as a nitrogen source, TEGa is used as a gallium source, and TMIn is used as an indium source. The reaction temperature is 760°C to 800°C and the pressure is 150 torr to 250 torr. When depositing the quantum barrier layer, NH3 is used as a nitrogen source, TEGa is used as a gallium source, the reaction temperature is 860°C to 900°C, and the pressure is 150 torr to 250 torr. In step S6, the reaction temperature for depositing the P-type semiconductor layer is 980° C. to 1050° C., NH 3 is used as the nitrogen source, TEGa is used as the gallium source, CP 2 Mg is used as the P-type dopant, and the deposition thickness is controlled under H 2 atmosphere.

2. A light-emitting diode epitaxial structure, characterized in that: The light-emitting diode epitaxial structure is prepared by the preparation method according to claim 1, and includes a substrate, an h-BN / O2 layer, a low-temperature GaN buffer layer, an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer arranged in sequence.

3. The light emitting diode epitaxial structure according to claim 2, characterized in that: The number of atomic layers of the h-BN / O2 layer is greater than 2, and the thickness is between 20 nm and 150 nm.

4. The light emitting diode epitaxial structure according to claim 2, characterized in that: The thickness of the low-temperature GaN buffer layer is 100nm~500nm.

5. The light emitting diode epitaxial structure according to claim 2, characterized in that: The doping concentration of Si in the N-type semiconductor layer is 5×10 17 atoms / cm 3 ~1×10 19 atoms / cm 3 , the thickness of the N-type semiconductor layer is 1.0 μm to 3.0 μm; The stacking period number of the quantum barrier layer and the quantum well layer in the multi-quantum well layer is ≥8, the thickness of the quantum well layer is 2nm~4nm, and the thickness of the quantum barrier layer is 8nm~12nm; The P-type semiconductor layer is a Mg-doped GaN layer with a thickness of 15 nm to 20 nm and a Mg doping concentration of 5×10 18 atoms / cm 3 ~5×10 21 atoms / cm 3 .

Images