A multi-fidelity micro-architecture design space optimization method based on partial order prediction

Abstract

The application discloses a kind of based on partial order prediction multi-fidelity microarchitecture design space optimization method, comprising the following steps: from microarchitecture parameter, the parameter that has influence to target optimization PPA index is selected, and multi-fidelity data set of SOC design space initialization is constructed;Nonlinear multi-fidelity Gaussian proxy model is constructed, and maximum expectation hyper volume is used on last high-fidelity proxy model improvement;Logical regression function is constructed and trained;After obtaining new sampling design point, first using EDA simulation tool carries out architecture level simulation, to obtain low-fidelity index data, whether need to enter next fidelity based on partial order prediction is judged;Iterative optimization, obtain Pareto optimal solution.The application will partial order prediction, fidelity modeling and multi-objective bayesian optimization are organically integrated, form an efficient exploration system suitable for complex microarchitecture DSE task, with strong practicality, universality and scalability.

Description

Technical Field

[0001] This invention belongs to the field of microarchitecture space design technology, specifically relating to a multi-fidelity microarchitecture design space optimization method based on partial order prediction. Background Technology

[0002] Current EDA (Electronic Design Automation) simulation workflows typically include multiple stages such as architecture level, RTL (Register-Transfer Level), and netlist level. Simulation fidelity increases progressively with each stage, but the required time and computational resources also increase significantly, with time costs rising from minutes to hours or even days. While later stages can provide high-precision simulation results, their extremely high time cost makes it difficult to comprehensively evaluate the entire design space within a limited time budget. Early stages offer fast evaluation speeds but lack accuracy, easily misleading target design selection and missing the truly optimal design. Therefore, relying solely on simulation results from a single stage (whether low-fidelity or high-fidelity) makes it difficult to balance efficiency and accuracy, and in small sample sizes, it's challenging to effectively model design parameters and target performance indicators, resulting in low efficiency and high risk in design space exploration.

[0003] Currently, in actual development processes, high-fidelity simulations are still used in the later stages to evaluate the real performance of the design, even though this results in a very high time cost for the development process. Therefore, some researchers are studying multi-fidelity optimization techniques, hoping to accelerate the optimization process by utilizing low-fidelity data from earlier stages. However, existing methods lack heuristic decision-making logic between different fidelities, making it difficult to balance the accuracy and efficiency of optimization, thus leading to wasted time or missed optimal solutions. For example:

[0004] (1) EffBO first introduces a nonlinear Gaussian process model to learn the complex mapping relationship between low and high fidelity, and jointly models the correlation between multiple objective functions, thereby improving the modeling accuracy. Then, the expectation boosting function (EI) is used to find the next sampling point in the parameter space. After that, based on the prediction uncertainty of this point in the current model, it is determined whether high-fidelity evaluation is needed. The main drawback of this method is that its multi-fidelity strategy is based solely on the current model uncertainty of the sampling point, lacking heuristic analysis for fidelity selection. At the same time, this method only optimizes a single objective and is difficult to deal with complex multi-objective problems such as microarchitecture design.

[0005] (2) CorrelatMF also uses a nonlinear Gaussian model for modeling and adds the time cost of simulations at different fidelities as an additional weight to the acquisition function, thereby selecting the fidelity while selecting new sampling points. Although this scheme considers the resource consumption problem, it still has shortcomings: it only uses time cost as the fidelity weight, ignores the relationship between sort reversal and optimization potential, and does not analyze its sorting stability at different fidelities.

[0006] (3) The TrustMF method directly introduces simulation fidelity as an additional input parameter into the design parameter space to construct a unified Gaussian process model. It also introduces a "trust degree" function as a weighting term for the sampling function to control the sampling preference for data of different fidelities. This trust degree represents an estimate of the accuracy of the simulation results at each fidelity level, used to balance simulation accuracy and resource overhead. During the optimization process, TrustMF uses a fixed-form function (such as the tan function) to approximate the trust degree. However, this method has significant drawbacks: on the one hand, the error patterns and ranking characteristics between fidelities vary greatly under different problems, and the fixed trust function lacks universality and adaptability, making it prone to failure; on the other hand, this method does not explicitly determine whether the candidate design points may experience a reversal of ranking under different fidelities, making it impossible to accurately control the triggering conditions of high-fidelity simulation, which can easily lead to a waste of simulation resources or incorrect screening of optimal solutions. Summary of the Invention

[0007] To overcome the shortcomings of existing technologies, this invention provides a multi-fidelity microarchitecture design space optimization method based on partial order prediction, which solves the problems of high simulation resource costs and insufficient heuristics in fidelity selection strategies in current microarchitecture design space exploration.

[0008] The technical problem to be solved by this invention can be achieved through the following specific solutions:

[0009] The multi-fidelity microarchitecture design space optimization method based on partial order prediction includes the following steps:

[0010] Step 1: Select parameters from the microarchitecture parameters that affect the target optimization PPA metric, and construct the SOC (System on Chip) design space.

[0011] Step 2: Initialize the multifidelity dataset;

[0012] Step 3: Construct a nonlinear multifidelity Gaussian surrogate model and apply maximum expectation hypervolume improvement to the final highfidelity surrogate model;

[0013] Step 4: Construct and train the logistic regression function;

[0014] Step 5: After obtaining the new sampling design point, first use the EDA simulation tool to perform architecture-level simulation to obtain low-fidelity index data, and determine whether to enter the next fidelity level based on the partial order prediction.

[0015] Step 6: Iterative optimization to obtain the Pareto optimal solution.

[0016] Furthermore, in step 2, firstly, from the design space... Design points are randomly selected to form an initial low-fidelity data set X. arch Using EDA simulation tools, architecture-level simulation was performed to obtain a low-fidelity index dataset Y. arch Then, from X arch The design points are randomly selected to form the initial mid-fidelity data set X. RTL Using EDA simulation tools, RTL-level simulations were performed to obtain a mid-fidelity index dataset Y. RTL Finally, from X RTL Design points are randomly selected to form an initial high-fidelity data set X. netlist Using EDA simulation tools, netlist-level simulation was performed to obtain a high-fidelity index dataset Y. netlist Furthermore, datasets of different fidelity always satisfy the following: The relationship.

[0017] Furthermore, the specific content of step 3 is as follows: First, using a low-fidelity dataset (X... arch ,Y arch Training a low-fidelity Gaussian surrogate model (GP) l (.); Then, using [(X RTL ,GP l (X RTL )),Y RTL Training a mid-fidelity Gaussian surrogate model (GP) that incorporates low-fidelity data. m (.); Finally, using [(X netlist ,GP m (X netlist )),Y netlist Training a high-fidelity Gaussian surrogate model (GP) that incorporates low- to medium-fidelity data. h (.), and use this as the final fused Gaussian surrogate model; the final high-fidelity surrogate model uses the maximum expectation hypervolume improved sampling function to guide the next step of exploration, selecting the most promising new sampling point x. * The specific sampling function is as follows:

[0018]

[0019] Furthermore, in step 4, (Y) is used.arch ,Y netlist ) and (Y RTL ,Y netlist The data were used to construct and train logistic regression functions for the three PPA indicators, with the logistic regression function taking the following form:

[0020]

[0021] in, This represents the absolute value of the difference between the m-th metric of any two points in the i-th fidelity architecture. If the magnitude of the two points' metrics in the current fidelity architecture is the same as in the high fidelity architecture, then the logistic regression value is 1; otherwise, the output is 0.

[0022] Furthermore, in step 5, the partial order prediction judgment logic is as follows: using the trained logistic regression function... The three metrics, PPA, are used to predict the current fidelity of the new sampling point. Compared with the current Pareto point, the three indicators of PPA To determine whether a reversal will occur at high fidelity, a minimum fidelity simulation is performed first. The minimum fidelity value of the new sampling point and the value of the current Pareto point are input into the corresponding logistic regression model to determine whether the partial order relationship between the new sampling point and the current Pareto point changes at the current fidelity and the highest fidelity. If the partial order relationship between the new sampling point and a certain current Pareto point changes, it is considered that the new sampling point cannot be reasonably evaluated at the current fidelity, and the next fidelity simulation needs to be performed. After the simulation, the above judgment is continued until the highest fidelity is reached or no partial order relationship reversal occurs. If it is determined that the new sampling point is not dominated by the current Pareto point, it is considered that the sampling point is a new Pareto point and belongs to a potential design point, and it also needs to be performed at the next fidelity. Otherwise, the fidelity selection ends.

[0023] Furthermore, in step 6, the sampling dataset is updated according to the selected fidelity level. After each iteration, it is checked whether the current sampling and optimization process has exceeded the set time budget. If it has not exceeded the budget, the process returns to step 3 and continues optimization. If it has exceeded the budget, the process proceeds to the next step. After completing sufficient optimization within the budget, the final Pareto optimal solution set is obtained.

[0024] Compared with the prior art, the present invention has the following advantages:

[0025] (1) This invention organically integrates partial order prediction, fidelity modeling, and multi-objective Bayesian optimization to form an efficient exploration system suitable for complex microarchitecture DSE tasks, possessing strong practicality, versatility, and scalability. Based on nested Gaussian processes, it constructs nonlinear mapping relationships between different simulation stages (such as architecture level, RTL level, and Netlist level), and integrates data of different fidelity levels to form a unified surrogate model to support multi-objective performance estimation and optimization guidance under conditions of incomplete high-fidelity simulation. It employs Expected Hypervolume Boost (EHVI) as the multi-objective sampling function, combined with the nonlinear surrogate model, to evaluate the Pareto expansion potential of unsampled design points in each round of optimization, guiding the priority exploration of high-value points, thereby accelerating optimization convergence in multi-objective scenarios.

[0026] (2) In each round of optimization, the present invention performs a partial order consistency evaluation between the candidate design point and the current Pareto point, and dynamically decides whether to enter the high-fidelity simulation stage based on the reversal probability and boundary dominance, thereby achieving fine-grained scheduling and saving of simulation resources; that is, by predicting whether a candidate design point may produce a sorting reversal with the current Pareto solution under high-fidelity data, it decides whether to perform more expensive high-fidelity simulation, thereby minimizing unnecessary resource consumption while ensuring the accuracy of the final result. Attached Figure Description

[0027] Figure 1 This is a flowchart of the method of the present invention;

[0028] Figure 2 This is a flowchart of the EDA tool of the present invention;

[0029] Figure 3 This is a pseudocode diagram of the partial order prediction process of this invention;

[0030] Figure 4 This is a spatial distribution diagram designed for an embodiment of the present invention. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0032] like Figure 1 As shown, a multi-fidelity microarchitecture design space optimization method based on partial order prediction includes the following steps:

[0033] Step 1: Select parameters from the microarchitecture parameters that affect the target optimization PPA metric, and construct the SOC (System on Chip) design space.

[0034] Based on prior engineering experience, key parameters that influence the target optimization PPA (power consumption, area, and performance) are selected from numerous microarchitecture parameters. For example, in the BOOM microarchitecture design optimization problem, 20 parameters including FetchWidth and DecodeWidth are selected, and the candidate range for each parameter is determined to serve as the design space for subsequent optimization exploration.

[0035] This application uses the BOOM (Berkeley Out-of-Order Machine) microarchitecture as the experimental object, aiming to explore its multi-objective optimal design configuration, including performance (cycle count), power consumption, and area, within a limited simulation budget. Due to the limited overall simulation time budget, the architecture layer, RTL layer, and netlist layer in the VLSI flow are selected as the three fidelity levels for the study. The specific EDA tool flow is as follows. Figure 2 As shown.

[0036] Step 2: Initialize the multifidelity dataset.

[0037] In one specific embodiment, firstly, from the design space 30 design points are randomly selected to form an initial low-fidelity data set X. arch Using EDA simulation tools, architecture-level simulation was performed to obtain a low-fidelity index dataset Y. arch Then, from X arch Fifteen design points are randomly selected to form the initial mid-fidelity data set X. RTL Using EDA simulation tools, RTL-level simulations were performed to obtain a mid-fidelity index dataset Y. RTL Finally, from X RTL Two design points are randomly selected to form the initial high-fidelity data set X. netlist Using EDA simulation tools, netlist-level simulation was performed to obtain a high-fidelity index dataset Y. netlist Note that datasets of different fidelity always satisfy... The relationship.

[0038] Step 3: Construct a nonlinear multifidelity Gaussian surrogate model and apply maximum expectation hypervolume improvement to the final highfidelity surrogate model.

[0039] First, using a low-fidelity dataset (X) arch ,Y arch Training a low-fidelity Gaussian surrogate model (GP) l (.); then, using [(X RTL ,GP l (X RTL )),Y RTLTraining a mid-fidelity Gaussian surrogate model (GP) that incorporates low-fidelity data. m (.); Finally, using [(X netlist ,GP m (X netlist )),Y netlist Training a high-fidelity Gaussian surrogate model (GP) that incorporates low- to medium-fidelity data. h (.), thus forming the final fused Gaussian surrogate model. Note that when using this surrogate model, for the unknown design point x, first use GP... l (.) Predict low-fidelity metrics, then append them to the design parameters and input them into the GP. m (.) Predict the mid-fidelity index, and then perform the same operation to predict the final high-fidelity index.

[0040] The final high-fidelity surrogate model uses the maximum expectation hypervolume improved sampling function to guide the next step of exploration, selecting the most promising new sampling point x. * The specific sampling function is as follows:

[0041]

[0042] Step 4: Construct and train the logistic regression function.

[0043] Utilize(Y arch ,Y netlist ) and (Y RTL ,Y netlist The data were used to construct and train logistic regression functions for the three PPA indicators, with the logistic regression function taking the following form:

[0044]

[0045] in, This represents the absolute value of the difference between the m-th metric of any two points in the i-th fidelity architecture. If the magnitude of the two points' metrics in the current fidelity architecture is the same as in the high fidelity architecture, then the logistic regression value is 1; otherwise, the output is 0.

[0046] Step 5: After obtaining the new sampling design point, first use the EDA simulation tool to perform architecture-level simulation to obtain low-fidelity index data, and then determine whether to enter the next fidelity level based on the partial order prediction.

[0047] The partial order prediction logic is as follows: using a trained logistic regression function. The three metrics, PPA, are used to predict the current fidelity of the new sampling point. Compared with the current Pareto point, the three indicators of PPA To determine if a reversal will occur at high fidelity, a minimum fidelity simulation is performed first. The minimum fidelity value of the new sampling point and the value of the current Pareto point are input into the corresponding logistic regression model to determine whether the partial order relationship between the new sampling point and the current Pareto point changes at the current fidelity and the highest fidelity. If the partial order relationship between the new sampling point and a certain current Pareto point changes, it is considered that the new sampling point cannot be reasonably evaluated at the current fidelity, and the simulation needs to proceed to the next fidelity level. After the simulation, the above judgment is continued until the highest fidelity is reached or no partial order reversal occurs. If it is determined that the new sampling point is not dominated by the current Pareto point, it is considered a new Pareto point and a potential design point, and it also needs to proceed to the next fidelity level; otherwise, the fidelity selection ends. Detailed flowchart code is as follows: Figure 3 As shown.

[0048] Step 6: Iterative optimization to obtain the Pareto optimal solution.

[0049] Update the sampling dataset according to the selected fidelity level for subsequent surrogate modeling, logistic regression function training, and analysis. Repeat steps 3-6 until time consumption is exhausted, obtaining the currently explored Pareto front set.

[0050] Example

[0051] This embodiment specifically uses the BOOM (Berkeley Out-of-Order Machine) microarchitecture as the experimental object, aiming to explore its multi-objective optimal design configuration, including performance (cycle count), power consumption, and area, within a limited simulation budget. Due to the limited overall simulation time budget, the architecture layer, RTL layer, and netlist layer in the VLSI flow are selected as the three fidelity levels for the study. The specific EDA tool flow is as follows: Figure 3 As shown. This embodiment includes 20 adjustable parameters, covering value fetchwidth, execution unit (Issue / ALU type), register configuration, LSU size, cache size, etc.; 3,153 parameter combinations are selected as the design space for exploration, with a total simulation time of 4,423 CPUs. The overall design space distribution is as follows. Figure 4As shown. The simulation platform and toolchain include architecture-level evaluation, RTL-level evaluation, and netlist-level evaluation. Architecture-level evaluation uses Gem5 to obtain cycle counts and McPAT to estimate power consumption and area. RTL-level evaluation generates Verilog based on Chipyard and uses Synopsys VCS and Cadence Joules to obtain the RTL PPA. Netlist-level evaluation uses Cadence Genus for synthesis, outputting the final high-fidelity power consumption and area. The total simulation time in the optimization process is limited to 600 minutes. Therefore, the specific steps of the multi-fidelity microarchitecture design space optimization method based on partial order prediction are as follows:

[0052] (1) Initialization phase: Randomly select 30 design points for architecture fidelity simulation, select 15 points for RTL fidelity simulation, and then select 2 points for netlist fidelity simulation to build an initial multi-fidelity dataset.

[0053] (2) Training the model: a multi-fidelity Gaussian process model and a logistic regression prediction model were trained based on the sampled data.

[0054] (3) Iterative Optimization: Subsequent Bayesian optimization iterations involve first selecting the new sampling point with the greatest potential using the EHVI acquisition function on the multi-fidelity Gaussian process model, and then simulating the architecture layer. Next, a logistic regression model is used to predict whether the partial order relationship between the low-fidelity index and the current Pareto point will reverse at high fidelity, thus determining whether to proceed to the next fidelity simulation. After each determination, the newly sampled point and corresponding multi-fidelity data are added to the dataset to update the fused multi-fidelity surrogate model and the logistic regression prediction model.

[0055] (4) Result convergence: The final Pareto solution set is obtained within a 600-minute budget.

[0056] (5) Method comparison: This invention was compared with other multifidelity optimization methods on the BOOM and Rocket datasets. The following are the comparison results on the two metrics of supervolume and ADRS.

[0057] TABLE II Comparisons against previous works.

[0058]

[0059] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A partial order prediction based multi-fidelity micro-architecture design space optimization method, characterized in that, Includes the following steps: Step 1, select parameters from micro-architecture parameters that have an impact on the target optimization PPA metric, build SOC design space Step 2, initialize multi-fidelity dataset; first, randomly select design points from design space to form initial low-fidelity dataset X arch , use EDA simulation tool to perform architecture-level simulation to obtain low-fidelity index dataset Y arch ; then, randomly select design points from X arch to form initial medium-fidelity dataset X RTL , use EDA simulation tool to perform RTL-level simulation to obtain medium-fidelity index dataset Y RTL ; finally, randomly select design points from X RTL to form initial high-fidelity dataset X netlist , use EDA simulation tool to perform netlist-level simulation to obtain high-fidelity index dataset Y netlist ; and the datasets of different fidelities satisfy the relationship of ; Step 3, construct the nonlinear multi-fidelity Gaussian surrogate model, and use the maximum expected improvement on the last high-fidelity surrogate model; first, train the low-fidelity Gaussian surrogate model GP l (.) using the low-fidelity dataset (X arch ,Y arch ); then, train the medium-fidelity Gaussian surrogate model GP m (.) that integrates the low-fidelity data using [(X RTL ,GP l (X RTL )),Y RTL ]; finally, train the high-fidelity Gaussian surrogate model GP h (.) that integrates the medium and low-fidelity data using [(X netlist ,GP m (X netlist )),Y netlist ], and use it as the last integrated Gaussian surrogate model; the maximum expected improvement sampling function is used on the last high-fidelity surrogate model to guide the next step of exploration, and the current most potential new sampling point x * is selected, and the specific sampling function is: Step 4, construct and train the logistic regression function; use (Y arch ,Y netlist ) and (Y RTL ,Y netlist ) data to construct and train the logistic regression function for the three PPA indicators, respectively, where the logistic regression function is in the form of: in, This represents the absolute value of the difference between any two points and the m-th metric in the i-th fidelity architecture. If the magnitude of the two points' metrics in the current fidelity architecture is the same as in the high fidelity architecture, then the logistic regression value is 1; otherwise, the output is 0. Step 5: After obtaining the new sampling design point, first use the EDA simulation tool to perform architecture-level simulation to obtain low-fidelity index data, and determine whether to enter the next fidelity level based on the partial order prediction. Step 6: Iterative optimization to obtain the Pareto optimal solution.

2. The multi-fidelity microarchitecture design space optimization method based on partial order prediction according to claim 1, characterized in that, In step 5, the partial order prediction judgment logic is as follows: using the trained logistic regression function... The three metrics, PPA, are used to predict the current fidelity of the new sampling point. (i∈{arch,RTL},m∈{power consumption, area, performance}) and the current Pareto point PPA (Power Per Amount) indicators. To determine whether the order of the new sampling point and the current Pareto point will reverse at high fidelity, a minimum fidelity simulation is first performed. The minimum fidelity value of the new sampling point and the value of the current Pareto point are then input into the corresponding logistic regression model to determine whether the partial order relationship between the new sampling point and the current Pareto point will change at the current fidelity and the highest fidelity. If the partial order relationship between a new sampling point and the current Pareto point changes, it is considered that the new sampling point cannot be reasonably evaluated at the current fidelity. In this case, it is necessary to proceed to the next fidelity simulation and continue the above judgment after the simulation until the highest fidelity is reached or no partial order relationship reversal occurs. If it is determined that none of the new sampling points are dominated by the current Pareto point, then the sampling point is considered a new Pareto point, a potential design point, and should be moved to the next fidelity level; otherwise, the fidelity selection ends.

3. The multi-fidelity microarchitecture design space optimization method based on partial order prediction according to claim 2, characterized in that, In step 6, the sampling dataset is updated according to the selected fidelity level, and after each iteration, it is checked whether the current sampling and optimization process has exceeded the set time budget. If no limit is reached, return to step 3 and continue optimization; If the budget is exceeded, proceed to the next step; after optimization is completed within budget, the final Pareto optimal solution set is obtained.

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