Multilayer ceramic capacitor

Abstract

The invention provides a laminated ceramic capacitor capable of preventing water from entering the interior of a laminated body. A multilayer ceramic capacitor (1) is provided with: a multilayer body (2); a plurality of dielectric layers (4) and a plurality of internal electrode layers (5) are laminated on the inner layer part (6); two main surfaces (A) which face each other in the lamination direction; two side surfaces (B) which face each other in the width direction which intersects the lamination direction; and two end surfaces (C) which face each other in the length direction which intersects the lamination direction and the width direction. And two outer layers (7) disposed on both sides of the inner layer (6) in the stacking direction. And external electrodes (3) respectively disposed on both end surfaces (C) of the laminated body (2), the laminated body (2) having exposed surfaces (S) exposed from the external electrodes (3), the exposed surfaces (S) having metal oxide coated regions (Sc) coated with a metal oxide having a component different from that of the dielectric layer (4).

Description

Technical Field

[0001] The present invention relates to a laminated ceramic capacitor. Background Art

[0002] A multilayer ceramic capacitor comprises a stack of ceramic sintered bodies composed of a dielectric, such as barium titanate. Within this stack, multiple layered internal electrodes, made of precious metals such as Ag or Ag-Pd alloys, or base metals such as Ni, are arranged with ceramic layers (dielectric layers) interposed between them. The internal electrodes are alternately extended to one end face and the other. Furthermore, the internal electrode extending to one end face is electrically connected to the external electrode formed on the first end face, while the internal electrode extending to the other end face is electrically connected to the external electrode formed on the other end face (see, for example, Patent Document 1).

[0003] The external electrodes of such multilayer ceramic capacitors have multiple metal components, including a metal that is the same material as the internal electrodes or can be alloyed therewith, and a glass component, and are bonded to the wiring board via a conductive resin adhesive. If the metal component occupies 60-95% of the cross-sectional area of ​​the external electrodes, the capacitors can be mounted on the wiring board inexpensively and with high reliability without the use of solder.

[0004] Prior art literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2001-237137

[0007] However, there are cases where voids (pores) exist within the dielectric layers of the laminate, allowing moisture to penetrate through these voids and reach the internal electrodes, potentially causing failures. In typical laminated ceramic capacitors, such as those described in Patent Document 1, a portion of the laminate's outer surface is exposed to the outside air, not covered by the external electrodes. Furthermore, if voids extend from this exposed surface to the internal electrodes, moisture can penetrate through the voids, potentially reaching the internal electrodes and causing failures (short circuits). Summary of the Invention

[0008] Problems to be solved by the invention

[0009] An object of the present invention is to provide a multilayer ceramic capacitor capable of preventing moisture from penetrating into the interior of a multilayer body.

[0010] Technical solutions to solve problems

[0011] To solve the above-mentioned problems, the present invention provides a multilayer ceramic capacitor comprising a stacked body and external electrodes, the stacked body having an inner layer portion in which a plurality of dielectric layers and a plurality of internal electrode layers are stacked, two main surfaces opposing each other in a stacking direction, two side surfaces opposing each other in a width direction intersecting the stacking direction, two end surfaces opposing each other in a length direction intersecting the stacking direction and the width direction, and two outer layer portions arranged on either side of the inner layer portion in the stacking direction, the external electrodes being arranged on the two end surfaces of the stacked body, respectively. The stacked body has exposed surfaces exposed from the external electrodes, the exposed surfaces having a metal oxide coating region coated with a metal oxide having a composition different from that of the dielectric layers.

[0012] Effects of the Invention

[0013] According to the present invention, it is possible to provide a multilayer ceramic capacitor capable of preventing moisture from entering the interior of the stack. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic perspective view of a multilayer ceramic capacitor 1 according to the embodiment.

[0015] Figure 2 yes Figure 1 sectional view of the multilayer ceramic capacitor 1 taken along line II-II.

[0016] Figure 3 yes Figure 1 sectional view of the multilayer ceramic capacitor 1 taken along line III-III.

[0017] Figure 4 1 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1 .

[0018] Description of Reference Numerals

[0019] S: Show face;

[0020] Sm: central region;

[0021] Se: terminal region;

[0022] Se1: non-covered area;

[0023] 1: Multilayer ceramic capacitor;

[0024] 2: laminate;

[0025] 3: External electrodes;

[0026] 4: dielectric layer;

[0027] 5: internal electrode layer;

[0028] 6: inner layer;

[0029] 7: outer layer;

[0030] 11: Metal oxides. DETAILED DESCRIPTION

[0031] Hereinafter, a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described. Figure 1 It is a schematic perspective view of a multilayer ceramic capacitor 1 according to the embodiment. Figure 2 yes Figure 1 sectional view of the multilayer ceramic capacitor 1 taken along line II-II. Figure 3 yes Figure 1 sectional view of the multilayer ceramic capacitor 1 taken along line III-III.

[0032] (Multilayer ceramic capacitor 1)

[0033] Multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape and includes a laminate 2 and a pair of external electrodes 3 provided at both ends of laminate 2. Laminate 2 includes an inner layer portion 6 in which a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 are laminated.

[0034] In the following description, terms indicating directions of the multilayer ceramic capacitor 1 are used. In the multilayer ceramic capacitor 1, the direction in which the pair of external electrodes 3 are provided is referred to as the longitudinal direction L. The direction in which the dielectric layers 4 and the internal electrode layers 5 are stacked is referred to as the stacking direction T. A direction intersecting both the longitudinal direction L and the stacking direction T is referred to as the width direction W. In the embodiment, the width direction W is orthogonal to both the longitudinal direction L and the stacking direction T.

[0035] In the following description, among the six outer peripheral surfaces of the stacked body 2, a pair of outer peripheral surfaces opposing each other in the stacking direction T is referred to as the first principal surface A1 and the second principal surface A2, a pair of outer peripheral surfaces opposing each other in the width direction W is referred to as the first side surface B1 and the second side surface B2, and a pair of outer surfaces opposing each other in the longitudinal direction L is referred to as the first end surface C1 and the second end surface C2. Furthermore, when the first principal surface A1 and the second principal surface A2 are not particularly distinguished from each other in the description, they are collectively referred to as principal surfaces A, when the first side surface B1 and the second side surface B2 are not particularly distinguished from each other in the description, they are collectively referred to as side surfaces B, and when the first end surface C1 and the second end surface C2 are not particularly distinguished from each other in the description, they are collectively referred to as end surfaces C.

[0036] (Laminate 2)

[0037] The laminated body 2 includes an inner layer portion 6 and outer layer portions 7 respectively arranged on both principal surface A sides of the inner layer portion 6 .

[0038] (Inner layer 6)

[0039] The inner layer portion 6 is formed by laminating a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 .

[0040] (Dielectric layer 4)

[0041] The dielectric layer 4 is made of a ceramic material such as barium titanate.

[0042] (Internal electrode layer 5)

[0043] The internal electrode layers 5 include a plurality of first internal electrode layers 5A and a plurality of second internal electrode layers 5B. The first internal electrode layers 5A and the second internal electrode layers 5B are arranged alternately. In the case where there is no need to distinguish between the first internal electrode layers 5A and the second internal electrode layers 5B, they are collectively described as the internal electrode layers 5.

[0044] The first internal electrode layer 5A includes a first opposing portion 5Aa opposing the second internal electrode layer 5B, and a first lead portion 5Ab extending from the first opposing portion 5Aa toward the first end face C1. The end of the first lead portion 5Ab is exposed at the first end face C1 and is electrically connected to the first external electrode 3A, described below. The second internal electrode layer 5B includes a second opposing portion 5Ba opposing the first internal electrode layer 5A, and a second lead portion 5Bb extending from the second opposing portion 5Ba to the second end face C2. The end of the second lead portion 5Bb is electrically connected to the second external electrode 3B, described below.

[0045] Charges are stored in the first opposing portion 5Aa of the first internal electrode layer 5A and the second opposing portion 5Ba of the second internal electrode layer 5B, thereby functioning as a capacitor.

[0046] (Outer layer 7)

[0047] The outer layer portion 7 is made of the same ceramic material as the dielectric layer 4 of the inner layer portion 6 , for example, barium titanate.

[0048] (External electrode 3)

[0049] The external electrodes 3 include a first external electrode 3A provided on the first end surface C1 of the stacked body 2, and a second external electrode 3B provided on the second end surface C2 of the stacked body 2. In the case where there is no need to distinguish between the first external electrode 3A and the second external electrode 3B, they are collectively described as the external electrodes 3. The external electrodes 3 cover not only the end surface C but also the principal surface A and a portion of the side surface B on the end surface C side.

[0050] Each external electrode 3 includes a base electrode layer 3a and a plating layer 3b disposed outside the base electrode layer 3a. The base electrode layer 3a is electrically connected to the ends of the lead portion 5Ab and the lead portion 5Bb of the internal electrode layer 5 exposed at the end surface C. The plating layer 3b includes, for example, a Ni plating layer 3b1 disposed to cover the surface of the base electrode layer 3a and a Sn plating layer 3b2 disposed to cover the Ni plating layer 3b1. The Ni plating layer 3b1 prevents the base electrode layer 3a from being corroded by solder. The Sn plating layer 3b2 improves solder wettability when the multilayer ceramic capacitor 1 is mounted on a wiring board, thereby facilitating mounting.

[0051] In the embodiment, outer layer 7 and dielectric layer 4 are made of a dielectric ceramic material such as barium titanate, as described above, and are fired in the firing step described below. During firing, outer layer 7 and dielectric layer 4 become granular (particles), creating spaces (pores) between the particles. In particular, the spaces between the particles in outer layer 7 can serve as pathways for water to infiltrate from the outside, potentially reducing the moisture-resistant reliability of multilayer ceramic capacitor 1.

[0052] The laminate 2 has exposed surfaces S on the main surface A and the side surface B, which are exposed from the external electrode 3. In the embodiment, the exposed surface S is covered with a metal oxide 11 having a different composition from that constituting the dielectric layer 4. The metal oxide 11 does not completely cover the entire surface of the exposed surface S, but rather covers the exposed surface S in a manner dispersed across the exposed surface S. The metal oxide 11 preferably covers at least the exposed surface of the main surface A. In the embodiment, the metal oxide 11 covers the exposed surface S of the main surface A and the exposed surface S of the side surface B.

[0053] like Figure 1 as well as Figure 2 As shown, the exposed surface S has a central region Sm and two end regions Se located on the outer electrode 3 side of the central region Sm in the longitudinal direction L. Although not limited to this, in the embodiment, the center portion when the length of the exposed surface S in the longitudinal direction L is roughly divided into three equal parts is the central region Sm, and the two sides thereof are the end regions Se. Furthermore, the coverage of the metal oxide 11 in the central region Sm is greater than that in the end regions Se.

[0054] If the metal oxide 11 is insufficiently oxidized or reduced, a short circuit may occur between the metal oxide 11 and the external electrode 3. According to the embodiment, the coverage of the metal oxide 11 in the two end regions Se located on the side of the external electrode 3 is lower than that in the central region Sm. Therefore, even if the metal oxide 11 is insufficiently oxidized or reduced, the possibility of a short circuit between the external electrode 3 and the metal oxide 11 is low.

[0055] On the other hand, since the coverage of the metal oxide 11 in the central region Sm is higher than that in the end region Se, the effect of preventing water from entering the gap from the outside is high, and the probability of failure (short circuit) caused by water intrusion can be reduced.

[0056] Furthermore, the edge portion of the end region Se on the side of the external electrode 3 preferably includes an uncovered region Se1 that is not covered with the metal oxide 11. Thus, even when the metal oxide 11 is insufficiently oxidized or reduced, the possibility of a short circuit with the external electrode 3 can be further reduced. Furthermore, the portion of the end region Se other than the uncovered region Se1 that is not covered with the metal oxide 11 may have a lower coverage rate with the metal oxide 11 than the central region Sm.

[0057] The lengthwise distance of the uncovered region Se1 not covered by the metal oxide 11, that is, the lengthwise distance from the edge of the external electrode 3 to the edge of the metal oxide-coated region Sc, is preferably not less than 50 μm and not more than 200 μm. The uncovered region Se1 on the main surface A may also be a region having a substantially constant lengthwise distance and extending in the width direction W, forming a curved shape along the edge of the external electrode 3. The uncovered region Se1 on the side surface B may also be a region having a substantially constant lengthwise distance and extending in the stacking direction T, forming a curved shape along the edge of the external electrode 3. This can more appropriately reduce the possibility of short circuits.

[0058] The metal oxide 11 is preferably arranged substantially evenly over the entire surface of the central region Sm. By distributing the metal oxide 11 substantially evenly over the entire surface of the central region Sm, the probability of failure (short circuit) caused by moisture intrusion can be more reliably reduced.

[0059] The exposed surface S has a metal oxide coating area Sc coated with a metal oxide 11. In an embodiment, the exposed surface S has a metal oxide coating area Sc and the aforementioned non-covered area Se1. The metal oxide coating area Sc is an area outside the non-covered area Se1 in the exposed surface S. The coverage of the metal oxide 11 in the metal oxide coating area Sc is preferably greater than 10% and less than 30%. When the coverage is less than 10%, the amount of metal oxide 11 attached is small, the effect of suppressing moisture intrusion is not sufficient, and the effect of improving moisture resistance reliability cannot be obtained. On the other hand, when the coverage is greater than 30%, the metal oxide 11 is ionized due to moisture intrusion, thereby causing migration caused by metal ions or oxide ions, and there is a risk of causing a short circuit. However, in an embodiment, the coverage of the metal oxide 11 in the entire exposed surface S is greater than 10% and less than 30%, so that the effect of suppressing moisture intrusion can be fully obtained, and the risk of causing a short circuit due to migration caused by metal ions or oxide ions can be reduced.

[0060] The metal oxide 11 is preferably a metal oxide 11 having a component different from that constituting the dielectric layer 4 , and is preferably SnO. This significantly reduces the probability of a failure (short circuit) due to moisture intrusion.

[0061] As described above, the exposed surface S of the laminate 2 is coated with the metal oxide 11 having a composition different from that of the dielectric layer 4 , thereby covering voids (pores), reducing the probability of failure (short circuit) caused by moisture intrusion, and improving moisture resistance reliability.

[0062] (Method for measuring the coverage of the metal oxide 11)

[0063] As an example, the coverage of the metal oxide 11 is measured as follows. First, observation is performed using a scanning electron microscope (SEM), and an elemental mapping image is acquired using an energy dispersive X-ray analyzer (EDX) included with the SEM. Next, based on the elemental mapping image, the exposed surface S of the dielectric layer 4 (outer layer) on the main surface side of the multilayer ceramic capacitor 1, which is exposed from the external electrode 3, is binarized to determine the portion coated with the metal oxide 11 and the portion not coated with the metal oxide 11. The ratio of the area occupied by the metal oxide 11-coated portion, determined by binarization, relative to the total area is calculated and used as the coverage. The coverage is measured at the center of the central region Sm and at the centers of both end regions.

[0064] (Method for Manufacturing Multilayer Ceramic Capacitor 1)

[0065] Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described. The method for manufacturing the multilayer ceramic capacitor 1 of the embodiment is not limited as long as the above-mentioned requirements are met. However, a preferred manufacturing method includes the following steps. Figure 4 1 is a flowchart illustrating a method for manufacturing the multilayer ceramic capacitor 1 .

[0066] (Ceramic Green Sheet Printing Process S1)

[0067] A ceramic slurry containing ceramic powder, a binder, and a solvent is applied to a carrier film in a sheet shape.

[0068] Next, a conductive paste containing metal powder, additives such as a binder, plasticizer, and dispersant, and an organic solvent is printed onto the ceramic green sheet using screen printing, inkjet printing, gravure printing, or the like, forming a stripe-shaped pattern. This allows the conductive paste, which will become the internal electrode layer 5, to be printed onto the surface of the ceramic green sheet, which will become the dielectric layer 4.

[0069] (Lamination Step S2)

[0070] The plurality of ceramic green sheets are stacked so that the conductive paste is offset by half a pitch in the longitudinal direction L between adjacent ceramic green sheets in the stacking direction T. Furthermore, outer layer ceramic green sheets, which will become the outer layer portion 7, are stacked on both sides in the stacking direction T of the stacked plurality of ceramic green sheets.

[0071] (Master Block Formation Step S3)

[0072] Next, outer layer portion ceramic green sheets, which become the outer layer portion 7 , are stacked on both sides of the stacked ceramic green sheets in the stacking direction T and are thermocompression-bonded to form a mother block.

[0073] (Master block cutting step S4)

[0074] Next, the mother block is cut to produce a plurality of laminated bodies 2 .

[0075] (External Electrode Forming Step S5)

[0076] A conductive paste to be the base electrode layer 3 a of the external electrode 3 is applied to both end portions of the laminate 2 by dipping or the like.

[0077] (Firing process S6)

[0078] Then, the laminate 2 is heated in a nitrogen atmosphere at a set firing temperature for a predetermined time, thereby baking the base electrode layer 3 a of the external electrode 3 to the laminate 2 .

[0079] (Metal Oxide Coating Step S7)

[0080] The manufactured multilayer ceramic capacitor 1 is plated in a plating bath in which chips of a predetermined metal oxide 11 are intentionally mixed, thereby forming a plating layer 3b and coating the body surface with the metal oxide 11. Then, the metal oxide 11 near the external electrode 3 is removed by laser. By the above process, a multilayer ceramic capacitor 1 can be manufactured. Figure 1 The multilayer ceramic capacitor 1 is shown.

[0081] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, Various changes and deformation|transformation as follows are possible.

[0082] <1>

[0083] A multilayer ceramic capacitor includes a multilayer body and external electrodes.

[0084] The laminated body has:

[0085] The inner layer portion is stacked with a plurality of dielectric layers and a plurality of internal electrode layers;

[0086] two main surfaces, facing each other in the stacking direction;

[0087] two side surfaces facing each other in a width direction intersecting the stacking direction;

[0088] two end faces facing each other in a longitudinal direction intersecting the stacking direction and the width direction; and

[0089] Two outer layer parts are arranged on both sides of the inner layer part in the stacking direction,

[0090] The external electrodes are respectively arranged on the two end surfaces of the stacked body,

[0091] in,

[0092] The laminate has an exposed surface exposed from the external electrode.

[0093] The exposed surface has a metal oxide coating region coated with a metal oxide having a component different from that constituting the dielectric layer.

[0094] <2>

[0095] The multilayer ceramic capacitor according to <1>,

[0096] The exposed surface has a central region in the longitudinal direction and two end regions located on both sides of the central region on the side of the external electrode.

[0097] The coverage of the metal oxide is greater in the central region than in the end regions.

[0098] <3>

[0099] The multilayer ceramic capacitor according to <1> or <2>,

[0100] The end region includes a region not covered with the metal oxide.

[0101] <4>

[0102] The multilayer ceramic capacitor according to any one of <1> to <3>, wherein

[0103] The metal oxide is disposed substantially evenly over the entire surface of the central region.

[0104] <5>

[0105] The multilayer ceramic capacitor according to any one of <1> to <4>,

[0106] The coverage of the metal oxide in the metal oxide coating region is 10% or more and 30% or less.

[0107] <6>

[0108] The multilayer ceramic capacitor according to any one of <1> to <5>,

[0109] The metal oxide is SnO.

Claims

1. A multilayer ceramic capacitor comprising a multilayer body and external electrodes. The laminated body has: The inner layer portion is stacked with a plurality of dielectric layers and a plurality of internal electrode layers; two main surfaces, facing each other in the stacking direction; two side surfaces facing each other in a width direction intersecting the stacking direction; two end faces facing each other in a longitudinal direction intersecting the stacking direction and the width direction; and Two outer layer parts are arranged on both sides of the inner layer part in the stacking direction, The external electrodes are respectively arranged on the two end surfaces of the stacked body, in, The laminate has an exposed surface exposed from the external electrode. The exposed surface has a metal oxide coating region coated with a metal oxide having a component different from that constituting the dielectric layer.

2. The multilayer ceramic capacitor according to claim 1, wherein The exposed surface has a central region in the longitudinal direction and two end regions located on both sides of the central region on the side of the external electrode. The coverage of the metal oxide is greater in the central region than in the end regions.

3. The multilayer ceramic capacitor according to claim 2, wherein The end region includes a region not covered with the metal oxide.

4. The multilayer ceramic capacitor according to claim 2 or 3, wherein The metal oxide is disposed substantially evenly over the entire surface of the central region.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein The coverage of the metal oxide in the metal oxide coating region is 10% or more and 30% or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein The metal oxide is SnO.

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