Etching methods for semiconductor films and semiconductor process equipment

Abstract

This invention relates to the field of semiconductor etching technology, specifically to a method and apparatus for etching semiconductor films. The method includes: a main etching step, in which process gas is introduced into a process chamber and plasma is generated to etch the target film layer attached to the surface and upper inner wall of a deep trench structure; a deposition step, in which a self-masking layer is deposited on the surface of the oxide layer of the surface of the deep trench structure; and an over-etching step, in which process gas is introduced into the process chamber and plasma is generated to etch the target film layer attached to the lower inner wall of the deep trench structure. The semiconductor film etching method and apparatus provided by this invention can achieve step-by-step etching of the target film layer attached to the surface and upper and lower inner walls of a deep trench structure, and the surface oxide layer is not easily etched; furthermore, it can ensure that the remaining amount of the target film layer in the sidewall trenches of the deep trench structure meets the requirements.

Description

Technical Field

[0001] This invention relates to the field of semiconductor etching technology, and more specifically, to a method for etching semiconductor films and semiconductor process equipment. Background Technology

[0002] As the gate width of transistors shrinks, the electrostatic problem of fin field-effect transistors has restricted the further development of transistors. Gate all around (GAA) transistors are considered to be a new technology that can replace traditional methods.

[0003] In a fully encircling gate structure, a TiN film is coated on the periphery. This TiN film needs to be selectively removed. The relevant etching method mainly adopts wet etching. However, wet etching has isotropic etching characteristics, making it difficult to complete the etching of the TiN film inside the fully encircling gate structure while ensuring that SiO2 is not etched. Furthermore, it is difficult to control the amount of TiN remaining in the sidewall trenches. Summary of the Invention

[0004] The purpose of this invention is to provide a semiconductor film etching method and semiconductor process equipment to solve the technical problems in the related art of etching TiN film layers, which is difficult to complete the etching of TiN film layer inside the full-ring gate structure while ensuring that SiO2 is not etched, and is difficult to control the amount of TiN remaining in the sidewall trench.

[0005] The semiconductor film etching method provided by this invention is used to etch a target film layer attached to the surface and inner wall of a deep trench structure. The method includes:

[0006] In the main etching step, process gas is introduced into the process chamber and plasma is generated to etch the target film layer attached to the surface and upper inner wall of the deep trench structure.

[0007] In the deposition step, a self-masking layer is deposited on the surface of the surface oxide layer of the deep trench structure;

[0008] In the etching step, process gas is introduced into the process chamber and plasma is generated to etch the target film layer attached to the lower part of the inner wall of the deep trench structure.

[0009] Preferably, as one possible implementation, the upper radio frequency power in the main etching step is greater than the upper radio frequency power in the over-etching step, and the lower radio frequency power in the main etching step is equal to zero;

[0010] And / or, in the over-etching step, the upper RF power is greater than the lower RF power, and the lower RF power is greater than zero.

[0011] Preferably, as one possible implementation, in the main etching step, the upper radio frequency power supply adopts a high-selectivity film removal mode, and the upper radio frequency power ranges from 1200 to 1600W;

[0012] And / or, in the over-etching step, the upper RF power is 600-1000W, and the lower RF power supply adopts pulse mode with a lower RF power of 40-100W.

[0013] Preferably, as one possible implementation, in the over-etching step, the pulse frequency of the lower radio frequency power supply is 200-500Hz, and the duty cycle is 20%-50%.

[0014] Preferably, as one possible implementation, the gas pressure in the main etching step is greater than the gas pressure in the over-etching step.

[0015] Preferably, as one possible implementation, the gas pressure in the main etching step is 300-500 mT, and / or the gas pressure in the over-etching step is 50-80 mT.

[0016] Preferably, as one possible implementation, in the process gas of the main etching step, the flow rate of the etching gas is 300-500 sccm, the flow rate of the dilution gas is 100-200 sccm, and the flow rate of the protective gas is 300-500 sccm.

[0017] And / or, in the process gas of the etching step, the flow rate of the etching gas is 50-200 sccm, the flow rate of the dilution gas is 100-200 sccm, and the flow rate of the protective gas is 200-300 sccm.

[0018] The etching gas includes Cl2 or BCl3, the dilution gas includes He or Ar, and the protective gas includes N2.

[0019] Preferably, as one possible implementation, in the process gas of the main etching step, the proportion of the etching gas is 30% to 50%, the proportion of the dilution gas is 10% to 20%, and the proportion of the protective gas is 30% to 50%.

[0020] Preferably, as one possible implementation, the temperature of the electrostatic chuck is 50–80°C in the main etching step and the over-etching step.

[0021] Preferably, as one possible implementation, the target film layer comprises any one of TiN, TaO, TaN, HfO2, and TiAl.

[0022] Preferably, as one possible implementation, before the main etching step, the method further includes:

[0023] In the transfer step, process gas is introduced into the process chamber to assist the main etching step in stabilizing the start-up process.

[0024] Preferably, as one possible implementation, the transfer step includes a first transfer step and a second transfer step.

[0025] The gas pressure in the first transfer step is less than the gas pressure in the second transfer step, which is less than the gas pressure in the main etching step, and / or the upper radio frequency power in the first transfer step and the upper radio frequency power in the second transfer step are both consistent with the upper radio frequency power in the main etching step.

[0026] Preferably, as one possible implementation, the gas pressure in the first transfer step is 50-70 mT, and the gas pressure in the second transfer step is 150-250 mT;

[0027] And / or, in the first transfer step and the second transfer step, the up-RF power is 1200-1600W and the process time is 2-4s.

[0028] Preferably, as one possible implementation, the deposition step includes:

[0029] A C-containing gas is introduced into the process chamber, and a self-masking layer with C as the main component is deposited on the surface of the surface oxide layer.

[0030] Preferably, as one possible implementation, in the deposition step, the flow rate of the C-containing gas is 100-300 sccm, and / or the gas pressure is 10-30 mT, and / or the temperature of the electrostatic chuck is 40-60°C, and / or the on-frequency power is 800-1200 W, and / or the process time is 30-60 s;

[0031] And / or, the C-containing gas includes CH4.

[0032] Preferably, as one possible implementation, after the etching step shown, the method further includes:

[0033] The cleaning step involves cleaning the deep trench structure to remove any remaining self-masking layer and deposits on the surface of the deep trench structure.

[0034] Preferably, as one possible implementation, the cleaning step includes:

[0035] A cleaning gas is introduced into the process chamber at a pressure of 20–50 mT, with an upper radio frequency power of 800–1200 W and a lower radio frequency power of zero; wherein the cleaning gas includes O2 and / or N2.

[0036] The semiconductor process equipment provided by the present invention includes a process chamber, an air intake assembly, an upper electrode assembly, a lower electrode assembly, and a controller. The controller includes at least one processor and at least one memory. The memory stores a computer program, which, when executed by the processor, implements the above-mentioned semiconductor film etching method.

[0037] Compared with related technologies, the beneficial effects of the present invention are as follows:

[0038] The semiconductor film etching method and semiconductor process equipment provided by this invention can etch the target film layer attached to the surface and upper and lower inner walls of a deep trench structure in steps. By setting a deposition step between the two etching steps (main etching step and over-etching step), the surface oxide layer of the deep trench structure can be protected. Thus, while ensuring that the surface oxide layer is not etched, the etching of the target film layer (such as TiN film layer) inside the deep trench structure can be completed. In addition, the process time of the main etching step can be set as needed to ensure that the remaining amount of the target film layer in the side wall trench of the deep trench structure meets the requirements. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of a three-dimensional semiconductor structure in related technologies;

[0041] Figure 2 This is a first schematic flowchart of a semiconductor film etching method provided in an embodiment of the present invention;

[0042] Figures 3a-3e A schematic diagram of the process flow for an etching method for a semiconductor film layer provided in an embodiment of the present invention;

[0043] Figure 4 This is a second schematic flowchart of a semiconductor film etching method provided in an embodiment of the present invention;

[0044] Figure 5 This is a schematic diagram of a semiconductor process equipment provided in an embodiment of the present invention. Detailed Implementation

[0045] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0046] See Figure 1 In the related technology of lateral etching of three-dimensional semiconductor structures, a stacked layer 120 is first formed by overlapping multiple first layers 121 and multiple second layers 122 to be etched; at least two filling layers 1231 are formed in the stacked layer 120 at intervals, and a channel bridge 1211 for etching solution to pass through is formed between two adjacent filling layers 1231. Along the lateral etching path parallel to the surface of the stacked layer 120, the volume of the first layer 121 is narrowed at the channel bridge 1211; the first layer 121 is laterally etched by wet etching; wherein, in the wet etching environment, the etching rate of the first layer 121 is greater than the etching rate of the filling layer 1231. In this related technology, although the diffusion flux of the etching components in the etching solution is restricted when the etching solution passes through the channel bridge 1211 between two adjacent filling layers 1231, which reduces the difference in etching amount between different first layers 121 to a certain extent and improves the uniformity of etching amount of each first layer 121, the etching rate in each direction cannot be precisely controlled due to the etching characteristics of wet etching, so the remaining amount of TiN film in the sidewall trench cannot be well controlled.

[0047] In another related technology, dry etching is employed, using CF4 and C4F6 as etching process gases. The C4F6 / CF4 ratio is 1:7 to 1:10, and the total gas flow rate ranges from 100 to 150 sccm. This method selectively etches the SiGe sacrificial layer of the GAA ring gate structure. The specific steps include: Main Etch (Me1), O2 deposition (O2 dep), and Main Etch (Me2). While this technology can ultimately remove the SiGe sacrificial layer and protect the Si layer during the etching process, the etching gases used have a low etching rate for TiN and low selectivity for the oxide layer (OX). Therefore, it cannot guarantee that the top oxide layer (OX) will not be etched during the effective removal of the sidewall TiN film.

[0048] Based on this, embodiments of the present invention provide a semiconductor film etching method and semiconductor process equipment. By optimizing the etching process, gas, temperature, pressure, and radio frequency power, highly selective etching of TiN on SiO2 (the selectivity of TiN to SiO2 is greater than 40) can be achieved. While ensuring that SiO2 is not etched, the etching of TiN film on various parts of the periphery of the deep trench structure (such as the full-ring gate structure) (including the surface layer and the inner wall of the deep trench) can be completed. At the same time, the etching rate in each direction can be precisely controlled, thereby controlling the amount of TiN film remaining in the sidewall trench of the full-ring gate structure. In this case, the transistor size can be made smaller.

[0049] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings.

[0050] Figure 2 This is a schematic flowchart of a semiconductor film etching method according to one embodiment of the present invention. The method can be used to etch target films attached to the surface and inner walls of deep trench structures (such as full-ring gate structures). The method includes:

[0051] S102, the main etching step, introduces process gas into the process chamber and generates plasma to etch the target film layer attached to the surface and upper inner wall of the deep trench structure.

[0052] Specifically, the deep groove structure before etching is 100 as... Figure 3a As shown; a process gas can be excited by an RF power supply to generate plasma, which is used to etch the target film 11 in the shallower parts of the surface and upper inner wall of the deep trench structure 100. By controlling the process duration of the main etching step, the remaining amount of the target film 11 in the sidewall trench of the deep trench structure 100 can reach the target amount, such as... Figure 3b As shown.

[0053] S104, Deposition step, depositing a self-masking layer on the surface of the surface oxide layer of the deep trench structure.

[0054] It should be noted that a self-masking layer 13 is deposited on the surface of the surface oxide layer 12, such as... Figure 3c As shown, the self-masking layer 13 obtained by deposition can be used as a protective layer to protect the surface oxide layer 12 and prevent subsequent etching steps from damaging the surface oxide layer 12.

[0055] S106, in the etching step, process gas is introduced into the process chamber and plasma is generated to etch the target film layer attached to the lower part of the inner wall of the deep trench structure.

[0056] Specifically, a radio frequency power supply can be used to excite the process gas to generate plasma, which is then used to etch the target film layer 11 on the lower part of the inner wall of the deep trench structure 100. Because the surface oxide layer 12 is covered with a self-masking layer 13, the plasma will not damage the surface oxide layer 12 when bombarding the surface of the deep trench structure 100. The etched deep trench structure 100 is as follows: Figure 3d As shown.

[0057] In summary, the semiconductor film etching method provided in this embodiment can etch the target film 11 attached to the surface and upper and lower parts of the inner wall of the deep trench structure 100 in steps. By setting a deposition step S104 between the two etching steps (main etching step S102 and over-etching step S106), the surface oxide layer 12 of the deep trench structure 100 can be protected. Thus, while ensuring that the surface oxide layer 12 is not etched, the etching of the target film 11 (such as TiN film) inside the deep trench structure 100 can be completed. In addition, the process time of the main etching step can be set as needed to ensure that the remaining amount of the target film 11 in the sidewall trench of the deep trench structure 100 meets the requirements.

[0058] It should be noted that during the etching process, the main etching step (ME), the deposition step (dep), and the over-etching step (OE) can be executed once in sequence, or they can be executed in a loop several times.

[0059] In related technologies, both the upper and lower radio frequency (RF) powers are typically set to be greater than 0, meaning that the combined upper and lower RF powers are used to etch the TiN film. Under this condition, although the surface TiN film can be etched away, the TiN film on the inner wall of the deep trench structure cannot be etched, and the TiN film has relatively low selectivity for etching the oxide layer. In this application, the upper RF power in the main etching step is set to be greater than that in the over-etching step, and the lower RF power in the main etching step is set to zero. That is, in the main etching step, a high lateral selectivity etching process with only high upper RF power is used, which allows the process gas to be more fully dissociated. The resulting plasma can bombard the surface and upper inner wall of the deep trench structure 100, so that the target film 11 attached to the surface and upper inner wall of the deep trench structure 100 can be effectively etched away, and the target film 11 has relatively high selectivity for etching the oxide layer, making it less likely to be lost.

[0060] Specifically, in the main etching step, the upper RF power supply can be set to a high-selectivity film removal mode (high SFR mode), and the upper RF power can be set to 1200-1600W. This not only ensures sufficient dissociation of the process gas but also prevents excessive current from burning out the coil due to excessive power. Preferably, the upper RF power is set to 1300-1500W, and more preferably 1350-1450W.

[0061] Preferably, in the over-etching step, the upper radio frequency power is set to be greater than the lower radio frequency power, and the lower radio frequency power is set to be greater than zero. Under the action of the lower radio frequency power, it can be ensured that the excited plasma can move downward to the bottom of the deep trench structure 100 to bombard the lower part of the inner wall of the deep trench structure 100, so that the remaining target film layer 11 attached to the lower part of the inner wall of the deep trench structure 100 can be completely removed.

[0062] Specifically, in the over-etching step, the upper RF power can be set to 600-1000W to ensure sufficient dissociation of the process gas. The lower RF power is set to pulse mode. When the lower RF power is on, the plasma can accelerate into the bottom of the deep trench, etching away the target film layer 11 on the lower inner wall of the deep trench structure 100. When the lower RF power is off, the plasma stops moving downwards and simultaneously removes deposits from the deep trench, ensuring that etching does not stop at the bottom due to excessive deposits. Setting the lower RF power to 40-100W, a lower power value, ensures that the self-masking layer 13 on the surface is not lost too much, thus ensuring the protective effect of the self-masking layer 13 on the surface oxide layer 12, preventing the surface oxide layer 12 from being lost. Preferably, the upper RF power is set to 700-900W, more preferably 750-850W. Preferably, the lower RF power is set to 50-90W, more preferably 60-80W.

[0063] In the etching step, the pulse frequency of the lower RF power supply can be set to 200–500 Hz, and the duty cycle to 20%–50%. This allows for effective etching and removal of the target film layer 11 at the bottom of the deep trench with high efficiency. Preferably, the pulse frequency of the lower RF power supply is set to 250–450 Hz, more preferably 300–400 Hz. Preferably, the duty cycle is set to 25%–45%, more preferably 30%–40%.

[0064] In related technologies, TiN films are typically etched under low-pressure conditions, resulting in weak isotropic etching and difficulty in etching TiN films within sidewall trenches. This application sets the gas pressure in the main etching step to be higher than that in the over-etching step. Using a high-pressure environment in the main etching step enhances ion collisions, shortens the free path, and strengthens isotropic etching. This allows for etching of both the surface target film 11 and the target film 11 within the sidewall trenches. Simultaneously, the high pressure, combined with RF power, achieves higher plasma density, enabling the etching of the target film 11. Using a low-pressure environment in the over-etching step reduces ion collisions during process gas dissociation, increases the ion free path, and ensures that ions can reach the bottom of the deep trench.

[0065] Specifically, the gas pressure in the main etching step can be set to 300–500 mT. Within this pressure range, isotropic etching can be ensured. The gas pressure in the subsequent etching step can be set to 50–80 mT. Within this pressure range, ions can be ensured to reach the bottom of the deep trench.

[0066] In one embodiment, the flow rate of the etching gas in the process gas of the main etching step is set to 300-500 sccm, the flow rate of the dilution gas is set to 100-200 sccm, and the flow rate of the protective gas is set to 300-500 sccm. The etching gas can be Cl2, BCl3, or other gases; the dilution gas can be He, Ar, or other gases; and the protective gas can be N2 or other gases. Using the process gas at this combination and flow rate to etch the target film 11 not only ensures the etching rate of the target film 11, but also improves the etching selectivity of the target film 11 to the oxide layer 12. This ensures that the surface oxide layer 12 is not etched while the sidewall target film 11 is completely removed.

[0067] Similarly, the flow rate of the etching gas in the process gas of the etching step can be set to 50-200 sccm, the flow rate of the dilution gas can be set to 100-200 sccm, and the flow rate of the protective gas can be set to 200-300 sccm. The etching gas can be Cl2, BCl3, or other gases; the dilution gas can be He, Ar, or other gases, which can assist in ignition; the protective gas can be N2 or other gases. Using the process gas with this combination and flow rate to etch the target film 11 can not only ensure the etching rate of the target film 11, but also improve the etching selectivity of the target film 11 to the oxide layer. It can complete the etching of the target film 11 (e.g., TiN film) while ensuring that the oxide layer is not etched.

[0068] Furthermore, the proportion of etching gas in the process gas of the main etching step can be set to 30%–50%, the proportion of dilution gas to 10%–20%, and the proportion of protective gas to 30%–50%. Under these proportions, good etching effect can be obtained.

[0069] Optionally, in the main etching step and the over-etching step, the temperature of the electrostatic chuck (ESC temperature) is set to 50-80°C. On the one hand, the ESC temperature is not too high, which would cause the selectivity of the target film layer 11 to the oxide layer to be too low. Thus, after the target film layer 11 is etched, the surface oxide layer 12 is less likely to be lost. On the other hand, the ESC temperature is not too low, which would cause the etching rate of the target film layer 11 to be too slow. Thus, a higher etching rate can be obtained.

[0070] The composition of the target film 11 can be any one of TiN, TaO, TaN, HfO2 and TiAl.

[0071] Taking TiN as the target film 11, SiO2 as the oxide layer, and Cl2 as the etching gas as an example, Cl2 has a good etching effect on TiN. Since the bond energy of Si-O is greater than that of Si-Cl, the etching rate of SiO2 by Cl2 is low. Thus, a high etching selectivity of the target film 11 to the oxide layer can be obtained.

[0072] Before the main etching step, the method provided in this embodiment may further include a transfer step, in which process gas is introduced into the process chamber to assist the main etching step in stable ignition and prevent unstable ignition under high voltage and high RF power conditions. The composition and proportion of the process gas in the transfer step are consistent with those in the main etching step.

[0073] The aforementioned transfer step can be performed in two steps, namely the first transfer step (transfer1) and the second transfer step (transfer2). Optionally, the gas pressure in the first transfer step is set to be lower than the gas pressure in the second transfer step, and the gas pressure in the second transfer step is set to be lower than the gas pressure in the main etching step. In this way, the gas pressure can be gradually increased to the gas pressure required for the main etching step. Optionally, the upper radio frequency power in the first transfer step and the upper radio frequency power in the second transfer step are both set to be consistent with the upper radio frequency power in the main etching step, so that the environmental parameters in the process chamber can be smoothly adjusted from the standby state to the stable conditions required for etching, ensuring the smooth start of the main etching step.

[0074] Specifically, the gas pressure in the first transfer step can be set to 50-70 mT, preferably 55-65 mT, and more preferably 58-62 mT. The gas pressure in the second transfer step can be set to 150-250 mT, preferably 170-230 mT, more preferably 190-210 mT, and even more preferably 200 mT.

[0075] The up-RF power in the first and second transfer steps can be set to 1200–1600W, and the process duration can be set to 2–4s to ensure successful start-up of the main etching step. The process duration is preferably 2.5–3.5s, more preferably 2.8–3.2s, and even more preferably 3s.

[0076] In one embodiment, the above deposition step includes: introducing a C-containing gas into the process chamber to deposit a self-masking layer 13 with C as the main component on the surface of the surface oxide layer 12, which can achieve the protection of the surface oxide layer 12.

[0077] In the deposition step, the flow rate of the C-containing gas can be set to 100–300 sccm, preferably 150–250 sccm, and more preferably 180–220 sccm; the gas pressure can be set to 10–30 mT, preferably 15–25 mT, and more preferably 18–22 mT; the temperature of the electrostatic chuck can be set to 40–60°C, preferably 45–55°C, and more preferably 48–52°C; the upper RF power can be set to 800–1200 W, preferably 900–1100 W, and more preferably 950–1050 W; and the process duration can be set to 30–60 s, preferably 35–55 s, and more preferably 40–50 s. This will result in a self-masking layer 13 of suitable thickness, which can effectively protect the surface oxide layer 12.

[0078] Specifically, CH4 can be used as the aforementioned C-containing gas.

[0079] After the etching step, the method provided in this embodiment further includes a flushing step to clean the deep trench structure 100, thereby removing residual self-masking layer 13 and deposits on the surface of the deep trench structure 100, thus obtaining a clean deep trench structure 100 with the desired structure. Figure 3e As shown.

[0080] The cleaning step described above may specifically include: introducing cleaning gas into the process chamber at a pressure of 20–50 mT, with an upper RF power of 800–1200 W and a lower RF power of zero; wherein the cleaning gas includes one or both of O2 and N2. This can achieve excellent cleaning results.

[0081] After etching the TiN film using the above method, the morphology of the full-ring gate structure is as follows: Figure 3e As shown, it can be seen that the method provided by the present invention can not only etch away the TiN film layer of the full-ring gate structure, but also etch away a part of the TiN in the trench, and ensure that the surface SiO2 is not damaged. The etching selectivity of TiN to SiO2 is greater than 100, which is greater than the etching selectivity of 40 that prevents SiO2 from being damaged, and a very good morphology can be obtained.

[0082] Figure 4 This is a schematic flowchart of a semiconductor film etching method according to one embodiment of the present invention. The method includes:

[0083] S201, first transfer step transfer1;

[0084] S202, second transfer step transfer2;

[0085] S203, main etching step ME;

[0086] S204, deposition step dep;

[0087] S205, OE (Operational Etching) step;

[0088] S206, flush step.

[0089] Figure 5 A semiconductor process apparatus provided in one embodiment of the present invention includes a process chamber 20, an inlet assembly 20A, an upper electrode assembly 20B, a lower electrode assembly 20C, and a controller. Figure 5 (As shown). The controller includes at least one processor and at least one memory, in which a computer program is stored, which, when executed by the processor, implements the method of any of the above embodiments.

[0090] For example, the controller can be a host computer or a slave computer. The controller can open the valve of the air inlet assembly 20A to introduce the corresponding process gas into the process chamber 20; the controller can also control the flow rate of the process gas by controlling the opening and closing degree of the valve of the air inlet assembly 20A. The controller can also control the evacuation assembly 20D to evacuate the process chamber 20, thereby controlling the gas pressure inside the process chamber 20 and removing reaction byproducts.

[0091] The upper electrode assembly 20B includes an RF coil 21, an upper RF power supply 23, and an upper matching unit 25. The controller is also used to control the upper RF power supply 23 to provide upper electrode power to the RF coil 21 through the upper matching unit 25, so that the RF coil 21 excites the process gas inside the process chamber 20 to generate plasma.

[0092] The lower electrode assembly 20C includes a wafer carrier 22, a lower RF power supply 24, and a lower matching unit 26. The controller further controls the lower RF power supply 24 to provide lower electrode power to the lower electrode of the wafer carrier 22 through the lower matching unit 26, thereby providing an RF bias voltage to the lower electrode of the wafer carrier 22 to adsorb plasma above the target film layer 11 and bombard the target film layer 11. The wafer carrier 22 includes an electrostatic chuck.

[0093] The semiconductor process equipment 200 in this application embodiment can be an inductively coupled plasma (ICP) etching device or a capacitively coupled plasma (CCP) etching device. This application embodiment does not limit the type of semiconductor process equipment 200.

[0094] The semiconductor process equipment provided in this embodiment of the invention has the same technical features as the semiconductor film etching method provided in the above embodiment, so it can also solve the same technical problems and achieve the same technical effects.

[0095] This embodiment also provides a machine-readable storage medium storing machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions cause the processor to implement the above-mentioned etching method for the semiconductor film layer.

[0096] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the above-described equipment and apparatus can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0097] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0098] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An etching method of a semiconductor film layer for etching a target film layer attached to a surface layer and an inner wall of a deep trench structure, characterized by, The method comprises: a main etching step of introducing a process gas into a process chamber and exciting a plasma to etch the target film layer attached to the surface layer and the upper part of the inner wall of the deep trench structure; a deposition step of depositing a self-masking layer on the surface of the surface layer oxide layer of the deep trench structure; an over-etching step of introducing a process gas into the process chamber and exciting a plasma to etch the target film layer attached to the lower part of the inner wall of the deep trench structure; In the main etching step, the upper radio frequency power ranges from 1200 to 1600 W, the lower radio frequency power is equal to zero, and the gas pressure is 300-500 mT; in the over-etching step, the upper radio frequency power is 600-1000 W, the lower radio frequency power is 40-100 W, the gas pressure is 50-80 mT, the pulse frequency of the lower radio frequency power is 200-500 Hz, and the duty cycle is 20%-50%.

2. The method of claim 1, wherein In the main etching step, the upper radio frequency power is in a high-selectivity film removal mode.

3. The method of claim 1, wherein the semiconductor film layer is a silicon film layer. In the main etching step, the flow rate of the etching gas is 300-500 sccm, the flow rate of the dilution gas is 100-200 sccm, and the flow rate of the protective gas is 300-500 sccm. In the over-etching step, the flow rate of the etching gas is 50-200 sccm, the flow rate of the dilution gas is 100-200 sccm, and the flow rate of the protective gas is 200-300 sccm. The etching gas comprises Cl2 or BCl3, the dilution gas comprises He or Ar, and the protective gas comprises N2.

4. The method of claim 3, wherein the semiconductor film layer is a silicon film layer. In the main etching step, the proportion of the etching gas is 30%-50%, the proportion of the dilution gas is 10%-20%, and the proportion of the protective gas is 30%-50%.

5. The method of claim 1, wherein the semiconductor film layer is a silicon film layer. In the main etching step and the over-etching step, the temperature of the electrostatic chuck is 50-80℃.

6. The method of claim 1, wherein the semiconductor film layer is a silicon film layer. The target film layer comprises any one of TiN, TaO, TaN, HfO2 and TiAl.

7. The method of claim 1, wherein the semiconductor film layer is a silicon film layer. Before the main etching step, the method further comprises: a transfer step of introducing a process gas into the process chamber to assist the main etching step in stabilizing the ignition.

8. The method of claim 7, wherein the semiconductor film layer is a silicon film layer. The transfer step comprises a first transfer step and a second transfer step. The gas pressure in the first transfer step is lower than the gas pressure in the second transfer step, which is lower than the gas pressure in the main etching step, and / or the upper radio frequency power in the first transfer step and the upper radio frequency power in the second transfer step are consistent with the upper radio frequency power in the main etching step.

9. The method of claim 8, wherein the semiconductor film layer is a silicon film layer. The gas pressure in the first transfer step is 50-70 mT, and the gas pressure in the second transfer step is 150-250 mT. In the first transfer step and the second transfer step, the upper radio frequency power is 1200-1600 W, and the process time is 2-4 s.

10. The method of claim 1, wherein the semiconductor film layer is a silicon film layer. The deposition step comprises: introducing a C-containing gas into the process chamber to deposit a self-masking layer mainly composed of C on the surface of the surface layer oxide layer.

11. The method of claim 10, wherein the semiconductor film layer is etched by a dry etching method. In the depositing step, the flow rate of the C-containing gas is 100-300 sccm, and / or the gas pressure is 10-30 mT, and / or the temperature of the electrostatic chuck is 40-60 ℃, and / or the upper radio frequency power is 800-1200 W, and / or the process time is 30-60 s. And / or the C-containing gas comprises CH4.

12. The method according to any one of claims 1 to 11, wherein After the over-etching step, the method further comprises: A cleaning step of cleaning the deep trench structure to remove the remaining self-masking layer and the attachments on the surface of the deep trench structure.

13. The method of claim 12, wherein the semiconductor film layer is etched by a dry etching method. The cleaning step comprises: Introducing a cleaning gas into the process chamber, the gas pressure being 20-50 mT, the upper radio frequency power being 800-1200 W, and the lower radio frequency power being zero; wherein the cleaning gas comprises O2 and / or N2.

14. A semiconductor process apparatus comprising a process chamber, a gas inlet assembly, an upper electrode assembly, a lower electrode assembly, and a controller, wherein, The controller comprises at least one processor and at least one memory, the memory storing a computer program which, when executed by the processor, implements the etching method of the semiconductor film layer according to any one of claims 1-13.

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