Timing synchronization method based on frequency division multiplexing communication and application

Abstract

The invention discloses a timing synchronization method and application based on frequency division multiplexing communication, and relates to the technical field of radio communication, the method comprises the following steps: designing a lead code composed of m ZC sequences with the length of N, the length of the lead code being equal to the length of an OFDM symbol; adding the lead code to a frame header of each frame of transmission data, and inputting the transmission data into a correlator to perform correlation operation with the ZC sequence to obtain a correlation value signal; accumulating the m correlation value signals at an interval of N to obtain an accumulated value sequence; and detecting a continuous correlation peak value of the accumulated value sequence, and calculating a frame header synchronization position for receiving the transmission data according to a detection result. Reliable synchronization can be realized at a low signal-to-noise ratio, and the influence of direct current offset and carrier frequency offset on synchronization is overcome.

Description

Technical Field

[0001] The present application relates to the field of radio communication technology, and in particular to a timing synchronization method, device, electronic device, and computer-readable storage medium based on frequency division multiplexing communication. Background Art

[0002] In OFDM-based wireless communication systems, it is difficult to reliably recover transmitted data without precise timing synchronization. Timing synchronization plays a vital role in system design.

[0003] Currently, the main timing synchronization methods in OFDM systems include those based on cyclic prefixes and those that achieve timing synchronization by adding pilot signals. Cyclic prefix-based synchronization methods suffer from fuzzy correlation peaks, place high demands on cyclic prefix length and signal-to-noise ratio, and are sensitive to signal size. Preamble-based synchronization methods, including the Moose algorithm, Schmidt & Cox algorithm, Minn algorithm, and Park algorithm, also perform poorly at low signal-to-noise ratios, suffer from fuzzy correlation peaks, are affected by DC bias and frequency offset, have large processing delays, are computationally complex, and consume significant hardware resources.

[0004] Therefore, it is an urgent problem to provide a timing synchronization method suitable for OFDM communication systems that overcomes the high signal-to-noise ratio requirements, correlation peak ambiguity, DC offset or carrier frequency offset of existing synchronization methods. Summary of the Invention

[0005] In order to overcome the defects of the above-mentioned prior art, an embodiment of the present invention provides a timing synchronization method and application based on frequency division multiplexing communication, which can not only achieve reliable synchronization under low signal-to-noise ratio, but also overcome the influence of DC bias and carrier frequency deviation on synchronization.

[0006] On the one hand, the embodiment of the present invention proposes a timing synchronization method based on frequency division multiplexing communication, including: designing a timing synchronization method consisting of m lengths N The preamble is composed of a ZC sequence, the length of the preamble is equal to the length of the OFDM symbol; the preamble is added to the frame header of each frame of transmission data, and the transmission data is input into the correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; m correlation value signals are spaced at intervals N Accumulation is performed to obtain an accumulated value sequence; continuous correlation peaks of the accumulated value sequence are detected, and a frame header synchronization position of the received transmission data is calculated according to the detection result.

[0007] In one embodiment of the present invention, each of the data frames consists of a preamble and x OFDM symbols and a cyclic prefix CP, the preamble consists ofm The length is N The same ZC sequence composition, m and N satisfy ,in is the length of the OFDM symbol.

[0008] In one embodiment of the present invention, the first n A sample is represented as: ;in, L is the number of channel paths, It is l The delay of the channel path, d is the integer timing offset, f is the normalized frequency deviation, This is a sample of AWGN.

[0009] In one embodiment of the present invention, the ZC sequence is expressed as: ;in, N is the length of the ZC sequence, is an integer and , q is any integer, u is with N Coprime positive integers.

[0010] In one embodiment of the present invention, the transmission data r ( n ) is correlated with the ZC sequence as follows: ;in, Indicates the samples, N is the length of the ZC sequence, is an integer and , Represents a ZC sequence The conjugation of .

[0011] In one embodiment of the present invention, the calculation formula of the cumulative value sequence is expressed as: ;in, , represents the number of ZC sequences, The intervals between the correlation peaks are the same and equal to the ZC sequence length N .

[0012] In one embodiment of the present invention, the step of calculating the frame header synchronization position of the received transmission data according to the detection result includes: setting a period of N Correlation window, record the position of the correlation peak relative to the window starting point in each correlation window MaxPosand its peak PeakValue , and the peak value of the previous correlation window PeakValueBefore ; If the current related window MaxPos Related to the previous window MaxPosBefore If the parameters are the same, MaxPosTimes Add 1, otherwise set it to 0; if MaxPosTimes Greater than the threshold for detecting correlation peaks Threshold ,and PeakValue Less than PeakValueBefore , then the received signal is synchronized successfully, and the distance between the synchronization point and the frame header is calculated as .

[0013] On the other hand, the embodiment of the present invention also proposes a timing synchronization device based on frequency division multiplexing communication, including: a preamble design module for designing a preamble consisting of m lengths of N The preamble is composed of a ZC sequence, the length of the preamble is equal to the length of the OFDM symbol; a correlation operation module is used to add the preamble to the frame header of each frame of transmission data, and input the transmission data into a correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; a signal accumulation module is used to accumulate m correlation value signals at intervals of N Accumulation is performed to obtain an accumulated value sequence; a synchronization position calculation module is used to detect continuous correlation peaks of the accumulated value sequence and calculate the frame header synchronization position of the received transmission data based on the detection result.

[0014] On the other hand, an embodiment of the present invention further proposes an electronic device, comprising: a memory and one or more processors connected to the memory, the memory storing a computer program, and the processor being used to execute the computer program to implement the timing synchronization method based on frequency division multiplexing communication as described in any one of the above embodiments.

[0015] On the other hand, an embodiment of the present invention further proposes a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are used to execute the timing synchronization method based on frequency division multiplexing communication as described in any one of the above embodiments.

[0016] As can be seen from the above, the above embodiments of the present invention can have at least one or more of the following beneficial effects compared with the prior art: The timing synchronization method based on frequency division multiplexing communication proposed in the present invention adopts the CAZAC sequence to design the synchronization preamble, correlates the received signal with the local sequence at the receiving end, and determines the exact position of the frame header by detecting the correlation peak, thereby achieving timing synchronization to solve the problem of limited hardware computing resources. It can not only achieve reliable synchronization under low signal-to-noise ratio, but also overcome the influence of DC bias and carrier frequency offset on synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings: Figure 1 A flowchart of a timing synchronization method based on frequency division multiplexing communication provided by an embodiment of the present invention; Figure 2 A schematic diagram of a general model of an OFDM system provided in an embodiment of the present invention; Figure 3 A schematic diagram of a new preamble structure based on a ZC sequence provided in an embodiment of the present invention; Figure 4 A schematic diagram of timing synchronization logic provided by an embodiment of the present invention; Figure 5 The embodiment of the present invention provides Schematic diagram of the amplitude change; Figure 6 A flow chart of the synchronization algorithm provided by an embodiment of the present invention; Figure 7 The synchronization algorithm provided by the embodiment of the present invention is different m and N Schematic diagram of the correct timing probability under ; Figure 8 A schematic structural diagram of a timing synchronization device based on frequency division multiplexing communication provided by an embodiment of the present invention; Figure 9 A schematic structural diagram of an electronic device provided by an embodiment of the present invention; Figure 10 A schematic structural diagram of a computer-readable storage medium provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0018] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments of the present invention can be combined with each other. The present invention will be described below with reference to the accompanying drawings and in combination with the embodiments.

[0019] In order to enable ordinary technicians in this field to better understand the technical solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments, and all should fall within the scope of protection of the present invention.

[0020] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are applicable to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or that are proprietary to these processes, methods, products or apparatuses.

[0021] It should also be noted that the division of multiple embodiments in the present invention is only for the convenience of description and should not constitute a special limitation. The features in various embodiments can be combined and referenced to each other without contradiction.

[0022] like Figure 1 As shown, the first embodiment of the present invention proposes a timing synchronization method based on frequency division multiplexing communication, for example, including: step S1, designing m The length is N The length of the preamble is equal to the length of the OFDM symbol; Step S2, adding the preamble to the frame header of each frame of transmission data, and inputting the transmission data into the correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; Step S3, m The correlation value signals are spaced at intervals of N Accumulation is performed to obtain an accumulated value sequence; step S4, detecting continuous correlation peaks of the accumulated value sequence, and calculating the frame header synchronization position of the received transmission data based on the detection result.

[0023] Specifically, in step S1, consider a general model of an OFDM system, such as Figure 2 As shown, the baseband signal transmitted in the time domain n A sample can be described as: (1) in It is the number of inverse fast Fourier transform (IFFT) points, which also represents the total number of subcarriers. is the number of effective subcarriers, , It is v modulated data samples on subcarriers, v is an integer and .

[0024] In order to prevent ISI from destroying the orthogonality between subcarriers, we usually place the last A copy of the length samples is placed at the head of the time domain symbol as a cyclic prefix (CP).

[0025] In one embodiment, the receiving end receives the first n The samples are: (2) in, L is the number of channel paths, It is l The delay of the channel path, d is the integer timing offset, f is the normalized frequency deviation, is a sample of AWGN, Represents the baseband signal transmitted in the time domain samples, Indicates the l The impulse response of the channel path.

[0026] CAZAC sequences have many excellent properties, including constant amplitude, ideal periodic autocorrelation, good cross-correlation, and low PMEPR. Furthermore, they remain CAZAC sequences after Fourier transform and inverse Fourier transform. Therefore, CAZAC sequences are often used as training sequences for timing synchronization.

[0027] The most commonly used CAZAC sequences include the ZC sequence, Frank sequence, Golomb multiphase sequence, and GCL (generalized chirp-like) sequence. Among them, the ZC sequence is the most widely used.

[0028] In one embodiment, the ZC sequence can be described as: (3) in, N is the length of the ZC sequence, is an integer and , q is any integer, u is with N Coprime positive integers.

[0029] set up The length is The ZC sequence is defined as formula (3), where t and y is any positive integer, then the GCL sequence is defined as: (4) Among them,z express ,but is included y A sequence of complex numbers whose absolute value is equal to 1, ( k ) mod y Represents an index k right y Here, when and When , the ZC sequence is exactly the GCL sequence.

[0030] The CAZAC sequence has better autocorrelation and cross-correlation characteristics than the traditional PN sequence. In one embodiment, the autocorrelation function (ACF) of the CAZAC sequence can be expressed as: (5) in, The period is N The CAZAC sequence, represents the conjugation operation.

[0031] In actual communication systems, a preamble is usually added before each frame of data. At the receiving end, the received signal is correlated with the local sequence, and the exact position of the frame header is determined by detecting the correlation peak. PN sequences are usually used as preambles. CAZAC sequences have better autocorrelation and cross-correlation characteristics than traditional PN sequences. As can be seen from Equation (5), the correlation peak is proportional to the length of the CAZAC sequence; therefore, longer preambles make it easier to detect the frame header. On the other hand, the presence of CFO affects the performance of correlation peak detection. The longer the preamble, the greater the impact of CFO; therefore, the shorter the preamble, the better.

[0032] In order to ensure the performance of correlation peak detection while reducing the impact of CFO, a new preamble based on ZC sequence is proposed. The structure of the new preamble is as follows: Figure 3 shown.

[0033] from Figure 3 It can be seen that a data frame consists of a preamble and x OFDM symbols (including CP). The preamble consists of m The length is N The same ZC sequence composition, m and N satisfy ,in is the length of the OFDM symbol.

[0034] This embodiment proposes a new timing synchronization method based on the new synchronization preamble, which utilizes the ideal correlation characteristics of the ZC sequence. Figure 4 As shown, the proposed method consists of two stages. In the first stage, the ZC sequence constituting the preamble is used as the coefficient of the correlator, and then the received signal The input is correlator, correlated with the ZC sequence, and finally the correlation value signal is output. Used for synchronization detection.

[0035] In step S2, the correlator outputs a signal Is the receiving signal The results related to the ZC sequence can be described as: (6) Among them, the received signal As shown in formula (2), the ZC sequence As shown in formula (3), Indicates the samples, N is the length of the ZC sequence, is an integer and , Represents a ZC sequence The conjugation of .

[0036] Then, in step S3, m Correlation values ​​are spaced N Accumulate and get , which can be described as: (7) in, , Indicates the number of ZC sequences.

[0037] The operation period of the correlator is the length of the ZC sequence in the preamble N , an operation cycle is called a correlation window. As the correlator continuously outputs signals, it can be detected At the same time, the intervals between these correlation peaks are the same and equal to the ZC sequence length N The positions of these correlation peaks relative to the start of the corresponding correlation window are MaxPos .

[0038] In step S4, by detecting The peak value of the synchrotron is obtained.

[0039] The amplitude changes as Figure 5 As shown. Figure 5 It can be seen that The peak value first increases and then decreases. If the position of the maximum correlation peak can be found, the position of the frame header can be calculated accordingly. The synchronization algorithm process is as follows: a. Receiving signal Perform correlation operations with the ZC sequence to obtain correlation values ; b. m Correlation values ​​are spaced N Accumulate and get ; c. Set a period of N The relevant window of Counter ( ) represents the relative position of each point in the correlation window, and records the relative position of the correlation peak in each correlation window MaxPos and its peak value (denoted as PeakValue ), and the peak value of the previous correlation window (denoted as PeakValueBefore ); d. If the current related window MaxPos Related to the previous window MaxPosBefore If the parameters are the same, MaxPosTimes Add 1; otherwise, set it to 0; e. If MaxPosTimes Greater than Threshold ,and PeakValue Less than PeakValueBefore , the received signal synchronization is successful. Parameters Threshold is the threshold of the detected correlation peak, and its value varies with the number of ZC sequences. m Then, according to MaxPos Calculate the frame header position of the received signal. The distance between the synchronization point and the frame header can be easily calculated as .

[0040] The flowchart of the synchronization algorithm is as follows Figure 6 shown.

[0041] The present invention is further described in detail below with reference to specific examples, but these examples should not be construed as limiting the present invention. Figure 2 The main system parameters of the OFDM system shown in Table 1 are as follows.

[0042] Table 1 Simulation system parameters

[0043] according to Figure 3 Design a synchronous preamble. There are two important parameters in preamble design: the number of ZC sequences contained in the preamble code m and length N ,and m andN satisfy From Table 1 we can see ,make ,So , then the steps of the synchronization algorithm are as follows: 1) Initialization First, initialize the following variables: Counter : Correlation window count value, which is increased by 1 each time a data is received, and the cycle is from 1 to 512, and is initialized to 1; PeakValue : Correlation peak, initialized to 0; MaxPos : The Counter value corresponding to the correlation peak is initialized to 0; MaxPosTimes : The number of times the continuous correlation window obtains the correlation peak at the same position, initialized to 0; PeakValueBefore 、 MaxPosBefore : The correlation peak value and its position of the previous correlation window are initialized to 0; 2) Take 512 as a segment and calculate each time Value, relative window position Counter Add 1 until Counter Equal to 512, and calculate the correlation peak of this correlation window PeakValue , and the location of the correlation peak MaxPos ; 3) When the relevant window position Counter When counting to 512, if MaxPos= MaxPosBefore ,but MaxPosTimes = MaxPosTimes +1, go to step 4; otherwise, MaxPosTimes =0, MaxPosBefore = MaxPos , PeakValueBefore = PeakValue , return to step 2; 4) If MaxPosTimes >3 and PeakValue < PeakValueBefore , then the judgment is synchronous, according to MaxPos Calculate the signal frame header position; otherwise, MaxPosBefore = MaxPos , PeakValueBefore = PeakValue , return to step 2.

[0044] The following simulations show different m and N Impact on the performance of synchronization algorithms. Synchronization algorithms are different m and N The correct timing probability under Figure 7shown.

[0045] from Figure 7 It can be seen that, in general, the synchronization accuracy of the synchronization algorithm improves with the increase of the signal-to-noise ratio. N This is because as N As the SNR decreases, the amplitude of the correlation peak also decreases. At low SNRs, the correlation peak is drowned out by the noise and is therefore more difficult to detect. However, when the SNR increases above -2 dB, the correlation peak m and N There is no difference in synchronization accuracy, and all synchronization accuracy values ​​reach 100%. This is because the correlation peak becomes more prominent as the signal-to-noise ratio increases. Therefore, in the case of high signal-to-noise ratio, the synchronization accuracy is not affected by m and N The impact of changes.

[0046] In summary, the first embodiment of the present invention proposes a timing synchronization method based on frequency division multiplexing communication, which uses a CAZAC sequence to design a synchronization preamble, correlates the received signal with the local sequence at the receiving end, and determines the exact position of the frame header by detecting the correlation peak, thereby achieving timing synchronization to solve the problem of limited hardware computing resources. It can not only achieve reliable synchronization under low signal-to-noise ratio, but also overcome the influence of DC bias and carrier frequency offset on synchronization.

[0047] In addition, if Figure 8 As shown, the second embodiment of the present invention further proposes a timing synchronization device 20 based on frequency division multiplexing communication, for example, including: a preamble design module 201, a related operation module 202, a signal accumulation module 203 and a synchronization position calculation module 204.

[0048] The leading design module 201 is used to design a sequence of m lengths. N The preamble code is composed of a ZC sequence, and the length of the preamble code is equal to the length of the OFDM symbol; the correlation operation module 202 is used to add the preamble code before each frame of transmission data, receive the transmission data and input the correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; the signal accumulation module 203 is used to accumulate the m correlation value signals at intervals N Accumulation is performed to obtain an accumulated value sequence; the synchronization position calculation module 204 is used to detect the continuous correlation peaks of the accumulated value sequence, and calculate the frame header synchronization position of the received transmission data according to the detection result.

[0049] The timing synchronization method based on frequency division multiplexing communication implemented by the timing synchronization device based on frequency division multiplexing communication disclosed in the second embodiment of the present invention is as described in the first embodiment above, and therefore will not be described in detail here. Optionally, the various modules and the above-mentioned other operations or functions in the second embodiment are respectively for implementing the method described in the first embodiment, and the beneficial effects of the timing synchronization device based on frequency division multiplexing communication provided by this embodiment are the same as the beneficial effects of the timing synchronization method based on frequency division multiplexing communication provided by the first embodiment above. For the sake of brevity, they are not described here.

[0050] like Figure 9 As shown, the third embodiment of the present invention further proposes an electronic device 30, for example, including: at least one processor 31, and at least one memory 32, wherein the memory stores a computer program, and when the computer program is executed by the processing unit, the processing unit executes the method as described in the first embodiment, and the beneficial effects of the electronic device provided by this embodiment are the same as the beneficial effects of the timing synchronization method based on frequency division multiplexing communication provided by the first embodiment.

[0051] like Figure 10 As shown, the fourth embodiment of the present invention also provides a computer-readable storage medium 40, on which a computer program is stored, which implements the steps of the above method when executed by a processor, and the beneficial effects of the computer-readable storage medium provided by this embodiment are the same as the beneficial effects of the timing synchronization method based on frequency division multiplexing communication provided by the first embodiment.

[0052] Among them, computer-readable storage media may include, but are not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.

[0053] It should be noted that for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0054] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0055] In the several embodiments provided in this application, it should be understood that the disclosed devices can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some service interface, and the indirect coupling or communication connection of the device or unit can be electrical or other forms.

[0056] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0057] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0058] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a memory and includes a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, magnetic disk, or optical disk, etc., various media that can store program code.

[0059] Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be completed by instructing related hardware through a program. The program may be stored in a computer-readable memory, which may include a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0060] The above is only an exemplary embodiment of the present disclosure and cannot be used to limit the scope of the present disclosure. That is, any equivalent changes and modifications made according to the teachings of the present disclosure are still within the scope of the present disclosure. After considering the specification and practicing the disclosure herein, those skilled in the art will easily think of the implementation scheme of the present disclosure. This application is intended to cover any variation, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary technical means in the art that are not recorded in the present disclosure. The description and examples are to be regarded as exemplary only, and the scope and spirit of the present disclosure are defined by the claims.

[0061] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0062] It will be easily understood by those skilled in the art that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A timing synchronization method based on frequency division multiplexing communication, characterized in that: include: The design consists of m pieces of length N A preamble consisting of a ZC sequence, wherein the length of the preamble is equal to the length of the OFDM symbol; Adding the preamble to the frame header of each frame of transmission data, and inputting the transmission data into a correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; The m correlation value signals are spaced N Perform accumulation to obtain a cumulative value sequence; Detecting continuous correlation peaks of the accumulated value sequence, and calculating a frame header synchronization position of the received transmission data according to the detection result.

2. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: Each of the data frames consists of a preamble and x OFDM symbols and a cyclic prefix CP, the preamble consists of m The length is N The same ZC sequence composition, m and N satisfy ,in is the length of the OFDM symbol.

3. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The transmission data n A sample is represented as: ； in, L is the number of channel paths, It is l The delay of the channel path, d is the integer timing offset, f is the normalized frequency deviation, is a sample of AWGN, Indicates the l The impulse response of the channel path, Represents the baseband signal transmitted in the time domain samples.

4. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The ZC sequence is expressed as: ； in, N is the length of the ZC sequence, is an integer and , q is any integer, u is with N Coprime positive integers.

5. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The transmission data r ( n ) is correlated with the ZC sequence as follows: ； in, Indicates the samples, N is the length of the ZC sequence, is an integer and , Represents a ZC sequence The conjugation of .

6. The timing synchronization method based on frequency division multiplexing communication according to claim 5, characterized in that: The calculation formula of the cumulative value sequence is expressed as: ； in, , represents the number of ZC sequences, The intervals between the correlation peaks are the same and equal to the ZC sequence length N .

7. The timing synchronization method based on frequency division multiplexing communication according to claim 1, characterized in that: The calculating, according to the detection result, the frame header synchronization position of the received transmission data includes: Set a period of N Correlation window, record the position of the correlation peak relative to the window starting point in each correlation window MaxPos and its peak PeakValue , and the peak value of the previous correlation window PeakValueBefore ; If the current related window MaxPos Related to the previous window MaxPosBefore If the parameters are the same, MaxPosTimes Add 1, otherwise set it to 0; if MaxPosTimes Greater than the threshold for detecting correlation peaks Threshold ,and PeakValue Less than PeakValueBefore , then the received signal is synchronized successfully, and the distance between the synchronization point and the frame header is calculated as .

8. A timing synchronization device based on frequency division multiplexing communication, characterized in that: include: The leading design module is used to design a N A preamble consisting of a ZC sequence, wherein the length of the preamble is equal to the length of the OFDM symbol; a correlation operation module, configured to add the preamble to the frame header of each frame of transmission data, and input the transmission data into a correlator to perform a correlation operation with the ZC sequence to obtain a correlation value signal; Signal accumulation module, used to m The correlation value signals are spaced at intervals of N Perform accumulation to obtain a cumulative value sequence; The synchronization position calculation module is used to detect the continuous correlation peaks of the cumulative value sequence and calculate the frame header synchronization position of the received transmission data according to the detection result.

9. An electronic device, characterized in that: include: A memory and one or more processors connected to the memory, the memory storing a computer program, the processor being configured to execute the computer program to implement the timing synchronization method based on frequency division multiplexing communication according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable commands, and the computer-executable commands are used to execute the timing synchronization method based on frequency division multiplexing communication according to any one of claims 1 to 7.

Images