Semiconductor device and preparation method thereof, power module, power conversion circuit and vehicle

Abstract

The invention discloses a semiconductor device and a preparation method thereof, a power module, a power conversion circuit and a vehicle, and relates to the technical field of semiconductors, and the semiconductor device comprises a semiconductor body provided with a first surface and a second surface. The gate structure and the source electrode are arranged on the first surface. And the contact electrode is arranged on one side, far away from the semiconductor body, of the source electrode and is electrically connected with the source electrode. And the protection layer is arranged on one side, far away from the semiconductor body, of the contact electrode. And the insulating layer is arranged on one side, far away from the semiconductor body, of the protective layer. The drain electrode is arranged on the second surface. In the direction perpendicular to the first surface, the insulating layer is provided with a first through contact hole, the protective layer is provided with a second through contact hole, and the first contact hole is communicated with the second contact hole. The protective layer is arranged between the contact electrode and the insulating layer, so that the contact electrode can be protected from being influenced by chemical reagents, physical damage or high temperature in subsequent process steps, and the integrity and the stability of the contact electrode are ensured.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to a semiconductor device and a preparation method thereof, a power module, a power conversion circuit and a vehicle. Background Art

[0002] The packaging requirements of automotive-grade devices place stringent demands on material selection, packaging form, and heat dissipation efficiency. Conventional front-side Al and Al alloy materials may experience adhesion and reliability issues during the wire bonding process, especially when using Cu wire, copper ribbon, and Ag wire. Au has good conductivity and adhesion, but it is a heavy metal and improper handling can easily cause production line contamination. Cu has high electrical and thermal conductivity, but the Cu metallization process is complex and requires increased equipment investment.

[0003] Ag has excellent conductivity and adhesion, and is compatible with existing production lines. Given the high chemical activity of metallic Ag, depositing it immediately after the first layer of Al deposition, or after the passivation layer, would prevent this process from being feasible due to oxidation during the subsequent etching process and PI curing. If the Ag process is placed after all other processes, the thin-film process will result in a high fragmentation rate and the back electrode will be easily scratched. Summary of the Invention

[0004] The present application provides a semiconductor device and a method for manufacturing the same, a power module, a power conversion circuit, and a vehicle, for ensuring the integrity and stability of contact electrodes.

[0005] To achieve the above objectives, the embodiments of the present application provide the following technical solutions:

[0006] An embodiment of the present application provides a semiconductor device, comprising a semiconductor body, the semiconductor body comprising a first surface and a second surface arranged opposite to each other. A gate structure and a source electrode are arranged on the first surface. A contact electrode is arranged on a side of the source electrode away from the semiconductor body and is electrically connected to the source electrode. A protective layer is arranged on a side of the contact electrode away from the semiconductor body. An insulating layer is arranged on a side of the protective layer away from the semiconductor body. A drain electrode is arranged on the second surface. In a direction perpendicular to the first surface, the insulating layer is provided with a first contact hole extending therethrough, and the protective layer is provided with a second contact hole extending therethrough, and the first contact hole is connected to the second contact hole.

[0007] In some embodiments, an outer boundary of an orthographic projection of the first contact hole on the first surface coincides with an outer boundary of an orthographic projection of the second contact hole on the first surface.

[0008] In some embodiments, the material of the protection layer includes a metal material.

[0009] In some embodiments, the material of the contact electrode includes silver, and the material of the protective layer includes at least one of titanium, nickel, or molybdenum.

[0010] In some embodiments, the semiconductor device further includes a passivation layer, which is disposed between the protective layer and the insulating layer; the passivation layer is provided with a penetrating opening along a direction perpendicular to the first surface.

[0011] In some embodiments, the semiconductor device further includes a first adhesion layer and a second adhesion layer, wherein the first adhesion layer and the second adhesion layer are disposed between the source electrode and the contact electrode.

[0012] In an embodiment of the present application, a protective layer is provided on a side of the contact electrode away from the semiconductor body, and an insulating layer is provided on a side of the protective layer away from the semiconductor body. In a direction perpendicular to the first surface, the insulating layer includes a first contact hole extending therethrough, the protective layer includes a second contact hole extending therethrough, and the first contact hole is connected to the second contact hole. In the process of preparing the above-mentioned device, after forming the contact electrode and the protective layer (the protective layer is a whole-surface film layer, and the second contact hole is not patterned to form the second contact hole), in the subsequent process of forming a film layer (such as an insulating layer), the protective layer can protect the contact electrode from the influence of chemical reagents, physical damage or high temperature in subsequent process steps, thereby ensuring the integrity and stability of the contact electrode.

[0013] The insulating layer can protect semiconductor devices from the influence of the external environment, such as preventing pollutants such as moisture and dust from entering the interior of the device.

[0014] On the other hand, an embodiment of the present application also provides a method for preparing a semiconductor device, comprising forming a semiconductor body, the semiconductor body comprising a first surface and a second surface arranged opposite to each other, and forming a gate structure on the first surface. A source electrode is formed on the first surface, and a contact electrode is formed, the contact electrode being located on a side of the source electrode away from the semiconductor body and electrically connected to the source electrode. A protective film and an insulating film are formed on a side of the contact electrode away from the semiconductor body. A first contact hole is formed in the insulating film, and a second contact hole is formed in the protective film, the first contact hole being connected to the second contact hole. A drain electrode is formed on the second surface.

[0015] In some embodiments, after forming the first contact hole, the protective film is etched using the insulating film as a mask to form a second contact hole.

[0016] In some embodiments, after forming the protective film and before forming the insulating film, the preparation method further includes forming a passivation layer on a side of the protective film away from the semiconductor body, and etching the passivation layer to form an opening in the passivation layer, the opening exposing the protective film.

[0017] On the other hand, an embodiment of the present application further provides a power module including a substrate and a semiconductor device as described in any of the above embodiments, wherein the substrate is used to support the semiconductor device.

[0018] In yet another aspect, embodiments of the present application further provide a power conversion circuit configured for one or more of current conversion, voltage conversion, and power factor correction. The power conversion circuit includes a circuit board and a semiconductor device according to any of the aforementioned embodiments, the semiconductor device being electrically connected to the circuit board.

[0019] On the other hand, an embodiment of the present application also provides a vehicle, including a load and a power conversion circuit as described in the above embodiment, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

[0020] The above-mentioned power module, power conversion circuit and vehicle have the same structure and beneficial technical effects as the semiconductor devices provided in some of the above-mentioned embodiments, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0022] Figure 1 A schematic diagram of the structure of a semiconductor device provided in an embodiment of the present application;

[0023] Figure 2 A flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application;

[0024] Figures 3 to 10 A diagram of the steps for preparing a semiconductor device according to an embodiment of the present application;

[0025] Figure 11 A schematic diagram of the structure of the power module provided in an embodiment of the present application;

[0026] Figure 12 A schematic diagram of the structure of a power conversion circuit provided in an embodiment of the present application;

[0027] Figure 13 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the embodiments described are only some embodiments of the present application, not all embodiments. Based on the embodiments provided in this application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0029] Unless the context requires otherwise, throughout the specification and claims, the term "comprising" is to be construed in an open, inclusive sense, that is, meaning "including, but not limited to."

[0030] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0031] When describing some embodiments, the word "connected" and its derivatives may be used. The term "connected" should be understood broadly. For example, "connected" can mean fixed connection, detachable connection, or integration; it can be directly connected or indirectly connected through an intermediate medium. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct physical or electrical contact with each other.

[0032] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0033] It will be understood that when a layer or element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present therebetween.

[0034] Example embodiments are described herein with reference to cross-sectional illustrations that are idealized example drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the example embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the example embodiments.

[0035] Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0036] Based on the packaging requirements of automotive-grade devices, strict requirements are placed on material selection, packaging form, and heat dissipation efficiency. Conventional front-side Al and Al alloy materials may have adhesion and reliability issues during the wire bonding process, especially when using Cu wire or copper tape and Ag wire. Au has good conductivity and adhesion, but it is a heavy metal and improper operation can easily cause production line contamination. Cu has high conductivity and high thermal conductivity, but the Cu metallization process is complex and requires increased equipment investment. Ag has good conductivity and adhesion, and is compatible with existing production lines.

[0037] Given the high chemical activity of metallic Ag, depositing it immediately after the first layer of Al, or after the passivation layer, would prevent this process from being feasible due to oxidation during the subsequent etching process and PI curing. Placing the Ag process after all other processes would result in a high fragmentation rate due to the thin-film operation, and the back electrode would be easily scratched.

[0038] In view of the above problems, the present invention provides a semiconductor device, such as Figure 1 As shown, Figure 1 A schematic structural diagram of a semiconductor device 10 provided in an embodiment of the present application.

[0039] like Figure 1 As shown, the semiconductor device 10 includes a semiconductor body 102, which is configured to be of a first conductivity type and includes a first surface P1 and a second surface P2 disposed opposite each other. The semiconductor device 10 further includes a gate structure 1101, a source 103, a contact electrode 106, a protective layer 107, an insulating layer 109, and a drain 101. The gate structure 110 is disposed on the first surface P1, and the source 103 is disposed on the first surface P1. The contact electrode 106 is disposed on a side of the source 103 away from the semiconductor body 102 and is electrically connected to the source 103. The protective layer 107 is disposed on a side of the contact electrode 106 away from the semiconductor body 102, and the insulating layer 109 is disposed on a side of the protective layer 107 away from the semiconductor body 102. The drain 101 is disposed on the second surface P2. In particular, along a direction Z perpendicular to the first surface P1, the insulating layer 109 includes a first contact hole D1 extending therethrough, and the protective layer 107 includes a second contact hole D2 extending therethrough, the first contact hole D1 being connected to the second contact hole D2. An interlayer dielectric layer 112 is further provided on the side of the gate structure 110 away from the semiconductor body 102. The interlayer dielectric layer 112 covers the gate structure 1101 and is used to isolate and protect the gate structure 1101.

[0040] The semiconductor body 102 also includes a first region 114 set to a first conductivity type and a well region 113 set to a second conductivity type. In the embodiment of the present application, the semiconductor body 102 and the first region 114 are both of the first conductivity type, and the well region 113 is of the second conductivity type. For example, the first conductivity type is N-type and the second conductivity type is P-type. Based on this, the first region 114, the well region 113 and the semiconductor body 102 form an NPN junction. The gate structure 1101, the source 103 and the drain 101 constitute the three electrodes of the semiconductor device 10. By transmitting the turn-on voltage to the gate structure 1101, when the semiconductor device 10 is forward-conducting and the operating current is small, the operating current flows from the source 103 through the first region 114, the well region 113 and the semiconductor body 102 to the drain 101.

[0041] In the embodiment of the present application, a protective layer 107 is disposed on a side of the contact electrode 106 that is away from the semiconductor body 102, and an insulating layer 109 is disposed on a side of the protective layer 107 that is away from the semiconductor body 102. A first contact hole D1 is provided through the insulating layer 109, and a second contact hole D2 is provided through the protective layer 107, perpendicular to the first surface P1. The first contact hole D1 is connected to the second contact hole D2. The contact electrode 106 is electrically connected to an external circuit through the first contact hole D1 and the second contact hole D2.

[0042] During the process of preparing the above-mentioned device, after the contact electrode 106 and the protective layer 107 are formed (the protective layer 107 is a whole-surface film layer, and is not patterned to form the second contact hole D2), in the subsequent process of forming a film layer (such as the insulating layer 109), the protective layer 107 can protect the contact electrode 106 from the influence of chemical reagents, physical damage or high temperature in subsequent process steps, thereby ensuring the integrity and stability of the contact electrode 106.

[0043] Furthermore, the insulating layer 109 can protect the semiconductor device from the external environment, such as preventing pollutants such as moisture and dust from entering the device.

[0044] In some embodiments, the outer boundary of the orthographic projection of the first contact hole D1 on the first surface P1 coincides with the outer boundary of the orthographic projection of the second contact hole D2 on the first surface P1. This design simplifies the manufacturing process because it eliminates the need for precise positioning and alignment of the two contact holes. During photolithography and etching processes, the two contact holes can be more easily formed simultaneously, thereby improving production efficiency and reducing manufacturing costs.

[0045] In some embodiments, the protective layer 107 is made of a metal material. Metal materials can generally be processed and patterned using various processes such as photolithography, etching, and electroplating. This makes the manufacturing process of the protective layer 107 relatively simple and allows for high-precision patterning. Furthermore, the metal material can effectively prevent oxidation of the contact electrode 106.

[0046] In some implementations, the material of contact electrode 106 includes silver. The material of protective layer 107 includes at least one of titanium, nickel, or molybdenum. Using silver as the material for contact electrode 106 can meet the needs of existing production lines and eliminate the need for new equipment, thereby reducing production costs and complexity. Considering production line compatibility and subsequent removal, the material of protective layer 107 can be titanium, nickel, or molybdenum.

[0047] In some embodiments, semiconductor device 10 further includes a passivation layer 108 disposed between protective layer 107 and insulating layer 109. Passivation layer 108 is provided with an opening D3 extending perpendicularly to first surface P1. Passivation layer 108 can provide protection for underlying structures, preventing them from being affected by environmental factors such as moisture and contaminants. It can also serve as an electrical insulating layer, enhancing electrical isolation within the device.

[0048] In some embodiments, semiconductor device 10 further includes a first adhesion layer 104 and a second adhesion layer 105, which are disposed between source electrode 103 and contact electrode 106. The adhesion layers can enhance the bonding force between source electrode 103 and contact electrode 106, ensuring smooth current flow, while also improving the mechanical strength and thermal stability of the device.

[0049] Exemplarily, the material of the first adhesion layer 104 includes metallic titanium, and the material of the second adhesion layer 105 includes metallic nickel.

[0050] On the other hand, the present invention also provides a method for preparing a semiconductor device. Figure 2 As shown, Figure 2 A flow chart of a method for preparing a semiconductor device provided in an embodiment of the present application is provided. Figures 3 to 8 A diagram of the steps for preparing a semiconductor device provided in an embodiment of the present application.

[0051] like Figure 2 As shown, the preparation method includes the following steps S10 to S70:

[0052] Step S10: Figure 3 As shown, a semiconductor body 102 is formed. The semiconductor body 102 is set to a first conductivity type and includes a first surface P1 and a second surface P2 arranged opposite to each other.

[0053] For example, Figure 3 As shown, the conductivity type of the semiconductor body 102 is N-type. On the first surface P1 of the semiconductor body 102, a mask is formed by a photolithography process, an ion implantation area is defined, and P+ ion implantation is performed to form a well region 113. After that, the mask is removed, a mask is formed again by a photolithography process, an ion implantation area is defined, and N+ ion implantation is performed to form a first region 114.

[0054] Step S20 : ​​forming a gate structure 1101 on the first surface P1 .

[0055] For example, Figure 4 As shown, a gate insulating layer 1102 is deposited on the first surface P1 of the semiconductor body 102. This gate insulating layer 1102 serves as an insulating layer between the gate structure 1101 and the semiconductor body 102. A layer of gate material, such as polysilicon or metal, is deposited on the gate insulating layer 1102. The gate material is patterned using a photolithography process to form the gate structure 1101.

[0056] Illustratively, a layer of dielectric material is formed on a side of the gate structure 1101 away from the semiconductor body 102 by sputtering, evaporation, electroplating or chemical vapor deposition (CVD), and is patterned to form the interlayer dielectric layer 112 .

[0057] Step S30 : forming a source 103 on the first surface P1 .

[0058] For example, Figure 5 As shown, a layer of conductive material is formed on the first surface P1 by sputtering, evaporation, electroplating or chemical vapor deposition (CVD) as the source 103. Common source materials include metals such as aluminum, copper, gold, etc. In the embodiment of the present application, the source material is aluminum.

[0059] Step S40 : forming a contact electrode 106 . The contact electrode 106 is located on a side of the source 103 away from the semiconductor body 102 and is electrically connected to the source 103 .

[0060] For example, Figure 6 As shown, a layer of conductive material is formed on the side of the source 103 away from the semiconductor body 102 by sputtering, evaporation, electroplating or chemical vapor deposition (CVD) as a contact electrode 106. In the embodiment of the present application, Ag is used as the material of the contact electrode 106. The contact electrode 106 is electrically connected to the source 103 to ensure that the current can be smoothly transmitted from the source 103 to the external circuit.

[0061] In some embodiments, as Figure 6As shown, before forming the contact electrode 106, a first adhesion layer 104 and a second adhesion layer 105 are formed on the side of the source electrode 103 away from the semiconductor body 102 by sputtering, evaporation, electroplating, or chemical vapor deposition (CVD). The first adhesion layer 104 and the second adhesion layer 105 are disposed between the source electrode 103 and the contact electrode 106. The adhesion layer can enhance the bonding force between the source electrode 103 and the contact electrode 106, ensuring smooth current flow while also improving the mechanical strength and thermal stability of the device. The adhesion layer materials can be titanium or nickel.

[0062] Step S50 : forming a protection film 117 and an insulation film 119 on a side of the contact electrode 106 away from the semiconductor body 102 .

[0063] For example, Figure 7 As shown, a protection film 117 is formed on a side of the contact electrode 106 away from the semiconductor body 102 by sputtering, evaporation, electroplating or chemical vapor deposition (CVD). The material of the protection film 117 can be metal titanium.

[0064] In some embodiments, as Figure 7 As shown, after the protective film 117 is formed, a passivation layer 108 is deposited on the side of the protective film 117 away from the semiconductor body 102. The passivation layer 108 is made of silicon oxide, silicon nitride or a composite structure thereof. The passivation layer 108 can effectively prevent external factors such as water vapor and pollutants from damaging the device. The passivation layer 108 is etched by wet etching or dry etching to form an opening D3, which exposes a portion of the protective film 117. An insulating film 119 is formed on the side of the protective film 117 exposed by the passivation layer 108 and the opening D3 away from the semiconductor body by a CVD or sputtering process. The material of the insulating film 119 is PI (polyimide). The PI insulating film 119 has good insulation, thermal stability and mechanical strength, and can provide additional protection for the device.

[0065] Step S60 : forming a first contact hole D1 in the insulating film 119 and forming a second contact hole D2 in the protective film 117 , wherein the first contact hole D1 is connected to the second contact hole D2 .

[0066] For example, Figure 8 As shown, the material of the insulating film 119 is selectively removed according to the pattern of the photoresist by using wet etching or dry etching technology to form the first contact hole D1 and the insulating layer 109 at the same time. Figure 9 As shown, after forming the first contact hole D1, the insulating layer 109 is used as a mask to etch the protective film 117 to form the second contact hole D2, and at the same time, the protective layer 107 is formed. The first contact hole D1 is connected to the second contact hole D2, exposing the contact electrode 106 so that it can be electrically connected to the external circuit.

[0067] Step S70 : forming a drain 101 on the second surface P2 .

[0068] For example, Figure 10 As shown, mechanical grinding, chemical mechanical polishing (CMP) or etching are used to remove part of the material from the second surface P2 of the semiconductor body 102. One or more layers of metal or alloy such as titanium, nickel, gold, etc. are deposited on the second surface P2 of the thinned semiconductor body 102. These metals or alloys can form good ohmic contact with the semiconductor material. Through heat treatment methods such as annealing, a reaction occurs between the metal or alloy and the semiconductor body 102 to form a stable ohmic contact layer. Using methods such as electroplating, sputtering or evaporation, a layer of gold or other precious metal is deposited on the ohmic contact layer to form a drain 101. The drain 101 is connected to the semiconductor body 102 through the ohmic contact layer, ensuring good current transmission performance.

[0069] In the embodiment of the present application, a protective layer 107 is formed on a side of the contact electrode 106 that is away from the semiconductor body 102, and an insulating layer 109 is formed on a side of the protective layer 107 that is away from the semiconductor body 102. A first contact hole D1 is formed in the insulating layer 109 along a direction perpendicular to the first surface P1, and a second contact hole D2 is formed in the protective layer 107. The first contact hole D1 is connected to the second contact hole D2. The contact electrode 106 is electrically connected to an external circuit through the first contact hole D1 and the second contact hole D2.

[0070] During the preparation of the above-mentioned device, after the contact electrode 106 and the protective film 117 are formed, in the subsequent process of forming a film layer (such as the insulating layer 109), the protective film 117 can protect the contact electrode 106 from the influence of chemical reagents, physical damage or high temperature in subsequent process steps, thereby ensuring the integrity and stability of the contact electrode 106.

[0071] The insulating layer 109 can protect the semiconductor device from the external environment, such as preventing pollutants such as moisture and dust from entering the device.

[0072] On the other hand, an embodiment of the present application further provides a power module, Figure 11 A schematic diagram of the structure of the power module provided in an embodiment of the present application.

[0073] like Figure 11 As shown, the power module 200 includes a substrate 201 and the semiconductor device 10 in any of the above embodiments. The substrate 201 is used to support the semiconductor device 10 .

[0074] Illustratively, the power module 200 can function as a power amplifier, a power converter, a power controller, a power management module, or a power regulator. A power amplifier is used to amplify the power of an electrical signal. A power converter is used to convert electrical energy from one form to another. For example, a power converter can be an AC / DC converter or a DC / DC converter. A power controller is used to control the flow of power. A power management module is used to manage the power supply, ensuring stable and efficient distribution of power to different parts of an electronic device. A power regulator is used to adjust the power output to meet the needs of a specific application.

[0075] On the other hand, an embodiment of the present application further provides a power conversion circuit, Figure 12 A schematic diagram of the structure of the power conversion circuit provided in an embodiment of the present application.

[0076] like Figure 12 As shown, the power conversion circuit 300 includes a circuit board 301 and the semiconductor device 10 in any of the above embodiments. The semiconductor device 10 is electrically connected to the circuit board 301. The power conversion circuit 300 can be used for current conversion, voltage conversion or power factor correction.

[0077] Exemplarily, the power conversion circuit 300 can be used as one of an AC / DC converter, an AC / AC converter, a DC / DC converter, a DC / AC inverter or a power factor correction (PFC) circuit, wherein the AC / DC converter is used to convert alternating current into direct current, the AC / AC converter is used to convert alternating current into alternating current, the DC / DC converter is used to convert direct current into direct current, the DC / AC inverter is used to convert direct current into alternating current, and the power factor correction circuit is used to improve the power factor of the power supply and reduce harmonic pollution of the power grid.

[0078] On the other hand, an embodiment of the present application further provides a vehicle, Figure 13 A schematic diagram of the structure of a vehicle provided in an embodiment of the present application.

[0079] like Figure 13 As shown, the vehicle 400 includes a load 401 and the power conversion circuit 300 in the above embodiment. The power conversion circuit 300 is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power, and then input it into the load 401 to power the load 401.

[0080] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can conceive within the technical scope disclosed in this application should be included within the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A semiconductor device, characterized in that: include: The semiconductor body comprises a first surface and a second surface opposite to each other; a gate structure, disposed on the first surface; a source electrode, disposed on the first surface; a contact electrode, disposed on a side of the source electrode away from the semiconductor body and electrically connected to the source electrode; a protective layer, disposed on a side of the contact electrode away from the semiconductor body; an insulating layer, disposed on a side of the protective layer away from the semiconductor body; a drain electrode, disposed on the second surface; Wherein, along a direction perpendicular to the first surface, the insulating layer is provided with a penetrating first contact hole, the protective layer is provided with a penetrating second contact hole, and the first contact hole is connected to the second contact hole.

2. The semiconductor device according to claim 1, wherein An outer boundary of an orthographic projection of the first contact hole on the first surface coincides with an outer boundary of an orthographic projection of the second contact hole on the first surface.

3. The semiconductor device according to claim 1, wherein The material of the protection layer includes metal material.

4. The semiconductor device according to claim 3, wherein The material of the contact electrode includes silver; The material of the protective layer includes at least one of titanium, nickel or molybdenum.

5. The semiconductor device according to claim 1, wherein The semiconductor device further comprises a passivation layer, wherein the passivation layer is arranged between the protection layer and the insulating layer; The passivation layer is provided with a penetrating opening along a direction perpendicular to the first surface. The semiconductor device according to claim 1 , wherein: The semiconductor device further includes a first adhesion layer and a second adhesion layer, wherein the first adhesion layer and the second adhesion layer are disposed between the source electrode and the contact electrode.

7. A method for preparing a semiconductor device, characterized in that: include: forming a semiconductor body comprising a first surface and a second surface disposed opposite to each other; forming a gate structure on the first surface; forming a source electrode on the first surface; forming a contact electrode, the contact electrode being located on a side of the source electrode away from the semiconductor body and electrically connected to the source electrode; forming a protective film and an insulating film on a side of the contact electrode away from the semiconductor body; forming a first contact hole in the insulating film and forming a second contact hole in the protective film, wherein the first contact hole is connected to the second contact hole; A drain electrode is formed on the second surface.

8. The preparation method according to claim 7, characterized in that After forming the first contact hole, the protection film is etched using the insulating film as a mask to form the second contact hole.

9. The preparation method according to claim 7, characterized in that After forming the protective film and before forming the insulating film, the preparation method further includes: forming a passivation layer, wherein the passivation layer is located on a side of the protective film away from the semiconductor body; The passivation layer is etched to form an opening in the passivation layer, wherein the opening exposes the protection film.

10. A power module, characterized in that: include: At least one semiconductor device according to any one of claims 1 to 6; A substrate is used to support the semiconductor device.

11. A power conversion circuit, characterized in that: The power conversion circuit is used for one or more of current conversion, voltage conversion, and power factor correction; The power conversion circuit includes a circuit board and at least one semiconductor device according to any one of claims 1 to 6, wherein the semiconductor device is electrically connected to the circuit board.

12. A vehicle, characterized in that: include: A load and a power conversion circuit as claimed in claim 11, wherein the power conversion circuit is used to convert AC power into DC power, convert AC power into AC power, convert DC power into DC power, or convert DC power into AC power and then input it into the load.

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