Circuit board insertion loss test method

Abstract

The invention belongs to the technical field of circuit board testing, and discloses a circuit board insertion loss testing method. The circuit board insertion loss test method comprises the following steps: fixing a circuit board, and cutting two ends of the circuit board by taking two ends of a transmission line as a cutting reference so as to expose the two ends of the transmission line; enabling the two probes to be in contact with the two exposed ends of the transmission line, and carrying out the first insertion loss test, so as to obtain a first insertion loss test value S1 of the transmission line with the length of X; continuously cutting the two ends of the circuit board by a set length to shorten the length of the transmission line and expose the two ends of the transmission line to obtain a transmission line with the length of Y; enabling the two probes to be in contact with the two exposed ends of the transmission line with the length of Y, and carrying out a second insertion loss test to obtain a second insertion loss test value S2 of the transmission line with the length of Y; and S3, calculating an insertion loss test value of the transmission line per unit length by adopting a de-embedding algorithm. According to the invention, the insertion loss test precision can be improved, the connection between the probe and the transmission line is convenient, and the test operation is simple.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board testing, and in particular to a circuit board insertion loss testing method. Background Art

[0002] During high-speed PCB production, laminate structure, copper foil roughness, temperature, humidity, and process factors all affect PCB production quality. Therefore, after multiple substrates are laminated, insertion loss testing of the transmission lines on different substrate layers within the PCB board is required to assess the quality of high-speed signal transmission.

[0003] Currently, vias are processed to connect the probes to the transmission lines on different substrate layers for testing. Figure 1 As shown, circuit board 1 is provided with multiple substrate layers, with transmission lines V1 and V2 located on two substrate layers with different numbers of layers, and transmission lines V1 and V2 are of different lengths. When testing transmission line V1, a via hole must be machined downward from position A on the top surface of circuit board 1, extending the via hole to the bottom layer of circuit board 1. The probe connector is then brought into contact with the connection pad, i.e., the test point, on the via hole at position A on the top surface of circuit board 1 to establish contact and conduction with transmission line V1. When testing transmission line V2, a via hole must be machined downward from position B on the top surface of circuit board 1 to extend the via hole to the bottom layer of circuit board 1. The probe connector is then brought into contact with the connection pad, i.e., the test point, on the via hole at position B on the top surface of circuit board 1 to establish contact and conduction with transmission line V2. However, during testing, via stumps can affect test accuracy. To solve this problem, the via stubs are removed through backdrilling. However, due to the influence of the backdrilling depth control accuracy, the actual length of the backdrilled stub cannot be guaranteed to be the same as the backdrilled stub length set during de-embedding. Therefore, the insertion loss of the transmission line cannot be accurately tested, resulting in low test accuracy. Summary of the Invention

[0004] The present invention aims to provide a circuit board insertion loss test method, which can improve the accuracy of transmission line insertion loss testing, and the connection between the probe and the transmission line is more convenient, making the test operation simple and improving the convenience of the insertion loss test operation.

[0005] To achieve this object, the present invention adopts the following technical solutions:

[0006] A circuit board insertion loss testing method, comprising:

[0007] Fixing the circuit board, cutting the two ends of the circuit board with the two ends of the transmission line as a cutting reference to expose the two ends of the transmission line;

[0008] Place two probes in contact with the exposed ends of the transmission line respectively to perform a first insertion loss test, and obtain a first insertion loss test value S1 of the transmission line with a length of X;

[0009] Continue cutting the two ends of the circuit board to a set length, so that the length of the transmission line becomes shorter and both ends are exposed, thereby obtaining the transmission line with a length of Y;

[0010] placing the two probes in contact with the exposed ends of the transmission line of length Y, respectively, to perform a second insertion loss test, and obtaining a second insertion loss test value S2 of the transmission line of length Y;

[0011] The insertion loss test value S3 of the transmission line per unit length is calculated using a de-embedding algorithm. The calculation formula of the insertion loss test value S3 is: S3=(S1-S2) / (XY).

[0012] In some possible embodiments, the circuit board is provided with N substrate layers from top to bottom, where N ≥ 2, and each substrate layer is provided with a group of the transmission lines. The N groups of transmission lines are tested sequentially from long to short, and both ends of the transmission line of the i-th test respectively extend and exceed both ends of the transmission line of the i+1-th test. During the test, after exposing both ends of the transmission line of the i-th test and performing a first insertion loss test on the transmission line of the i-th test, the two ends of the circuit board are continued to be cut with the two ends of the transmission line of the i+1-th test as the cutting reference, while exposing both ends of the transmission line of the i+1-th test, the length of the transmission line of the i-th test is shortened and both ends are exposed, so that a second insertion loss test is performed on the transmission line of the i-th test.

[0013] In some possible implementations, after cutting the two ends of the transmission line tested for the Nth time using the two ends as a cutting reference and performing a second insertion loss test on the transmission line tested for the N-1th time, the transmission line tested for the Nth time is subjected to a first insertion loss test, and then the two ends of the circuit board are cut to a set length, so that the length of the transmission line tested for the Nth time is shortened and the two ends are exposed, so that the transmission line tested for the Nth time is subjected to a second insertion loss test.

[0014] In some possible embodiments, when the two ends of the circuit board are cut with the two ends of the transmission line as the cutting reference, the cutting surface covers the entire end surface of the circuit board; when the circuit board continues to be cut to a set length, the cutting surface covers the entire end surface of the circuit board.

[0015] In some possible implementations, when cutting the two ends of the circuit board with the two ends of the transmission line as a cutting reference, the two ends of the circuit board are cut in a direction perpendicular to the top surface of the circuit board.

[0016] In some possible implementations, when continuing to cut the circuit board to a set length, both ends of the circuit board are cut in a direction perpendicular to the top surface of the circuit board.

[0017] In some possible implementations, when performing the first insertion loss test and the second insertion loss test on the transmission line, the probe is driven to move by a driving mechanism and is brought into contact with the transmission line.

[0018] In some possible embodiments, when performing the first insertion loss test and the second insertion loss test on the transmission line, the two probes are arranged opposite each other and are both connected to the same driving mechanism, and the driving mechanism drives the two probes to move in directions toward or away from each other.

[0019] In some possible implementations, fixing the circuit board includes clamping the circuit board using a clamp.

[0020] In some possible implementations, the clamp includes a driving member and two clamping plates arranged opposite to each other, the driving member can drive the two clamping plates to move relatively closer or farther away, and when the two clamping plates are relatively close to each other, the two clamping plates can clamp the circuit board.

[0021] Beneficial effects of the present invention:

[0022] The present invention provides a circuit board insertion loss test method. By cutting the ends of the circuit board using the ends of the transmission line as a cutting reference, the ends of the transmission line are exposed, facilitating contact and communication between two probes at the exposed ends of the transmission line. This improves the connection convenience between the probes and the transmission line, thereby simplifying the test operation and enhancing the convenience of the insertion loss test operation. Furthermore, after cutting the ends of the circuit board using the ends of the transmission line as a cutting reference and performing a first insertion loss test to obtain a first insertion loss test value S1, the ends of the circuit board are further cut to a set length to shorten the length of the transmission line and expose both ends. A second insertion loss test is performed on the shortened transmission line to obtain a second insertion loss test value S2. An insertion loss test value S3 per unit length of the transmission line is calculated based on the transmission line length, the first insertion loss test value S1, and the second insertion loss test value S2. This eliminates the test loss caused by vias and lands and is not affected by fluctuations in backdrilled stubs. Furthermore, a de-embedding algorithm is used to calculate the insertion loss test value S3, eliminating the influence of the probe connector on the test loss during measurement and improving the accuracy of the insertion loss test. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a top view of a circuit board when testing it using an existing circuit board insertion loss test method;

[0024] Figure 2This is a flow chart of the circuit board insertion loss testing method provided by the present invention;

[0025] Figure 3 This is a front view of the circuit board being cut with both ends of the transmission line L2 as the cutting reference in step S100 of the present invention;

[0026] Figure 4 This is a front view of the step S100 of the present invention in which two probes are respectively brought into contact with the exposed ends of the transmission line L2;

[0027] Figure 5 This is a front view of the process of cutting the two ends of the circuit board using the two ends of the transmission line L3 as a cutting reference in step S200 of the present invention;

[0028] Figure 6 This is a front view of the step S200 of the present invention in which two probes are respectively brought into contact with the exposed ends of a transmission line L2 having a length of Y1;

[0029] Figure 7 This is a front view of the step S300 of the present invention in which two probes are respectively brought into contact with the exposed ends of the transmission line L3.

[0030] In the picture:

[0031] 1. Circuit board; 2. Probe; 3. Clamp. DETAILED DESCRIPTION

[0032] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0033] In the description of the present invention, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention in specific circumstances.

[0034] In the present invention, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0035] In the description of this embodiment, the terms "upper," "lower," "right," and other orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely for ease of description and simplified operation. They do not indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used solely for descriptive purposes and have no special meanings.

[0036] like Figure 2 As shown, the circuit board insertion loss testing method provided by the present invention includes the following steps:

[0037] S1. Fix the circuit board 1 and cut the ends of the transmission line using the ends of the transmission line as a cutting reference to expose the ends of the transmission line. It should be noted that exposing refers to exposing the ends of the transmission line without cutting the ends of the transmission line, or refers to removing part of the structure at the ends of the transmission line to expose the ends of the transmission line.

[0038] Preferably, when cutting the two ends of the circuit board 1 with the two ends of the transmission line as the cutting reference, the two ends of the circuit board 1 are cut in a direction perpendicular to the top surface of the circuit board 1, that is, cutting from the top surface of the circuit board 1 from top to bottom or cutting from the bottom surface of the circuit board 1 from bottom to top. Since the circuit board 1 is a layered structure formed by stacking substrate layers, this cutting method can ensure that the circuit board 1 will not be deformed. Of course, the two ends of the circuit board 1 can also be cut in a direction perpendicular to the side of the circuit board 1. Preferably, the cutting surface covers the entire end surface of the circuit board 1, that is, the cutting tool passes through the entire end surface of the circuit board 1. Such an arrangement can ensure that there is no obstacle when the probe 2 is subsequently connected to the transmission line, making the connection more convenient, and the cutting surface can cover the entire end surface of the circuit board 1 using a simple cutting tool.

[0039] S2, placing two probes 2 in contact with the exposed ends of the transmission line respectively to perform a first insertion loss test, and obtaining a first insertion loss test value S1 of the transmission line with a length of X;

[0040] S3, continue cutting the two ends of the circuit board 1 to a set length, so that the length of the transmission line becomes shorter and the two ends are exposed, thereby obtaining a transmission line with a length of Y;

[0041] Preferably, when continuing to cut the circuit board 1 to a set length, the two ends of the circuit board 1 are cut in a direction perpendicular to the top surface of the circuit board 1, that is, cutting from the top surface of the circuit board 1 from top to bottom or cutting from the bottom surface of the circuit board 1 from bottom to top. Since the circuit board 1 is a layered structure formed by stacking substrate layers, this cutting method can ensure that the circuit board 1 will not be deformed. Of course, when continuing to cut the circuit board 1 to a set length, the two ends of the circuit board 1 can also be cut in a direction perpendicular to the side surface of the circuit board 1. Preferably, the cutting surface covers the entire end surface of the circuit board 1, that is, the cutting tool passes through the entire end surface of the circuit board 1. Such an arrangement can ensure that there is no obstacle when the probe 2 is subsequently connected to the transmission line, making the connection more convenient, and the cutting surface can cover the entire end surface of the circuit board 1 using a simple cutting tool.

[0042] S4. Place two probes 2 in contact with the exposed ends of the transmission line of length Y, respectively, to perform a second insertion loss test, and obtain a second insertion loss test value S2 of the transmission line of length Y;

[0043] S5. Calculate the insertion loss test value S3 of the transmission line per unit length using a de-embedding algorithm. The calculation formula for the insertion loss test value S3 is: S3 = (S1 - S2) / (XY). The de-embedding algorithm is a prior art in the related field and will not be described in detail in this embodiment.

[0044] By cutting the ends of the circuit board 1 using the ends of the transmission line as a cutting reference, the ends of the transmission line are exposed, facilitating contact and connection between the two probes 2 and the exposed ends of the transmission line, thereby improving the connection convenience between the probes 2 and the transmission line, thereby simplifying the test operation and enhancing the convenience of the insertion loss test operation. Furthermore, after cutting the ends of the circuit board 1 using the ends of the transmission line as a cutting reference and performing a first insertion loss test to obtain a first insertion loss test value S1, the ends of the circuit board 1 are further cut to a set length to shorten the length of the transmission line and expose both ends. A second insertion loss test is performed on the shortened transmission line to obtain a second insertion loss test value S2. The insertion loss test value S3 per unit length of the transmission line is calculated based on the transmission line length values ​​X and Y, the first insertion loss test value S1, and the second insertion loss test value S2. This eliminates the loss caused by vias and lands, and is not affected by backdrill stub fluctuations. The de-embedding algorithm is used to calculate the insertion loss test value S3, eliminating the influence of the connector of the probe 2 on the test loss during measurement, thereby improving the insertion loss test accuracy.

[0045] Optionally, during the first and second insertion loss tests on the transmission line, a drive mechanism is used to move probe 2 and bring it into contact with the transmission line. This configuration saves manpower and enables accurate contact between probe 2 and the transmission line, thereby improving test efficiency. Specifically, during the first and second insertion loss tests on the transmission line, two probes 2 are positioned opposite each other and are connected to the same drive mechanism. The drive mechanism drives the two probes 2 to move toward or away from each other. This configuration facilitates alignment of the two probes 2 with the two ends of the transmission line.

[0046] Optionally, to ensure stable cutting of circuit board 1, securing circuit board 1 includes clamping it with a fixture. Specifically, the fixture includes a driver and two opposing clamping plates 3. The driver can drive the two clamping plates 3 toward or away from each other. When the two clamping plates 3 are relatively close, they can clamp the circuit board 1. This arrangement can meet the clamping requirements for circuit board 1 and provide a relatively secure clamping. In other embodiments, circuit board 1 can also be fixed to the cutting platform with screws.

[0047] Optionally, the circuit board 1 is provided with a substrate layer, and a group of transmission lines are provided on the substrate layer. When testing the transmission lines, the two ends of the circuit board 1 are cut using the two ends of the transmission lines as cutting references to expose the two ends of the transmission lines; then, two probes 2 are respectively brought into contact with the exposed two ends of the transmission lines to perform a first insertion loss test, and the first insertion loss test value S of the transmission line with a length of X0 is obtained. 10 Continue to cut the two ends of the circuit board 1 to the set length, so that the length of the transmission line becomes shorter and both ends are exposed, and a transmission line with a length of Y0 is obtained; then the two probes 2 are respectively contacted with the exposed ends of the transmission line with a length of Y0 to perform a second insertion loss test, and the second insertion loss test value S of the transmission line with a length of Y0 is obtained. 20 Finally, the de-embedding algorithm is used to calculate the insertion loss test value S of the transmission line per unit length. 30 , S 30 =(S 10 -S 20 ) / (X0-Y0).

[0048] Optionally, the circuit board 1 is provided with N substrate layers from top to bottom, where N ≥ 2. Each substrate layer is provided with a group of transmission lines. The N groups of transmission lines are tested sequentially from longest to shortest, with the ends of the i-th transmission line tested extending beyond the ends of the i+1-th transmission line tested. Optionally, the projections of the N groups of transmission lines on the top surface of the circuit board 1 are N line segments, which are arranged in parallel or overlap with each other. Furthermore, the lengths of the N groups of transmission lines may all be different or partially the same. During testing, after exposing the ends of the i-th transmission line tested and performing the first insertion loss test on the i-th transmission line tested, the ends of the circuit board 1 are continued to be cut using the ends of the i+1-th transmission line tested as a cutting reference. While exposing the ends of the i+1-th transmission line tested, the length of the i-th transmission line tested is shortened and both ends are exposed, allowing the i-th transmission line tested to undergo a second insertion loss test. With this arrangement, before performing the second insertion loss test on the i-th test transmission line, the two ends of the circuit board 1 are directly cut using the two ends of the i+1-th test transmission line as the cutting reference. When performing the first insertion loss test on the i+1-th test transmission line, no further cutting is required, thus saving one cutting operation. In addition, the position of the transmission line can be determined based on the data information of the circuit board 1, making it easier to determine the cutting reference.

[0049] Furthermore, after cutting the ends of the Nth test transmission line using the ends of the transmission line as a cutting reference and performing a second insertion loss test on the N-1th test transmission line, the first insertion loss test is performed on the Nth test transmission line. The ends of the circuit board 1 are then cut to a set length, shortening the length of the Nth test transmission line and exposing both ends, for a second insertion loss test on the Nth test transmission line. Since the Nth test transmission line is the last set of transmission lines, to eliminate test loss at the connector of probe 2, reduce the influence of external factors or the transmission line ends, and ensure the test accuracy of the last set of transmission lines, after the first insertion loss test on the last set of transmission lines, the circuit board 1 is cut to a set length for a second insertion loss test, thereby achieving more accurate test accuracy.

[0050] For example, N is equal to four. The circuit board 1 is provided with four substrate layers from top to bottom. The transmission lines provided on the four substrate layers from top to bottom are: transmission line L1, transmission line L2, transmission line L3, and transmission line L4. The length relationship is: transmission line L2>transmission line L3>transmission line L4>transmission line L1. According to the data information of the circuit board 1, the four groups of transmission lines are tested in descending order. The specific steps are as follows:

[0051] S100, such as Figure 3 As shown, the two ends of the transmission line L2 are used as the cutting reference. Figure 3The two cutting surfaces C1 are used as cutting references to cut the two ends of the circuit board 1 and expose the two ends of the transmission line L2; Figure 4 As shown, two probes 2 are respectively placed in contact with the exposed ends of the transmission line L2 to connect the test line. The first insertion loss test is performed to obtain the first insertion loss test value S of the transmission line L2 with a length of X1. 11 ;

[0052] S200, such as Figure 5 As shown, the two ends of the circuit board 1 are cut using the two ends of the transmission line L3 as the cutting reference. Figure 5 The two cutting surfaces C2 are cutting references, such as Figure 6 As shown, after cutting, both ends of the transmission line L3 are exposed, and the length of the transmission line L2 is shortened and both ends are exposed, so that a transmission line L2 with a length of Y1 is obtained. Two probes 2 are respectively placed in contact with the exposed ends of the transmission line L2 with a length of Y1 to connect the test line, and the second insertion loss test value S of the transmission line L2 with a length of Y1 is obtained. 21 Finally, the de-embedding algorithm is used to obtain the insertion loss test value S of the transmission line L2 per unit length. 31 , S 31 =(S 11 -S 21 ) / (X1-Y1).

[0053] S300, such as Figure 7 As shown, two probes 2 are respectively placed in contact with the exposed ends of the transmission line L3 to connect the test line. The first insertion loss test is performed to obtain the first insertion loss test value S of the transmission line L3 with a length of X2. 12 ;

[0054] S400, continue cutting the two ends of the circuit board 1 with the two ends of the transmission line L4 as the cutting reference, while exposing the two ends of the transmission line L4, shorten the length of the transmission line L3 and expose both ends, to obtain a transmission line L3 with a length of Y2, respectively contact the two probes 2 with the exposed ends of the transmission line L3 with a length of Y2, so that the test line is connected, and obtain the second insertion loss test value S of the transmission line L3 with a length of Y2. 22 Finally, the de-embedding algorithm is used to obtain the insertion loss test value S of the transmission line L3 per unit length. 32 , S 32 =(S 12 -S 22 ) / (X2-Y2).

[0055] S500, respectively contact the two probes 2 with the exposed ends of the transmission line L4 to connect the test line, and perform the first insertion loss test to obtain the first insertion loss test value S of the transmission line L4 with a length of X3. 13 ;

[0056] S600: Continue cutting the two ends of the circuit board 1 with the two ends of the transmission line L1 as the cutting reference, while exposing the two ends of the transmission line L1. At the same time, shorten the length of the transmission line L4 and expose both ends, thereby obtaining a transmission line L4 with a length of Y3. Place two probes 2 in contact with the exposed ends of the transmission line L4 with a length of Y3, respectively, to connect the test line, and obtain the second insertion loss test value S of the transmission line L4 with a length of Y3. 23 Finally, the de-embedding algorithm is used to obtain the insertion loss test value S of the transmission line L4 per unit length. 33 , S 33 =(S 13 -S 23 ) / (X3-Y3).

[0057] S700, respectively contact the two probes 2 with the exposed ends of the transmission line L1 to connect the test line, perform the first insertion loss test, and obtain the first insertion loss test value S of the transmission line L1 with a length of X4. 14 ;

[0058] S800: Continue cutting the two ends of the circuit board 1 to a set length, shortening the length of the transmission line L1 and exposing both ends to obtain a transmission line L1 with a length of Y4. Place two probes 2 in contact with the exposed ends of the transmission line L1 with a length of Y4, respectively, to connect the test line, and obtain the second insertion loss test value S of the transmission line L1 with a length of Y4. 24 Finally, the de-embedding algorithm is used to obtain the insertion loss test value S of the transmission line L1 per unit length. 34 , S 34 =(S 14 -S 24 ) / (X4-Y4).

[0059] The above steps cut the circuit board 1 multiple times and perform multiple tests in sequence, thereby achieving insertion loss tests on all transmission lines.

[0060] Obviously, the above-described embodiments of the present invention are merely examples for the purpose of clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. A person skilled in the art would be able to make various obvious changes, readjustments, and substitutions without departing from the scope of protection of the present invention. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the claims of the present invention.

Claims

1. A circuit board insertion loss testing method, characterized in that: include: Fixing the circuit board (1), and cutting the two ends of the circuit board (1) with the two ends of the transmission line as a cutting reference, so as to expose the two ends of the transmission line; Two probes (2) are respectively brought into contact with the exposed ends of the transmission line to perform a first insertion loss test, and a first insertion loss test value S1 of the transmission line having a length of X is obtained; Continue cutting the two ends of the circuit board (1) to a set length, so that the length of the transmission line becomes shorter and both ends are exposed, thereby obtaining the transmission line with a length of Y; The two probes (2) are respectively brought into contact with the exposed ends of the transmission line having a length of Y to perform a second insertion loss test, thereby obtaining a second insertion loss test value S2 of the transmission line having a length of Y; The insertion loss test value S3 of the transmission line per unit length is calculated using a de-embedding algorithm. The calculation formula of the insertion loss test value S3 is: S3=(S1-S2) / (XY).

2. The circuit board insertion loss testing method according to claim 1, characterized in that: The circuit board (1) is provided with N substrate layers from top to bottom, wherein N≥2, and each substrate layer is provided with a group of transmission lines. The N groups of transmission lines are tested in order from long to short, and the two ends of the transmission line of the i-th test respectively extend and exceed the two ends of the transmission line of the i+1-th test; during the test, after the two ends of the transmission line of the i-th test are exposed and the first insertion loss test is performed on the transmission line of the i-th test, the two ends of the circuit board (1) are continued to be cut with the two ends of the transmission line of the i+1-th test as the cutting reference, and while the two ends of the transmission line of the i+1-th test are exposed, the length of the transmission line of the i-th test is shortened and the two ends are exposed, so as to perform a second insertion loss test on the transmission line of the i-th test.

3. The circuit board insertion loss testing method according to claim 2, characterized in that: After cutting the two ends of the transmission line of the Nth test as a cutting reference, and performing a second insertion loss test on the transmission line of the N-1th test, performing a first insertion loss test on the transmission line of the Nth test, and then continuing to cut the two ends of the circuit board (1) to a set length, so that the length of the transmission line of the Nth test becomes shorter and the two ends are exposed, so as to perform a second insertion loss test on the transmission line of the Nth test.

4. The circuit board insertion loss testing method according to claim 1, characterized in that: When the two ends of the circuit board (1) are cut with the two ends of the transmission line as cutting references, the cutting surface covers the entire end surface of the circuit board (1); when the circuit board (1) is continued to be cut to a set length, the cutting surface covers the entire end surface of the circuit board (1).

5. The circuit board insertion loss testing method according to claim 1, characterized in that: When the two ends of the circuit board (1) are cut using the two ends of the transmission line as a cutting reference, the two ends of the circuit board (1) are cut in a direction perpendicular to the top surface of the circuit board (1).

6. The circuit board insertion loss testing method according to claim 1, characterized in that: When continuing to cut the circuit board (1) to a set length, both ends of the circuit board (1) are cut in a direction perpendicular to the top surface of the circuit board (1).

7. The circuit board insertion loss testing method according to claim 1, characterized in that: When performing a first insertion loss test and a second insertion loss test on the transmission line, the probe (2) is driven to move by a driving mechanism and the probe (2) is brought into contact with the transmission line.

8. The circuit board insertion loss testing method according to claim 7, characterized in that: When performing a first insertion loss test and a second insertion loss test on the transmission line, the two probes (2) are arranged opposite each other and are both connected to the same driving mechanism, and the driving mechanism drives the two probes (2) to move in a direction of approaching or moving away from each other.

9. The circuit board insertion loss testing method according to claim 1, characterized in that: Fixing the circuit board (1) includes clamping the circuit board (1) by a clamp.

10. The circuit board insertion loss testing method according to claim 9, characterized in that: The clamp comprises a driving member and two clamping plates (3) arranged opposite to each other. The driving member can drive the two clamping plates (3) to move relatively closer or farther away. When the two clamping plates (3) are relatively closer, the two clamping plates (3) can clamp the circuit board (1).

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