A test method, device, storage medium and electronic device

Abstract

Embodiments of the present application provide a test method, device, storage medium and electronic equipment, and relate to the technical field of computers. The method comprises: obtaining a test parameter set, the test parameter set comprising test parameters of at least one temperature condition; performing loss testing by using the test parameter set and a first test board to obtain a limit value of link loss, the limit value of link loss being used at least to reflect the driving capability of a sending end chip; and performing loss testing by using the test parameter set and the first test board, comprising: adjusting the temperature of a first PCB, determining a target temperature of the first PCB after adjustment; determining test parameters matched with the target temperature, and performing loss testing by using the matched test parameters. In this way, by using test parameters matched with each temperature and controlling the measurement temperature to change the link loss characteristics, the limit value of link loss is obtained to reflect the driving capability of the sending end chip.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a testing method, apparatus, storage medium and electronic device. Background Technology

[0002] In traditional digital system design, high-speed interconnects are often considered negligible due to their minimal impact on system performance. However, with the continuous development of computer technology, high-speed interconnects are playing a dominant role among the many factors determining system performance, often leading to unforeseen problems and significantly increasing the complexity of system design. Therefore, in the design and verification of high-speed links, it is crucial to comprehensively consider the mutual influence of various modules, evaluate the stability of high-speed signal links through testing and assessment methods, improve the overall system design success rate, and shorten the development cycle.

[0003] In server system design, high-speed solutions need to be designed based on the actual signal driving capabilities of the CPU chip, including PCB material selection, chip layout, and routing. For example, Figure 1 The design diagram shown illustrates a scenario where the high-speed signal loss between CPU0 and CPU1 must not exceed the CPU's driving capability limit. The longer the signal transmission distance and the lower the grade of the PCB material, the greater the signal loss. When the loss exceeds the chip's limit, signal distortion will occur, leading to system failure. Therefore, the CPU chip's driving capability must be clearly defined before system design, and the design must be based on this capability. Failure to assess the chip's limits will significantly increase the risk of product design failure.

[0004] To evaluate the driving capability of a CPU, traditional testing is typically performed on the designed circuitry. This involves using the CPU's default signal-related parameters, and as the circuitry deteriorates, the test results gradually worsen. When the test results exceed a certain threshold, the CPU's limits are identified. Currently, there are two main design schemes for testing circuitry.

[0005] Option 1: Design multiple verification boards, each with different trace lengths. By changing the trace lengths, the link loss between CPU0 and CPU1 is altered, while signal testing is performed. As the trace length increases, the signal deteriorates. When the trace length reaches a certain point, the signal deteriorates to its limit, at which point the CPU's driving capability can be evaluated.

[0006] Option 2: Design multiple verification boards with consistent trace lengths. Each verification board uses a different PCB material grade, with lower grade boards exhibiting greater signal loss. Signal testing is conducted based on the PCB material grade, from highest to lowest. As the PCB material grade decreases, the signal deteriorates. When the PCB material grade reaches a certain low level, the signal becomes extremely weak, at which point the CPU's driving capability can be evaluated.

[0007] While both of the above approaches can identify the limits of chip driving capabilities, the results do not truly reflect the CPU's actual driving capabilities because the testing process is based on the CPU's default parameters without parameter optimization. Furthermore, the current approach is costly due to the need to design and prototype multiple samples. Approach one requires designing multiple PCB versions of different lengths, increasing verification costs. Approach two, by designing multiple verification boards of different PCB grades, also increases verification costs. Moreover, since the differences in material properties between different grades are not significant, when the limit capability approaches the range between two material types, the design from Approach one is needed to further refine the link characteristics, further increasing design costs. Summary of the Invention

[0008] This application provides a testing method, apparatus, storage medium, and electronic device to at least solve the above-mentioned technical problems existing in the prior art.

[0009] The technical solution of this application embodiment is implemented as follows:

[0010] In a first aspect, embodiments of this application provide a testing method, the method comprising:

[0011] Obtain a set of test parameters, which includes test parameters for at least one temperature condition;

[0012] Using the test parameter set and the first test board, a loss test is performed to obtain the limit value of the link loss. The limit value of the link loss is used to reflect at least the driving capability of the transmitting chip.

[0013] The first test board includes: a first PCB board, and a transmitter chip and a receiver chip disposed on the first PCB board;

[0014] The loss test using the test parameter set and the first test board includes:

[0015] Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment.

[0016] Determine the test parameters that match the target temperature, and use the matched test parameters to perform loss testing.

[0017] In the above scheme, obtaining the test parameter set includes:

[0018] For the second test board, multiple first parameters of the first test chip and multiple second parameters of the second test chip are set; the second test board includes: a second PCB board, a first test chip and a second test chip disposed on the second PCB board;

[0019] Pre-testing is performed based on multiple first parameters and multiple second parameters to obtain a test parameter set;

[0020] The test parameter set is obtained by performing pre-tests based on multiple first parameters and multiple second parameters, including:

[0021] At a first temperature, signal quality detection is performed based on multiple combinations of parameters according to the plurality of first parameters and the plurality of second parameters, and the first and second parameters corresponding to the optimal signal quality result are determined based on the multiple signal quality results.

[0022] Adjust the temperature, and at the adjusted second temperature, perform signal quality detection based on the multiple first parameters and the multiple second parameters, and determine the first and second parameters corresponding to the optimal signal quality result based on the multiple signal quality results.

[0023] By analogy, the first and second parameters corresponding to the optimal signal quality results at multiple temperatures are obtained and used as the test parameter set;

[0024] The test parameter set is saved to the transmitting chip and the receiving chip.

[0025] In the above scheme, the test parameters include: a first parameter and a second parameter;

[0026] The first parameter is used to adjust the preset value of the signal by the transmitting chip;

[0027] The second parameter is used by the receiving chip to perform signal equalization, thereby increasing the clarity of the received signal.

[0028] The above scheme, which involves pre-testing based on multiple first parameters and multiple second parameters to obtain a test parameter set, also includes:

[0029] The second test board is divided into temperature zones to obtain at least one temperature region;

[0030] The temperature of each temperature sensor is collected using temperature sensors.

[0031] The temperature of the second PCB board is determined based on the temperature of each temperature sensor and the coefficient of the temperature region where the temperature sensor is located.

[0032] In the above scheme, the temperature matching test parameters of the adjusted first PCB board are determined, and signal testing is performed using the matched test parameters, including:

[0033] The temperature of the first PCB board is determined based on the temperature sensor installed on the first PCB board;

[0034] The transmitting chip is triggered to select a first parameter based on the temperature of the first PCB board and send a test signal based on the first parameter; the receiving chip is triggered to select a second parameter based on the temperature of the first PCB board and adjust the received test signal based on the second parameter.

[0035] The number of bit errors is determined based on the transmitted and received test signals;

[0036] If the number of bit errors exceeds the threshold, then the limit value of link loss is determined;

[0037] If the number of bit errors does not exceed the threshold, the temperature of the first PCB board is readjusted, and the adjusted temperature of the first PCB board is determined; the test parameters matching the adjusted temperature are determined, and the signal is tested using the matched test parameters.

[0038] In the above scheme, determining the limit value of link loss includes:

[0039] Determine the unit length loss corresponding to the temperature at which the number of bit errors exceeds the threshold;

[0040] Based on the link length and unit length loss of the first PCB board, determine the limit value of the link loss.

[0041] In the above scheme, there are multiple temperature sensors; each temperature sensor is used to test the temperature in a different temperature range.

[0042] Determining the target temperature of the adjusted first PCB board includes:

[0043] Determine the weighting coefficient corresponding to the temperature region to which each temperature sensor belongs;

[0044] The target temperature of the first PCB board is determined based on each temperature sensor and weighting coefficient.

[0045] In the above scheme, the weighting coefficients corresponding to the temperature range of each temperature sensor are determined, including:

[0046] A weighting coefficient is assigned to each temperature region based on the length of the link trace within each temperature region; the longer the link trace, the larger the weighting coefficient.

[0047] or,

[0048] Based on the link trace length and the link loss corresponding to the temperature in each temperature region, a weighting coefficient is assigned to each temperature region.

[0049] In the above scheme, if the first PCB board is divided into multiple temperature zones, determining the link length of the first PCB board includes: determining the link length within each temperature zone;

[0050] Determine the unit length loss corresponding to the temperature at which the number of bit errors exceeds the threshold, including: determining the unit length loss in each temperature region;

[0051] Accordingly, based on the link length and unit length loss of the first PCB board, the limit value of the link loss is determined, including:

[0052] The link loss for each temperature region is determined based on the link length within each temperature region and the loss per unit length corresponding to each temperature region.

[0053] Determine the limit value of link loss based on the link loss in each temperature zone.

[0054] In the above scheme, if the transmission path of the link is distributed on different layers of the PCB board, determining the link length in each temperature region includes: determining the trace length of the layers involved in each temperature region.

[0055] Determining the unit length loss within each temperature region includes: determining the unit length loss corresponding to each layer within each temperature region;

[0056] The step of determining the link loss for each temperature region based on the link length within each temperature region and the unit length loss corresponding to each temperature region includes:

[0057] The link loss of each layer is determined based on the trace length of the layers involved in each temperature region and the corresponding unit length loss of each layer.

[0058] The link loss for each temperature region is determined based on the link loss of the layers involved in each temperature region.

[0059] The method in the above scheme further includes:

[0060] Using a loss test connector, the loss per unit length of at least one PCB board is detected at different temperatures; the at least one PCB board includes: a first PCB board.

[0061] In the above scheme, adjusting the temperature of the first PCB board includes:

[0062] The fan speed is controlled by a fan controller to adjust the temperature of the first PCB board.

[0063] Secondly, embodiments of this application provide a testing apparatus, the apparatus comprising:

[0064] An acquisition module is used to acquire a set of test parameters, the set of test parameters including at least one test parameter for a temperature condition;

[0065] The testing module is used to perform loss testing using the test parameter set and the first test board to obtain the limit value of link loss, and the limit value of link loss is used to reflect at least the driving capability of the transmitting chip.

[0066] The first test board includes: a first PCB board, and a transmitter chip and a receiver chip disposed on the first PCB board;

[0067] The loss test using the test parameter set and the first test board includes:

[0068] Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment.

[0069] Determine the test parameters that match the target temperature, and use the matched test parameters to perform loss testing.

[0070] Thirdly, embodiments of this application provide an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform any of the test methods described above.

[0071] Fourthly, embodiments of this application provide a non-transitory computer-readable storage medium storing computer instructions for causing a computer to perform any of the test methods described above.

[0072] The embodiments of this application have the following beneficial effects:

[0073] The test method, apparatus, storage medium, and electronic device provided in this application are used to obtain a test parameter set, which includes at least one test parameter for a temperature condition. Loss testing is performed using the test parameter set and a first test board to obtain a limit value for link loss. This limit value reflects at least the driving capability of the transmitting chip. The first test board includes a first PCB board, and a transmitting chip and a receiving chip disposed on the first PCB board. The loss testing using the test parameter set and the first test board includes: adjusting the temperature of the first PCB board to determine a target temperature for the adjusted first PCB board; determining test parameters matching the target temperature; and performing loss testing using the matched test parameters. Thus, by utilizing the temperature-dependent characteristics of the PCB board material, and by employing temperature-matched test parameters and controlling the measurement temperature to change the link loss characteristics, a limit value for link loss is obtained to reflect the driving capability of the transmitting chip.

[0074] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0075] Figure 1 A schematic diagram of a CPU interconnect provided for an embodiment of this application;

[0076] Figure 2 A flowchart illustrating a testing method provided in an embodiment of this application;

[0077] Figure 3 A schematic diagram of a testing method provided for an application embodiment of this application;

[0078] Figure 4 A schematic diagram of a loss test provided for an application embodiment of this application;

[0079] Figure 5 This is a schematic diagram of the structure of a testing device provided in an embodiment of this application;

[0080] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0081] To make the objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0082] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0083] If the application documents contain similar descriptions such as "first / second", the following explanation shall be added: In the following description, the terms "first / second / third" are used only to distinguish similar objects and do not represent a specific order of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0084] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0085] Figure 2 This is a flowchart illustrating a testing method provided in an embodiment of this application, as shown below. Figure 2 As shown, the test method includes:

[0086] Step 201: Obtain a test parameter set, which includes at least one test parameter for a temperature condition;

[0087] Step 202: Perform loss testing using the test parameter set and the first test board to obtain the limit value of link loss; the limit value of link loss is used to reflect at least the driving capability of the transmitting chip.

[0088] The first test board includes: a first PCB board and a transmitting chip and a receiving chip disposed on the first PCB board;

[0089] The loss test using the test parameter set and the first test board includes:

[0090] Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment.

[0091] Determine the test parameters that match the target temperature, and use the matched test parameters to perform loss testing.

[0092] Here, the transmitting chip refers to the CPU chip that generates and sends signals. The receiving chip refers to the CPU chip that receives and processes signals.

[0093] The test parameter set includes test parameters for at least one temperature condition, with each temperature condition corresponding to a different test parameter, which is the optimal test parameter under the corresponding temperature adjustment.

[0094] The link loss limit refers to the maximum attenuation a signal can withstand during transmission, reflecting the upper limit of signal quality attenuation as the signal travels from the transmitting chip to the receiving chip. The driving capability of the transmitting chip refers to the signal strength and driving force that the chip can provide.

[0095] The limit of link loss is related to the driving capability of the transmitting chip, because the driving capability of the transmitting chip determines how strong a signal it can output. If the signal attenuation is too great and the driving capability of the transmitting chip is insufficient, it may lead to reduced communication quality or signal loss. Therefore, the obtained limit of link loss can reflect the magnitude of the chip's driving capability; the larger the limit, the stronger the driving capability of the transmitting chip.

[0096] In this embodiment, by using pre-obtained optimal test parameters under different temperature conditions, the optimal test parameters used by the transmitting and receiving chips during the testing process are ensured. That is, under the same temperature conditions, these test parameters best reflect the optimal performance of the transmitting (e.g., CPU) and receiving chips. Utilizing the temperature-dependent characteristics of the PCB material, link loss is altered by precisely controlling the measurement temperature. Simultaneously, the application of optimal parameters maximizes the performance of both the transmitting and receiving chips. This allows for accurate determination of the transmitting chip's limits, improving test accuracy. Furthermore, this method eliminates the need for designing multiple cables or PCBs of different grades, significantly reducing verification costs. Moreover, for chips with the same pin count, a single PCB can be used for testing; simply mount it onto the first PCB as described above.

[0097] In some embodiments, obtaining the test parameter set includes:

[0098] For the second test board, multiple first parameters of the first test chip and multiple second parameters of the second test chip are set; the second test board includes: a second PCB board, a first test chip and a second test chip disposed on the second PCB board;

[0099] Pre-testing is performed based on multiple first parameters and multiple second parameters to obtain a test parameter set;

[0100] The test parameter set is obtained by performing pre-tests based on multiple first parameters and multiple second parameters, including:

[0101] At a first temperature, signal quality detection is performed based on multiple combinations of parameters according to the plurality of first parameters and the plurality of second parameters, and the first and second parameters corresponding to the optimal signal quality result are determined based on the multiple signal quality results.

[0102] Adjust the temperature, and at the adjusted second temperature, perform signal quality detection based on the multiple first parameters and the multiple second parameters, and determine the first and second parameters corresponding to the optimal signal quality result based on the multiple signal quality results.

[0103] By analogy, the first and second parameters corresponding to the optimal signal quality results at multiple temperatures are obtained and used as the test parameter set;

[0104] The test parameter set is saved to the transmitting chip and the receiving chip.

[0105] Here, signal quality results can be obtained from the eye diagram of the received signal. In the test, the optimal signal quality result is when the eye diagram opening is maximized and there is no significant noise or distortion. Specifically, at various temperatures, the optimal test parameters are selected for signal testing. The test parameters corresponding to the maximum eye diagram opening, the most stable signal waveform, and the least noise and interference are selected as the optimal test parameters.

[0106] Here, the second test board may include a second PCB board, a first test chip, and a second test chip. The purpose of the second test board is to evaluate test parameters.

[0107] It should be noted that different PCB board materials can have varying effects on temperature, signal transmission speed, and signal loss. Different materials may lead to different signal loss and delay during testing, especially in high-frequency signal transmission where material properties can affect signal quality and stability. Therefore, the first and second PCB boards can be made of the same material. However, if the materials are similar, meaning their influence is minimal, the first and second PCB boards can also be made of different materials.

[0108] In some embodiments, the test parameters include: a first parameter and a second parameter;

[0109] The first parameter is used to adjust the preset value of the signal by the transmitting chip;

[0110] The second parameter is used by the receiving chip to perform signal equalization, thereby increasing the clarity of the received signal.

[0111] Here, the first parameter can be a preset value for the transmitter (TX), which is a preset value adjusted by the transmitter chip to control the initial state of the signal. By setting the first parameter, the transmitter chip can preprocess or pre-adjust the signal to ensure that the signal is in a suitable state before transmission. This preset value can involve adjustments to the signal amplitude, frequency, waveform, etc., to ensure that the signal is stable and clear during transmission and can cope with different transmission conditions (such as temperature, interference, etc.), thus optimizing the signal transmission effect.

[0112] The second parameter can be the CTLE (Continuous-Time Linear Equalizer) parameter, used by the receiver chip for signal equalization. The receiver chip uses the second parameter for signal equalization to improve the quality of the received signal, enhance the decoding capability of the receiver chip, and improve the clarity of the signal.

[0113] CTLE is an analog signal equalization technique that improves signal quality by adjusting the received signal to compensate for attenuation, distortion, and other effects during signal transmission. Its function is to make the received signal clearer in both the time and frequency domains, reducing noise and interference, thus enabling the receiver to decode and process the signal more accurately.

[0114] In some embodiments, pre-testing is performed based on a plurality of first parameters and a plurality of second parameters to obtain a test parameter set, which further includes:

[0115] The second test board is divided into temperature zones to obtain at least one temperature region;

[0116] The temperature of each temperature sensor is collected using temperature sensors.

[0117] The temperature of the second PCB board is determined based on the temperature of each temperature sensor and the coefficient of the temperature region where the temperature sensor is located.

[0118] Here, the second test board can be placed inside the test chassis. Considering that the temperature distribution inside the test chassis may be uneven, generally speaking, the temperature is higher closer to the chip. Therefore, it is proposed to divide the second test board into temperature zones, for example, high-temperature zone, medium-temperature zone, and low-temperature zone, and to install a temperature sensor in each temperature zone, such as... Figure 3 As shown in the diagram. CPU0 represents the first test chip or transmitting chip, and CPU1 represents the second test chip or receiving chip.

[0119] Multiple temperature sensors can be placed on the second PCB board to monitor the temperature of different areas on the board in real time. At the same time, the temperature coefficient of the temperature area can be used for correction or compensation to obtain the accurate temperature of the entire second PCB board.

[0120] One example is that the sum of the coefficients for each temperature region is 1. The temperature and coefficient of each temperature region are multiplied together and then added together to obtain the accurate temperature of the entire second PCB board.

[0121] In some embodiments, determining the temperature matching test parameters of the adjusted first PCB board, and performing signal testing using the matched test parameters, includes:

[0122] The temperature of the first PCB board is determined based on the temperature sensor installed on the first PCB board;

[0123] The transmitting chip is triggered to select a first parameter based on the temperature of the first PCB board and send a test signal based on the first parameter; the receiving chip is triggered to select a second parameter based on the temperature of the first PCB board and adjust the received test signal based on the second parameter.

[0124] The number of bit errors is determined based on the transmitted and received test signals;

[0125] If the number of bit errors exceeds the threshold, then the limit value of link loss is determined;

[0126] If the number of bit errors does not exceed the threshold, the temperature of the first PCB board is readjusted, and the adjusted temperature of the first PCB board is determined; the test parameters matching the adjusted temperature are determined, and the signal is tested using the matched test parameters.

[0127] Here, the method can be applied to a test device or test platform. In addition to the first test board and the second test board mentioned above, the device or platform can also have a dedicated test equipment that can trigger each device to perform corresponding operations.

[0128] The transmitting and receiving chips can read or acquire the test parameter set themselves, or the test parameter set can be pre-saved into the transmitting and receiving chips. During testing, the controller can trigger the transmitting and receiving chips to determine the temperature of the first PCB board based on the temperature detected by the temperature sensor, and each chip determines the test parameters based on the temperature of the first PCB board (i.e., the transmitting chip selects the first parameter corresponding to the current temperature to adjust the signal transmission state, and the receiving chip selects the second parameter corresponding to the current temperature to equalize and adjust the received signal). Then, the test signal transmitted by the transmitting end and the signal received by the receiving end are compared, and the number of bit errors (BER) is counted. Here, the number of bit errors is an important indicator for measuring the quality of the link signal.

[0129] If the number of bit errors exceeds the threshold, it indicates poor link signal quality and that the performance limit has been reached. In this case, the limit value of link loss can be determined. If the number of bit errors does not exceed the threshold, it means the link performance is within an acceptable range. The testing process then continues by adjusting the PCB board temperature and resetting the target environmental conditions (i.e., resetting the temperature environment). For the new temperature, the transmitting and receiving chips each re-determine their corresponding matching test parameters (first parameter and second parameter). Using these matching parameters, new signal tests are performed. This process is repeated until the number of bit errors exceeds the threshold. If the number of bit errors consistently does not exceed the threshold, the temperature at which the number of bit errors is highest can be selected.

[0130] For example, suppose the test parameter set includes test parameters for 10 temperature conditions, namely the test parameters corresponding to 10 degrees, 20 degrees, 30 degrees, 40 degrees, 50 degrees, 60 degrees, 70 degrees, 80 degrees, 90 degrees and 95 degrees respectively.

[0131] At 10 degrees, determine the test parameters matched at 10 degrees and use the matched test parameters to perform signal testing; if the number of bit errors obtained does not exceed the threshold, adjust to 20 degrees, determine the test parameters matched at 20 degrees, and use the matched test parameters to perform signal testing; if the number of bit errors obtained still does not exceed the threshold, then perform tests sequentially at 30 degrees, 40 degrees, 50 degrees, 60 degrees, 70 degrees, 80 degrees, 90 degrees, and 95 degrees until the temperature at which the number of bit errors exceeds the threshold is obtained.

[0132] It's important to note that as temperature increases, the electrical properties of the PCB board change, leading to a decrease in signal transmission quality and increased link loss. This is because rising temperature alters the material's conductivity, dielectric constant, and other physical properties, potentially resulting in greater signal attenuation, increased noise, or a higher bit error rate. Based on these PCB board characteristics, temperature adjustments can be made gradually from low to high temperatures, ultimately determining the lowest temperature at which the number of bit errors exceeds a certain threshold.

[0133] The comparison between the test signal transmitted by the transmitter and the signal received by the receiver, and the counting of bit errors, can be implemented by a dedicated measurement program. This program can be installed on the receiver chip or on specialized testing equipment. For example, after receiving the test signal, the receiver chip decodes it, and the measurement program compares the decoded result with the original signal from the transmitter chip to count the number of bit errors. Alternatively, the signal can be processed and the bit error rate data output on specialized testing equipment (such as a bit error rate tester).

[0134] In some embodiments, determining the limit value of link loss includes:

[0135] Determine the link length of the first PCB board, and the unit length loss corresponding to the temperature when the number of bit errors exceeds the threshold;

[0136] Based on the link length and unit length loss of the first PCB board, determine the limit value of the link loss.

[0137] Here, signal quality is affected by temperature changes, which in turn leads to changes in the number of bit errors. If the number of bit errors exceeds a preset threshold, it indicates that the signal quality has deteriorated to an unacceptable level, and the link performance has reached its limit.

[0138] Based on this, when the number of bit errors exceeds the threshold, the unit length loss at a specific temperature is determined. Based on the link length of the first PCB board (i.e. the actual physical length of signal transmission) and the determined unit length loss, the loss limit of the entire link can be calculated.

[0139] It should be noted that the performance of a link is affected by its length; longer links will have higher losses. Therefore, by calculating the loss per unit length, the maximum value of the total link loss can be estimated.

[0140] In this way, the limit of link loss can be determined, and the driving capability of the transmitting chip can be evaluated. In system design, it can also reflect the maximum effective transmission range and performance boundary of the signal link, helping to optimize the stability and reliability of the system.

[0141] It should be noted that if the design includes a PCB board with two chips, the test method provided in the above embodiment can also be used to test the system performance. This method can take into account the driving capability of the transmitting chip and the impact of the link length to evaluate the system performance.

[0142] In some embodiments, the number of temperature sensors is multiple; each temperature sensor is used to test the temperature in a different temperature region.

[0143] Determining the target temperature of the adjusted first PCB board includes:

[0144] Determine the weighting coefficient corresponding to the temperature region to which each temperature sensor belongs;

[0145] The target temperature of the first PCB board is determined based on each temperature sensor and weighting coefficient.

[0146] Here, the first test board can be placed inside the test chassis. Considering that the temperature distribution inside the test chassis may be uneven, generally speaking, the temperature is higher closer to the chip. Therefore, it is proposed to divide the first test board into temperature zones, for example, high-temperature zone, medium-temperature zone, and low-temperature zone, and to install a temperature sensor in each temperature zone, such as... Figure 3 As shown in the diagram. CPU0 represents the first test chip or transmitting chip, and CPU1 represents the second test chip or receiving chip.

[0147] Multiple temperature sensors can be arranged on the first PCB board to monitor the temperature of different areas on the board in real time. At the same time, the temperature coefficient of the temperature area is combined to make corrections or compensations, and finally the accurate temperature of the entire first PCB board is obtained.

[0148] One example is that the sum of the coefficients of each temperature region is 1. The temperature and coefficient of each temperature region are multiplied and then added together to obtain the accurate temperature of the entire first PCB board.

[0149] In some embodiments, determining the weighting coefficient corresponding to the temperature region to which each temperature sensor belongs includes:

[0150] A weighting coefficient is assigned to each temperature region based on the length of the link trace within each temperature region; the longer the link trace, the larger the weighting coefficient.

[0151] or,

[0152] Based on the link trace length and the link loss corresponding to the temperature in each temperature region, a weighting coefficient is assigned to each temperature region.

[0153] Here, within a temperature range, if the link trace is long, then the weighting factor for that region should be relatively large. Therefore, generally, the longer the link trace, the larger the weighting factor. By assigning higher weighting factors to long link regions, it can be ensured that the temperature of these regions receives sufficient attention.

[0154] In addition to link length, the impact of link loss should also be considered. Link transmission loss varies under different temperature conditions, potentially affecting signal quality. In high-temperature environments, the electrical performance of the link may degrade, leading to greater signal loss. In low-temperature environments, link loss may be lower, but it can still affect some transmission characteristics. Based on the temperature-dependent loss characteristics, a weighting coefficient is assigned to each region in conjunction with link length. Therefore, temperature regions with higher losses generally require higher weights to ensure that the impact of temperature is fully considered.

[0155] In some embodiments, if the first PCB board is divided into multiple temperature zones, determining the link length of the first PCB board includes: determining the link length within each temperature zone;

[0156] Determine the unit length loss corresponding to the temperature at which the number of bit errors exceeds the threshold, including: determining the unit length loss in each temperature region;

[0157] Accordingly, based on the link length and unit length loss of the first PCB board, the limit value of the link loss is determined, including:

[0158] The link loss for each temperature region is determined based on the link length within each temperature region and the loss per unit length corresponding to each temperature region.

[0159] Determine the limit value of link loss based on the link loss in each temperature zone.

[0160] Here, if the first PCB board is divided into multiple temperature zones, the link length (i.e., the physical length of the signal transmission line in that temperature zone) is determined first for each temperature zone.

[0161] When the number of bit errors is detected to increase and exceed the set threshold, the link loss is calculated for each temperature zone as follows: Link loss = Link length of the temperature zone × Loss per unit length of the temperature zone.

[0162] By combining the link length and the loss characteristics corresponding to temperature, the actual signal loss in each temperature range can be obtained. Finally, by taking the link loss of all regions into account, the limit value of the link loss on the entire PCB board can be derived.

[0163] Thus, the limit of this link loss represents the maximum loss that signal transmission can withstand under the current temperature conditions and link layout.

[0164] For example, assuming the link length in the high-temperature zone is L1 and the unit length loss in the high-temperature zone is D1, then the link loss in the high-temperature zone is R1 = L1 × D1, where × represents multiplication. Assuming the link length in the medium-temperature zone is L2 and the unit length loss in the medium-temperature zone is D2, then the link loss in the medium-temperature zone is R2 = L2 × D2. Assuming the link length in the low-temperature zone is L3 and the unit length loss in the low-temperature zone is D3, then the link loss in the medium-temperature zone is R3 = L3 × D3. The total link loss is R = R1 + R2 + R3, thus yielding the limiting value.

[0165] In some embodiments, if the transmission path of the link is distributed across different layers of the PCB board, determining the link length in each temperature region includes: determining the trace length of the layers involved in each temperature region.

[0166] Determining the unit length loss within each temperature region includes: determining the unit length loss corresponding to each layer within each temperature region;

[0167] The step of determining the link loss for each temperature region based on the link length within each temperature region and the unit length loss corresponding to each temperature region includes:

[0168] The link loss of each layer is determined based on the trace length of the layers involved in each temperature region and the corresponding unit length loss of each layer.

[0169] The link loss for each temperature region is determined based on the link loss of the layers involved in each temperature region.

[0170] Here, if the signal transmission path within the temperature range is distributed across different layers of the PCB board, the losses of each part can be calculated separately and then summed.

[0171] For example, if the length of the link in the high-temperature zone on the surface is L11 and the loss per unit length on the surface is D11, and the length of the link in the high-temperature zone on the inner layer is L12 and the loss per unit length on the inner layer is D12, then the link loss in the high-temperature zone is R1 = L11 × D11 + L12 × D12.

[0172] In some embodiments, the method further includes:

[0173] Using a loss test connector, the loss per unit length of at least one PCB board is detected at different temperatures; the at least one PCB board includes: a PCB board made of the same material as the first PCB board.

[0174] Here, the loss per unit length can be tested in advance using a specialized loss test connector, such as... Figure 4 As shown, a loss measurement board is designed (generally using the same material as the first PCB board, so that the measurement results can be applied to cases where the first PCB board is used), and paired with a loss test connector. This loss measurement board is placed in a constant temperature chamber (ensuring that the temperature is consistent throughout the link), and the loss values ​​of this link are measured at various temperatures to obtain the loss baseline at each temperature. During the testing phase, the loss measurement board is heated to several different temperatures, and the links on the board are measured.

[0175] If different layers of the PCB are involved in the actual testing phase, the unit length loss value of different layers at different temperatures can also be measured here.

[0176] In some embodiments, adjusting the temperature of the first PCB board includes:

[0177] The fan speed is controlled by a fan controller to adjust the temperature of the first PCB board.

[0178] Here, the fan controller can control the fan speed according to the control waveform to adjust the temperature of the first PCB board.

[0179] For example, control waveforms include PWM (Pulse Width Modulation) signals, which control fan speed by changing the width of the pulse. A longer pulse width means a higher fan speed, and vice versa.

[0180] In this way, by adjusting the control waveform to regulate the fan speed, the temperature of the PCB board can be controlled or maintained within an appropriate range for testing at different temperatures.

[0181] After the above tests, the relationship between different fan speeds, temperatures, and link losses per unit length can be obtained. In subsequent actual tests, this relationship can be directly queried for temperature control, link loss per unit length, etc.

[0182] As an example, the relationships for a given PCB board may include:

[0183] 1. Fan speed: 100%, temperature: 25 degrees Celsius, link loss per unit length: 12dB;

[0184] 2. Fan speed: 80%, temperature: 40 degrees Celsius, link loss per unit length: 12.7 dB;

[0185] 3. Fan speed: 50%, temperature: 55 degrees Celsius, link loss per unit length: 13.5 dB;

[0186] 4. Fan speed: 10%, temperature: 90 degrees Celsius, link loss per unit length: 15dB.

[0187] Of course, other factors such as rotational speed, temperature, and link loss per unit length can also be included, but these will not be listed here.

[0188] Figure 5 This is a schematic diagram of the structure of a testing device provided in an embodiment of this application; as shown below. Figure 5 As shown, the device includes:

[0189] An acquisition module is used to acquire a set of test parameters, the set of test parameters including at least one test parameter for a temperature condition;

[0190] The test module is used to perform tests using the test parameter set and the first test board to obtain signal test results;

[0191] The first test board includes: a first PCB board, and a transmitter chip and a receiver chip disposed on the first PCB board;

[0192] The loss test using the test parameter set and the first test board includes:

[0193] Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment.

[0194] Determine the test parameters that match the target temperature, and use the matched test parameters to perform signal testing.

[0195] In some embodiments, the acquisition module is configured to set multiple first parameters of the first test chip and multiple second parameters of the second test chip for the second test board; the second test board includes: a second PCB board, a first test chip and a second test chip disposed on the second PCB board;

[0196] Pre-testing is performed based on multiple first parameters and multiple second parameters to obtain a test parameter set;

[0197] The test parameter set is obtained by performing pre-tests based on multiple first parameters and multiple second parameters, including:

[0198] At a first temperature, signal quality detection is performed based on multiple combinations of parameters according to the plurality of first parameters and the plurality of second parameters, and the first and second parameters corresponding to the optimal signal quality result are determined based on the multiple signal quality results.

[0199] Adjust the temperature, and at the adjusted second temperature, perform signal quality detection based on the multiple first parameters and the multiple second parameters, and determine the first and second parameters corresponding to the optimal signal quality result based on the multiple signal quality results.

[0200] By analogy, the first and second parameters corresponding to the optimal signal quality results at multiple temperatures are obtained and used as the test parameter set;

[0201] The test parameter set is saved to the transmitting chip and the receiving chip.

[0202] In some embodiments, the test parameters include: a first parameter and a second parameter;

[0203] The first parameter is used to adjust the preset value of the signal by the transmitting chip;

[0204] The second parameter is used by the receiving chip to perform signal equalization, thereby increasing the clarity of the received signal.

[0205] In some embodiments, the acquisition module is further configured to perform temperature partitioning on the second test board to obtain at least one temperature region;

[0206] The temperature of each temperature sensor is collected using temperature sensors.

[0207] The temperature of the second PCB board is determined based on the temperature of each temperature sensor and the coefficient of the temperature region where the temperature sensor is located.

[0208] In some embodiments, determining the adjusted temperature-matching test parameters of the PCB board and performing signal testing using the matched test parameters includes:

[0209] The temperature of the first PCB board is determined based on the temperature sensor installed on the first PCB board;

[0210] The transmitting chip is triggered to select a first parameter based on the temperature of the first PCB board and send a test signal based on the first parameter; the receiving chip is triggered to select a second parameter based on the temperature of the first PCB board and adjust the received test signal based on the second parameter.

[0211] The number of bit errors is determined based on the transmitted and received test signals;

[0212] If the number of bit errors exceeds the threshold, then the limit value of link loss is determined;

[0213] If the number of bit errors does not exceed the threshold, the temperature of the first PCB board is readjusted, and the adjusted temperature of the first PCB board is determined; the test parameters matching the adjusted temperature are determined, and the signal is tested using the matched test parameters.

[0214] Here, the first test board, including the first PCB board and the transmitting and receiving chips disposed on the first PCB board, can be understood as part of the hardware of the test module. These hardware components are used to perform the corresponding test operations.

[0215] In some embodiments, the test module is used to determine the unit length loss corresponding to the temperature when the number of bit errors exceeds a threshold;

[0216] Based on the link length and unit length loss of the first PCB board, determine the limit value of the link loss.

[0217] In some embodiments, the number of temperature sensors is multiple; each temperature sensor is used to test the temperature in a different temperature region.

[0218] The transmitting chip and receiving chip are used to determine the weighting coefficient corresponding to the temperature region of each temperature sensor; and to determine the target temperature of the first PCB board based on each temperature sensor and the weighting coefficient.

[0219] In some embodiments, the test module is further configured to assign a weighting coefficient to each temperature region based on the link trace length within each temperature region; the longer the link trace, the larger the weighting coefficient.

[0220] or,

[0221] Based on the link trace length and the link loss corresponding to the temperature in each temperature region, a weighting coefficient is assigned to each temperature region.

[0222] In some embodiments, if the first PCB board is divided into multiple temperature zones, the test module is used to determine the link length within each temperature zone;

[0223] Determine the unit length loss within each temperature range;

[0224] The link loss for each temperature region is determined based on the link length within each temperature region and the loss per unit length corresponding to each temperature region.

[0225] Determine the limit value of link loss based on the link loss in each temperature zone.

[0226] In some embodiments, if the transmission path of the link is distributed across different layers of the PCB board, the test module is used to determine the trace length of the layers involved in each temperature region.

[0227] Determine the unit length loss for each layer within each temperature region;

[0228] The link loss of each layer is determined based on the trace length of the layers involved in each temperature region and the corresponding unit length loss of each layer.

[0229] The link loss for each temperature region is determined based on the link loss of the layers involved in each temperature region.

[0230] In some embodiments, the acquisition module is further configured to use a loss test connector to detect the unit length loss value of at least one PCB board at different temperatures; the at least one PCB board includes: a first PCB board.

[0231] In some embodiments, the test module is used to control the fan speed using a fan controller to adjust the temperature of the first PCB board.

[0232] Here, the fan, fan controller, first test board, etc., mentioned above can be understood as components included in the test module. The test module may also have other equipment, such as specialized test equipment on which the above test program is set. The acquisition module may also include a machine that implements the above operations to complete the above operations and functions.

[0233] The second test board and other components mentioned above can be understood as devices included in the acquisition module. The acquisition module may also include other equipment, such as loss test connectors, constant temperature chambers, etc. The acquisition module may also include a machine that connects to and controls the operation of loss test connectors, constant temperature chambers, etc., and acquires result data to complete the above operations and functions.

[0234] It is understood that, when implementing the corresponding test methods, the testing apparatus provided in the above embodiments can allocate the above processing to different modules as needed to complete all or part of the processing described above. Furthermore, the apparatus and the corresponding method embodiments provided in the above embodiments belong to the same concept, and their specific implementation process is detailed in the method embodiments, which will not be repeated here.

[0235] This application provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform a test method.

[0236] This application provides a computer-readable storage medium storing executable instructions, wherein the executable instructions are stored and, when executed by a processor, will cause the processor to execute the test method provided in this application.

[0237] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM; or it may be a variety of devices including one or any combination of the above-mentioned memories.

[0238] In some embodiments, executable instructions may take the form of a program, software, software module, script, or code, written in any form of programming language (including compiled or interpreted languages, or declarative or procedural languages), and may be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0239] As an example, executable instructions may, but do not necessarily, correspond to files in a file system. They may be stored as part of a file that holds other programs or data, for example, in one or more scripts in a Hyper Text Markup Language (HTML) document, in a single file dedicated to the program in question, or in multiple collaborating files (e.g., a file that stores one or more modules, subroutines, or code sections).

[0240] As an example, executable instructions can be deployed to execute on a single computing device, or on multiple computing devices located in one location, or on multiple computing devices distributed across multiple locations and interconnected via a communication network.

[0241] Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application; as shown below. Figure 6 As shown, the electronic device 60 includes: a processor 601, and a memory 602 communicatively connected to the processor 601; the memory 602 stores instructions executable by the processor 601. The instructions are executed by the processor 601 to enable the processor 601 to perform:

[0242] Obtain a set of test parameters, which includes test parameters for at least one temperature condition;

[0243] Using the test parameter set and the first test board, a loss test is performed to obtain the limit value of the link loss. The limit value of the link loss is used to reflect at least the driving capability of the transmitting chip.

[0244] The first test board includes: a first PCB board, and a transmitter chip and a receiver chip disposed on the first PCB board;

[0245] The loss test using the test parameter set and the first test board includes:

[0246] Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment.

[0247] Determine the test parameters that match the target temperature, and use the matched test parameters to perform loss testing.

[0248] In practical applications, the electronic device 60 may further include at least one network interface 603. The various components of the electronic device 60 are coupled together via a bus system 604. It is understood that the bus system 604 is used to implement communication between these components. In addition to a data bus, the bus system 604 also includes a power bus, a control bus, and a status signal bus. However, for clarity, in... Figure 6 All buses are labeled as bus system 604. The number of processors 601 and the number of memories 602 can be at least one. The network interface 603 is used for wired or wireless communication between the electronic device 60 and other devices.

[0249] The memory 602 in this embodiment is used to store various types of data to support the operation of the electronic device 60.

[0250] The methods disclosed in the embodiments of this application can be applied to processor 601, or implemented by processor 601. Processor 601 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the integrated logic circuit of the hardware in processor 601 or by instructions in the form of software. The processor 601 may be a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 601 can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software modules may be located in a storage medium, which is located in memory 602. Processor 601 reads the information in memory 602 and combines its hardware to complete the steps of the aforementioned test method.

[0251] In some embodiments, the electronic device 60 may be implemented by one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), complex programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers (MCUs), microprocessors, or other electronic components to perform the aforementioned methods.

[0252] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0253] In the above description, the term "some embodiments" refers to a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0254] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used in this application is for the purpose of describing embodiments of this application only and is not intended to be limiting of this application.

[0255] It should be understood that in the various embodiments of this application, the sequence number of each implementation process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0256] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0257] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A test method characterized by, The method comprises: obtaining a test parameter set, the test parameter set comprising test parameters of at least one temperature condition; performing a loss test using the test parameter set and a first test board to obtain a limit value of link loss, the limit value of link loss being used to reflect at least a driving capability of a sending end chip; wherein the first test board comprises a first PCB board, and a sending end chip and a receiving end chip arranged on the first PCB board; the performing of the loss test using the test parameter set and the first test board comprises: adjusting the temperature of the first PCB board to determine a target temperature of the first PCB board after adjustment; determining test parameters matched with the target temperature, and performing a loss test using the matched test parameters; wherein the obtaining of the test parameter set comprises: for a second test board, setting a plurality of first parameters of a first test chip and a plurality of second parameters of a second test chip; the second test board comprises a second PCB board, a first test chip and a second test chip arranged on the second PCB board; performing a pre-test according to the plurality of first parameters and the plurality of second parameters to obtain a test parameter set; wherein the performing of the pre-test according to the plurality of first parameters and the plurality of second parameters to obtain the test parameter set comprises: at a first temperature, performing signal quality detection of a plurality of parameter combinations according to the plurality of first parameters and the plurality of second parameters, and determining first parameters and second parameters corresponding to an optimal signal quality result according to a plurality of signal quality results; adjusting the temperature, and at a second temperature after adjustment, performing signal quality detection of a plurality of parameter combinations according to the plurality of first parameters and the plurality of second parameters, and determining first parameters and second parameters corresponding to an optimal signal quality result according to a plurality of signal quality results; by analogy, obtaining first parameters and second parameters corresponding to optimal signal quality results at a plurality of temperatures as the test parameter set; saving the test parameter set to the sending end chip and the receiving end chip; wherein the determining of test parameters matched with the target temperature of the first PCB board after adjustment, and the performing of a loss test using the matched test parameters comprise: determining the temperature of the first PCB board according to a temperature sensor arranged on the first PCB board; triggering the sending end chip to select first parameters according to the temperature of the first PCB board, and to send test signals according to the first parameters; and triggering the receiving end chip to select second parameters according to the temperature of the first PCB board, and to adjust received test signals according to the second parameters; determining an error code quantity according to the sent test signals and the received test signals; if the error code quantity exceeds a threshold value, determining a limit value of link loss; if the error code quantity does not exceed the threshold value, adjusting the temperature of the first PCB board to determine the temperature of the first PCB board after adjustment; determining test parameters matched with the temperature after adjustment, and performing a loss test using the matched test parameters; the determining of the target temperature of the first PCB board after adjustment comprises: Determine the weighting coefficient corresponding to the temperature region to which each temperature sensor belongs; there are multiple temperature sensors; each temperature sensor is used to test the temperature in a different temperature region. The target temperature of the first PCB board is determined based on each temperature sensor and weighting coefficient.

2. The method of claim 1, wherein, The test parameters include: a first parameter and a second parameter; The first parameter is used to adjust the preset value of the signal by the transmitting chip; The second parameter is used by the receiving chip to perform signal equalization, thereby increasing the clarity of the received signal.

3. The method of claim 1, wherein, Pre-testing is performed based on multiple first parameters and multiple second parameters to obtain a test parameter set, which also includes: The second test board is divided into temperature zones to obtain at least one temperature region; The temperature of each temperature sensor is collected using temperature sensors. The temperature of the second PCB board is determined based on the temperature of each temperature sensor and the coefficient of the temperature region where the temperature sensor is located.

4. The method of claim 1, wherein, The determination of the limit value of link loss includes: Determine the link length of the first PCB board, and the unit length loss corresponding to the temperature when the number of bit errors exceeds the threshold; Based on the link length and unit length loss of the first PCB board, determine the limit value of the link loss.

5. The method of claim 1, wherein, Determine the weighting coefficients corresponding to the temperature range of each temperature sensor, including: A weighting coefficient is assigned to each temperature region based on the length of the link trace within each temperature region; the longer the link trace, the larger the weighting coefficient. or, Based on the link trace length and the link loss corresponding to the temperature in each temperature region, a weighting coefficient is assigned to each temperature region.

6. The method of claim 4, wherein, If the first PCB board is divided into multiple temperature zones, determining the link length of the first PCB board includes: determining the link length within each temperature zone; Determine the unit length loss corresponding to the temperature at which the number of bit errors exceeds the threshold, including: determining the unit length loss in each temperature region; Accordingly, based on the link length and unit length loss of the first PCB board, the limit value of the link loss is determined, including: The link loss for each temperature region is determined based on the link length within each temperature region and the loss per unit length corresponding to each temperature region. Determine the limit value of link loss based on the link loss in each temperature zone.

7. The method of claim 6, wherein, If the transmission path of the link is distributed across different layers of the PCB board, determining the link length in each temperature region includes: determining the trace length of the layers involved in each temperature region; Determining the unit length loss within each temperature region includes: determining the unit length loss corresponding to each layer within each temperature region; The step of determining the link loss for each temperature region based on the link length within each temperature region and the unit length loss corresponding to each temperature region includes: The link loss of each layer is determined based on the trace length of the layers involved in each temperature region and the corresponding unit length loss of each layer. The link loss for each temperature region is determined based on the link loss of the layers involved in each temperature region.

8. The method of claim 4, wherein, The method further includes: Using a loss test connector, the loss per unit length of at least one PCB board is detected at different temperatures; the at least one PCB board includes: a first PCB board.

9. The method of claim 1, wherein, The adjustment of the temperature of the first PCB board includes: The fan speed is controlled by a fan controller to adjust the temperature of the first PCB board.

10. A test device, characterized by The device includes: An acquisition module is used to acquire a set of test parameters, the set of test parameters including at least one test parameter for a temperature condition; The testing module is used to perform loss testing using the test parameter set and the first test board to obtain the limit value of link loss, and the limit value of link loss is used to reflect at least the driving capability of the transmitting chip. The first test board includes: a first PCB board, and a transmitter chip and a receiver chip disposed on the first PCB board; The loss test using the test parameter set and the first test board includes: Adjust the temperature of the first PCB board and determine the target temperature of the first PCB board after adjustment. Determine the test parameters that match the target temperature, and use the matched test parameters to perform a loss test; The acquisition module is used to set multiple first parameters of the first test chip and multiple second parameters of the second test chip for the second test board; the second test board includes: a second PCB board, a first test chip and a second test chip disposed on the second PCB board; Pre-testing is performed based on multiple first parameters and multiple second parameters to obtain a test parameter set; The test parameter set is obtained by performing pre-tests based on multiple first parameters and multiple second parameters, including: At a first temperature, signal quality detection is performed based on multiple combinations of parameters according to the plurality of first parameters and the plurality of second parameters, and the first and second parameters corresponding to the optimal signal quality result are determined based on the multiple signal quality results. Adjust the temperature, and at the adjusted second temperature, perform signal quality detection based on the multiple first parameters and the multiple second parameters, and determine the first and second parameters corresponding to the optimal signal quality result based on the multiple signal quality results. By analogy, the first and second parameters corresponding to the optimal signal quality results at multiple temperatures are obtained and used as the test parameter set; The test parameter set is saved to the transmitting chip and the receiving chip; The process includes determining the test parameters for matching the target temperature of the adjusted first PCB board, and performing loss testing using the matched test parameters, including: The temperature of the first PCB board is determined based on the temperature sensor installed on the first PCB board; The transmitting chip is triggered to select a first parameter based on the temperature of the first PCB board and send a test signal based on the first parameter; the receiving chip is triggered to select a second parameter based on the temperature of the first PCB board and adjust the received test signal based on the second parameter. The number of bit errors is determined based on the transmitted and received test signals; If the number of bit errors exceeds the threshold, then the limit value of link loss is determined; If the number of bit errors does not exceed the threshold, the temperature of the first PCB board is readjusted, and the adjusted temperature of the first PCB board is determined; the test parameters matching the adjusted temperature are determined, and the loss test is performed using the matched test parameters. The transmitting chip and receiving chip are used to determine the weighting coefficient corresponding to the temperature region to which each temperature sensor belongs; there are multiple temperature sensors; each temperature sensor is used to test the temperature in a different temperature region. The target temperature of the first PCB board is determined based on each temperature sensor and weighting coefficient.

11. An electronic device, comprising: include: At least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the test method of any one of claims 1 to 9.

12. A non-transitory computer-readable storage medium having stored thereon computer instructions, wherein, The computer instructions are used to cause the computer to execute the test method according to any one of claims 1 to 9.

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