Photomask for semiconductor manufacturing and photomask pattern forming method
By adding cut lines and optical proximity correction (OPC) to the photomask pattern, the problem of sidelobe formation in semiconductor manufacturing is solved, achieving faster processing time and higher lithography accuracy.
Patent Information
- Application Number
- CN202410341962.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-07
- Filing Date
- 2024-03-25
- Publication Date
- 2025-09-09
AI Technical Summary
The existing technology is prone to forming side lobes in semiconductor manufacturing and takes a long time to process.
By adding cutting lines in the photomask pattern, especially cutting lines passing through the center point of the block, combined with optical proximity correction (OPC), the formation of side lobes can be suppressed and the photolithography process parameters can be optimized.
The photolithography side lobe problem is effectively suppressed, the processing time (TAT) is shortened, and the accuracy of the photomask pattern is improved.
Smart Images
Figure CN120610433A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a photomask design technology, and more particularly to a photomask for semiconductor manufacturing capable of eliminating side lobes and a photomask pattern forming method. Background Art
[0002] In the field of semiconductor manufacturing technology, in order to form a specific pattern (including various component patterns such as gates and contacts) on a substrate, the corresponding pattern is first designed in a computer system. Then, after optical correction, the pattern is output to a photomask. Then, the pattern on the photomask is transferred using photolithography and etching steps to form a semiconductor component.
[0003] However, as device dimensions continue to shrink, new lithography equipment and improved manufacturing processes are constantly being developed. Resolution enhancement technology (RET) is now being used to improve resolution, pushing lithography manufacturing processes toward advanced nodes. However, RET has been found to be prone to sidelobe formation. Summary of the Invention
[0004] The present invention provides a photomask for semiconductor manufacturing, which can avoid the formation of side lobes.
[0005] The present invention further provides a method for forming a photomask pattern, which can reduce the turn around time (TAT) and output a photomask pattern without side lobes.
[0006] A photomask for semiconductor manufacturing according to the present invention comprises a plurality of first blocks and a plurality of second blocks. The line width and spacing of the first blocks fall outside a predetermined range, while the line width and spacing combination of the second blocks in one direction fall within the predetermined range. Each second block includes at least one cut line, wherein the cut line passes through the center point of each second block.
[0007] The present invention provides a method for forming a photomask pattern, including performing photolithography simulation on multiple regular patterns of varying sizes to generate a sidelobe correlation table. The sidelobe correlation table indicates that simulation results within a line width range and a spacing range exhibit sidelobes. Based on the sidelobe correlation table, at least one cut line is added to multiple second blocks within an original photomask pattern that fall within the line width range or the spacing range, wherein the cut line passes through the center point of each second block. A sidelobe-free photomask pattern is then output, comprising multiple first blocks within the original photomask pattern that fall outside the line width range and the spacing range, and second blocks with the cut line added.
[0008] In an embodiment of the formation method of the present invention, optical proximity correction (OPC) may be used to compensate for photolithography errors before adding the cutting lines.
[0009] In various embodiments of the present invention, the at least one cutting line may be a single cutting line or a cross-shaped cutting line.
[0010] In various embodiments of the present invention, the cross-shaped cutting line is connected to the edge of each second block.
[0011] In various embodiments of the present invention, the cross-shaped cutting line is retracted from the edge of each second block.
[0012] In various embodiments of the present invention, the single cutting line is connected to the edge of each second block.
[0013] In various embodiments of the present invention, both ends of the single cutting line are retracted from the edge of each second block.
[0014] Based on the above, the present invention utilizes a predetermined sidelobe correlation table to directly add cutting lines to the corresponding illumination pattern that may form sidelobes, thereby effectively suppressing the lithography sidelobe problem, and has fewer layout design restrictions. Compared with the existing OPC reconstruction method, it can also reduce the processing time (TAT).
[0015] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 The original photomask pattern and its photolithography simulation diagram in the first step of a photomask pattern forming method according to the first embodiment of the present invention;
[0017] Figure 2 yes Figure 1 Schematic diagram of the sidelobe correlation table obtained from the simulation results;
[0018] Figure 3 1 is a sidelobe-free photomask pattern and a photolithography simulation diagram thereof in the second step of the first embodiment;
[0019] Figure 4A is a schematic diagram of the original photomask pattern and the improved sidelobe-free photomask pattern for a single block;
[0020] Figure 4B yes Figure 4A Schematic diagram of the aerial image obtained by the two photomask patterns;
[0021] Figure 5A is a schematic diagram of another improved sidelobe-free photomask pattern for a single block;
[0022] Figure 5Bis a schematic diagram of another improved sidelobe-free photomask pattern for a single block;
[0023] Figure 5C is a schematic diagram of another improved sidelobe-free photomask pattern for a single block;
[0024] Figure 6 1 is a diagram showing steps for forming a photomask pattern according to a second embodiment of the present invention;
[0025] Figure 7A 1 is a schematic diagram of a photomask for semiconductor manufacturing according to a third embodiment of the present invention before and after improvement;
[0026] Figure 7B Schematic diagrams of another improved semiconductor manufacturing photomask according to the third embodiment;
[0027] Figure 8A 1 is a schematic diagram of a photomask for semiconductor manufacturing according to a fourth embodiment of the present invention before and after improvement;
[0028] Figure 8B 1 and 2 are schematic diagrams of another improved semiconductor manufacturing photomask according to the fourth embodiment.
[0029] Explanation of symbols
[0030] 400, 402: Block
[0031] 404, 406: Central
[0032] 600, 602, 610, 620: Steps
[0033] 700, 800: Original photomask pattern
[0034] 700', 700", 800': Sidelobe-free photomask pattern
[0035] B1: The first block
[0036] B2: The second block
[0037] CL1, CL2, CL3, CL4: cutting lines
[0038] CP: Center Point
[0039] s1, s2: interval
[0040] w1, w2, w2': line width DETAILED DESCRIPTION
[0041] The following description provides a plurality of embodiments for realizing the different features of the present invention. In addition, these embodiments are merely exemplary and are not intended to limit the scope and application of the present invention. Moreover, for the sake of clarity, the relative sizes (e.g., length, line width, spacing, etc.) and relative positions of regions or structural components may be reduced or expanded. In addition, similar or identical element symbols used in different figures represent similar or identical components or features.
[0042] In the photomask pattern forming method of the first embodiment of the present invention, it is necessary to first find out the size range of possible side lobes in various regular patterns with different sizes through simulation. Figure 1 As shown, different regular patterns P1, P2, and P3 of the original photomask pattern (also called DOM (dimension on mask)) are pre-designed, and then the simulation results are obtained by using lithography simulation. For example, Figure 1 The upper row shows the DOM, and the lower row shows the simulation results with side lobes, which means that the current line width or spacing of the regular patterns P1, P2, and P3 may form side lobes after the photolithography process, so the current size is recorded in Figure 2 The side lobe related table is marked with "X", and the unit of the number in the table is nanometer. As for the line width and spacing of the DOM that will not form side lobes after photolithography simulation, it will be Figure 2 The side lobe correlation table is marked as "O"; and so on. Therefore, from the side lobe correlation table, it can be obtained that the simulation results within a specific line width range and a specific spacing range have side lobes, and the patterns outside the above line width range / spacing range will not have side lobes, so such a range can be defined as a "set range", in which there will be a corresponding line width range as the spacing size changes in the same direction. This side lobe correlation table may change due to different parameters of the lithography process. For example, the optical settings of the lithography process (illumination system, phase shift photomask, exposure energy, etc.) will affect the contents of the side lobe correlation table, so Figure 2 The numerical range of is not fixed, but varies slightly according to the different photolithography processes.
[0043] In the photomask pattern forming method of the first embodiment, the Figure 2 After the side lobe correlation table is obtained, the Pattern Side-lobe Cutting (PSC) process can be performed according to the size of the "X" marked therein. For example, Figure 1 The enlarged part of the DOM in the upper row is placed Figure 3In the top row, at least one cutting line is added to the blocks in regular patterns P1, P2, and P3, and each cutting line passes through the center point CP of the block. The cutting lines in regular patterns P1 and P3 are cross-shaped, while the cutting line in regular pattern P2 is a single cutting line. The results of photolithography simulations of these DOMs with cutting lines are free of sidelobes.
[0044] To further confirm the above effects, please refer to Figure 4A and Figure 4B . Figure 4A Shows the original mask pattern and the improved sidelobe-free mask pattern for a single block. Figure 4B yes Figure 4A Aerial image obtained by using two photomask patterns.
[0045] exist Figure 4A If the line width w2 and spacing s2 of a single block 400 meet the requirements Figure 2 The size marked "X" in the side lobe correlation table is improved (i.e., PSC) by adding a cutting line CL1 in the block 402, and the cutting line CL1 is connected to the edge of the block 402, so that the line width w2' of the block 402 is greatly reduced and the combination of w2' and s2 meets the requirements. Figure 2 The size of the side lobe is marked with "O" in the table. Figure 4A Although only the line width w2 and the interval s2 in the horizontal direction (X axis) are shown, it should be noted that the size in the vertical direction (Y axis) should also follow the sidelobe correlation table to determine whether to add cutting lines in the block 400 .
[0046] exist Figure 4B In the figure, the left image shows an aerial image of the photoresist obtained by exposing and developing a photomask having block 400, while the right image shows an aerial image of the photoresist obtained by exposing and developing a photomask having block 402. The result shows that the original, unmodified photomask pattern has a higher light intensity distribution at the center 404 of the pattern tangent line, indicating that sidelobes are likely to form there. However, the light intensity distribution at the center 406 of the tangent line of the modified, sidelobe-free photomask pattern remains similar, indicating that no sidelobes are formed there.
[0047] In addition to the types of cutting wire Figure 4A Cutting line CL1, can also be used Figure 5A 、 Figure 5B or Figure 5C style.
[0048] exist Figure 5A In FIG, the cutting line CL2 is a single cutting line, and both ends thereof are retracted from the edge of the block.
[0049] exist Figure 5B In FIG, the cutting line CL3 is a cross-shaped cutting line and is connected to the edge of the block.
[0050] exist Figure 5C In FIG, the cutting line CL4 is a cross-shaped cutting line, and the cutting line CL4 is retracted from the edge of the block.
[0051] The cut lines CL1, CL2, CL3, and CL4 can be used in different areas of the same photomask. Alternatively, one or more of these cut lines can be used within the same photomask to improve mask patterns with sidelobes. The cut line dimensions and their indentations can be adjusted according to the photomask writing specifications.
[0052] Figure 6 FIG. 1 is a diagram showing steps of forming a photomask pattern according to a second embodiment of the present invention.
[0053] Please refer to Figure 6 First, in step 600, a lithography simulation is performed on a plurality of regular patterns with different sizes to obtain a side lobe correlation table, which shows that the simulation results within a line width range and a spacing range have side lobes. The details of step 600 can be found in Figure 1 and Figure 2 , no more details.
[0054] In step 610, based on the sidelobe correlation table obtained in step 600, at least one cutting line is added to a plurality of second blocks in an original mask pattern that meet the combination of the line width range and the spacing range, wherein the cutting line passes through the center point of each second block, such as Figure 4A 、 Figure 5A 、 Figure 5B or Figure 5C In addition, optical proximity correction (OPC) may be used to compensate for photolithography errors (step 602) before step 610. Therefore, the method of the second embodiment is not limited to the OPC process and can complete the photomask pattern more efficiently.
[0055] In step 620 , a sidelobe-free mask pattern is output, which includes a plurality of first blocks outside the line width range and the spacing range in the original mask pattern and a plurality of second blocks with added cutting lines.
[0056] Two embodiments are listed below, which are photomasks for semiconductor manufacturing outputted according to the above photomask pattern forming method.
[0057] Figure 7A 1 and 2 are schematic diagrams of an improved photomask for semiconductor manufacturing according to a third embodiment of the present invention.
[0058] Please refer to Figure 7A, the left side shows the original photomask pattern 700, which includes a plurality of first blocks B1 and a plurality of second blocks B2, and the second blocks B2 are surrounded by dotted lines. The line width w1 and the spacing s1 of the first blocks B1 fall outside a set range, and the combination of the line width w2 and the spacing s2 of the second blocks B2 falls within the set range. Figure 6 By improving the steps of , the sidelobe-free mask pattern 700 ′ on the right can be obtained as a photomask for semiconductor manufacturing, and each second block B2 includes at least one cutting line, wherein the cutting line passes through the center point CP of each second block B2.
[0059] Figure 7B Schematic diagrams of another improved semiconductor manufacturing photomask according to the third embodiment are shown before and after. The left side shows the original photomask pattern 700, while the cutting lines in the sidelobe-free photomask pattern 700" on the right side are all retracted from the edge of the second block B2.
[0060] After photolithography simulation, Figure 7A The CD bias of the sidelobe-free mask pattern 700' is about 2.6%. Figure 7B The dimensional deviation of the sidelobe-free photomask pattern 700 ′ is about 0.5%.
[0061] Figure 8A 1 and 2 are schematic diagrams of an improved photomask for semiconductor manufacturing according to a fourth embodiment of the present invention.
[0062] Please refer to Figure 8A , the left side shows another original photomask pattern 800, which includes a plurality of first blocks B1 and a plurality of second blocks B2, and the second blocks B2 are surrounded by dotted lines. The line width w1 of the first block B1 falls outside the set range, and the line width w2 or the interval s2 of the second block B2 falls within the set range. Figure 6 By improving the process, the sidelobe-free mask pattern 800' shown on the right is obtained for use in semiconductor manufacturing. Each second block B2 includes at least one cut line, where the cut line passes through the center point CP of each second block B2. Furthermore, due to the optical proximity correction (OPC) process, the edges of the first block B1 and the second block B2 in the sidelobe-free mask pattern 800' are clearly not straight lines.
[0063] Figure 8B 1 is a schematic diagram of another improved semiconductor manufacturing photomask according to the fourth embodiment. The left side shows the original photomask pattern, while the cutting lines in the sidelobe-free photomask pattern on the right side are all retracted from the edge of the second block B2.
[0064] Based on the above, whether it is a regular pattern or an original photomask pattern with complex and varying sizes, the photomask pattern can be directly and simply improved through the formation method of the present invention, which can effectively suppress the lithography sidelobe problem and reduce the processing time (TAT) compared with the existing OPC reconstruction method.
[0065] Although the present invention has been disclosed above with reference to the embodiments, they are not intended to limit the present invention. Any person skilled in the art may make slight changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the definition of the appended claims.
Claims
1. A photomask for semiconductor manufacturing, comprising: a plurality of first blocks, wherein line widths and spaces of the plurality of first blocks fall outside a set range; as well as A plurality of second blocks, wherein the line width and spacing combination of the plurality of second blocks in a direction falls within the set range, and each of the second blocks includes at least one cutting line, wherein the at least one cutting line passes through the center point of each second block. 2 . The photomask for semiconductor manufacturing as claimed in claim 1 , wherein the at least one cutting line is a single cutting line or a cross cutting line. 3 . The photomask for semiconductor manufacturing as claimed in claim 2 , wherein the cross-shaped cutting line is connected to an edge of each of the second blocks. 4 . The photomask for semiconductor manufacturing as claimed in claim 2 , wherein the cross-shaped cutting line is retracted from an edge of each of the second blocks. 5 . The photomask for semiconductor manufacturing as claimed in claim 2 , wherein the single scribe line is adjacent to an edge of each of the second blocks. 6 . The photomask for semiconductor manufacturing as claimed in claim 2 , wherein both ends of the single scribe line are retracted from the edge of each second block.
7. A method for forming a photomask pattern, comprising: Performing lithography simulation on a plurality of regular patterns with different sizes to obtain a side lobe correlation table, wherein the simulation results within a line width range and a space range show side lobes; According to the sidelobe correlation table, adding at least one cutting line to a plurality of second blocks in the original mask pattern that conform to the line width range or the spacing range, wherein the at least one cutting line passes through a center point of each of the second blocks; as well as A sidelobe-free mask pattern is output, which includes a plurality of first blocks outside the line width range and the spacing range in the original mask pattern and the plurality of second blocks with the at least one cutting line added. 8 . The method for forming a photomask pattern as claimed in claim 7 , wherein the at least one cutting line is a single cutting line or a cross-shaped cutting line. 9 . The method for forming a photomask pattern as claimed in claim 8 , wherein the cross-shaped cutting line is connected to an edge of each of the second blocks. 10 . The method for forming a photomask pattern as claimed in claim 8 , wherein the cross-shaped cutting line is retracted from an edge of each of the second blocks. 11 . The method for forming a photomask pattern as claimed in claim 8 , wherein the single cutting line is connected to an edge of each of the second blocks. 12 . The method for forming a photomask pattern as claimed in claim 8 , wherein two ends of the single cutting line are retracted from an edge of each second block. 13 . The method for forming a photomask pattern as claimed in claim 7 , further comprising compensating for photolithography errors by optical proximity correction (OPC) before adding the at least one scribing line.