Semiconductor packages with spherical bond interconnect structures

Through the design of a multi-level ball-bond interconnect structure, the high-power density interconnection problem of small bonding pads in SiC and GaN semiconductor packages is solved, and a high current density and low-cost packaging solution is achieved, which is suitable for a variety of semiconductor die types.

CN120613328APending Publication Date: 2025-09-09INFINEON TECHNOLOGIES AG
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Patent Information

Application Number
CN202510266671.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-03-08
Filing Date
2025-03-07
Publication Date
2025-09-09

AI Technical Summary

Technical Problem

Existing technologies are unable to effectively solve the problem of high power density interconnection with small bonding pad sizes in SiC and GaN semiconductor packages, especially the high current density requirements in small pad areas are difficult to achieve.

Method used

A multi-level ball-bonding interconnect structure is adopted, including at least two levels of ball-bonding wire loops, which are stacked and connected in parallel to achieve high current density interconnection. The ball-bonding wire loops are stacked and electrically connected in parallel with each other in the vertical direction to support higher current density.

Benefits of technology

The current density of the package is increased, the cost is reduced, the applicability is enhanced, and the production efficiency is improved, and it is suitable for a variety of semiconductor package types.

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Abstract

A semiconductor package includes: a substrate; a plurality of leads; a semiconductor die attached to the substrate at a first side of the semiconductor die, the semiconductor die having a bond pad at a second side of the semiconductor die opposite the first side; and a spherical bond interconnect structure connecting the bond pad to a first lead of the plurality of leads. The present invention relates to a spherical bond interconnect structure comprising at least two levels of spherical bond wire loops stacked on each other and attached to each other at opposite ends of the stacked spherical bond wire loops such that the at least two levels of stacked spherical bond wire loops are electrically connected in parallel. Methods of manufacturing the semiconductor package are also described.
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