Direct current imbalance calibration method, calibration device, calibration system and storage medium

Abstract

The application discloses a direct current offset calibration method, a calibration device, a calibration system and a storage medium, and belongs to the technical field of wireless communication. The direct current offset calibration method comprises the following steps: traversing a plurality of control words of a direct current offset elimination circuit to determine a direct current offset characteristic curve of a radio frequency communication device; determining a current number of current control words required for direct current offset calibration of the current radio frequency communication device according to a curve type of the direct current offset characteristic curve; configuring the current number of current control words to the current direct current offset elimination circuit to determine a current direct current offset characteristic curve of the current radio frequency communication device, and then determining a calibration control word of the current direct current offset elimination circuit, and configuring the calibration control word to the current direct current offset elimination circuit to calibrate the current radio frequency communication device. In this way, the current radio frequency communication device can be calibrated for direct current offset, the calibration time can be greatly reduced, and the calibration accuracy can be improved.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a DC offset calibration method, a DC offset calibration device, a DC offset calibration system, and a computer-readable storage medium. Background Technology

[0002] In the field of wireless communication, as the requirements for system performance and reliability continue to increase, integrated circuit designs are required to have higher operating speeds, more complex modulation methods, and more stringent design specifications. For radio frequency (RF) communication devices in wireless communication systems, such as RF transmitters and receivers, DC offset voltage is a crucial performance indicator, but it cannot be completely eliminated due to its inherent characteristics related to the integrated circuit itself. Therefore, DC offset calibration is necessary to minimize the DC offset voltage, thereby reducing its impact on the performance and reliability of RF communication devices. Summary of the Invention

[0003] This application provides a DC offset calibration method, a DC offset calibration device, a DC offset calibration system, and a computer-readable storage medium to solve at least one of the aforementioned technical problems.

[0004] The DC offset calibration method of this application includes:

[0005] Iterate through multiple control words that configure the DC offset cancellation circuit and acquire multiple digital signals corresponding to the radio frequency communication device;

[0006] Calculate multiple signal powers based on the multiple digital signals, and determine the DC offset characteristic curve of the radio frequency communication device based on the multiple control words and the multiple signal powers;

[0007] The current number of current control words required to perform DC offset calibration on the current radio frequency communication device is determined based on the curve type of the DC offset characteristic curve.

[0008] Configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device;

[0009] The calibration control word of the current DC offset cancellation circuit is determined based on the current DC offset characteristic curve.

[0010] The calibration control word is configured in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device.

[0011] In some embodiments, the radio frequency communication device is a radio frequency transmitter, and the acquisition of multiple digital signals corresponding to the radio frequency communication device includes:

[0012] The accompanying receiver receives multiple analog signals output by the radio frequency transmitter and converts the multiple analog signals into multiple digital signals.

[0013] In some embodiments, the radio frequency communication device is a radio frequency receiver, and the acquisition of multiple digital signals corresponding to the radio frequency communication device includes:

[0014] Acquire the plurality of digital signals output by the radio frequency receiver.

[0015] In some implementations, configuring the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device includes:

[0016] Configure the current number of current control words in the current DC offset cancellation circuit, and acquire the current number of current digital signals corresponding to the current radio frequency communication device;

[0017] The current signal power is calculated based on the current number of current digital signals, and the current DC offset characteristic curve of the current radio frequency communication device is obtained by fitting the current number of current control words and the current number of current signal power.

[0018] In some implementations, determining the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve includes:

[0019] Determine the minimum signal power based on the current DC offset characteristic curve;

[0020] The control word corresponding to the minimum signal power in the current DC offset characteristic curve is obtained as the calibration control word of the current DC offset cancellation circuit.

[0021] In some embodiments, after determining the minimum signal power based on the current DC offset characteristic curve, the DC offset calibration method further includes:

[0022] Determine whether the minimum signal power is less than a preset DC offset threshold;

[0023] When the minimum signal power is less than the preset DC offset threshold, it is determined that the DC offset of the current radio frequency communication device meets the requirements, and the process proceeds to the step of configuring the calibration control word in the current DC offset elimination circuit to perform DC offset calibration on the current radio frequency communication device.

[0024] When the minimum signal power is greater than or equal to the preset DC offset threshold, it is determined that the DC offset of the current radio frequency communication device does not meet the requirements.

[0025] In some embodiments, after configuring the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device, the DC offset calibration method further includes:

[0026] Obtain the calibration digital signal corresponding to the current radio frequency communication device;

[0027] Calculate the calibration signal power based on the calibration digital signal;

[0028] Determine whether the power of the calibration signal is less than the preset DC offset threshold;

[0029] When the calibration signal power is less than the preset DC offset threshold, the DC offset calibration of the current radio frequency communication device is determined to be successful.

[0030] In some embodiments, the DC offset calibration method further includes:

[0031] When the minimum signal power is greater than or equal to the preset DC offset threshold, or when the calibration signal power is greater than or equal to the preset DC offset threshold, the plurality of control words are configured in the current DC offset cancellation circuit at a predetermined step interval, and a predetermined number of current digital signals corresponding to the current radio frequency communication device are acquired.

[0032] Calculate the predetermined number of current signal powers based on the predetermined number of current digital signals, determine the minimum signal power based on the predetermined number of current signal powers, and then return to the step of determining whether the minimum signal power is less than a preset DC offset threshold.

[0033] When the minimum signal power is greater than or equal to the preset DC offset threshold, or when the number of times the calibration signal power is greater than or equal to the preset DC offset threshold reaches a predetermined number, it is determined that the DC offset calibration of the current radio frequency communication device fails.

[0034] The DC offset calibration device according to the embodiments of this application includes:

[0035] The first configuration module is used to traverse multiple control words configuring the DC offset cancellation circuit and obtain multiple digital signals corresponding to the radio frequency communication device.

[0036] The first determining module is used to calculate multiple signal powers based on the multiple digital signals, and to determine the DC offset characteristic curve of the radio frequency communication device based on the multiple control words and the multiple signal powers;

[0037] The second determining module is used to determine the current number of current control words required to perform DC offset calibration on the current radio frequency communication device based on the curve type of the DC offset characteristic curve.

[0038] The second configuration module is used to configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device.

[0039] The third determining module is used to determine the calibration control word of the current DC offset elimination circuit based on the current DC offset characteristic curve;

[0040] The third configuration module is used to configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device.

[0041] In some implementations, the second configuration module is specifically used for:

[0042] Configure the current number of current control words in the current DC offset cancellation circuit, and acquire the current number of current digital signals corresponding to the current radio frequency communication device;

[0043] The current signal power is calculated based on the current number of current digital signals, and the current DC offset characteristic curve of the current radio frequency communication device is obtained by fitting the current number of current control words and the current number of current signal power.

[0044] In some implementations, the third determining module is specifically used for:

[0045] Determine the minimum signal power based on the current DC offset characteristic curve;

[0046] The control word corresponding to the minimum signal power in the current DC offset characteristic curve is obtained as the calibration control word of the current DC offset cancellation circuit.

[0047] The DC offset calibration system of this application includes one or more processors and a memory. The memory stores a computer program, which, when executed by the processor, implements the DC offset calibration method of any of the above embodiments.

[0048] The computer-readable storage medium of the present application embodiment stores a computer program thereon, which, when executed by a processor, implements the DC offset calibration method of any of the above embodiments.

[0049] The DC offset calibration method, DC offset calibration apparatus, DC offset calibration system, and computer-readable storage medium of this application first traverse multiple control words configured in the DC offset cancellation circuit to determine the DC offset characteristic curve of the radio frequency communication device. Then, based on the curve type of the DC offset characteristic curve, the current number of current control words required for DC offset calibration of the current radio frequency communication device is determined. Next, the current number of current control words is configured in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device. Furthermore, based on the current DC offset characteristic curve, the calibration control word for the current DC offset cancellation circuit is determined and configured in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device. In this way, not only can DC offset calibration of the current radio frequency communication device be achieved to minimize the DC offset voltage, thereby reducing the impact on the performance and reliability of the radio frequency communication device, but calibration time can also be significantly reduced and calibration accuracy improved.

[0050] Additional aspects and advantages of embodiments of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of embodiments of this application. Attached Figure Description

[0051] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, wherein:

[0052] Figure 1 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0053] Figure 2 This is a schematic diagram of the DC offset calibration framework of an RF transmitter according to certain embodiments of this application;

[0054] Figure 3 This is a schematic diagram of the DC offset calibration framework of an RF receiver according to certain embodiments of this application;

[0055] Figure 4 This is a schematic diagram of the DC offset characteristic curve of the Q-path in some embodiments of this application;

[0056] Figure 5 This is a schematic diagram of the DC offset characteristic curve of the I-channel in certain embodiments of this application;

[0057] Figure 6 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0058] Figure 7 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0059] Figure 8 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0060] Figure 9 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0061] Figure 10 This is a flowchart illustrating a DC offset calibration method according to certain embodiments of this application;

[0062] Figure 11 This is a schematic diagram of a DC offset calibration device according to certain embodiments of this application;

[0063] Figure 12 This is a schematic diagram of the DC offset calibration system according to certain embodiments of this application;

[0064] Figure 13 This is a schematic diagram illustrating the connection state between a computer-readable storage medium and a processor according to certain embodiments of this application. Detailed Implementation

[0065] The embodiments of this application will be further described below with reference to the accompanying drawings. The same or similar reference numerals in the drawings denote the same or similar elements or elements having the same or similar functions throughout. Furthermore, the embodiments of this application described below with reference to the accompanying drawings are exemplary and are only used to explain the embodiments of this application, and should not be construed as limiting this application.

[0066] In the field of wireless communication, as the requirements for system performance and reliability continue to increase, integrated circuit designs are required to have higher operating speeds, more complex modulation methods, and more stringent design specifications. For radio frequency (RF) communication devices in wireless communication systems, such as RF transmitters and receivers, DC offset voltage is a crucial performance indicator.

[0067] The main effects of DC offset on RF transmitters include: (1) Local oscillator signal leakage to the transmitter. The output signal of the transmitter not only contains the useful signal, but also the unwanted local oscillator leakage signal, which leads to a deterioration in the error vector magnitude (EVM) of the transmitter (EVM is used to measure the overall quality of the modulation frequency, phase and amplitude errors of the transmitter), and also reduces the power of the useful signal of the transmitter. (2) Orthogonal frequency division multiplexing (OFDM) modulation is often used in wireless communication systems. Strict orthogonality between subcarriers is a key condition for ensuring the performance of RF transmitters. DC offset of RF transmitters directly destroys the orthogonality between OFDM subcarriers, causing inter-symbol interference, which leads to a deterioration in the quality of the transmitted signal. (3) DC offset will cause a deterioration in the linearity and dynamic range of the RF transmitter, and the amplitude and phase of the transmitted I / Q signals will deviate. This deviation will become more obvious as the transmission distance of the signal increases, leading to a decrease in communication quality.

[0068] The main effects of DC offset on RF receivers include: (1) reducing the dynamic range and sensitivity of the RF receiver. When the RF received signal is relatively small, Automatic Gain Control (AGC) will amplify the received signal to the target gain. However, while amplifying the useful signal, the DC offset voltage will also be raised. Therefore, the dynamic range of the RF receiver becomes narrower, and small useful signals cannot be amplified to the target gain, resulting in demodulation failure. As a result, the system performance requirements cannot be met, and the anti-interference capability and sensitivity of the RF receiver are ultimately reduced. (2) If there is a large DC offset voltage in the receiving channel, nonlinear distortion will occur, which will cause the linearity of the RF receiver to deteriorate, further degrading the anti-interference capability and sensitivity of the entire system.

[0069] Therefore, the magnitude of DC offset voltage has a significant impact on the performance of RF transmitters and receivers in wireless communication systems, but it cannot be completely eliminated due to its inherent dependence on integrated circuits. Thus, DC offset calibration is necessary to minimize the DC offset voltage, thereby reducing its impact on the performance and reliability of wireless communication systems.

[0070] DC offset in radio frequency (RF) transmitters in wireless communication systems mainly includes DC offset voltage generated by digital-to-analog converters (DACs), filters, up-conversion circuits, and local oscillator leakage due to limited isolation in mixers. Therefore, to reduce the impact of DC offset on RF transmitter performance, the DC offset voltage needs to be calibrated to be as small as possible. Related technologies include DC offset calibration schemes for RF transmitters, such as:

[0071] (1) Baseband transmits all-zero signals.

[0072] (2) The I / Q signals pass through the DAC, filter, variable gain amplifier (VGA), mixer, and finally the power amplifier (PA) to the port.

[0073] (3) Serial Peripheral Interface (SPI) configuration control words for DC offset cancellation circuit. Each I / Q channel corresponds to an 8-bit DC offset cancellation circuit control word, with a total of 256 control words per channel. The total number of combinations for I / Q channels is 256x256.

[0074] (4) For each control word combination configured for the I / Q channels, the transmitting signal is observed through a spectrum analyzer, and the observed power value and the corresponding control word are manually recorded. In order to calibrate the local oscillator leakage caused by DC offset to be as low as possible, all control word combinations are traversed to find the minimum spectrum analyzer power observation value, and the corresponding control word is the optimal configuration for DC offset calibration.

[0075] (5) Due to the large number of 256x256 configuration control word combinations for both I / Q channels, and the fact that the calibration method involves manually observing the spectrum analyzer, recording the power value and the corresponding control word, traversing all combinations would be extremely labor-intensive and time-consuming. Considering feasibility, we can configure the control words with a certain step interval, for example, a step interval of 32. Then, there are a total of 64 combinations for the full configuration of both I / Q channels. Within this range, we can find the smallest power observation value of the spectrum analyzer, and the corresponding control word is the optimal configuration for DC offset calibration.

[0076] DC offset in radio frequency (RF) receivers in wireless communication systems mainly includes the DC component generated by the local oscillator signal coupled to the mixer, as well as the DC offset voltage introduced by circuits such as VGA, filters, and analog-to-digital converters (ADCs). Therefore, to reduce the impact of DC offset on RF receiver performance, the DC offset voltage needs to be calibrated to be as small as possible. Related technologies include DC offset calibration schemes for RF receivers, such as:

[0077] (1) The radio frequency receiver adopts a low intermediate frequency structure, and DC offset elimination is processed by baseband digital signal processing;

[0078] (2) Since the control word for configuring the DC offset cancellation circuit of the VGA input in the SPI configuration is 8 bits, the number of possible combinations of 256x256 configuration control words for both I and Q channels is enormous. Traversing all control words and calculating the power value by acquiring the digital signal from the baseband to find the minimum DC component would take too long and be impractical. However, considering feasibility, setting the step interval of the configuration control word too large would lead to a significant decrease in calibration performance. Therefore, DC offset cancellation was not performed on the analog signal.

[0079] Therefore, the DC offset calibration schemes for RF transmitters in related technologies have the following drawbacks: Manually observing the spectrum analyzer and recording power values ​​and corresponding control words results in excessively long calibration times, and the testing environment is dependent on the instrument; the full traversal search is extremely labor-intensive and time-consuming, especially when the search range is large, making the calibration time unacceptable. For feasibility, setting step intervals for control word configuration during calibration is necessary, but this comes at the cost of significant loss of calibration accuracy, only finding the optimal value within a certain range. The DC offset calibration schemes for RF receivers in related technologies have the following drawbacks: the full traversal search process in the analog domain for DC offset calibration is too time-consuming and has poor feasibility; DC offset elimination in the baseband digital domain only improves the problem of the DC component being raised when the digital signal gain is amplified, but it cannot solve the problem of the useful signal and DC component being amplified simultaneously during analog gain amplification, leading to a reduction in the useful signal power.

[0080] In view of this, the present application provides a method for quickly and accurately calibrating the DC offset of an RF transmitter and RF receiver in a wireless communication system, in order to solve at least one of the above-mentioned technical problems.

[0081] Please see Figures 1 to 3 The DC offset calibration method of this application includes:

[0082] 010: Traverse the multiple control words configuring the DC offset cancellation circuit and obtain the multiple digital signals corresponding to the RF communication equipment;

[0083] 020: Calculate multiple signal powers based on multiple digital signals, and determine the DC offset characteristic curve of the radio frequency communication equipment based on multiple control words and multiple signal powers;

[0084] 030: Determine the current number of current control words required to perform DC offset calibration on the current RF communication equipment based on the curve type of the DC offset characteristic curve;

[0085] 040: Configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device;

[0086] 050: Determine the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve;

[0087] 060: Configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current RF communication equipment.

[0088] The DC offset calibration method of this application first traverses multiple control words configured in the DC offset cancellation circuit to determine the DC offset characteristic curve of the radio frequency communication device. Then, based on the curve type of the DC offset characteristic curve, it determines the current number of current control words required for DC offset calibration of the current radio frequency communication device. Next, it configures the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device. Furthermore, based on the current DC offset characteristic curve, it determines the calibration control word for the current DC offset cancellation circuit and configures the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device. In this way, not only can DC offset calibration of the current radio frequency communication device be achieved to minimize the DC offset voltage, thereby reducing the impact on the performance and reliability of the radio frequency communication device, but it can also significantly reduce calibration time and improve calibration accuracy.

[0089] Specifically, radio frequency (RF) communication equipment in a wireless communication system may include RF transmitters and RF receivers. See also... Figure 2 In the DC offset calibration scheme of the RF transmitter: the baseband transmits an all-zero signal, and the I / Q signals pass through a DAC, filter, VGA, and mixer, respectively, before finally being transmitted to the port via the PA. Please refer to [link to relevant documentation]. Figure 3 In the DC offset calibration scheme of the RF receiver: the RF input terminal is left floating (i.e., the left side of the low noise amplifier (LNA) is left floating), and the I / Q signals pass through the mixer, VGA, and filter respectively, and are finally sent to the port through the ADC.

[0090] In this circuit, I and Q signals represent the real and imaginary parts of a complex signal, respectively. Both the RF transmitter and receiver are equipped with an I-channel DC offset cancellation circuit and a Q-channel DC offset cancellation circuit. The I-channel DC offset cancellation circuit eliminates the DC offset voltage in the I-channel signal. The Q-channel DC offset cancellation circuit eliminates the DC offset voltage in the Q-channel signal. The principle of DC offset calibration for the RF transmitter and receiver is as follows: the control words for the I-channel and Q-channel DC offset cancellation circuits are configured via SPI to reduce the DC offset of the RF transmitter and receiver, thereby improving their performance and signal quality.

[0091] Since the DC offset of RF transmitters and receivers is related to the characteristics of the circuit itself, the DC offset characteristics tend to stabilize when the circuit technology is stable. Therefore, for a single-chip RF communication device (such as an RF transmitter and receiver), all control words of the DC offset cancellation circuit can be configured via SPI, the baseband acquires digital signals, the software calculates the signal power based on the digital signals, and then the DC offset characteristic curve of the RF communication device can be plotted based on all control words and the corresponding signal power.

[0092] When performing DC offset calibration on current radio frequency communication equipment (such as current radio frequency transmitters and receivers), mathematical analysis is performed based on the curve type of the DC offset characteristic curve to determine the number of current control words required for DC offset calibration, i.e., the fitting method. For example, if the DC offset characteristic curve is a straight line, two points can determine the straight line, and only two different current control words need to be configured in the actual calibration process to fit the current DC offset characteristic curve of the current radio frequency communication equipment. As another example, if the DC offset characteristic curve is a standard parabola, three points can determine the standard parabola, and only three different current control words need to be configured in the actual calibration process to fit the current DC offset characteristic curve of the current radio frequency communication equipment.

[0093] The above process pertains to calibration algorithm analysis, providing a solution for large-scale chip calibration. Although traversing and configuring all control words is a massive undertaking, it is feasible to perform automated software calculations for a single chip without consuming actual calibration time. In the actual calibration process, only the current number of control words needs to be configured in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current RF communication device, without needing to traverse and configure all control words.

[0094] After determining the current DC offset characteristic curve of the current radio frequency communication device, the calibration control word of the current DC offset cancellation circuit, that is, the optimal configuration control word of the current DC offset cancellation circuit, can be determined based on the current DC offset characteristic curve. Then, the calibration control word is configured in the current DC offset cancellation circuit through SPI to complete the DC offset calibration of the current radio frequency communication device.

[0095] Please see Figure 2 In some implementations, the radio frequency communication device is a radio frequency transmitter. Acquiring multiple digital signals corresponding to the radio frequency communication device includes:

[0096] The accompanying receiver receives multiple analog signals output by the radio frequency transmitter and converts these analog signals into multiple digital signals.

[0097] Specifically, when the RF communication equipment is an RF transmitter, DC offset calibration of the RF transmitter requires the addition of a test board. This test board contains a test receiver and power supply circuitry. The test receiver has analog-to-digital (AD) conversion capabilities. When traversing multiple control words configuring the DC offset cancellation circuit, the test receiver can receive multiple analog signals output by the RF transmitter and convert them into multiple digital signals. This allows the baseband to acquire the digital signal (i.e., the DC component), which is then used to subsequently determine the DC offset characteristic curve of the RF transmitter.

[0098] Please see Figure 3 In some embodiments, the radio frequency communication device is a radio frequency receiver. Acquiring multiple digital signals corresponding to the radio frequency communication device includes:

[0099] Acquire multiple digital signals output by the radio frequency receiver.

[0100] Specifically, when the radio frequency communication device is a radio frequency receiver, the radio frequency receiver has an analog domain DC offset calibration function. When traversing multiple control words configuring the DC offset cancellation circuit, after passing through the ADC, the output of the radio frequency receiver is multiple digital signals. Then, the baseband acquires the digital signals (i.e., the DC component) for subsequent determination of the DC offset characteristic curve of the radio frequency receiver.

[0101] It should be noted that, in the embodiments of this application, the difference between the DC offset calibration schemes for the RF transmitter and the RF receiver lies in the fact that the RF transmitter requires the addition of a test board. The other processes—including baseband acquisition of digital signals, software calculation of signal power based on the digital signals, determination of the DC offset characteristic curve, and completion of DC offset calibration—remain the same. The following description will use the DC offset calibration scheme for the RF transmitter as an example.

[0102] As mentioned earlier, since the DC offset of RF transmitters and receivers is related to the characteristics of the circuit itself, the DC offset characteristics tend to stabilize when the circuit technology is stable. Therefore, for an RF transmitter of a single chip, all control words of the DC offset cancellation circuit can be configured via SPI. In some examples, for each configured control word, the baseband acquires N points (e.g., 1024 points) of sampling data, and the software calculates the corresponding signal power based on the N points of sampling data. After traversing and configuring all control words, the DC offset characteristic curve of the RF transmitter can be plotted based on multiple control words and their corresponding signal powers.

[0103] like Figure 4 The figure shows the DC offset characteristic curve of the Q-channel, where the horizontal axis represents the control word configured for the I-channel DC offset cancellation circuit, and the vertical axis represents the signal power value calculated by the software. Figure 5The figure shows the DC offset characteristic curve of the I-channel, where the horizontal axis represents the control word configured for the Q-channel DC offset cancellation circuit, and the vertical axis represents the signal power value calculated by the software. The DC offset characteristics of the I-channel and the Q-channel are independent of each other.

[0104] By performing mathematical analysis based on the type of the DC offset characteristic curve, the current number M of control words required for DC offset calibration of the current RF transmitter can be determined. M depends on the type of the DC offset characteristic curve; for example, if the DC offset characteristic curve is a straight line, then M=2; and if the DC offset characteristic curve is a standard parabola, then M=3.

[0105] It should be noted that, in Figure 4 and Figure 5 In the example, each DC offset characteristic curve is approximately two intersecting straight lines. Since each straight line requires two different current control words, only a total of 8 different current control words need to be configured during the actual calibration process to determine the current DC offset characteristic curves of the I and Q paths.

[0106] Please see Figure 6 In some implementations, configuring the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve (i.e., 040) of the current radio frequency communication device includes:

[0107] 041: Configure the current number of current control words in the current DC offset cancellation circuit, and obtain the current number of current digital signals corresponding to the current RF communication device;

[0108] 042: Calculate the current signal power based on the current number of current digital signals, and fit the current DC offset characteristic curve of the current radio frequency communication device based on the current number of current control words and the current number of current signal power.

[0109] Specifically, by configuring M current control words in the current DC offset cancellation circuit, M current digital signals corresponding to the current RF communication device can be obtained, and the software calculates the current signal power of the M signals. The M current control words and the M current signal powers can be fitted to obtain the current DC offset characteristic curve of the current RF communication device. This process is based on the principle that M points can be fitted with a unique curve, with the horizontal axis representing the control words configured in the I-channel and Q-channel DC offset cancellation circuits, and the vertical axis representing the signal power value calculated by the software.

[0110] As mentioned above Figure 4 and Figure 5 A total of 8 different current control words need to be configured, taking the current DC offset characteristic curves of the I and Q paths as an example.

[0111] Please see Figure 5The current control word of the DC offset cancellation circuit for the fixed I-channel is set to 0. The current control words for the current DC offset cancellation circuit for the Q-channel are set to -64, -40, 40, and 64 respectively. For each configured current control word, 1024 points of sampling data are collected by the baseband. The software calculates the corresponding current signal power value based on these 1024 points of sampling data, denoted as Y1, Y2, Y3, and Y4. The left straight line is fitted with (-64, Y1) and (-40, Y2), and the right straight line is fitted with (40, Y3) and (64, Y4). This allows the determination of the current DC offset characteristic curve for the I-channel. Figure 5 The curves of different colors from top to bottom represent the current DC offset characteristic curves corresponding to different current control words of the I-channel.

[0112] Please see Figure 4 The current control word of the current DC offset cancellation circuit for the fixed Q-path is set to 0. The current control words of the current DC offset cancellation circuit for the I-path are set to -64, -40, 40, and 64 respectively. For each configured current control word, 1024 sampling points are collected from the baseband. The software calculates the corresponding current signal power value based on these 1024 sampling points, denoted as D1, D2, D3, and D4. The left straight line is fitted using (-64, D1) and (-40, D2), and the right straight line is fitted using (40, D3) and (64, D4). This allows the determination of the current DC offset characteristic curve of the Q-path. Figure 4 The curves of different colors from top to bottom represent the current DC offset characteristic curves corresponding to different current control words of the Q-path.

[0113] Please see Figure 7 In some implementations, determining the calibration control word (i.e., 050) of the current DC offset cancellation circuit based on the current DC offset characteristic curve includes:

[0114] 051: Determine the minimum signal power based on the current DC offset characteristic curve;

[0115] 052: Obtain the control word corresponding to the minimum signal power in the current DC offset characteristic curve as the calibration control word for the current DC offset cancellation circuit.

[0116] Specifically, the minimum signal power is the minimum local oscillator leakage caused by DC offset, and the control word corresponding to the minimum signal power is the calibration control word of the current DC offset cancellation circuit. As mentioned above... Figure 4 and Figure 5 For example, the calibration control word for the current DC offset cancellation circuit of the I and Q paths can be determined based on the current DC offset characteristic curves of the I and Q paths. The specific implementation can be as follows:

[0117] exist Figure 5In the middle, the intersection point of the left and right straight lines can be used to determine the minimum signal power (i.e., the minimum DC offset). Then, the control word corresponding to the minimum signal power in the current DC offset characteristic curve is obtained as the calibration control word of the current DC offset cancellation circuit of the Q channel.

[0118] exist Figure 4 In the middle, the intersection point of the left and right straight lines can be used to determine the minimum signal power (i.e., the minimum DC offset). Then, the control word corresponding to the minimum signal power in the current DC offset characteristic curve is obtained as the calibration control word of the current DC offset elimination circuit of the I channel.

[0119] It should be noted that if the horizontal axis value corresponding to the minimum signal power in the current DC offset characteristic curve is not an integer, then the horizontal axis value can be rounded down and used as the calibration control word of the current DC offset cancellation circuit.

[0120] Please see Figure 8 In some implementations, after determining the minimum signal power (i.e., 051) based on the current DC offset characteristic curve, the DC offset calibration method further includes:

[0121] 070: Determine whether the minimum signal power is less than the preset DC offset threshold;

[0122] 080: When the minimum signal power is less than the preset DC offset threshold, it is determined that the DC offset of the current radio frequency communication device meets the requirements, and the process proceeds to the step of configuring the calibration control word in the current DC offset elimination circuit to perform DC offset calibration on the current radio frequency communication device.

[0123] 090: When the minimum signal power is greater than or equal to the preset DC offset threshold, it is determined that the DC offset of the current radio frequency communication equipment does not meet the requirements.

[0124] Specifically, the DC offset calibration method of this application, in addition to determining the calibration control word of the current DC offset cancellation circuit to calibrate the current RF communication device, can also serve as one of the criteria for chip selection. Since the calibration process involves calibrating a large number of chips, if the chip manufacturing process has a large deviation, the DC offset characteristics may be unstable, and the results of the fitting calculation may exceed expectations. A DC offset threshold P is set to meet the system performance requirements. If the DC component obtained from the fitting calculation is less than P, i.e., the minimum signal power is less than P, then the DC offset of the current RF communication device for this chip is considered to meet the requirements. If the DC component obtained from the fitting calculation is greater than or equal to P, i.e., the minimum signal power is greater than or equal to P, then the DC offset of the current RF communication device for this chip is considered not to meet the requirements.

[0125] If the current DC offset of the chip's radio frequency communication device is determined to meet the requirements, the calibration control word can be configured via SPI in the current DC offset elimination circuits of the I and Q channels to perform DC offset calibration on the current radio frequency communication device.

[0126] In one example, the DC offset threshold to meet the system performance requirements is set to P=100. If the DC component calculated by fitting is less than 100, the DC offset of the RF transmitter of this chip is considered to meet the requirements. If the DC component calculated by fitting is greater than or equal to 100, the DC offset of the RF transmitter of this chip is considered to not meet the requirements.

[0127] In this example, assuming a total of 1000 chips are calibrated, if the DC offset of the RF transmitters of 980 chips is determined to meet the requirements, the calibration control words corresponding to the RF transmitters of these 980 chips are configured in the current DC offset cancellation circuits of the I and Q paths via SPI. The remaining 20 chips are then marked as having DC offsets that do not meet the requirements.

[0128] Please see Figure 9 In some embodiments, after configuring the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device (i.e., 060), the DC offset calibration method further includes:

[0129] 0100: Obtain the calibration digital signal corresponding to the current radio frequency communication device;

[0130] 0110: Calculate the calibration signal power based on the calibration digital signal;

[0131] 0120: Determine whether the calibration signal power is less than the preset DC offset threshold;

[0132] 0130: When the calibration signal power is less than the preset DC offset threshold, the DC offset calibration of the current radio frequency communication equipment is determined to be successful.

[0133] Specifically, after the calibration control word is configured via SPI to activate the current DC offset cancellation circuits on the I and Q channels, the baseband acquires N points of sampling data. The software calculates the corresponding signal power (i.e., calibration signal power) based on the N points of sampling data. If the calibration signal power is less than P, the first DC offset calibration of the current RF communication device is considered successful, meaning the DC offset calibration of the current RF communication device is confirmed to be successful. If the calibration signal power is greater than or equal to P, the first DC offset calibration of the current RF communication device is considered unsuccessful.

[0134] Taking the verification of DC offset calibration results for the aforementioned 980 chips that were deemed to meet the DC offset requirements as an example, the calibration control word corresponding to the RF transmitter of these 980 chips is configured in the current DC offset cancellation circuit of the I and Q channels via SPI. The baseband acquires 1024 points of sampling data at a time, and the software calculates the corresponding signal power (i.e., calibration signal power) based on the 1024 points of sampling data. If the calibration signal power is less than 100, the first DC offset calibration of the current RF transmitter is considered successful, meaning the DC offset calibration of the current RF transmitter is confirmed to be passed. If the calibration signal power is greater than or equal to 100, the first DC offset calibration of the current RF transmitter is considered unsuccessful. In this example, the first DC offset calibration of the current RF transmitter of the 980 chips is successful.

[0135] Please see Figure 10 In some implementations, the DC offset calibration method further includes:

[0136] 0140: When the minimum signal power is greater than or equal to the preset DC offset threshold, or the calibration signal power is greater than or equal to the preset DC offset threshold, multiple control words are configured in the current DC offset cancellation circuit at a predetermined step interval, and a predetermined number of current digital signals corresponding to the current radio frequency communication device are acquired.

[0137] 0150: Calculate a predetermined number of current signal powers based on a predetermined number of current digital signals, determine the minimum signal power based on the predetermined number of current signal powers, and then return to the step of determining whether the minimum signal power is less than a preset DC offset threshold;

[0138] 0160: When the minimum signal power is greater than or equal to the preset DC offset threshold, or when the number of times the calibration signal power is greater than or equal to the preset DC offset threshold reaches a predetermined number, the DC offset calibration of the current radio frequency communication equipment is determined to be unsuccessful.

[0139] Specifically, when the minimum signal power is greater than or equal to a preset DC offset threshold, or the calibration signal power is greater than or equal to a preset DC offset threshold—that is, for chips whose DC offset of the current RF communication device does not meet the requirements and chips whose first DC offset calibration of the current RF communication device fails—multiple control words can be configured in the current DC offset cancellation circuit at predetermined step intervals, and a predetermined number of current digital signals corresponding to the current RF communication device can be acquired. Then, a predetermined number of current signal powers are calculated based on the predetermined number of current digital signals, and the minimum signal power is determined based on the predetermined number of current signal powers.

[0140] After determining the minimum signal power, repeat the process once more: determine if the minimum signal power is less than a preset DC offset threshold. If the minimum signal power is still greater than or equal to the preset DC offset threshold, determine that the DC offset of the current RF communication device does not meet the requirements.

[0141] When the minimum signal power is less than the preset DC offset threshold, the DC offset of the current RF communication device is determined to meet the requirements. At this point, the control word corresponding to the minimum signal power is used as the calibration control word, and the process proceeds to configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current RF communication device. Next, the calibration digital signal corresponding to the current RF communication device is acquired; the calibration signal power is calculated based on the calibration digital signal; it is determined whether the calibration signal power is less than the preset DC offset threshold; if the calibration signal power is less than the preset DC offset threshold, the second DC offset calibration of the current RF communication device is determined to be successful. If the calibration signal power is still greater than or equal to the preset DC offset threshold, the second DC offset calibration of the current RF communication device is determined to be unsuccessful.

[0142] Taking the aforementioned 20 chips whose DC offset in the current RF transmitter does not meet the requirements as an example, the step interval S=4 is set for configuring multiple control words, and then the minimum signal power is re-determined: the control word of the current DC offset cancellation circuit of the fixed Q channel is 0, and the control word of the current DC offset cancellation circuit of the I channel takes the value of (-64, ..., 4, ..., 60), for a total of 32 control words (i.e., the predetermined number is 32). For each control word configured, the baseband collects 1024 points of sampling data. The software calculates a corresponding current signal power value based on the 1024 points of sampling data, and then calculates the current signal power value among the 32 current signal power values. The minimum signal power is found in the control word, which is the calibration control word. The control word for the current DC offset cancellation circuit of the fixed I channel is 0, and the control word for the current DC offset cancellation circuit of the Q channel has a value of (-64, ..., 4, ..., 60), for a total of 32 control words (i.e., the predetermined number is 32). For each control word configured, the baseband collects 1024 points of sampling data. The software calculates a corresponding current signal power value based on the 1024 points of sampling data, and then finds the minimum signal power among the 32 current signal power values. The control word corresponding to the minimum signal power is the calibration control word.

[0143] In the above example, the step interval S=4. In other examples, the step interval S can also be any value greater than 1, such as S=8. Compared with the control word configuration (usually S=1) in the full traversal DC offset cancellation circuit of the related art, the embodiment of this application configures fewer control words for chips that do not meet the DC offset requirements or fail the first DC offset calibration, thus still reducing the calibration time.

[0144] If the minimum signal power is less than 100, the calibration control word is configured in the current DC offset cancellation circuit, and the calibration digital signal corresponding to the current RF transmitter is obtained. The calibration signal power is calculated based on the calibration digital signal. If the calibration signal power is less than 100, the second DC offset calibration of the current RF transmitter is determined to have passed. If the calibration signal power is greater than or equal to 100, the second DC offset calibration of the current RF transmitter is determined to have failed.

[0145] In the example above, the predetermined number of times is equal to 2. When verifying the DC offset calibration results: if the first DC offset calibration of the current RF transmitter passes, the DC offset calibration of the current RF transmitter is determined to be passed; if both the first and second DC offset calibrations of the current RF transmitter pass, the DC offset calibration of the current RF transmitter is also determined to be passed; if the first DC offset calibration of the current RF transmitter passes but the second DC offset calibration fails, the DC offset calibration of the current RF transmitter is determined to be failed.

[0146] In the above example, the first DC offset calibration of the current RF transmitter passed for 980 chips; the first and second DC offset calibrations of the current RF transmitter both passed for 16 chips; and the first and second DC offset calibrations both failed for 4 chips. Therefore, the DC offset calibration pass rate for the current RF transmitter with 1000 chips can be calculated as (980+16) / 100 = 99.6%. Furthermore, experiments showed that the average DC offset calibration time per chip is less than 1 second.

[0147] In summary, compared with related technologies, the DC offset calibration method of this application has the following characteristics:

[0148] (1) In the field of wireless communication, the DC offset calibration scheme of radio frequency transmitters in related technologies relies on configuring control words in a full-exhaust DC offset cancellation circuit, manually observing the spectrum analyzer, and recording the power value and the corresponding control word, which will result in excessive calibration time. Unlike related technologies, the implementation method of this application analyzes the DC offset characteristics of the DC offset cancellation circuit. In the actual calibration process, only a small number of control words need to be configured. The software automatically calculates the corresponding values, fits the DC offset characteristic curve, and calculates the optimal calibration result, which can greatly reduce the calibration time. The average calibration time per chip is less than 1 second, which greatly improves the calibration efficiency.

[0149] (2) In the field of wireless communication, the DC offset calibration scheme for radio frequency transmitters in related technologies involves a huge workload of full traversal search. Especially when the search range is large, the calibration time is unacceptably long. Considering feasibility, it is necessary to set step intervals to configure control words for calibration, which comes at the cost of a significant loss of calibration accuracy, only finding the optimal value within a certain range. Unlike related technologies, the implementation method of this application analyzes the DC offset characteristics of the DC offset elimination circuit. In the actual calibration process, only a small number of control words need to be configured. The software automatically calculates the corresponding values, fits the DC offset characteristic curve, calculates the optimal calibration result, and verifies the calculation result. A second calibration is performed based on the first determination that the calibration fails. Since the DC offset characteristics tend to be stable under stable circuit technology conditions, a large proportion of chips pass the calibration by fitting calculation on the first time, and a very small proportion of chips require a second traversal calibration. Moreover, the second calibration can be configured with control words at a certain step interval according to the DC offset characteristics. The two calibrations and verifications of the whole scheme greatly improve the accuracy of calibration.

[0150] (3) The DC offset calibration schemes for RF receivers in related technologies have the following drawbacks: the full traversal search of the analog domain DC offset calibration process takes too long and has poor feasibility; DC offset elimination in the baseband digital domain can only improve the problem that the DC component is also raised when the digital signal gain is amplified, but it cannot solve the problem that the useful signal and the DC component are amplified at the same time during the analog gain amplification process, resulting in a reduction in the useful signal power. Unlike related technologies, the DC offset calibration of the RF receiver in the embodiments of this application adds analog domain DC offset calibration and adopts the same scheme as the DC offset calibration of the RF transmitter, which can quickly and accurately complete the DC offset calibration of the RF receiver and greatly reduce the impact of DC offset on the performance of the RF receiver.

[0151] (4) The DC offset calculation method in the embodiments of this application can be used as one of the criteria for chip screening: Since the calibration process involves calibrating a large number of chips, if the chip process deviation is large, the DC offset characteristics may be unstable, and the result of the fitting calculation in this process will exceed expectations. Set the DC offset threshold that meets the system performance requirements as P. If the DC component obtained by the fitting calculation in this process is less than the threshold P, it is considered that the DC offset of the radio frequency transmitter of this chip meets the requirements; if the DC component obtained by the fitting calculation in this process is greater than or equal to the threshold P, it is considered that the DC offset of the radio frequency transmitter of this chip does not meet the requirements.

[0152] Compared with related technologies, the DC offset calibration method of this application has at least the following advantages:

[0153] (1) Greatly reduces calibration time

[0154] This application provides a method for rapidly calibrating DC offset. Taking an 8-bit control word for a DC offset cancellation circuit as an example, related technologies use a total of 256x256 control words for the I / Q DC offset cancellation circuit. This application calculates the optimal calibration result by fitting the DC offset characteristic curve, typically requiring fewer control words. In the aforementioned specific embodiment, only 8 control words are needed. Furthermore, related technologies rely on a spectrum analyzer to observe the transmitted signal power to find the minimum DC offset, while this application uses baseband data acquisition and software to automatically calculate the signal power for fitting, which can significantly reduce calibration time.

[0155] (2) The calibration results are more accurate

[0156] In related technologies, a full traversal search is extremely labor-intensive. Taking an 8-bit control word for a DC offset cancellation circuit as an example, the total number of configuration control words for the I / Q DC offset cancellation circuit in related technologies is 256x256. Relying on manual observation of the spectrum analyzer to traverse and search for calibration results is not feasible. Therefore, considering feasibility, it is necessary to set a step interval for configuring control words for traversal. For example, setting the step interval to 32 reduces the number of configuration control words to 8x8, at the cost of significantly sacrificing calibration accuracy. Related technologies also consider feasibility in DC offset calibration of RF receivers, performing DC offset cancellation only in the digital domain and not in the analog domain. The embodiment of this application calculates the optimal calibration result by fitting the DC offset characteristics and then re-verifies the calibration result. Since the DC offset characteristics tend to be stable under stable circuit technology conditions, the accuracy of the fitting calculation result is high. Taking the aforementioned specific embodiment as an example, the calibration accuracy of the embodiment of this application is as high as 99.6%. Furthermore, the RF receiver of this application adds analog domain DC offset cancellation, greatly reducing the impact of DC offset on the performance of the RF receiver.

[0157] (3) The criteria for screening chips have been increased.

[0158] Since the calibration process involves calibrating a large number of chips, if the chip manufacturing process has significant deviations, the DC offset characteristics may be unstable, and the results of the fitting calculation in this process may exceed expectations. A DC offset threshold P is set to meet the system performance requirements. If the DC component calculated by this process is less than the threshold P, the DC offset of the chip's RF transmitter is considered to meet the requirements; if the DC component calculated by this process is greater than or equal to the threshold P, the DC offset of the chip's RF transmitter is considered to not meet the requirements.

[0159] Please see Figure 2 , Figure 3 and Figure 11The DC offset calibration device 100 of this application includes a first configuration module 10, a first determination module 20, a second determination module 30, a second configuration module 40, a third determination module 50, and a third configuration module 60. The first configuration module 10 is used to traverse multiple control words configuring the DC offset cancellation circuit and acquire multiple digital signals corresponding to the radio frequency communication device. The first determination module 20 is used to calculate multiple signal powers based on the multiple digital signals and determine the DC offset characteristic curve of the radio frequency communication device based on the multiple control words and the multiple signal powers. The second determination module 30 is used to determine the current number of current control words required to perform DC offset calibration on the current radio frequency communication device based on the curve type of the DC offset characteristic curve. The second configuration module 40 is used to configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device. The third determination module 50 is used to determine the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve. The third configuration module 60 is used to configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device.

[0160] In some embodiments, the radio frequency communication device is a radio frequency transmitter. The first configuration module 10 is specifically used to: receive multiple analog signals output by the radio frequency transmitter through a test receiver, and convert the multiple analog signals into multiple digital signals.

[0161] In some embodiments, the radio frequency communication device is a radio frequency receiver. The first configuration module 10 is specifically used to: acquire multiple digital signals output by the radio frequency receiver.

[0162] In some implementations, the second configuration module 40 is specifically used to: configure the current number of current control words in the current DC offset cancellation circuit, and obtain the current number of current digital signals corresponding to the current radio frequency communication device; calculate the current number of current signal power based on the current number of current digital signals, and fit the current DC offset characteristic curve of the current radio frequency communication device based on the current number of current control words and the current number of current signal power.

[0163] In some implementations, the third determining module 50 is specifically used to: determine the minimum signal power based on the current DC offset characteristic curve; and obtain the control word corresponding to the minimum signal power in the current DC offset characteristic curve as the calibration control word of the current DC offset elimination circuit.

[0164] In some embodiments, the DC offset calibration device 100 further includes a first judgment module, a fourth determination module, and a fifth determination module. The first judgment module is used to determine whether the minimum signal power is less than a preset DC offset threshold. The fourth determination module is used to determine that the DC offset of the current radio frequency communication device meets the requirements when the minimum signal power is less than the preset DC offset threshold, and proceeds to the step of configuring a calibration control word in the current DC offset elimination circuit to perform DC offset calibration on the current radio frequency communication device. The fifth determination module is used to determine that the DC offset of the current radio frequency communication device does not meet the requirements when the minimum signal power is greater than or equal to the preset DC offset threshold.

[0165] In some embodiments, the DC offset calibration device 100 further includes an acquisition module, a calculation module, a second judgment module, and a sixth determination module. The acquisition module acquires the calibration digital signal corresponding to the current radio frequency communication device. The calculation module calculates the calibration signal power based on the calibration digital signal. The second judgment module determines whether the calibration signal power is less than a preset DC offset threshold. The sixth determination module determines that the DC offset calibration of the current radio frequency communication device has passed when the calibration signal power is less than the preset DC offset threshold.

[0166] In some embodiments, the DC offset calibration device 100 further includes a reduction module, a seventh determination module, and an eighth determination module. The reduction module is used to reduce the step interval of the current control word to increase the current quantity and redetermine the minimum signal power when the minimum signal power is greater than or equal to a preset DC offset threshold, or when the calibration signal power is greater than or equal to the preset DC offset threshold. The seventh determination module is used to calculate a predetermined number of current signal powers based on a predetermined number of current digital signals, determine the minimum signal power based on the predetermined number of current signal powers, and then return to the step of determining whether the minimum signal power is less than the preset DC offset threshold. The eighth determination module is used to determine that the DC offset calibration of the current radio frequency communication device has failed when the number of times the minimum signal power is greater than or equal to the preset DC offset threshold, or the number of times the calibration signal power is greater than or equal to the preset DC offset threshold, reaches a predetermined number of times.

[0167] It should be noted that the explanation of the DC offset calibration method in the foregoing embodiments also applies to the DC offset calibration device 100 in the embodiments of this application, and will not be elaborated here.

[0168] Please see Figure 12 The DC offset calibration system 200 of this application includes one or more processors 210 and a memory 220, the memory 220 storing a computer program. When the computer program is executed by the processor 210, the DC offset calibration method of any of the above embodiments is implemented.

[0169] For example, when the computer program is executed by the processor 210, the following DC offset calibration method is implemented:

[0170] 010: Traverse the multiple control words configuring the DC offset cancellation circuit and obtain the multiple digital signals corresponding to the RF communication equipment;

[0171] 020: Calculate multiple signal powers based on multiple digital signals, and determine the DC offset characteristic curve of the radio frequency communication equipment based on multiple control words and multiple signal powers;

[0172] 030: Determine the current number of current control words required to perform DC offset calibration on the current RF communication equipment based on the curve type of the DC offset characteristic curve;

[0173] 040: Configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device;

[0174] 050: Determine the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve;

[0175] 060: Configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current RF communication equipment.

[0176] It should be noted that the explanation of the DC offset calibration method in the foregoing embodiments also applies to the DC offset calibration system 200 of the present application, and will not be elaborated here.

[0177] Please see Figure 13 The computer-readable storage medium 300 of this application embodiment stores a computer program 310 thereon. When the program is executed by the processor 320, it implements the DC offset calibration method of any of the above embodiments.

[0178] For example, when the program is executed by processor 320, the following DC offset calibration method is implemented:

[0179] 010: Traverse the multiple control words configuring the DC offset cancellation circuit and obtain the multiple digital signals corresponding to the RF communication equipment;

[0180] 020: Calculate multiple signal powers based on multiple digital signals, and determine the DC offset characteristic curve of the radio frequency communication equipment based on multiple control words and multiple signal powers;

[0181] 030: Determine the current number of current control words required to perform DC offset calibration on the current RF communication equipment based on the curve type of the DC offset characteristic curve;

[0182] 040: Configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device;

[0183] 050: Determine the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve;

[0184] 060: Configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current RF communication equipment.

[0185] It should be noted that the explanation of the DC offset calibration method in the foregoing embodiments also applies to the computer-readable storage medium 300 in the embodiments of this application, and will not be elaborated here.

[0186] In summary, the DC offset calibration method, DC offset calibration apparatus 100, DC offset calibration system 200, and computer-readable storage medium 300 of this application first traverse multiple control words configured in the DC offset cancellation circuit to determine the DC offset characteristic curve of the radio frequency communication device; then, based on the curve type of the DC offset characteristic curve, determine the current number of current control words required to perform DC offset calibration on the current radio frequency communication device; next, configure the current number of current control words in the current DC offset cancellation circuit to determine the current DC offset characteristic curve of the current radio frequency communication device, and then determine the calibration control word of the current DC offset cancellation circuit based on the current DC offset characteristic curve, and configure the calibration control word in the current DC offset cancellation circuit to perform DC offset calibration on the current radio frequency communication device. In this way, not only can DC offset calibration be performed on the current radio frequency communication device to minimize the DC offset voltage, thereby reducing the impact on the performance and reliability of the radio frequency communication device, but calibration time can also be greatly reduced and calibration accuracy improved.

[0187] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0188] Any process or method described in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the function involved, as will be understood by those skilled in the art to which embodiments of this application pertain.

[0189] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable storage medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, a computer-readable storage medium can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable storage media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable storage medium could be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0190] It should be understood that various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0191] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it includes one or a combination of the steps of the method embodiments. Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc.

[0192] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A direct current offset calibration method, characterized by, The method comprises the following steps: traversing a plurality of control words of a direct current offset cancellation circuit, and obtaining a plurality of digital signals corresponding to a radio frequency communication device; calculating a plurality of signal powers according to the plurality of digital signals, and determining a direct current offset characteristic curve of the radio frequency communication device according to the plurality of control words and the plurality of signal powers; determining a current number of current control words required for direct current offset calibration of a current radio frequency communication device according to a curve type of the direct current offset characteristic curve; configuring the current number of current control words to a current direct current offset cancellation circuit to determine a current direct current offset characteristic curve of the current radio frequency communication device; determining a calibration control word of the current direct current offset cancellation circuit based on the current direct current offset characteristic curve; configuring the calibration control word to the current direct current offset cancellation circuit to calibrate the direct current offset of the current radio frequency communication device. The step of configuring the current number of current control words to the current direct current offset cancellation circuit to determine the current direct current offset characteristic curve of the current radio frequency communication device comprises the following steps: configuring the current number of current control words to the current direct current offset cancellation circuit, and obtaining the current number of current digital signals corresponding to the current radio frequency communication device; calculating the current number of current signal powers according to the current number of current digital signals, and fitting the current number of current control words and the current number of current signal powers to obtain the current direct current offset characteristic curve of the current radio frequency communication device.

2. The direct current offset calibration method of claim 1, wherein, The radio frequency communication device is a radio frequency transmitter, and the step of obtaining a plurality of digital signals corresponding to a radio frequency communication device comprises the following steps: receiving a plurality of analog signals output by the radio frequency transmitter through a test receiver, and converting the plurality of analog signals into the plurality of digital signals.

3. The direct current offset calibration method of claim 1, wherein, The radio frequency communication device is a radio frequency receiver, and the step of obtaining a plurality of digital signals corresponding to a radio frequency communication device comprises the following steps: obtaining the plurality of digital signals output by the radio frequency receiver.

4. The direct current offset calibration method of any one of claims 1-3, wherein, The step of determining a calibration control word of the current direct current offset cancellation circuit based on the current direct current offset characteristic curve comprises the following steps: determining a minimum signal power according to the current direct current offset characteristic curve; obtaining a control word corresponding to the minimum signal power in the current direct current offset characteristic curve as the calibration control word of the current direct current offset cancellation circuit.

5. The direct current offset calibration method of claim 4, wherein, After the step of determining a minimum signal power according to the current direct current offset characteristic curve, the direct current offset calibration method further comprises the following steps: determining whether the minimum signal power is less than a preset direct current offset threshold value; when the minimum signal power is less than the preset direct current offset threshold value, it is determined that the direct current offset of the current radio frequency communication device meets the requirements, and the step of configuring the calibration control word to the current direct current offset cancellation circuit to calibrate the direct current offset of the current radio frequency communication device is entered; when the minimum signal power is greater than or equal to the preset direct current offset threshold value, it is determined that the direct current offset of the current radio frequency communication device does not meet the requirements.

6. The direct current offset calibration method of claim 5, wherein, After the calibration control word is configured to the current direct current offset cancellation circuit to calibrate the current radio frequency communication device, the direct current offset calibration method further comprises: obtaining a calibration digital signal corresponding to the current radio frequency communication device; calculating a calibration signal power according to the calibration digital signal; determining whether the calibration signal power is less than the preset direct current offset threshold value; when the calibration signal power is less than the preset direct current offset threshold value, determining that the direct current offset calibration of the current radio frequency communication device is passed.

7. The direct current offset calibration method of claim 6, wherein, The direct current offset calibration method further comprises: when the minimum signal power is greater than or equal to the preset direct current offset threshold value, or the calibration signal power is greater than or equal to the preset direct current offset threshold value, configuring the plurality of control words to the current direct current offset cancellation circuit at a predetermined step interval, and obtaining a predetermined number of current digital signals corresponding to the current radio frequency communication device; calculating a predetermined number of current signal powers according to the predetermined number of current digital signals, and determining the minimum signal power according to the predetermined number of current signal powers, and then returning to the step of determining whether the minimum signal power is less than the preset direct current offset threshold value; when the minimum signal power is greater than or equal to the preset direct current offset threshold value, or the number of times that the calibration signal power is greater than or equal to the preset direct current offset threshold value reaches a predetermined number of times, determining that the direct current offset calibration of the current radio frequency communication device is not passed.

8. A direct current offset calibration apparatus, characterized by comprising: comprises: a first configuration module, configured to traverse a plurality of control words of a direct current offset cancellation circuit, and obtain a plurality of digital signals corresponding to a radio frequency communication device; a first determination module, configured to calculate a plurality of signal powers according to the plurality of digital signals, and determine a direct current offset characteristic curve of the radio frequency communication device according to the plurality of control words and the plurality of signal powers; a second determination module, configured to determine a current number of current control words required for direct current offset calibration of a current radio frequency communication device according to a curve type of the direct current offset characteristic curve; a second configuration module, configured to configure the current number of current control words to a current direct current offset cancellation circuit, so as to determine a current direct current offset characteristic curve of the current radio frequency communication device; a third determination module, configured to determine a calibration control word of the current direct current offset cancellation circuit based on the current direct current offset characteristic curve; a third configuration module, configured to configure the calibration control word to the current direct current offset cancellation circuit, so as to calibrate the current radio frequency communication device; The second configuration module is specifically configured to: configure the current number of current control words to the current direct current offset cancellation circuit, and obtain a current number of current digital signals corresponding to the current radio frequency communication device; calculate a current number of current signal powers according to the current number of current digital signals, and fit the current number of current control words and the current number of current signal powers to obtain a current direct current offset characteristic curve of the current radio frequency communication device.

9. The direct current offset calibration apparatus of claim 8, wherein, The third determination module is specifically configured to: determine a minimum signal power according to the current direct current offset characteristic curve; Obtaining a control word corresponding to the minimum signal power in the current DC offset characteristic curve as a calibration control word of the current DC offset cancellation circuit.

10. A direct current offset calibration system, characterized by, The DC offset calibration system comprises one or more processors and a memory, and the memory stores a computer program. When the computer program is executed by the processor, the DC offset calibration method in any one of claims 1-7 is implemented.

11. A computer readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor, and the DC offset calibration method in any one of claims 1-7 is implemented.

Images