Anti-fading film layer of a battery and method of making the same

Abstract

The application belongs to the technical field of solar cell anti-degradation, and provides a cell anti-degradation film layer and a preparation method thereof. The anti-degradation film layer comprises, from top to bottom on the upper surface of crystalline silicon, at least one silicon oxide layer, at least two silicon oxynitride layers, at least three silicon nitride layers, a structure layer one, at least two aluminum oxide layers and a doped layer. The refractive index of the structure layer one is 1.8-2.1, and the refractive index of the bottommost silicon nitride layer is 2.4-3.0. The hydrogen content in the bottommost aluminum oxide layer is reduced by dark annealing, and the hydrogen content among the three silicon nitride layers is reduced. The high refractive index of the third silicon nitride layer increases the proportion of parasitic absorption of short-wave ultraviolet light in the film layer, and reduces the incidence of ultraviolet light. The application improves the conduction rate of hydrogen to the silicon wafer body, reduces the hydrogen concentration content at the interface in sequence, and reduces the penetration of ultraviolet light from different angles, so as to realize the anti-ultraviolet degradation of the cell wafer.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cell anti-aging, and in particular relates to an anti-aging film layer of a battery and a preparation method thereof. Background Art

[0002] There are several mechanism explanation models for the attenuation of battery performance:

[0003] 1. UV attenuation mechanism: UV light with photon energy greater than 3.5eV can break Si~H, resulting in increased surface recombination;

[0004] 2. Hydrogen-induced degradation model process 1: During high-temperature screen sintering or low-temperature annealing, hydrogen in the passivation film diffuses into the silicon wafer. The increase in hydrogen content causes the resistivity of the silicon wafer to increase.

[0005] 3. Hydrogen-induced decay model process 2: When the AlOx thickness is too thin, during high-temperature sintering or low-temperature annealing, the H atoms in SiNx can easily diffuse into the silicon wafer through the AlOx, causing the resistivity of the silicon wafer to increase.

[0006] 4. Optical attenuation model: The anti-reflection film layer and the aluminum oxide film layer have a large transmittance to ultraviolet light. Ultraviolet light increases the Si~H fracture ratio at the interface between silicon and aluminum oxide, resulting in increased surface recombination.

[0007] Short-wavelength light penetrates too much through the silicon nitride film layer and the aluminum oxide film layer to reach the front doped layer, causing the ultraviolet light to break more hydrogen bonds in the doped layer. The closer to the doped layer, the higher the concentration of free hydrogen is, the closer it is to the doped layer and the silicon wafer. As a result, the hydrogen content diffused into the body increases, leading to an increase in the resistivity of the silicon wafer and causing power generation to attenuate.

[0008] Therefore, in view of the above attenuation model, it is urgent to provide an anti-attenuation film layer to reduce the attenuation. Summary of the Invention

[0009] The purpose of the present invention is to provide an anti-degradation film layer for a battery to overcome the above-mentioned technical problems existing in the prior art.

[0010] Another object of the present invention is to provide a method for preparing an anti-attenuation film layer for a battery, thereby reducing the proportion of ultraviolet light penetrating through the alumina interface and the silicon wafer surface, lowering the hydrogen content, and slowing down the diffusion rate of H in the gap between the film layers to achieve anti-attenuation.

[0011] To this end, the technical solutions provided by the present invention are as follows:

[0012] The anti-fading film layer of a battery comprises, from top to bottom, a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, an aluminum oxide layer and a doped layer on the upper surface of crystalline silicon, the silicon oxide layer is at least one layer, the silicon oxynitride layer is at least two layers, from top to bottom, the first silicon oxynitride layer and the second silicon oxynitride layer, and the silicon nitride layer is at least three layers, from top to bottom, the first silicon nitride layer, the second silicon nitride layer and the third silicon nitride layer;

[0013] The refractive index of the first silicon oxynitride layer and the second silicon oxynitride layer increases in turn, and the refractive index of the first silicon nitride layer, the second silicon nitride layer and the third silicon nitride layer increases in turn;

[0014] A structure layer one is further arranged between the silicon nitride layer and the aluminum oxide layer, the structure layer one is silicon nitride or silicon oxynitride, the structure layer one is used for reducing the H content at the interface, the refractive index of the structure layer one is 1.8-2.1, the thickness of the structure layer one is 0.5nm-4nm, and the refractive index of the silicon nitride layer adjacent to the structure layer one is 2.4-3.0.

[0015] The aluminum oxide layer is at least two layers, which are an upper aluminum oxide layer and a lower aluminum oxide layer, the thickness of the lower aluminum oxide layer is 1.0nm-3nm, the thickness of the upper aluminum oxide layer is 3nm-6nm, and the lower aluminum oxide layer is annealed at 500℃-700℃ without oxygen after deposition, and the annealing time is 10min-30min.

[0016] When the aluminum oxide layer is more than two layers, the total thickness of all the aluminum oxide layers is 4nm-9nm, and the bottommost aluminum oxide layer is annealed at 500℃-700℃ without oxygen after deposition, and the annealing time is 10min-30min.

[0017] When the silicon nitride layer is three layers, the thickness of the first silicon nitride layer is 8nm-25nm, the thickness of the second silicon nitride layer is 8nm-15nm, and the thickness of the third silicon nitride layer is 10nm-18nm.

[0018] The refractive index of the first silicon nitride layer is 1.9-2.05, the refractive index of the second silicon nitride layer is 1.95-2.15, and the refractive index of the third silicon nitride layer is 2.4-3.0.

[0019] When the silicon nitride layer is more than three layers, the total thickness is equal to that when the silicon nitride layer is three layers, and the refractive index increases in turn from top to bottom.

[0020] The reflectivity of the anti-fading film layer at a short wave of 365nm is 5%-12%.

[0021] The battery is a TOPCON battery, a BC battery or a perc battery.

[0022] A method for preparing an anti-fading film layer of a battery comprises the following steps:

[0023] S1, silicon wafer inspection;

[0024] S2, velveting and cleaning;

[0025] S3, boron diffusion;

[0026] S4, first remove the BSG layer, then back alkali polishing;

[0027] S5, depositing a doping layer on the silicon wafer using LPCVD;

[0028] S6, phosphorus diffusion;

[0029] S7, after removing the PSG layer, chemical cleaning is performed;

[0030] S8, using ALD technology to deposit an aluminum oxide layer on a single side of the silicon wafer with a thickness of 1.0nm~2.5nm; wherein, the temperature of the front zone, middle zone and rear zone of the reaction chamber are all 200℃~310℃, H2O is first introduced with a pulse time of 0s~6s, followed by a purge of 0s~15s, and this cycle is repeated 3 to 8 times; then TMA is introduced with a pulse time of 4s~10s, purges for 5s~15s, and then H2O is introduced with a pulse time of 4s~10s, purges for 5s~15s, and this cycle is repeated 8 to 15 times; the process flow rates of H2O and TMA are both 18sccm~30sccm;

[0031] S9, oxygen-free annealing at 500℃~700℃, annealing time 10min~30min;

[0032] S10, sequentially depositing an aluminum oxide layer / structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer 1 to obtain an anti-fading film layer for the battery;

[0033] Among them, the thickness of the aluminum oxide layer is 3nm~6nm, the thickness of the structural layer is 0.5nm~4nm, the thickness of the silicon nitride layer is 10nm~18nm, the thickness of the silicon nitride layer is 8nm~15nm, and the thickness of the silicon nitride layer is 8nm~25nm;

[0034] S11, back film, screen printing, sintering, light injection, testing and storage in batches.

[0035] The specific process of S10 is as follows: first, an aluminum oxide layer is deposited on a single side of a silicon wafer using ALD technology, and then structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer 1 are deposited in sequence to form a positive film to obtain an anti-attenuation film layer.

[0036] The specific process of S10 is as follows:

[0037] At 400°C~570°C, TMA and N2O are introduced with a TMA flow rate of 20sccm~500sccm, an N2O flow rate of 500sccm~5000sccm, and a reaction time of 0s~200s to deposit an aluminum oxide layer;

[0038] At 400°C to 570°C, SiH4, NH3, and N2O are introduced, with a SiH4 flow rate of 800sccm to 1500sccm, an NH3 flow rate of 9000sccm to 16000sccm, and an N2O flow rate of 0sccm to 5000sccm. The reaction time is 20s to 100s, and a structural layer, a silicon nitride layer or a silicon oxynitride layer, is deposited.

[0039] At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1900 sccm to 4500 sccm and an NH3 flow rate of 4000 sccm to 10000 sccm, and a reaction time of 70s to 200s, to deposit the third silicon nitride layer;

[0040] At 400°C~570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1300sccm~2000sccm, and an NH3 flow rate of 9000sccm~14000sccm, and a reaction time of 50s~250s, to deposit the second silicon nitride layer;

[0041] At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1000sccm to 1800sccm and an NH3 flow rate of 9000sccm to 18000sccm, and a reaction time of 100s to 350s, to deposit a silicon nitride layer.

[0042] At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 800 sccm to 1400 sccm, an NH3 flow rate of 3500 sccm to 7000 sccm, and an N2O flow rate of 4000 sccm to 9000 sccm. The reaction time is 50s to 180s to deposit the second silicon oxynitride layer.

[0043] At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 600 sccm to 1200 sccm, an NH3 flow rate of 2500 sccm to 4500 sccm, and an N2O flow rate of 5000 sccm to 10000 sccm. The reaction time is 60s to 200s to deposit a silicon oxynitride layer.

[0044] At 480°C~570°C, SiH4 and N2O are introduced with a SiH4 flow rate of 500sccm~1100sccm, a N2O flow rate of 8000sccm~16000sccm, and a reaction time of 30s~160s to deposit a silicon oxide layer.

[0045] The specific process of depositing an aluminum oxide layer on a single side of a silicon wafer using ALD technology is as follows: first, H2O is introduced into the reaction chamber with a pulse time of 0s to 6s, followed by a purge of 0s to 15s, and this cycle is repeated 3 to 8 times; then, TMA is introduced with a pulse time of 4s to 10s, purges for 5s to 15s, and then H2O is introduced with a pulse time of 4s to 10s, purges for 5s to 15s, and this cycle is repeated 10 to 40 times;

[0046] Among them, the process flow rates of H2O and TMA are both 10sccm~30sccm, and the temperatures of the front, middle and rear zones of the reaction chamber are all 200℃~310℃.

[0047] The specific method of sequentially depositing structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer to form a positive film is as follows:

[0048] At 400°C to 570°C, SiH4, NH3, and N2O are introduced, with a SiH4 flow rate of 800sccm to 1500sccm, an NH3 flow rate of 9000sccm to 16000sccm, and an N2O flow rate of 0sccm to 5000sccm. The reaction time is 20s to 100s, and a structural layer, a silicon nitride layer or a silicon oxynitride layer, is deposited.

[0049] At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1900 sccm to 4500 sccm and an NH3 flow rate of 4000 sccm to 10000 sccm, and a reaction time of 70s to 200s, to deposit the third silicon nitride layer;

[0050] At 400°C~570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1300sccm~2000sccm, and an NH3 flow rate of 9000sccm~14000sccm, and a reaction time of 50s~250s, to deposit the second silicon nitride layer;

[0051] At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1000sccm to 1800sccm and an NH3 flow rate of 9000sccm to 18000sccm, and a reaction time of 100s to 350s, to deposit a silicon nitride layer.

[0052] At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 800 sccm to 1400 sccm, an NH3 flow rate of 3500 sccm to 7000 sccm, and an N2O flow rate of 4000 sccm to 9000 sccm. The reaction time is 50s to 180s to deposit the second silicon oxynitride layer.

[0053] At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 600 sccm to 1200 sccm, an NH3 flow rate of 2500 sccm to 4500 sccm, and an N2O flow rate of 5000 sccm to 10000 sccm. The reaction time is 60s to 200s to deposit a silicon oxynitride layer.

[0054] At 400°C to 570°C, SiH4 and N2O are introduced, with a SiH4 flow rate of 500sccm to 1100sccm and a N2O flow rate of 8000sccm to 16000sccm, and a reaction time of 30s to 160s to deposit a silicon oxide layer. The beneficial effects of the present invention are:

[0055] The anti-fading film provided by the present invention adds a structural layer with a refractive index of 1.8 to 2.1 while maintaining the thickness of the positive film. The thickness is controlled between 0.5 nm and 4 nm, thereby reducing the hydrogen content between the aluminum oxide and silicon nitride layers. The refractive index of the silicon nitride layer in the existing positive film of the battery is increased from 2.2 to 2.35 to 2.4 to 3.0, and the thickness is controlled between 10 nm and 18 nm. This increases the parasitic absorption of short-wavelength ultraviolet light in the high-refractive film layer, reducing the amount of incident ultraviolet light. Furthermore, increasing the high refractive index of the film layer enhances the passivation effect at the interface, increasing the cell's operating voltage.

[0056] The present invention divides the aluminum oxide film into an upper aluminum oxide layer and a lower aluminum oxide layer. The lower aluminum oxide layer has a thickness of 1.0 nm to 2.5 nm and is subjected to oxygen-free annealing at 500°C to 700°C for 10 to 30 minutes. This eliminates the hydrogen introduced during the aluminum oxide deposition process and transforms it into α-Al2O3 and γ-Al2O3 crystal phases, improving hardness and high-temperature resistance. Furthermore, the hydrogen released by ultraviolet light on the surface diffuses slowly through the film, significantly reducing the amount of hydrogen diffused into the silicon wafer, reducing the upper resistivity of the silicon wafer and improving UV resistance. The upper aluminum oxide layer further passivates surface passivation defects in the annealed lower aluminum oxide layer, maintaining and exceeding the field passivation and chemical passivation effects of the original single aluminum oxide film.

[0057] The high refractive index of silicon nitride layer three of the present invention is significantly different from that of structural layer one. This allows short-wavelength ultraviolet light to enter structural layer one, a relatively optically sparse medium, from silicon nitride layer three at a relatively high angle of incidence, resulting in total reflectivity. This prevents a greater proportion of short-wavelength ultraviolet light from entering structural layer one from silicon nitride layer three, reducing the risk of ultraviolet light penetrating further toward the aluminum oxide and silicon wafer. The reflected ultraviolet light is further consumed and absorbed by silicon nitride layer three and upward, achieving both low short-wavelength reflectivity and low incident light into the aluminum oxide and silicon wafer. This further reduces the hydrogen content of the lower aluminum oxide layer, significantly reducing the hydrogen content. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] Figure 1 This is a schematic diagram of the existing battery cell membrane structure;

[0059] Figure 2 This is a schematic diagram of the film structure of the battery cell of the present invention;

[0060] Figure 3 It is the existing cell preparation process roadmap;

[0061] Figure 4 This is the process roadmap for preparing the battery cell of the present invention;

[0062] Figure 5 This is a full-band reflectivity diagram of the positive film thickness test of the sample 1 of the present invention and the existing film layer.

[0063] Description of main reference numerals:

[0064] 1. Silicon oxide layer; 2. Silicon oxynitride layer 1; 3. Silicon oxynitride layer 2; 4. Silicon nitride layer 1; 5. Silicon nitride layer 2; 6. Silicon nitride layer 3; 7. Lower aluminum oxide layer; 8. P-type doped layer; 9. N-type silicon wafer; 10. Tunneling oxide layer; 11. N++ layer POLY silicon; 12. Back silicon nitride layer 1; 13. Back silicon nitride layer 2; 14. Back silicon oxide layer; 15. Structural layer 1; 16. Upper aluminum oxide layer DETAILED DESCRIPTION

[0065] The following describes the embodiments of the invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the invention from the contents disclosed in this specification.

[0066] Exemplary embodiments of the present invention will now be described with reference to the accompanying drawings. However, the invention may be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided so as to provide a thorough and complete disclosure of the invention and fully convey the scope of the invention to those skilled in the art. The terms used in the exemplary embodiments shown in the drawings are not intended to limit the invention.

[0067] Unless otherwise specified, the terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art. Furthermore, it is understood that terms defined in commonly used dictionaries should be understood to have meanings consistent with the context of their relevant fields and should not be interpreted as idealized or overly formal.

[0068] Example 1

[0069] The present invention provides an anti-degradation film layer for a battery, comprising a silicon oxide layer 1, a silicon oxynitride layer, a silicon nitride layer, an aluminum oxide layer (lower aluminum oxide layer 7), and a doping layer 8, arranged in sequence from top to bottom on the upper surface of crystalline silicon. The silicon oxide layer is at least one layer, the silicon oxynitride layer is at least two layers, namely, silicon oxynitride layer 1 2 and silicon oxynitride layer 2 3, from top to bottom. The silicon nitride layer is at least three layers, namely, silicon nitride layer 1 4, silicon nitride layer 2 5, and silicon nitride layer 3, from top to bottom.

[0070] The refractive indices of the silicon oxynitride layer 1 2 and the silicon oxynitride layer 2 3 increase in sequence, and the refractive indices of the silicon nitride layer 1 4, the silicon nitride layer 2 5 and the silicon nitride layer 3 6 increase in sequence;

[0071] The present invention also includes a structural layer 15 disposed between the silicon nitride layer and the aluminum oxide layer. The structural layer 15 is silicon nitride or silicon oxynitride. The structural layer 15 is used to reduce the H content at the interface. The refractive index of the structural layer 15 is 1.8-2.1, the thickness of the structural layer 15 is 0.5nm-4nm, and the refractive index of the silicon nitride layer adjacent to the structural layer 15 is 2.4-3.0.

[0072] Based on the existing battery film layer, this invention adds a structural layer 15 with a refractive index of 1.9 to 2.0 while maintaining the thickness of the positive film. The thickness is controlled between 0.5 nm and 4 nm, thereby reducing the hydrogen content between the aluminum oxide and silicon nitride film layers and significantly reducing the hydrogen content. The thickness of the positive film is 75 nm ± 10 nm.

[0073] By increasing the refractive index of the silicon nitride layer in the existing solar cell positive film from 2.2-2.35 to 2.4-3.0, the parasitic absorption of short-wavelength ultraviolet light in this high-refractive film increases, reducing the amount of incident ultraviolet light. At the same time, increasing the refractive index of this film layer can enhance the passivation effect at the interface and improve the cell's operating voltage.

[0074] At the same time, the refractive index difference between the high refractive index of the silicon nitride layer three 6 and the structural layer 15 is relatively large, that is, the short-wave ultraviolet light is incident from the optically dense medium silicon nitride layer three 6 to the relatively optically sparse medium structural layer 15, and a larger incident angle is achieved, that is, total reflectivity is obtained, that is, a larger proportion of the short-wave ultraviolet light cannot be incident from the silicon nitride layer three 6 to the structural layer 15, reducing the process of ultraviolet light further penetrating toward the aluminum oxide 7 and the silicon wafer 9; the reflected ultraviolet light is further consumed and absorbed in the silicon nitride layer three 6 and in the upward process, comprehensively achieving the effect of low short-wave ultraviolet reflectivity and low incidence inside the aluminum oxide and silicon wafer 9.

[0075] The purpose of the silicon nitride layer or silicon oxynitride layer of the structural layer 15 is to reduce the hydrogen content of the aluminum oxide layer and the silicon nitride layer 3 6, making it another film layer for reducing the hydrogen content after the improvement of the aluminum oxide layer; the introduction of this film layer significantly reduces the H content at the interface.

[0076] Example 2

[0077] Based on Example 1, this embodiment provides an anti-fading film layer for a battery, wherein the aluminum oxide layer comprises at least two layers, namely an upper aluminum oxide layer 16 and a lower aluminum oxide layer 7. The thickness of the lower aluminum oxide layer 7 is 1.0 nm to 3 nm, and the thickness of the upper aluminum oxide layer 16 is 3 nm to 6 nm. After deposition, the lower aluminum oxide layer 7 is subjected to oxygen-free annealing at 500° C. to 700° C. for 10 min to 30 min.

[0078] When the aluminum oxide layer is greater than two layers, the total thickness of all aluminum oxide layers is 4 nm to 9 nm. After the bottom aluminum oxide layer is deposited, it is annealed at 500° C. to 700° C. without oxygen for 10 min to 30 min.

[0079] In this embodiment, if Figure 2 As shown, the aluminum oxide layer includes an upper aluminum oxide layer 16 and a lower aluminum oxide layer 7 .

[0080] This embodiment takes TOPCON battery cells as an example. Figure 1 This is the existing TOPCON solar cell film structure. The height shown does not represent the thickness of each film layer. The front light-receiving surface is film layer 1 to layer 6.

[0081] The lower alumina layer 7 is annealed at 500-700 DEG C for 10-30 min in an oxygen-free environment, so that the H content introduced during the alumina deposition process is eliminated in advance and converted into alpha-Al2O3 and gamma-Al2O3 crystal phases, the hardness and high-temperature resistance are improved, the H content decomposed by the ultraviolet light on the surface layer is reduced in the interstitial diffusion rate in the film layer, the hydrogen content diffused into the body is significantly reduced, the amplitude of the silicon wafer bulk resistivity is reduced, and the effect of improving the UV resistance is achieved. The upper alumina layer 16 can further passivate the surface passivation defects of the lower alumina layer 7 after annealing, and maintain and exceed the field passivation and chemical passivation effects of the original single film layer alumina.

[0082] The anti-aging film layer of the battery provided by the application adjusts the alumina film layer to the upper alumina layer 16 and the lower alumina layer 7 while maintaining the original passivation film alumina thickness (3-9 nm), the thickness of the lower alumina layer 7 is 1.0-3 nm, the lower alumina layer 7 reduces the H content decomposed by the ultraviolet light on the surface layer in the interstitial diffusion rate in the film layer, so that the hydrogen content diffused into the body is significantly reduced, the amplitude of the silicon wafer bulk resistivity is reduced, and the effect of improving the UV resistance is achieved. The upper alumina layer 16 can further passivate the surface passivation defects of the lower alumina layer after annealing, and maintain and exceed the field passivation and chemical passivation effects of the original single film layer alumina.

[0083] Example 3

[0084] Based on example 2, the anti-aging film layer of the battery provided by the application is a three-layer silicon nitride layer, the thickness of the first silicon nitride layer 4 is 8-25 nm, the thickness of the second silicon nitride layer 5 is 8-15 nm, and the thickness of the third silicon nitride layer 6 is 10-18 nm.

[0085] The refractive index of the first silicon nitride layer 4 is 1.8-2.1, the refractive index of the second silicon nitride layer 5 is 1.95-2.15, and the refractive index of the third silicon nitride layer 6 is 2.4-3.0.

[0086] When the silicon nitride layer is more than three layers, the total thickness is equal to that when the silicon nitride layer is three layers, and the refractive index increases from top to bottom.

[0087] The total thickness of the first silicon nitride layer 4 and the second silicon nitride layer 5 is dynamically adjusted, the total thickness of the whole positive film is unchanged, and the overall color interval is stabilized. The third silicon nitride layer 6 to the second silicon nitride layer 5 also realizes that the short-wave ultraviolet light enters the optical dense medium from the optical sparse medium, part of the ultraviolet light is transmitted to the second silicon nitride layer 5, part of the ultraviolet light is totally reflected into the third silicon nitride layer 6, a part of the ultraviolet light is consumed in the third silicon nitride layer 6, and the ultraviolet light reaches the structure layer one 15 and is totally reflected into the third silicon nitride layer 6, so that the ultraviolet light is consumed in the third silicon nitride layer 6.

[0088] Similarly, the ultraviolet light that penetrates silicon nitride layer 2 5 is partially consumed in this film layer. When it reaches silicon nitride layer 1 4, it is also cut off by the optically dense film layer and enters the optically sparse film layer, where it undergoes total reflection and a penetration mechanism similar to the process from silicon nitride layer 3 6 to silicon nitride layer 2 5; until it reaches the silicon oxide layer, the absorption rate of the short-wave band in the film layer increases, the light reflectivity decreases, and the transmittance decreases.

[0089] Example 4

[0090] Based on Example 3, this example provides an anti-attenuation film layer of a battery, wherein the reflectivity of the anti-attenuation film layer at a short-wave band of 365 nm is 5%-12%.

[0091] Example 5

[0092] Based on Example 2, this example provides an anti-degradation film layer of a battery, wherein the battery is a TOPCON battery, a BC battery, or a PERC battery.

[0093] By adjusting and improving the aluminum oxide film layer and the positive film layer, the present invention can be applied to TOPCON batteries, BC batteries, or PERC batteries to achieve anti-degradation. In addition, other related components of battery production can also achieve anti-degradation effects.

[0094] Example 6

[0095] This embodiment provides a method for preparing an anti-fading film layer of a battery, comprising the following steps:

[0096] S1, silicon wafer 9 inspection;

[0097] S2, velveting and cleaning;

[0098] S3, boron diffusion;

[0099] S4, first remove the BSG layer, then back alkali polishing;

[0100] S5, depositing a doping layer on the silicon wafer using LPCVD;

[0101] S6, phosphorus diffusion;

[0102] S7, after removing the PSG layer, chemical cleaning is performed;

[0103] S8, using ALD technology to deposit a lower aluminum oxide layer 7 on a single side of the silicon wafer 9 with a thickness of 1.0nm~2.5nm; wherein, the temperature of the front zone, middle zone and rear zone of the reaction chamber are all 200℃~310℃, H2O is first introduced with a pulse time of 0s~6s, followed by a purge of 0s~15s, and this cycle is repeated 3 to 8 times; then TMA is introduced with a pulse time of 4s~10s, purges for 5s~15s, and then H2O is introduced with a pulse time of 4s~10s, purges for 5s~15s, and this cycle is repeated 8 to 15 times; the process flow rates of H2O and TMA are both 18sccm~30sccm; the specific reaction parameter settings are shown in Table 1;

[0104] Table 1 Parameters of aluminum oxide layer deposited by ALD

[0105]

[0106] S9, oxygen-free annealing at 500℃~700℃, annealing time 10min~30min;

[0107] S10, depositing aluminum oxide layer 16 / structural layer 15 / silicon nitride layer 3 6 / silicon nitride layer 2 5 / silicon nitride layer 1 4 / silicon oxynitride layer 2 3 / silicon oxynitride layer 1 2 / silicon oxide layer 1 in sequence to obtain an anti-degradation film layer for the battery;

[0108] Among them, the thickness of the upper aluminum oxide layer 16 is 3nm~6nm, the thickness of the structural layer 15 is 0.5nm~4nm, the thickness of the silicon nitride layer 3 6 is 10nm~18nm, the thickness of the silicon nitride layer 2 5 is 8nm~15nm, and the thickness of the silicon nitride layer 1 4 is 8nm~25nm;

[0109] S11, back film, screen printing, sintering, light injection, testing and storage in batches.

[0110] Figure 3 It is the existing battery cell preparation process roadmap, Figure 4 This is the process roadmap for preparing the cell of the present invention, the difference lies in the preparation of the anti-attenuation film layer. Figure 3 and Figure 4 As shown, S8, that is, the processes and process conditions before process 8 are the same; after the positive film process, the subsequent processes and process conditions are the same, which are back film, screen printing and sintering, light injection, and packaging and sorting.

[0111] The lower alumina layer 7 is annealed in an oxygen-free state at 500°C to 700°C for 10min to 30min, so that the H content introduced during the alumina deposition process is eliminated in advance and converted into α~Al2O3 crystal phase and γ~Al2O3 crystal phase, thereby improving the hardness and high temperature resistance. The H content decomposed by ultraviolet light on the surface layer is slowed down in the gap diffusion rate in the film layer, which can achieve a significant reduction in the hydrogen content diffused into the body, reduce the upper range of the silicon wafer resistivity, and achieve the effect of improving UV resistance.

[0112] There are two methods for depositing the upper aluminum oxide layer 16 in S10, see Figure 4 As shown, it can be obtained by improving step 10 of route 1, that is, using ALD single-sided aluminum oxide technology, with process conditions shown in Table 2; it can also be used as a film layer in the positive film, using the positive film process in improved route 2, as shown in Table 4 for the upper aluminum oxide layer 16. The deposition conditions of the remaining film layers are shown in Table 4.

[0113] Table 2 Parameters of aluminum oxide layer deposited by ALD

[0114]

[0115] The present invention not only adds an upper aluminum oxide layer 16 and a structural layer 15, but also improves the process parameters during the positive film process, modifying layers 6 through 4 (i.e., the three silicon nitride layers) of the existing cell. This results in a film structure that differs from existing cells (including differences in refractive index, thickness, etc.). Table 3 shows the positive film structure and process parameters for existing cells, while Table 4 shows the positive film structure and process parameters for the present invention.

[0116] Table 3 Current cell positive film structure and process parameters

[0117]

[0118] Table 4: The positive film structure and process parameters of the cell of the present invention

[0119]

[0120] In order to further illustrate the effect of the present invention, the cells (samples 1, 2, 3, and 4) prepared with the anti-attenuation film of the present invention and the existing cells (comparative example) were subjected to positive film thickness test, full-band reflectivity, and IV test. The reflectivity was tested using a fully automatic standard D8 integrating reflectometer. The results are shown in Figure 5 The IV test results are shown in Table 5 (sample 1 and existing cells).

[0121] The improved cell preparation process using the present invention is as follows:

[0122] S1, silicon wafer 9 inspection;

[0123] S2, velveting and cleaning;

[0124] S3, boron diffusion;

[0125] S4, after removing the BSG layer, back alkali polishing is performed;

[0126] S5, depositing a doping layer on the silicon wafer using LPCVD;

[0127] S6, phosphorus diffusion;

[0128] S7, after removing the PSG layer, chemical cleaning is performed;

[0129] S8, using ALD technology to deposit a lower aluminum oxide layer 7 on a single side of the silicon wafer 9. The temperatures of the front, middle, and rear zones of the reaction chamber are 250°C, 270°C, and 290°C, respectively. H2O is first introduced with a pulse time of 4.5 seconds, followed by a 10-second purge, and this cycle repeats for 5 cycles. TMA is then introduced with a pulse time of 6 seconds, followed by an 11-second purge, followed by H2O with a pulse time of 6.5 seconds, followed by an 11-second purge, and this cycle repeats for 10 cycles. The process flow rates of both H2O and TMA are 22 sccm.

[0130] S9, oxygen-free annealing at 630 °C, constant temperature annealing time 20 min, excluding heating time in and out of the furnace;

[0131] S10, the specific process of depositing an aluminum oxide layer 16 on a single side of a silicon wafer using the ALD technology is as follows: first, H2O is introduced into the reaction chamber with a pulse time of 4.5 seconds, followed by a 10-second purge, and this cycle is repeated 5 times; then, TMA is introduced with a pulse time of 6 seconds, followed by a 11-second purge, and then H2O is introduced with a pulse time of 6.5 seconds, followed by a 11-second purge, and this cycle is repeated 28 times;

[0132] The process flow rates of H2O and TMA were both 22 sccm, and the temperatures of the front, middle, and rear zones of the reaction chamber were 250°C, 270°C, and 290°C, respectively.

[0133] S11, a specific method of sequentially depositing a structural layer 15 / silicon nitride layer 3 6 / silicon nitride layer 2 5 / silicon nitride layer 1 4 / silicon oxynitride layer 2 3 / silicon oxynitride layer 1 2 / silicon oxide layer 1 to form a positive film is as follows:

[0134] At 520° C., SiH 4 and NH 3 were introduced with a SiH 4 flow rate of 300 sccm and an NH 3 flow rate of 9000 sccm for a reaction time of 50 s to deposit a structural layer 15, i.e., a silicon nitride layer.

[0135] At 520°C, SiH4 and NH3 were introduced with a flow rate of 3000 sccm for SiH4 and 7500 sccm for NH3, and a reaction time of 145 s to deposit a silicon nitride layer 6;

[0136] At 520°C, SiH4 and NH3 were introduced with a SiH4 flow rate of 1880 sccm and an NH3 flow rate of 11650 sccm. The reaction time was 150 s to deposit a silicon nitride layer 5.

[0137] At 520°C, SiH4 and NH3 were introduced with a SiH4 flow rate of 1400 sccm and an NH3 flow rate of 14000 sccm for a reaction time of 210 s to deposit a silicon nitride layer 4;

[0138] At 520°C, SiH4, NH3 and N2O were introduced with a SiH4 flow rate of 1200 sccm, an NH3 flow rate of 5400 sccm, and an N2O flow rate of 7400 sccm. The reaction time was 130 s to deposit a silicon oxynitride layer 3;

[0139] At 520°C, SiH4, NH3, and N2O were introduced with a SiH4 flow rate of 900 sccm, an NH3 flow rate of 4000 sccm, and an N2O flow rate of 8800 sccm. The reaction time was 150 s to deposit a silicon oxynitride layer 2.

[0140] At 520°C, SiH4 and N2O were introduced with a SiH4 flow rate of 890 sccm and a N2O flow rate of 11500 sccm for a reaction time of 90 s to deposit a silicon oxide layer 1;

[0141] S12, back film preparation;

[0142] S13, screen printing and sintering;

[0143] S14, light injection;

[0144] S15, packaging and sorting.

[0145] The battery cell (sample 1) obtained in this embodiment is as follows Figure 2 As shown, there are two aluminum oxide layers: an upper aluminum oxide layer 16 and a lower aluminum oxide layer 7. Structural layer 15 is a silicon nitride layer, and there are three silicon nitride layers. Upper aluminum oxide layer 16 is 4.5nm thick, lower aluminum oxide layer 7 is 1.57nm thick, structural layer 15 is 3nm thick, silicon nitride layer 3 6 is 12nm thick, silicon nitride layer 2 5 is 12nm thick, and silicon nitride layer 1 4 is 20nm thick. Layers 3 to 1 (i.e., the two silicon oxynitride and silicon oxide layers) have the same performance and thickness as the existing cell (comparative example).

[0146] When the number of aluminum oxide layers is greater than two, the number of silicon nitride layers is greater than three, and the number of silicon oxynitride layers is greater than two, the process parameters are applicable to the range in Table 4.

[0147] The difference between the preparation process of sample 2 and sample 1 is that the structure-15 membrane layer of S11 is changed from a silicon nitride layer to a silicon nitride oxide layer. The specific parameters are as follows: at 520°C, SiH4, NH3 and N20 are introduced with flow rates of 1300sccm, 9000sccm and 3500sccm respectively, and the reaction time is 40s to deposit the structure-15 silicon nitride layer with a thickness of 2.8nm.

[0148] Compared with the preparation process of Sample 1, S10 of Sample 3 can be merged into the PECVD chamber of S11 to preferentially deposit aluminum oxide. The obtained upper aluminum oxide layer 16 has a thickness of 4.5 nm. The specific parameters are as follows: at 500°C, TMA (trimethylaluminum) and N2O under saturated vapor pressure are introduced with a flow rate ratio of TMA:N2O=85:3500sccm, and the reaction time is 1850s to deposit the upper aluminum oxide layer.

[0149] The preparation process of sample 4 is compared with that of sample 1, in which the parameters of silicon nitride layer three 6 are different in step 11. At 520°C, SiH4 and NH3 are introduced with a SiH4 flow rate of 4500sccm, an NH3 flow rate of 7500sccm, and a reaction time of 145s to deposit silicon nitride layer three 6.

[0150] Under ultraviolet light UV60KWH irradiation, Figure 5 As shown, the reflectivity test effect after improvement by the present invention shows that the reflectivity in the 300~550nm band is significantly reduced. Compared with the existing solar cells, the reflectivity of the test sample of the present invention in this band is reduced from 15.38% to about 9.01%. This fluctuation includes the UVA (315nm~400nm) band.

[0151] Table 5 IV test

[0152]

[0153] Table 5 shows that compared to conventional cells, the power attenuation of cells using the improved invention is reduced from 2.5% to 3.8% to 0.5% to 1.1%. This invention achieves its goal of improving the cell's UV attenuation resistance by reducing the hydrogen conduction rate into the silicon wafer, lowering the free hydrogen concentration at the interface, and reducing UV light penetration.

[0154] The above examples are merely illustrative of the invention and do not constitute a limitation on the scope of protection of the invention. Any design that is identical or similar to the invention falls within the scope of protection of the invention.

Claims

1. An anti-degradation film layer for a battery, comprising a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, an aluminum oxide layer, and a doping layer sequentially arranged on the upper surface of crystalline silicon from top to bottom, characterized in that: The silicon oxide layer is at least one layer, the silicon oxynitride layer is at least two layers, which are silicon oxynitride layer one and silicon oxynitride layer two from top to bottom, and the silicon nitride layer is at least three layers, which are silicon nitride layer one, silicon nitride layer two and silicon nitride layer three from top to bottom; The refractive indices of the first silicon oxynitride layer and the second silicon oxynitride layer increase in sequence, and the refractive indices of the first silicon nitride layer, the second silicon nitride layer, and the third silicon nitride layer increase in sequence; The invention also includes a first structural layer disposed between the silicon nitride layer and the aluminum oxide layer, wherein the first structural layer is silicon nitride or silicon oxynitride, and is used to reduce the H content at the interface. The first structural layer has a refractive index of 1.8 to 2.1, a thickness of 0.5 nm to 4 nm, and a refractive index of the silicon nitride layer adjacent to the first structural layer is 2.4 to 3.

0. The aluminum oxide layer comprises at least two layers, namely an upper aluminum oxide layer and a lower aluminum oxide layer. The thickness of the lower aluminum oxide layer is 1.0 nm to 3 nm, and the thickness of the upper aluminum oxide layer is 3 nm to 6 nm. After the lower aluminum oxide layer is deposited, it is subjected to oxygen-free annealing at 500° C. to 700° C. for 10 min to 30 min. When the aluminum oxide layer is greater than two layers, the total thickness of all aluminum oxide layers is 4 nm to 9 nm. After the bottom aluminum oxide layer is deposited, it is annealed in the absence of oxygen at 500° C. to 700° C. for 10 min to 30 min.

2. The anti-fading film layer of a battery according to claim 1, characterized in that: When the silicon nitride layer is three layers, the thickness of the silicon nitride layer 1 is 8 nm to 25 nm, the thickness of the silicon nitride layer 2 is 8 nm to 15 nm, and the thickness of the silicon nitride layer 3 is 10 nm to 18 nm; The refractive index of the silicon nitride layer 1 is 1.9-2.05, the refractive index of the silicon nitride layer 2 is 1.95-2.15, and the refractive index of the silicon nitride layer 3 is 2.4-3.0; When the number of the silicon nitride layers is greater than three, the total thickness thereof is equal to that when the number of the silicon nitride layers is three, and the refractive index increases from top to bottom.

3. The anti-fading film layer of a battery according to any one of claims 1-2, characterized in that: The reflectivity of the anti-attenuation film layer is 5%-12% at the short-wave band of 365nm.

4. The anti-fading film layer of a battery according to any one of claims 1 to 2, characterized in that: The battery is a TOPCON battery, a BC battery or a perc battery.

5. The method for preparing an anti-fading film layer of a battery according to any one of claims 1 to 2, characterized in that: The following steps are involved: S1, silicon wafer inspection; S2, velveting and cleaning; S3, boron diffusion; S4, first remove the BSG layer, then back alkali polishing; S5, depositing a doping layer on the silicon wafer using LPCVD; S6, phosphorus diffusion; S7, after removing the PSG layer, chemical cleaning is performed; S8, using ALD technology to deposit an aluminum oxide layer on a single side of the silicon wafer with a thickness of 1.0nm~3nm; wherein, the temperature of the front zone, middle zone and rear zone of the reaction chamber are all 200℃~310℃, H2O is first introduced with a pulse time of 0s~6s, followed by a purge of 0s~15s, and this cycle is repeated 3 to 8 times; then TMA is introduced with a pulse time of 4s~10s, purges for 5s~15s, and then H2O is introduced with a pulse time of 4s~10s, purges for 5s~15s, and this cycle is repeated 8 to 15 times; the process flow rates of H2O and TMA are both 18sccm~30sccm; S9, oxygen-free annealing at 500℃~700℃, annealing time 10min~30min; S10, sequentially depositing an aluminum oxide layer / structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer 1 to obtain an anti-fading film layer for the battery; Among them, the thickness of the upper aluminum oxide layer is 3nm~6nm, the thickness of the structural layer 1 is 0.5nm~4nm, the thickness of the silicon nitride layer 3 is 10nm~18nm, the thickness of the silicon nitride layer 2 is 8nm~15nm, and the thickness of the silicon nitride layer 1 is 8nm~25nm; S11, back film, screen printing, sintering, light injection, testing and storage in batches.

6. The method for preparing an anti-fading film layer of a battery according to claim 5, characterized in that: The specific process of S10 is as follows: first, an aluminum oxide layer is deposited on a single side of a silicon wafer using ALD technology, and then structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer 1 are deposited in sequence to form a positive film to obtain an anti-attenuation film layer.

7. The method for preparing an anti-fading film layer of a battery according to claim 5, characterized in that: The specific process of S10 is as follows: At 400°C~570°C, TMA and N2O are introduced with a TMA flow rate of 20sccm~500sccm, an N2O flow rate of 500sccm~5000sccm, and a reaction time of 0s~200s to deposit an aluminum oxide layer; At 400°C to 570°C, SiH4, NH3, and N2O are introduced, with a SiH4 flow rate of 800sccm to 1500sccm, an NH3 flow rate of 9000sccm to 16000sccm, and an N2O flow rate of 0sccm to 5000sccm. The reaction time is 20s to 100s, and a structural layer, a silicon nitride layer or a silicon oxynitride layer, is deposited. At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1900 sccm to 4500 sccm and an NH3 flow rate of 4000 sccm to 10000 sccm, and a reaction time of 70s to 200s, to deposit the third silicon nitride layer; At 400°C~570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1300sccm~2000sccm, and an NH3 flow rate of 9000sccm~14000sccm, and a reaction time of 50s~250s, to deposit the second silicon nitride layer; At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1000sccm to 1800sccm and an NH3 flow rate of 9000sccm to 18000sccm, and a reaction time of 100s to 350s, to deposit a silicon nitride layer. At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 800 sccm to 1400 sccm, an NH3 flow rate of 3500 sccm to 7000 sccm, and an N2O flow rate of 4000 sccm to 9000 sccm. The reaction time is 50s to 180s to deposit the second silicon oxynitride layer. At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 600 sccm to 1200 sccm, an NH3 flow rate of 2500 sccm to 4500 sccm, and an N2O flow rate of 5000 sccm to 10000 sccm. The reaction time is 60s to 200s to deposit a silicon oxynitride layer. At 480°C~570°C, SiH4 and N2O are introduced with a SiH4 flow rate of 500sccm~1100sccm, a N2O flow rate of 8000sccm~16000sccm, and a reaction time of 30s~160s to deposit a silicon oxide layer.

8. The method for preparing an anti-fading film layer of a battery according to claim 6, characterized in that: The specific process of depositing an aluminum oxide layer on a single side of a silicon wafer using ALD technology is as follows: first, H2O is introduced into the reaction chamber with a pulse time of 0s to 6s, followed by a purge of 0s to 15s, and this cycle is repeated 3 to 8 times; then, TMA is introduced with a pulse time of 4s to 10s, purges for 5s to 15s, and then H2O is introduced with a pulse time of 4s to 10s, purges for 5s to 15s, and this cycle is repeated 10 to 40 times; Among them, the process flow rates of H2O and TMA are both 10sccm~30sccm, and the temperatures of the front, middle and rear zones of the reaction chamber are all 200℃~310℃.

9. The method for preparing an anti-fading film layer of a battery according to claim 6, characterized in that: The specific method of sequentially depositing structural layer 1 / silicon nitride layer 3 / silicon nitride layer 2 / silicon nitride layer 1 / silicon oxynitride layer 2 / silicon oxynitride layer 1 / silicon oxide layer to form a positive film is as follows: At 400°C to 570°C, SiH4, NH3, and N2O are introduced, with a SiH4 flow rate of 800sccm to 1500sccm, an NH3 flow rate of 9000sccm to 16000sccm, and an N2O flow rate of 0sccm to 5000sccm. The reaction time is 20s to 100s, and a structural layer, a silicon nitride layer or a silicon oxynitride layer, is deposited. At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1900 sccm to 4500 sccm and an NH3 flow rate of 4000 sccm to 10000 sccm, and a reaction time of 70s to 200s, to deposit the third silicon nitride layer; At 400°C~570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1300sccm~2000sccm, and an NH3 flow rate of 9000sccm~14000sccm, and a reaction time of 50s~250s, to deposit the second silicon nitride layer; At 400°C to 570°C, SiH4 and NH3 are introduced, with a SiH4 flow rate of 1000sccm to 1800sccm and an NH3 flow rate of 9000sccm to 18000sccm, and a reaction time of 100s to 350s, to deposit a silicon nitride layer. At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 800 sccm to 1400 sccm, an NH3 flow rate of 3500 sccm to 7000 sccm, and an N2O flow rate of 4000 sccm to 9000 sccm. The reaction time is 50s to 180s to deposit the second silicon oxynitride layer. At 400°C to 570°C, SiH4, NH3, and N2O are introduced with a SiH4 flow rate of 600 sccm to 1200 sccm, an NH3 flow rate of 2500 sccm to 4500 sccm, and an N2O flow rate of 5000 sccm to 10000 sccm. The reaction time is 60s to 200s to deposit a silicon oxynitride layer. At 400°C~570°C, SiH4 and N2O are introduced, with a SiH4 flow rate of 500sccm~1100sccm, a N2O flow rate of 8000sccm~16000sccm, and a reaction time of 30s~160s to deposit a silicon oxide layer.

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