Light emitting device and display apparatus including same

Abstract

A light emitting device and a display apparatus are provided. The device includes: a semiconductor light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially disposed in a first direction; and an electrode layer covering the second conductive type semiconductor layer and spaced apart from the active layer in the first direction, the second conductive type semiconductor layer being between the electrode layer and the active layer. The semiconductor light emitting structure is configured to emit light having a wavelength (lambda) in a range of about 490 nm to about 700 nm. A minimum distance from the electrode layer to the active layer in the first direction is greater than about 0.05 lambda and less than about 0.24 lambda.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is based upon and claims the benefit of priority from Korean Patent Application No. 10-2024-0032842 filed on March 7, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0003] The present disclosure relates to a light emitting device and a display apparatus including the same, and more particularly, to a light emitting device including an active layer and a display apparatus including the same. Background Art

[0004] Light emitting diode (LED) light sources that convert electrical energy into light energy are widely used as light sources for various display devices, such as lighting systems, televisions, mobile phones, personal computers, laptop computers, personal digital assistants (PDAs), digital cameras, video cameras, viewfinders, microdisplays, three-dimensional (3D) displays, virtual reality displays, or augmented reality displays. Recently, micron-scale ultra-small LEDs or nano-scale ultra-small LEDs using Group II-VI or Group III-V compound semiconductors have been developed, and therefore, there is a growing demand for light-emitting devices having a novel structure for improving light extraction efficiency in such ultra-small LEDs. Summary of the Invention

[0005] One or more embodiments provide a light emitting device having a structure capable of improving light extraction efficiency.

[0006] One or more embodiments also provide a display apparatus including a light emitting device having a structure capable of improving light extraction efficiency.

[0007] According to one aspect of the embodiment, a light-emitting device includes: a semiconductor light-emitting structure, which includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially arranged in a first direction; and an electrode layer, which covers the second conductive type semiconductor layer and is separated from the active layer in the first direction, and the second conductive type semiconductor layer is between the electrode layer and the active layer, wherein the semiconductor light-emitting structure is configured to emit light having a wavelength (λ) in the range of about 490nm to about 700nm, and wherein the minimum distance from the electrode layer to the active layer in the first direction is greater than about 0.05λ and less than about 0.24λ.

[0008] According to another aspect of the present invention, a light-emitting device includes: a first conductive type base semiconductor layer; a semiconductor light-emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially arranged on a main surface in a first direction perpendicular to the main surface of the first conductive type base semiconductor layer; a first electrode surrounding a sidewall of the first conductive type base semiconductor layer; a transparent electrode layer covering the second conductive type semiconductor layer and spaced apart from the active layer in the first direction, the second conductive type semiconductor layer being located between the transparent electrode layer and the active layer; a reflective structure covering a sidewall of each of the semiconductor light-emitting structure and the transparent electrode layer; a second electrode contacting the transparent electrode layer and spaced apart from the second conductive type semiconductor layer in the first direction, the transparent electrode layer being located between the second electrode and the second conductive type semiconductor layer; and a microlens contacting an emission surface including a portion of a rear surface of the first conductive type base semiconductor layer opposite to the main surface and configured to collect and emit light from the semiconductor light-emitting structure. The semiconductor light-emitting structure is configured to emit light having a wavelength (λ) in a range of about 490 nm to about 700 nm. The semiconductor light emitting structure has a width of 100 μm or less in a second direction parallel to the main surface of the first conductivity type base semiconductor layer. The minimum distance from the active layer to the transparent electrode layer in the first direction is greater than 0.05λ and less than 0.24λ. The active layer includes at least one multi-quantum well layer. The thickness of the at least one multi-quantum well layer in the first direction is less than 300 nm.

[0009] According to another aspect of the present invention, a display device includes: a circuit board including a driver circuit; and a pixel array on the circuit board including a plurality of pixels. The pixel array includes: a first conductive type base semiconductor layer having a main surface and a rear surface opposite to each other; a plurality of semiconductor light emitting structures on the main surface of the first conductive type base semiconductor layer and spaced apart from each other in a horizontal direction parallel to the main surface, each of the plurality of semiconductor light emitting structures including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially arranged in a first direction perpendicular to the main surface; a first electrode including a metal layer having a grid shape that penetrates the first conductive type base semiconductor layer in the first direction; a plurality of transparent electrode layers covering the second conductive type semiconductor layer in each of the plurality of semiconductor light emitting structures; a reflective structure covering sidewalls of each of the plurality of semiconductor light emitting structures and the plurality of transparent electrode layers; a plurality of second electrodes penetrating the reflective structure in the first direction and contacting one transparent electrode layer selected from the plurality of transparent electrode layers; and a plurality of microlenses located on the rear surface of the first conductive type base semiconductor layer and overlapping the plurality of semiconductor light emitting structures in the first direction. At least one semiconductor light emitting structure selected from the plurality of semiconductor light emitting structures is configured to emit light having a wavelength (λ) in a range of approximately 490 nm to approximately 700 nm. In the at least one semiconductor light emitting structure, a minimum distance in a first direction from the active layer to a transparent electrode layer among the plurality of transparent electrode layers is greater than approximately 0.05λ and less than approximately 0.24λ. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other aspects will become more apparent from the following description of the embodiments with reference to the accompanying drawings, in which:

[0011] Figure 1 is a cross-sectional view showing a schematic structure of a light emitting device according to some embodiments;

[0012] Figure 2A is a schematic perspective view showing an example of the shape of a semiconductor light emitting structure and a transparent electrode layer according to some embodiments, and Figure 2B is a diagram showing a method according to some embodiments Figure 2A A schematic plan view of a semiconductor light emitting structure;

[0013] Figure 3A is a schematic perspective view illustrating an example of shapes of a semiconductor light emitting structure and a transparent electrode layer included in a light emitting device according to some embodiments, and Figure 3B is a diagram showing a method according to some embodiments Figure 3A A schematic plan view of a planar shape of a semiconductor light emitting structure;

[0014] Figure 4 and Figure 5 schematic plan views illustrating example planar shapes of semiconductor light emitting structures included in light emitting devices according to some embodiments;

[0015] Figure 6 、 Figure 7 and Figure 8 shows a cross-sectional view of a light emitting device according to some embodiments;

[0016] Figure 9A is a cross-sectional view showing a light emitting device according to some embodiments, and Figure 9B is a diagram showing the Figure 9A An enlarged cross-sectional view of the portion indicated by "EX1" in FIG.

[0017] Figure 10 It shows that according to Figure 9A and Figure 9B a diagram showing a relationship between a change in light extraction efficiency at a position of an active layer of a semiconductor light emitting structure in a light emitting device included in FIG, and a position of each of a first multi-quantum well layer and a second multi-quantum well layer included in the active layer;

[0018] Figure 11 is a schematic perspective view showing a display device according to some embodiments, Figure 12 is a diagram showing the Figure 11 The "EX2" portion is an enlarged plan view of the portion, and Figure 13 is a schematic diagram illustrating a method for Figure 11 Line II'

[0019] A portion of the cross section taken along Figure 12 A cross-sectional view of a portion of the assembly taken along line III I';

[0020] Figure 14 and Figure 15 each showing a graph showing simulation results for evaluating light extraction efficiency of a light emitting device according to some embodiments;

[0021] Figure 16 、 Figure 17 and Figure 18 each showing a graph showing simulation results for evaluating light extraction efficiency of a light emitting device according to some embodiments;

[0022] Figure 19A 、 Figure 19B 、 Figure 19C 、 Figure 19D 、 Figure 19E 、 Figure 19F and Figure 19Gsectional views each illustrating a method of manufacturing a display device including a light emitting device according to a process sequence according to some embodiments;

[0023] Figure 20 is a block diagram illustrating an example of an electronic device including a display device or a light emitting device according to some embodiments;

[0024] Figure 21 is a diagram illustrating an example of a mobile device as an application example of an electronic device including a display device or a light emitting device according to some embodiments;

[0025] Figure 22 is a diagram illustrating an example of a head-up display device for a vehicle as an application example of an electronic device including a display device or a light emitting device according to some embodiments;

[0026] Figure 23 is a diagram illustrating an example of augmented reality glasses or virtual reality glasses as an application example of an electronic device including a display device or a light emitting device according to some embodiments;

[0027] Figure 24 A diagram illustrating an example of a large sign as an application example of an electronic device including a display device or a light emitting device according to some embodiments; and

[0028] Figure 25 is a diagram illustrating an example of a wearable display as an application example of an electronic device including a display device or a light emitting device according to some embodiments. DETAILED DESCRIPTION

[0029] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings. The embodiments described herein are example embodiments, and therefore, the present disclosure is not limited thereto and can be implemented in various other forms. Each embodiment provided in the following description does not exclude association with one or more features of another example or another embodiment that is also provided herein or not provided herein but consistent with the present disclosure. It will be understood that when an element or layer is referred to as "on another element or layer", "connected to" or "coupled to" another element or layer, the element or layer may be directly on another element or layer, directly connected to or directly coupled to another element or layer, or there may be an intermediate element or layer. On the contrary, when an element is referred to as "directly on another element or layer", "directly connected to" or "directly coupled to" another element or layer, there is no intermediate element or layer. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. When following a list of elements, expressions such as "at least one of..." modify the entire list of elements without modifying the individual elements of the list. For example, the expression "at least one of a, b, and c" should be understood to include only a, only b, only c, a and b, a and c, b and c, or all of a, b, and c. It will also be understood that even if a certain step or operation of manufacturing an apparatus or structure is described after another step or operation, the step or operation may be performed before the other step or operation unless the other step or operation is described as being performed after the step or operation. In the drawings, the same reference numerals denote the same components, and any redundant description thereof will be omitted.

[0030] Figure 1 is a cross-sectional view illustrating a schematic structure of a light emitting device 100 according to some embodiments.

[0031] Reference Figure 1 The light emitting device 100 may include a first conductive type base semiconductor layer 102 and a semiconductor light emitting structure 110 arranged on a main surface 102M of the first conductive type base semiconductor layer 102. The semiconductor light emitting structure 110 may include a first direction ( Figure 1 The first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 are sequentially stacked on the main surface 102M in the Z direction (in the horizontal direction).

[0032] The semiconductor light emitting structure 110 may include a micro-light emitting diode (LED). In some embodiments, the semiconductor light emitting structure 110 may include a micro-LED that generates light having a color selected from red, green, and blue. As used herein, the term "micro-LED" refers to a micro-LED that generates light in a direction perpendicular to a first direction ( Figure 1 The horizontal direction (e.g., the Z direction in Figure 1For example, the semiconductor light emitting structure 110 has an LED width of 100 μm or less in the horizontal direction (eg, the X direction in FIG). Figure 1 The width in the X direction (in the X direction) may be about 100 μm or less, about 50 μm or less, about 20 μm or less, about 10 μm or less, about 6 μm or less, about 5 μm or less, about 4 μm or less, or about 2 μm or less; however, embodiments are not limited thereto.

[0033] The semiconductor light emitting structure 110 may be configured to emit light having a wavelength (λ) within a range of about 400 nm to about 700 nm.

[0034] In some embodiments, the semiconductor light emitting structure 110 may be configured to emit light having a first wavelength (λ1) in the range of about 580 nm to about 700 nm. The light having the first wavelength (λ1) may be red light. As used herein, the wavelength region of red light refers to a wavelength region of about 580 nm or greater and less than about 700 nm, for example, a wavelength region of about 610 nm to about 650 nm or a wavelength region of about 620 nm to about 640 nm, and at least one emission spectrum peak may exist in the wavelength region of red light.

[0035] In some embodiments, the semiconductor light emitting structure 110 may be configured to emit light having a second wavelength (λ2) in the range of about 490 nm to about 580 nm. The light having the second wavelength (λ2) may be green light. As used herein, the wavelength region of green light refers to a wavelength region of about 490 nm or greater and less than about 580 nm, for example, a wavelength region of about 510 nm to about 550 nm or a wavelength region of about 520 nm to about 540 nm, and at least one emission spectrum peak may exist in the wavelength region of green light.

[0036] In some embodiments, the semiconductor light emitting structure 110 may be configured to emit light having a third wavelength (λ3) in the range of about 400 nm to about 490 nm. The light having the third wavelength (λ3) may be blue light. As used herein, the wavelength region of blue light refers to a wavelength region of about 400 nm or greater and less than about 490 nm, for example, a wavelength region of about 440 nm to about 480 nm or a wavelength region of about 450 nm to about 470 nm, and at least one emission spectrum peak may exist in the wavelength region of blue light.

[0037] Each of the first conductive type base semiconductor layer 102, the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 may include an epitaxial nitride semiconductor layer. The first conductive type base semiconductor layer 102 and the first conductive type semiconductor layer 112 may include nitride semiconductor layers doped with the same type of dopant (e.g., n-type dopant), and the average doping concentration of the first conductive type base semiconductor layer 102 may be higher than the average doping concentration of the first conductive type semiconductor layer 112. Each of the first conductive type semiconductor layer 112 and the second conductive type semiconductor layer 116 may include a single layer or a multilayer including a plurality of layers having different dopant doping concentrations, composition compositions, etc. from each other. The first conductive type base semiconductor layer 102 may be arranged in a first direction ( Figure 1 The first conductive type semiconductor layer 112 is spaced apart from the active layer 114 in the Z direction in FIG. 1 , and is arranged between the first conductive type base semiconductor layer 102 and the active layer 114.

[0038] The first conductive type base semiconductor layer 100 is arranged in a first direction ( Figure 1 The first conductive type semiconductor layer 112 may have a thickness of about 10 nm to about 500 nm in the first direction (Z direction in the middle).

[0039] In the semiconductor light emitting structure 110, the first conductive type semiconductor layer 112 may be integrally connected to the first conductive type base semiconductor layer 102. In some embodiments, the first conductive type base semiconductor layer 102 and the first conductive type semiconductor layer 112 may include the same material. In some embodiments, the first conductive type base semiconductor layer 102 may include n-type gallium nitride (n-GaN). The first conductive type semiconductor layer 112 may include an n-type superlattice structure layer. For example, the first conductive type semiconductor layer 112 may include an InGaN / GaN superlattice structure layer. In this case, the first conductive type semiconductor layer 112 may have a superlattice structure in which InGaN films and GaN films are alternately stacked. In the first conductive type semiconductor layer 112, the superlattice structure may include a paired structure of InGaN films and GaN films of about 10 cycles to about 50 cycles (e.g., about 15 cycles to about 20 cycles); however, the embodiment is not limited thereto.

[0040] In some embodiments, the first conductive type semiconductor layer 112 may include a semiconductor layer having an In x Al y Ga 1-x-yThe first conductive type semiconductor layer 112 may include a nitride semiconductor layer composed of N (0≤x<1, 0≤y<1, 0≤x+y<1). In some embodiments, the first conductive type semiconductor layer 112 may include n-type gallium nitride (n-GaN) doped with silicon (Si), germanium (Ge), or carbon (C). In some embodiments, the first conductive type semiconductor layer 112 may be a semiconductor layer including aluminum indium gallium phosphide (AlInGaP) or aluminum indium gallium arsenide (AlInGaAs).

[0041] In the semiconductor light-emitting structure 110, the active layer 114 can emit light with a specific energy through the recombination of electrons and holes. The active layer 114 can have a single quantum well structure or a multi-quantum well structure in which quantum barrier layers and quantum well layers are alternately arranged. In some embodiments, the active layer 114 can have a single quantum well structure or a multi-quantum well structure, in which the multi-quantum well structure includes a paired structure of one quantum barrier layer and one quantum well layer with 1 to 15 cycles.

[0042] In some embodiments, the active layer 114 may include a quantum barrier layer and a quantum well layer including a compound semiconductor of Group III-V elements. For example, the active layer 114 may include a paired structure selected from InGaN / GaN, InGaN / InGaN, InGaN / AlGaN, and InGaN / InAlGaN; however, the embodiment is not limited thereto.

[0043] In some embodiments, the quantum well layer and the quantum barrier layer may each include In having different compositions from each other. x Al y Ga 1-x-y N layers (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the quantum well layer may include undoped In x Ga 1-x N layer (0<x<1), and the quantum barrier layer may include an undoped GaN layer or a GaN layer doped with silicon (Si).

[0044] In some embodiments, when the quantum barrier layer included in the active layer 114 is In x Ga 1-x When the active layer 114 is composed of N layers (0<x<1), the band gap energy at the active layer 114 can be controlled according to the content ratio of indium (In) in the quantum well layer, thereby controlling the emission wavelength band. x Ga 1-x When the active layer 114 has an N layer (0<x<1), the value of x (which represents the content ratio of indium (In) in the quantum well layer) may be in the range of about 0.15 to about 0.35. For example, when the semiconductor light emitting structure 110 is configured to emit red light, the In content of the quantum well layer included in the active layer 114 may be about 0.15 to about 0.35. xGa 1-x The value of x in the N layer (0<x<1) may be in the range of about 0.3 to about 0.35. When the semiconductor light emitting structure 110 is configured to emit green light, the In ions constituting the quantum well layer included in the active layer 114 may be greater than or equal to 0.1. x Ga 1-x The x value in the N layer (0<x<1) may be in the range of about 0.25 to about 0.3, and when the semiconductor light emitting structure 110 is configured to emit blue light, the In ions constituting the quantum well layer included in the active layer 114 may be in the range of about 0.25 to about 0.3. x Ga 1-x The value of x in the N layer (0<x<1) may be in the range of about 0.15 to about 0.2; however, embodiments are not limited thereto.

[0045] In the first direction ( Figure 1 In the Z direction), the thickness 114T of the active layer 114 may be less than 300 nm. Figure 1 As shown, the active layer 114 may include a surface in contact with the first conductive type semiconductor layer 112 and a surface in contact with the second conductive type semiconductor layer 116, and in the active layer 114, the minimum distance from the surface in contact with the first conductive type semiconductor layer 112 to the surface in contact with the second conductive type semiconductor layer 116 may be less than 300 nm.

[0046] In some embodiments, the active layer 114 may include a multi-quantum well layer, which includes a paired structure of a quantum barrier layer and a quantum well layer with 8 to 12 cycles, wherein the multi-quantum well layer may include a surface in contact with the first conductive type semiconductor layer 112 and a surface in contact with the second conductive type semiconductor layer 116, and in the first direction, the multi-quantum well layer may have a thickness of less than 300 nm.

[0047] In some embodiments, the thickness 114T of the active layer 114 may be less than 300 nm, less than 200 nm, less than 100 nm, less than 50 nm, less than 40 nm, less than 20 nm, less than 10 nm, less than 5 nm, or less than 3 nm. For example, the thickness 114T of the active layer 114 may be in a range of about 2 nm to about 10 nm; however, embodiments are not limited thereto.

[0048] In some embodiments, the thickness 114T of the active layer 114 may be determined based on the wavelength (λ) of light emitted from the semiconductor light emitting structure 110, and the thickness 114T of the active layer 114 may be less than 0.4λ. In one embodiment, when the semiconductor light emitting structure 110 is configured to emit red light having a first wavelength (λ1) in the range of approximately 580 nm to approximately 700 nm, the thickness 114T of the active layer 114 may be less than 0.4λ1. In another embodiment, when the semiconductor light emitting structure 110 is configured to emit green light having a second wavelength (λ2) in the range of approximately 490 nm to approximately 580 nm, the thickness 114T of the active layer 114 may be less than 0.4λ2. In another embodiment, when the semiconductor light emitting structure 110 is configured to emit blue light having a third wavelength (λ3) in the range of approximately 400 nm to approximately 490 nm, the thickness 114T of the active layer 114 may be less than 0.4λ3.

[0049] In the semiconductor light emitting structure 110, the second conductive type semiconductor layer 116 may include a nitride semiconductor layer doped with a p-type dopant. In some embodiments, the second conductive type semiconductor layer 116 may include a nitride semiconductor layer having an In x Al y Ga 1-x-y N (0 ≤ x < 1, 0 ≤ y < 1, 0 ≤ x + y < 1). For example, the second conductive type semiconductor layer 116 may include p-type gallium nitride (p-GaN) doped with magnesium (Mg) or zinc (Zn). However, the embodiment is not limited thereto. In some embodiments, the second conductive type semiconductor layer 116 may be a semiconductor layer including aluminum indium gallium phosphide (AlInGaP) or aluminum indium gallium arsenide (AlInGaAs).

[0050] The light emitting device 100 may include a transparent electrode layer 130 and a reflective electrode layer 170 covering the second conductive type semiconductor layer 116. The transparent electrode layer 130 may be arranged in contact with the second conductive type semiconductor layer 116 and in a first direction ( Figure 1 The reflective electrode layer 170 is spaced apart from the active layer 114 in the first direction (Z direction), and the second conductive type semiconductor layer 116 is arranged between the transparent electrode layer 130 and the active layer 114. Figure 1 The transparent electrode layer 130 is spaced apart from the second conductive type semiconductor layer 116 in the Z direction (in the Z direction), and the transparent electrode layer 130 is arranged between the reflective electrode layer 170 and the second conductive type semiconductor layer 116. The transparent electrode layer 130 may be referred to as an electrode layer, and the reflective electrode layer 170 may be referred to as an electrode layer or a second electrode.

[0051] In the first direction, the minimum distance from the reflective electrode layer 170 to the active layer 114 may be determined according to the wavelength (λ) of light emitted from the semiconductor light emitting structure 110. The minimum distance from the reflective electrode layer 170 to the active layer 114 in the first direction may be greater than 0.05λ and less than 0.4λ. In some embodiments, the minimum distance from the reflective electrode layer 170 to the active layer 114 in the first direction may be greater than 0.05λ and less than 0.24λ.

[0052] like Figure 1 As shown, the second conductive type semiconductor layer 116 may include a surface in contact with the active layer 114 and a surface in contact with the transparent electrode layer 130. In the second conductive type semiconductor layer 116, the surface in contact with the active layer 114 may be opposite to the surface in contact with the transparent electrode layer 130 in the first direction. Thus, when the second conductive type semiconductor layer 116 is disposed between and in contact with the active layer 114 and the transparent electrode layer 130, the minimum distance from the transparent electrode layer 130 to the active layer 114 in the first direction may correspond to a thickness 116T of the second conductive type semiconductor layer 116 in the first direction. The thickness 116T of the second conductive type semiconductor layer 116 may be greater than 0.05λ and less than 0.4λ. In some embodiments, the thickness 116T of the second conductive type semiconductor layer 116 in the first direction may be greater than 0.05λ and less than 0.24λ.

[0053] When the semiconductor light emitting structure 110 is configured to emit red light having a first wavelength (λ1) in a range of about 580 nm to about 700 nm, the thickness 116T of the second conductive type semiconductor layer 116 in the first direction may be greater than 0.05λ and less than 0.24λ, for example, greater than 0.1λ and less than 0.24λ. For example, the thickness 116T of the second conductive type semiconductor layer 116 may be about 29 nm to about 210 nm, about 31 nm to about 180 nm, about 63 nm to about 152 nm, or about 95 nm to about 135 nm; however, the embodiment is not limited thereto.

[0054] When the semiconductor light emitting structure 110 is configured to emit green light having a second wavelength (λ2) in a range of about 490 nm to about 580 nm, the thickness 116T of the second conductive type semiconductor layer 116 in the first direction may be greater than 0.05λ and less than 0.24λ, for example, greater than 0.1λ and less than 0.24λ. For example, the thickness 116T of the second conductive type semiconductor layer 116 may be about 24 nm to about 174 nm, about 26 nm to about 159 nm, about 53 nm to about 128 nm, or about 60 nm to about 100 nm; however, the embodiment is not limited thereto.

[0055] When the semiconductor light emitting structure 110 is configured to emit blue light having a third wavelength (λ3) in a range of about 400 nm to about 490 nm, a thickness 116T of the second conductive type semiconductor layer 116 in the first direction may be greater than 0.05λ and less than 0.4λ, for example, greater than 0.2λ and less than 0.4λ. For example, the thickness 116T of the second conductive type semiconductor layer 116 may be about 80 nm to about 196 nm, about 23 nm to about 184 nm, about 92 nm to about 184 nm, or about 125 nm to about 165 nm; however, the embodiment is not limited thereto.

[0056] The semiconductor light emitting structure 110 may have a cylindrical shape with a central axis extending in a first direction. The semiconductor light emitting structure 110 may be shaped like a cylinder with a central axis extending in a first direction. Figure 1 The semiconductor light emitting structure 110 has a width 110W of less than 100 μm in the X direction (in the X direction). In some embodiments, the width 110W of the semiconductor light emitting structure 110 may be about 100 nm to about 10 μm or about 500 nm to about 1,500 nm.

[0057] The transparent electrode layer 130 may be arranged in a second direction (eg, Figure 1 The transparent electrode layer 130 may have a width that is the same as or similar to the width 110W of the semiconductor light emitting structure 110 in the first direction (in the X direction). The transparent electrode layer 130 may have a variable thickness in the first direction. The portion of the transparent electrode layer 130 that contacts the reflective electrode layer 170 may have a thickness in the first direction that is thinner than the thickness of other portions of the transparent electrode layer 130. In some embodiments, the maximum thickness of the transparent electrode layer 130 in the first direction may be approximately 50 nm to approximately 150 nm, and the portion of the transparent electrode layer 130 that contacts the reflective electrode layer 170 may have a thickness of approximately 30 nm to approximately 70 nm; however, embodiments are not limited thereto.

[0058] The transparent electrode layer 130 may include a transparent conductive material. In some embodiments, the transparent electrode layer 130 may include indium tin oxide (ITO), zinc-doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), magnesium zinc oxide (In4Sn3O), or the like. 12 、Zn (1-x) Mg x In the second direction, the width of the transparent electrode layer 130 may be about 1 nm to about 100 nm, for example, about 7 nm to about 20 nm; however, the embodiment is not limited thereto.

[0059] The reflective electrode layer 170 may include silver (Ag), nickel (Ni), aluminum (Al), chromium (Cr), rhodium (Rh), iridium (Ir), palladium (Pd), ruthenium (Ru), magnesium (Mg), zinc (Zn), platinum (Pt), gold (Au), titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), tungsten (W), or a combination thereof; however, the embodiment is not limited thereto.

[0060] In the plan ( Figure 1 In the XY plane in FIG, the semiconductor light emitting structure 110 may have various planar shapes. For example, the planar shape of the semiconductor light emitting structure 110 may be circular, elliptical, or polygonal. The polygon may be a quadrilateral, a hexagon, or an octagon; however, the embodiment is not limited thereto. In the plan view ( Figure 1 In the XY plane in FIG), the planar shape of the transparent electrode layer 130 and the planar shape of the semiconductor light emitting structure 110 may correspond to each other. The semiconductor light emitting structure 110 and the transparent electrode layer 130 may form a cylindrical shape.

[0061] The sidewall of each of the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 included in the semiconductor light emitting structure 110 and the sidewall of the transparent electrode layer 130 may be covered by the reflective structure 150. Figure 1 In the XY plane in FIG, the semiconductor light emitting structure 110 and the transparent electrode layer 130 may be surrounded by a reflective structure 150. The reflective structure 150 may include a distributed Bragg reflector (DBR). Figure 1 As shown, the reflective structure 150 may have a DBR structure in which a first insulating layer 150A, a second insulating layer 150B, a third insulating layer 150C, and a fourth insulating layer 150D are sequentially stacked. In this regard, the first insulating layer 150A and the third insulating layer 150C may include a first insulating material, and the second insulating layer 150B and the fourth insulating layer 150D may include a second insulating material. The first insulating material and the second insulating material may have different refractive indices. In some embodiments, the first insulating material and the second insulating material may include different materials, and the first insulating material and the second insulating material may each be selected from SiO2, SiON, TiO2, Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO, NbO2, TaO2, and MgF2.

[0062] The first insulating layer 150A of the reflective structure 150 may contact the sidewalls of each of the semiconductor light emitting structure 110 and the transparent electrode layer 130. The first insulating layer 150A may include a material having enhanced total reflection properties. In some embodiments, the first insulating layer 150A may include an insulating material having a refractive index less than or equal to that of the semiconductor light emitting structure 110 and / or the transparent electrode layer 130. For example, the first insulating layer 150A may include SiO2 or MgF2; however, embodiments are not limited thereto. Each of the first insulating layer 150A, the second insulating layer 150B, the third insulating layer 150C, and the fourth insulating layer 150D of the reflective structure 150 may have a thickness of approximately 10 nm to approximately 200 nm.

[0063] The reflective structure 150 can reflect light propagating from the interior of the semiconductor light emitting structure 110 toward the sidewalls to adjust the light distribution. Since the reflective structure 150 includes a DBR, it can function as a bandpass filter (BPF) that suppresses the transmission of light of a specific wavelength and effectively adjusts the light distribution by the difference in transmittance according to the incident angle. In addition, by utilizing the difference in transmittance according to the incident angle of light emitted from the semiconductor light emitting structure 110, the reflective structure 150 can cause a relatively significant increase in the intensity of light emitted from a specific area.

[0064] The light emitting device 100 may include an insulating layer 160 covering the reflective structure 150. In some embodiments, the insulating layer 160 may include silicon oxide, silicon nitride, or a combination thereof. For example, the insulating layer 160 may include tetraethyl orthosilicate (TEOS), undoped silicate glass (USG), phosphosilicate glass (PSG), borosilicate glass (BSG), borophosphosilicate glass (BPSG), fluorinated silicate glass (FSG), spin-on glass (SOG), polysilazane, or a combination thereof.

[0065] The reflective electrode layer 170 may partially cover the insulating layer 160 and may contact the transparent electrode layer 130 by penetrating the reflective structure 150 in the first direction. The reflective electrode layer 170 may include a portion contacting the insulating layer 160 and a portion contacting the reflective structure 150.

[0066] According to about Figure 1In the described light-emitting device 100, by controlling the thickness 116T of the second conductive type semiconductor layer 116 according to the wavelength of light emitted from the semiconductor light-emitting structure 110, the active layer 114 can be arranged at a position in the semiconductor light-emitting structure 110 that helps optimize the light extraction efficiency LEE of the light-emitting device 100. Therefore, the light extraction efficiency of the light-emitting device 100 can be maximized. In addition, since the semiconductor light-emitting structure 110 constitutes a micro-LED having a width of approximately 100 μm or less, the active layer 114 in the semiconductor light-emitting structure 110 can have a multi-quantum well structure to optimize the micro-sized chip including the micro-LED. Therefore, according to some embodiments, a light-emitting device 100 having a structure better optimized for micro-sized chips can be provided.

[0067] Figure 2A is a schematic perspective view showing an example of the shapes of the semiconductor light emitting structure 110 and the transparent electrode layer 130, and Figure 2B is a schematic plan view showing the semiconductor light emitting structure 110 .

[0068] Reference Figure 2A and Figure 2B In a plan view (XY plane), each of the first conductive type semiconductor layer 112, the active layer 114, the second conductive type semiconductor layer 116, and the transparent electrode layer 130 included in the semiconductor light emitting structure 110 may have a quadrilateral planar shape. The semiconductor light emitting structure 110 is in contact with the first conductive type base semiconductor layer 102 (see FIG. Figure 1 The width 110W of the transparent electrode layer 130 in a horizontal direction (e.g., X direction or Y direction) parallel to the main surface 102M of the first conductive type base semiconductor layer 102 may be approximately 100 μm or less, approximately 50 μm or less, approximately 20 μm or less, approximately 10 μm or less, approximately 6 μm or less, approximately 5 μm or less, approximately 4 μm or less, or approximately 2 μm or less; however, the embodiment is not limited thereto. In the horizontal direction (e.g., X direction or Y direction) parallel to the main surface 102M of the first conductive type base semiconductor layer 102, the width of the transparent electrode layer 130 may be the same as or similar to the width 110W of the semiconductor light emitting structure 110.

[0069] In the transparent electrode layer 130 , a local recess 130R may be formed in a surface opposite to a surface contacting the semiconductor light emitting structure 110 . Figure 1 A portion of the reflective electrode layer 170 shown in FIG. 1 may be accommodated in the local recess 130R of the transparent electrode layer 130 .

[0070] Figure 3A and Figure 3B is a diagram illustrating a light emitting device 100A according to some embodiments. Figure 3Ais a schematic perspective view showing an example of the shapes of the transparent electrode layer 130 and the semiconductor light emitting structure 110A included in the light emitting device 100A, and Figure 3B 110A is a schematic plan view illustrating an example of a planar shape of a semiconductor light emitting structure 110A. Figure 3A and Figure 3B The same reference numerals in Figure 1 , and therefore any redundant description will be omitted.

[0071] Reference Figure 3A and Figure 3B , the light emitting device 100A may have Figure 1 The described light emitting device 100 has substantially the same configuration, but may include a semiconductor light emitting structure 110A instead of the semiconductor light emitting structure 110. The semiconductor light emitting structure 110A may include a first conductive type semiconductor layer 112A, an active layer 114A, and a second conductive type semiconductor layer 116A.

[0072] The first conductive type semiconductor layer 112A, the active layer 114A, and the second conductive type semiconductor layer 116A may respectively have Figure 1 、 Figure 2A and Figure 2B The first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 are described as having substantially the same configuration. In a plan view (XY plane), the first conductive type semiconductor layer 112A, the active layer 114A, and the second conductive type semiconductor layer 116A included in the semiconductor light emitting structure 110A may each have a circular planar shape.

[0073] Figure 4 and Figure 5 are plan views illustrating light emitting devices ( 100B and 100C) according to some embodiments. Figure 4 is a schematic plan view showing an example of a planar shape of a semiconductor light emitting structure 110B included in a light emitting device 100B, Figure 5 100C is a schematic plan view showing an example of a planar shape of a semiconductor light emitting structure 110C included in a light emitting device 100C.

[0074] Reference Figure 4 , the light emitting device 100B may have Figure 1 The light emitting device 100 has substantially the same configuration as described above, but may include a semiconductor light emitting structure 110B instead of the semiconductor light emitting structure 110. The semiconductor light emitting structure 110B may have the same configuration as described above. Figure 1 The semiconductor light emitting structure 110B is described as having substantially the same configuration. However, in a plan view (XY plane), the semiconductor light emitting structure 110B may have a square planar shape with rounded edges.

[0075] Reference Figure 5 , the light emitting device 100C may have Figure 1 The light emitting device 100 has substantially the same configuration as described above, but may include a semiconductor light emitting structure 110C instead of the semiconductor light emitting structure 110. The semiconductor light emitting structure 110C may have the same configuration as described above. Figure 1 The semiconductor light emitting structure 110 is described to have substantially the same configuration. However, in a plan view (XY plane), the semiconductor light emitting structure 110C may have a hexagonal planar shape.

[0076] Figure 6 、 Figure 7 and Figure 8 are cross-sectional views illustrating light emitting devices ( 100D, 100E, and 100F) according to some embodiments. Figure 6 、 Figure 7 and Figure 8 The same reference numerals in Figure 1 , and therefore any redundant description will be omitted.

[0077] Reference Figure 6 , the light emitting device 100D may have Figure 1 The light emitting device 100 is described to have substantially the same configuration, but may include a transparent electrode layer 130D instead of the transparent electrode layer 130 .

[0078] The transparent electrode layer 130D may have Figure 1 The transparent electrode layer 130D has substantially the same configuration as that described above. In the transparent electrode layer 130D, the first surface 130D1 facing the second conductive type semiconductor layer 116 and the second surface 130D2 facing the reflective electrode layer 170 may each extend flat in a horizontal direction (e.g., the X direction and / or the Y direction), and the entire transparent electrode layer 130D may be flat in the first direction ( Figure 6 In some embodiments, the thickness of the first surface 130D1 and the second surface 130D2 is substantially uniform. Figure 6 In the Z direction), the transparent electrode layer 130D may have a thickness of about 50 nm to about 150 nm, for example, a thickness of about 100 nm; however, the embodiment is not limited thereto.

[0079] Reference Figure 7 , the light emitting device 100E may have Figure 1The light emitting device 100 described may have substantially the same configuration, but may include an insulating spacer 120E and a reflective structure 150E instead of the reflective structure 150. The insulating spacer 120E and the reflective structure 150E may each cover a sidewall of each of the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 included in the semiconductor light emitting structure 110 in a horizontal direction parallel to the main surface 102M of the first conductive type base semiconductor layer 102.

[0080] The insulating spacer 120E may contact the sidewalls of each of the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 included in the semiconductor light emitting structure 110, and the sidewalls of the transparent electrode layer 130. The reflective structure 150E may be spaced apart from each of the semiconductor light emitting structure 110 and the transparent electrode layer 130, with the insulating spacer 120E disposed between the reflective structure 150E and the semiconductor light emitting structure 110 and between the reflective structure 150E and the transparent electrode layer 130.

[0081] In some embodiments, the insulating spacer 120E may include SiO2, SiON, TiO2, Si3N4, Al2O3, TiN, AlN, ZrO2, TiAlN, TiSiN, HfO, NbO2, TaO2, MgF2, or a combination thereof. The reflective structure 150E may include a metal. For example, the reflective structure 150E may include silver (Ag), nickel (Ni), aluminum (Al), chromium (Cr), rhodium (Rh), iridium (Ir), palladium (Pd), ruthenium (Ru), magnesium (Mg), zinc (Zn), platinum (Pt), gold (Au), titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), tungsten (W), or a combination thereof.

[0082] Reference Figure 8 , the light emitting device 100F may have Figure 1 The light emitting device 100 is described as having substantially the same construction, but may further include a microlens 190 .

[0083] The micro lens 190 may extract light emitted from the semiconductor light emitting structure 110. The micro lens 190 may be oriented in a first direction ( Figure 7The microlens 190 is spaced apart from the first conductive type semiconductor layer 112 in the Z direction (in the Z direction), and the first conductive type base semiconductor layer 102 is arranged between the microlens 190 and the first conductive type semiconductor layer 112. The main surface 102M of the first conductive type base semiconductor layer 102 may be in contact with the first conductive type semiconductor layer 112. The first conductive type base semiconductor layer 102 may also include an emission surface 102E, which includes a portion of the rear surface 102B opposite to the main surface 102M. The microlens 190 may be arranged to overlap with the semiconductor light emitting structure 110 in the first direction. Since the light emitting device 100F also includes the microlens 190, the light extraction efficiency of the light emitting device 100F can be further improved.

[0084] In some embodiments, microlenses 190 may include spherical microlenses or aspherical microlenses. In some embodiments, microlenses 190 may include a gradient refractive index layer formed in a multilayer structure, in which the refractive index gradually decreases in the direction of light propagation. The gradient refractive index layer may be formed using an oblique deposition method, a sputtering method, an evaporation method, or the like. The gradient refractive index layer may have a refractive index that gradually decreases in the direction toward the light output surface. In some embodiments, microlenses 190 may include TiO2, SiC, GaN, GaP, SiN, SiON, ZrO2, ITO, AlN, Al2O3, MgO, SiO2, CaF2, MgF2, or a combination thereof; however, embodiments are not limited thereto.

[0085] Figure 9A is a cross-sectional view illustrating a light emitting device 200 according to some embodiments. Figure 9B It is an enlarged cross-sectional view showing a portion indicated by “ EX1 ”. Figure 9A and Figure 9B The same reference numerals in Figure 1 , and therefore any redundant description will be omitted.

[0086] Reference Figure 9A and Figure 9B , the light emitting device 200 may have Figure 1 The light emitting device 100 is described as having substantially the same configuration, but may include a semiconductor light emitting structure 210 .

[0087] The semiconductor light emitting structure 210 may have Figure 1 The semiconductor light emitting structure 110 is described as having substantially the same configuration, but may include an active layer 214. The active layer 214 may include a first multi-quantum well layer 214A, a spacer barrier layer 214B, and a second multi-quantum well layer 214C sequentially stacked on the first conductive type semiconductor layer 112.

[0088] In the active layer 214, the first multi-quantum well layer 214A may include a surface in contact with the first conductive type semiconductor layer 112, and the second multi-quantum well layer 214C may include a surface in contact with the second conductive type semiconductor layer 116. The spacer barrier layer 214B may be disposed between the first multi-quantum well layer 214A and the second multi-quantum well layer 214C. The first multi-quantum well layer 214A and the second multi-quantum well layer 214C may be arranged in a first direction ( Figure 9A and Figure 9B The first and second multi-quantum well layers 214A and 214C are spaced apart from each other in the Z direction (in the X-axis direction), and the spacer barrier layer 214B is arranged between the first and second multi-quantum well layers 214A and 214C.

[0089] In the active layer 214, the first multi-quantum well layer 214A and the second multi-quantum well layer 214C may each have Figure 1 The active layer 114 is constructed substantially the same as described above. The first multi-quantum well layer 214A and the second multi-quantum well layer 214C may each have a thickness of less than about 300 nm in the first direction. In the first direction, the thickness BT of the spacer barrier layer 214B may be greater than the thickness AT of the first multi-quantum well layer 214A and the thickness CT of the second multi-quantum well layer 214C.

[0090] In the active layer 214, at least one constituent material of the spacer barrier layer 214B may be the same as at least one constituent material selected in the first multi-quantum well layer 214A and the second multi-quantum well layer 214C. In some embodiments, the first multi-quantum well layer 214A and the second multi-quantum well layer 214C may each have a multi-quantum well structure in which a plurality of quantum barrier layers and a plurality of quantum well layers are alternately arranged. For example, in each of the first multi-quantum well layer 214A and the second multi-quantum well layer 214C, the quantum well layer may include undoped In. x Ga 1-x N layer (0<x<1), and the quantum barrier layer may include an undoped GaN layer or a GaN layer doped with silicon (Si). In some embodiments, the spacer barrier layer 214B may include In x Ga 1-x N layer (0<x<1), undoped GaN layer, or GaN layer doped with silicon (Si).

[0091] Figure 10 It shows that according to Figure 9A and Figure 9B A diagram showing the relationship between changes in light extraction efficiency LEE at the position of the active layer 214 of the semiconductor light emitting structure 210 included in the light emitting device 200 and the position of each of the first multi-quantum well layer 214A and the second multi-quantum well layer 214C included in the active layer 214 of the semiconductor light emitting structure 210.

[0092] Reference Figure 10 In the active layer 214, each of the second multi-quantum well layer 214C and the first multi-quantum well layer 214A may be arranged at a position corresponding to the peak values ​​(PK1 and PK2) of the light extraction efficiency LEE of light passing through the active layer 214 of the semiconductor light emitting structure 210. The second multi-quantum well layer 214C may extend from the interface between the second conductive type semiconductor layer 116 and the second multi-quantum well layer 214C to a position passing through the first peak value PK1 of the light extraction efficiency LEE in the first direction (Z direction). The first multi-quantum well layer 214A may extend from the interface between the spacer barrier layer 214B and the first multi-quantum well layer 214A to a position passing through the second peak value PK2 of the light extraction efficiency LEE in the first direction (Z direction).

[0093] Each of the thickness ΔT of the first multi-quantum well layer 214A and the thickness CT of the second multi-quantum well layer 214C may be less than the thickness BT of the spacer barrier layer 214B, and the thickness BT of the spacer barrier layer 214B may be less than the distance between two adjacent peaks (PK1 and PK2) of the light extraction efficiency LEE of light passing through the active layer 214. Each of the thickness ΔT of the first multi-quantum well layer 214A and the thickness CT of the second multi-quantum well layer 214C may be less than 300 nm, less than 200 nm, less than 100 nm, less than 50 nm, less than 40 nm, less than 20 nm, less than 10 nm, less than 5 nm, or less than 3 nm. For example, the thickness 214T of the active layer 214 may be in a range of approximately 2 nm to approximately 10 nm; however, embodiments are not limited thereto. In some embodiments, when the active layer 214 includes a single multi-quantum well layer, each of the thickness ΔT of the first multi-quantum well layer 214A and the thickness CT of the second multi-quantum well layer 214C may be less than the thickness of the single multi-quantum well layer.

[0094] Figures 11 to 13 is a diagram of a display device 400 according to some embodiments. Figure 11 is a schematic perspective view of a display device 400, Figure 12 is Figure 11 An enlarged plan view of the portion indicated by "EX2" in FIG. Figure 13 is schematically shown along Figure 11 A portion of the cross section taken along line II' and along Figure 12 A cross-sectional view of a portion of the component taken along line III I'.

[0095] Reference Figures 11 to 13 , the display device 400 may include a display device arranged in a first direction ( Figure 11Pixel array 410 and circuit board 420 overlap each other in the Z direction (in the Z direction). Circuit board 420 may include a driver circuit. Pixel array 410 may include a plurality of pixels PX arranged in a pixel region PXR on circuit board 420. Display device 400 may also include a frame 402 surrounding pixel array 410 and circuit board 420.

[0096] Circuit board 420 may be a driver circuit board including a plurality of transistors. In some embodiments, circuit board 420 may include an application-specific integrated circuit (ASIC) including a plurality of driver circuits. In some embodiments, circuit board 420 may include a flexible substrate. In this case, display device 400 may be implemented as a variable or curved display device.

[0097] The pixel array 410 may include a pixel region PXR in which a plurality of pixels PX are arranged, a plurality of contact pad regions PAD in which contact pad electrodes 494 are arranged, a connection region CR for interconnecting the pixels PX and the contact pad electrodes 494 , and an edge region ISO.

[0098] The plurality of pixels PX may include a plurality of first sub-pixels SP1, a plurality of second sub-pixels SP2, and a plurality of third sub-pixels SP3 configured to emit light of a specific wavelength (e.g., light of a specific color). The plurality of first sub-pixels SP1, the plurality of second sub-pixels SP2, and the plurality of third sub-pixels SP3 may each include a reference Figure 1 The light emitting device of the configuration described with respect to the semiconductor light emitting structure 110 .

[0099] In some embodiments, the first to third subpixels SP1, SP2, and SP3 may be configured to emit red (R) light, green (G) light, and blue (B) light, respectively. In some embodiments, each of the plurality of pixels PX may include the first to third subpixels SP1, SP2, and SP3 arranged in a Bayer pattern. That is, each of the plurality of pixels PX may include the first subpixel SP1 and the third subpixel SP3 arranged along a first diagonal direction, and two second subpixels SP2 arranged along a second diagonal direction intersecting the first diagonal direction. Figure 12 The first to third subpixels SP1, SP2, and SP3 are shown arranged in a 2×2 Bayer pattern in each of the plurality of pixels PX; however, embodiments are not limited thereto. For example, each of the plurality of pixels PX may have another arrangement, such as 3×3, 4×4, etc. In some embodiments, some of the plurality of pixels PX may be configured to emit light having a color other than red (R), green (G), and blue (B), such as yellow light. Figure 11In the pixel array 410, the plurality of pixels PX are shown in a 15×15 arrangement along the column and row directions; however, the embodiment is not limited thereto. The pixel array 410 may include a different number of pixels PX along the column and row directions, for example, a plurality of pixels PX having a 1,024×768 arrangement.

[0100] A plurality of contact pad areas PAD may be arranged on at least one side of the pixel area PXR along an edge of the display device 400. The plurality of contact pad areas PAD may be electrically connected to the plurality of pixels PX and the driver circuit of the circuit board 420. The display device 400 may be electrically connected to an external device via the plurality of contact pad areas PAD. The number of contact pad areas PAD included in the display device 400 may vary. In some embodiments, the number of the plurality of contact pad areas PAD included in the display device 400 may be determined based on the number of pixels PX included in the pixel array 410, the driving method of the driving circuit included in the circuit board 420, and the like.

[0101] The connection region CR may be arranged between the pixel region PXR and the plurality of contact pad regions PAD. In the connection region CR, the wiring structure is electrically connected to the plurality of pixels PX, for example, Figure 13 A grid electrode 492 and a portion of a common electrode 445 are shown.

[0102] The edge area ISO of the display device 400 may be an area along an edge of the pixel array 410. The semiconductor light emitting structure 110 may not be arranged in the edge area ISO.

[0103] The frame 402 of the display device 400 may be arranged around the pixel array 410 and may serve as a guide defining a space in which the pixel array 410 is arranged. The frame 402 may include a polymer, ceramic, semiconductor, metal, or a combination thereof.

[0104] like Figure 13 As shown, the circuit board 420 may include a semiconductor substrate 422, a driver circuit formed on the semiconductor substrate 422 and including a plurality of driver devices 424 including transistors, a plurality of interconnections 426 electrically connected to the plurality of driver devices 424, and a plurality of wiring lines 430 connected to the plurality of interconnections 426. The plurality of driver devices 424, the plurality of interconnections 426, and the plurality of wiring lines 430 constituting the driver circuit may be covered by an insulating layer 428. The circuit board 420 may further include a first bonding insulating layer 440 on the insulating layer 428 and a plurality of first bonding electrodes 442 penetrating the first bonding insulating layer 440 and connected to the plurality of wiring lines 430.

[0105] The semiconductor substrate 422 may include a plurality of impurity regions 432 constituting source / drain regions of a plurality of transistors constituting a plurality of driver devices 424. The semiconductor substrate 422 may include a semiconductor such as silicon (Si) or germanium (Ge), or a compound semiconductor such as SiGe, SiC, GaAs, InAs, or InP. The semiconductor substrate 422 may also include a plurality of through-electrodes 450 connected to the driver circuit, such as through-silicon vias (TSVs), and a plurality of substrate wiring lines 452 connected to the plurality of through-electrodes 450.

[0106] The driver circuit may be a circuit for controlling the driving of the pixel PX or the first to third sub-pixels SP1, SP2, and SP3. Some of the plurality of impurity regions 432 may be electrically connected to at least one of the first to third sub-pixels SP1, SP2, and SP3 via the interconnect 426, the wiring line 430, and the first bonding electrode 442. In some embodiments, some of the plurality of impurity regions 432 may be connected to one of the plurality of substrate wiring lines 452 via the through electrode 450.

[0107] The upper surface of the plurality of first bonding electrodes 442 and the upper surface of the first bonding insulating layer 440 may constitute the upper surface of the circuit board 420. The plurality of first bonding electrodes 442 included in the circuit board 420 may be bonded to the plurality of second bonding electrodes 176 included in the pixel array 410 and provide an electrical connection path. In some embodiments, the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176 may each include a copper (Cu) film. Each of the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176 may also include a barrier metal layer surrounding the copper (Cu) film. The barrier metal layer may include Ta, TaN, or a combination thereof.

[0108] The first bonding insulating layer 440 included in the circuit board 420 may be bonded to the second bonding insulating layer 162 included in the pixel array 410. Each of the first bonding insulating layer 440 and the second bonding insulating layer 162 may include SiO, SiN, SiCN, SiOC, SiON, SiOCN, or a combination thereof.

[0109] In the pixel array 410, each of the first to third sub-pixels SP1, SP2, and SP3 may include Figure 1The semiconductor light emitting structure 110 described above. More specifically, the pixel array 410 may include a first conductive type base semiconductor layer 102 and a plurality of semiconductor light emitting structures 110, the first conductive type base semiconductor layer 102 including a main surface 102M and a back surface 102B facing each other, and the plurality of semiconductor light emitting structures 110 are arranged on the main surface 102M of the first conductive type base semiconductor layer 102. The plurality of semiconductor light emitting structures 110 may be spaced apart from each other in a horizontal direction parallel to the main surface 102M of the first conductive type base semiconductor layer 102. Each of the plurality of semiconductor light emitting structures 110 may include a first conductive type semiconductor layer 112, an active layer 114, and a second conductive type semiconductor layer 116 sequentially stacked in a first direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102. The detailed configurations of the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 are each the same as those described above with respect to Figure 1 Same description.

[0110] The pixel array 410 may further include a grid electrode 492 that penetrates the first conductive type base semiconductor layer 102 in a first direction. The grid electrode 492 may include a metal layer having a grid shape. The grid electrode 492 may be referred to as a first electrode. The grid electrode 492 may include local regions extending along the areas between the plurality of semiconductor light emitting structures 110 in a plane view parallel to the main surface 102M of the first conductive type base semiconductor layer 102. The local regions of the grid electrode 492 may be connected to each other to form a single layer and may be arranged to surround each of the plurality of semiconductor light emitting structures 110. The local regions of the grid electrode 492 may be connected to each other to form a grid shape or a mesh shape. Thus, since the grid electrode 492 is arranged to fill the spaces between the plurality of semiconductor light emitting structures 110, current diffusion may be improved, and the light emission efficiency at the pixel array 410 of the display device 400 may be increased. In some embodiments, by forming the grid electrode 492 using an electroplating process, the relatively narrow spaces between the plurality of semiconductor light emitting structures 110 may be stably filled.

[0111] A portion of the grid electrode 492 may be in contact with a sidewall of the first conductive type base semiconductor layer 102. Another portion of the grid electrode 492 may be in contact with the rear surface 102B of the first conductive type base semiconductor layer 102 to define an emission surface 102E including a portion of the rear surface 102B of the first conductive type base semiconductor layer 102. In some embodiments, the grid electrode 492 may include silver (Ag), nickel (Ni), aluminum (Al), chromium (Cr), rhodium (Rh), iridium (Ir), palladium (Pd), ruthenium (Ru), magnesium (Mg), zinc (Zn), platinum (Pt), gold (Au), or a combination thereof.

[0112] A plurality of microlenses 496 may be arranged on the emission surface 102E defined by the grid electrode 492 of the rear surface 102B of the first conductive type base semiconductor layer 102. Each of the plurality of microlenses 496 may be in contact with a portion of the grid electrode 492 covering the rear surface 102B. The plurality of microlenses 496 may be arranged to overlap with the plurality of semiconductor light emitting structures 110 in a direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102. The detailed configuration of the plurality of microlenses 496 is similar to that described in relation to FIG. Figure 8 The configuration of the described microlenses 190 is substantially the same.

[0113] The pixel array 410 of the display device 400 may further include a transparent electrode layer 130, a reflective structure 150, and a reflective electrode layer 170 that penetrates the reflective structure 150 and contacts the transparent electrode layer 130. The detailed structures of the transparent electrode layer 130, the reflective structure 150, and the reflective electrode layer 170 are similar to those described in the previous section. Figure 1 Same as described.

[0114] The plurality of semiconductor light emitting structures 110 included in the pixel array 410 of the display device 400 may be configured to emit light having a wavelength (λ) in the range of approximately 400 nm to approximately 700 nm, for example, light having a wavelength (λ) in the range of approximately 490 nm to approximately 700 nm. The minimum distance from the transparent electrode layer 130 to the active layer 114 in a direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102 may be determined according to the wavelength (λ) of light emitted from the semiconductor light emitting structure 110. The minimum distance from the reflective electrode layer 170 to the active layer 114 in a direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102 may be greater than 0.05λ and less than 0.4λ. In some embodiments, the minimum distance from the reflective electrode layer 170 to the active layer 114 in a direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102 may be greater than 0.05λ and less than 0.24λ.

[0115] In the pixel array 410 of the display device 400 , the plurality of second bonding electrodes 176 may be connected to the plurality of reflective electrode layers 170 , and the second bonding insulating layer 162 surrounding the plurality of second bonding electrodes 176 may be in contact with a portion of the reflective electrode layer 170 and may be in contact with the insulating layer 160 covering the reflective structure 150 .

[0116] The display device 400 may further include a common electrode 445 and an internal pad electrode 447 . In the pixel array 410 , the insulating layer 160 covering the reflective electrode layer 170 may extend to the connection region CR and the contact pad region PAD to cover the common electrode 445 and the internal pad electrode 447 .

[0117] The grid electrode 492 may extend from the pixel region PXR to the connection region CR and may be in physical contact with the first conductive type base semiconductor layer 102 and the common electrode 445 in the connection region CR. The grid electrode 492 may be electrically connected to the first conductive type base semiconductor layer 102 and the common electrode 445. In the contact pad region PAD, the contact pad electrode 494 may be disposed on the internal pad electrode 447.

[0118] The plurality of second bonding electrodes 176 may be connected to the common electrode 445. In a plan view parallel to the main surface 102M of the first conductive type base semiconductor layer 102, the common electrode 445 may have a ring shape or a square ring shape surrounding the pixel area PXA. However, the arrangement of the common electrode 445 may be variously modified or changed as needed.

[0119] In the contact pad area PAD, the contact pad electrode 494 may be arranged on the inner pad electrode 447. The inner pad electrode 447 may contact the contact pad electrode 494. The inner pad electrode 447 may be arranged between the contact pad electrode 494 and the second bonding electrode 176, and interconnect the contact pad electrode 494 and the second bonding electrode 176. The common electrode 445 and the inner pad electrode 447 may include a conductive material, for example, silver (Ag), nickel (Ni), aluminum (Al), chromium (Cr), rhodium (Rh), iridium (Ir), palladium (Pd), ruthenium (Ru), magnesium (Mg), zinc (Zn), platinum (Pt), gold (Au), or a combination thereof.

[0120] The contact pad electrode 494 may be connected to an external device or an external integrated circuit (IC), which may apply an electrical signal to the circuit board 420 through wire bonding or anisotropic conductive film (AFC) bonding. The contact pad electrode 494 may electrically connect the external device to the driver circuit of the circuit board 420. The contact pad electrode 494 may include a metal such as gold (Au), silver (Ag), nickel (Ni), or the like.

[0121] The second bonding electrode 176 arranged in the pixel region PXR among the plurality of second bonding electrodes 176 may be connected to the reflective electrode layer 170, the second bonding electrode 176 arranged in the connection region CR among the plurality of second bonding electrodes 176 may be connected to the common electrode 445, and the second bonding electrode 176 arranged in the contact pad region PAD among the plurality of second bonding electrodes 176 may be connected to the internal pad electrode 447. The grid electrode 492 may be connected to the plurality of second bonding electrodes 176 through the common electrode 445.

[0122] The surface of the second bonding insulating layer 162 facing the circuit board 420 and the surfaces of the plurality of second bonding electrodes 176 facing the circuit board 420 may extend on a single plane. The second bonding insulating layer 162 may form a dielectric-to-dielectric bond with the first bonding insulating layer 440. The circuit board 420 and the pixel array 410 may be bonded to each other through bonding between the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176, and between the first bonding insulating layer 440 and the second bonding insulating layer 162.

[0123] In some embodiments, the bonding between the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176 may be, for example, copper (Cu)-copper (Cu) bonding, and the bonding between the first bonding insulating layer 440 and the second bonding insulating layer 162 may be a dielectric-dielectric bonding such as SiCN-SiCN bonding. The circuit board 420 and the pixel array 410 may be bonded by a hybrid bonding including copper (Cu)-copper (Cu) bonding and dielectric-dielectric bonding, or may be bonded without a separate bonding layer.

[0124] The display device 400 may include a plurality of semiconductor light emitting structures 110, and by controlling the thickness 116T of the second conductive type semiconductor layer 116 according to the wavelength of light emitted from the plurality of semiconductor light emitting structures 110, the active layer 114 may be arranged in a position that helps optimize the light extraction efficiency LEE of the light emitting device 100 in each of the plurality of semiconductor light emitting structures 110. Therefore, in the pixel area PXA of the display device 400, the light extraction efficiency can be maximized. Furthermore, in the pixel area PXA of the display device 400, the semiconductor light emitting structure 110 may constitute a micro-LED having a width of approximately 100 μm or less, and in the semiconductor light emitting structure 110, the active layer 114 may have a multi-quantum well structure optimized for a micro-sized chip including the micro-LED. Therefore, a display device 400 having a structure optimized for a micro-sized chip can be provided.

[0125] Figure 14 and 15 is a graph illustrating simulation results for evaluating light extraction efficiency LEE of a light emitting device according to some embodiments.

[0126] for Figure 14 The assessment includes Figure 1 In the light emitting device of the semiconductor light emitting structure 110 constructed as described, the light extraction efficiency LEE according to the thickness 116T of the second conductive type semiconductor layer 116 was evaluated for each of red light having a wavelength (λ) of 630 nm, green light having a wavelength (λ) of 530 nm, and blue light having a wavelength (λ) of 460 nm. Figure 14In FIG, the vertical axis represents the light extraction efficiency LEE within the emission angle range of ±10 degrees.

[0127] according to Figure 14 The range of the thickness 116T of the second conductive type semiconductor layer 116 may be determined based on the position where a peak in the value of the light extraction efficiency LEE exists in each of red light, green light, and blue light.

[0128] In some embodiments, based on Figure 14 As a result, for red light having a wavelength (λ) of 630 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.3λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.15λ and less than 0.21λ, the thickness 116T of the second conductive type semiconductor layer 116 may be in the range of about 95 nm to about 135 nm.

[0129] In some embodiments, based on Figure 14 As a result, for green light having a wavelength (λ) of 530 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.3λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.11λ and less than 0.19λ, the thickness 116T of the second conductive type semiconductor layer 116 may be in the range of about 60 nm to about 100 nm.

[0130] In some embodiments, based on Figure 14 As a result, for blue light having a wavelength (λ) of 460 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.4λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.27λ and less than 0.36λ, the thickness 116T of the second conductive type semiconductor layer 116 may be in the range of about 125 nm to about 165 nm.

[0131] for Figure 15 Evaluation, use and Figure 14 The evaluation method is basically the same as the method, but Figure 15 The vertical axis in represents the light extraction efficiency LEE when the emission angle is not restricted to a specific range.

[0132] according to Figure 15 The range of the thickness 116T of the second conductive type semiconductor layer 116 may be determined based on the position where a peak in the value of the light extraction efficiency LEE exists in each of red light, green light, and blue light.

[0133] In some embodiments, based on Figure 15 As a result, for red light having a wavelength (λ) of 630 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.3λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.18λ and less than 0.25λ, the thickness 116T of the second conductive type semiconductor layer 116 may be within a range of about 115 nm to about 155 nm.

[0134] In some embodiments, based on Figure 15 As a result, for green light having a wavelength (λ) of 530 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.3λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.12λ and less than 0.2λ, the thickness 116T of the second conductive type semiconductor layer 116 may be in the range of about 65 nm to about 105 nm.

[0135] In some embodiments, based on Figure 15 As a result, for blue light having a wavelength (λ) of 460 nm, the thickness 116T of the second conductive type semiconductor layer 116 may be set to be greater than 0.05λ and less than 0.4λ. For example, when the thickness 116T of the second conductive type semiconductor layer 116 is set to be greater than 0.30λ and less than 0.39λ, the thickness 116T of the second conductive type semiconductor layer 116 may be in the range of about 140 nm to about 180 nm.

[0136] Figure 16 、 Figure 17 and Figure 18 A graph showing simulation results for evaluating light extraction efficiency LEE of a light emitting device according to some embodiments is shown.

[0137] for Figure 16 、 Figure 17 and Figure 18 The assessment includes Figure 9A and Figure 9B In the light emitting device of the semiconductor light emitting structure 210 of the described construction, the light extraction efficiency LEE according to the thickness 116T of the second conductive type semiconductor layer 116 was evaluated for each of red light having a wavelength (λ) of 630 nm, green light having a wavelength (λ) of 530 nm, and blue light having a wavelength (λ) of 460 nm. Figure 16 、 Figure 17 and Figure 18 In FIG, the vertical axis represents the light extraction efficiency LEE within the emission angle range of ±10 degrees.

[0138] according to Figure 16 、 Figure 17 and Figure 18 The evaluation results can be Figure 14 The range of the thickness 116T of the second conductive type semiconductor layer 116 is determined based on the position of the peak value of the light extraction efficiency LEE in each of red light, green light, and blue light in a similar manner as described above. Figure 16 、 Figure 17 and Figure 18 Based on the evaluation results, the second multi-quantum well layer 214C and the first multi-quantum well layer 214A in the active layer 214 can be designed to be located at positions corresponding to the first peak and the second peak of the light extraction efficiency LEE value of the light passing through the active layer 214 of the semiconductor light emitting structure 210, respectively.

[0139] For example, for red light, Figure 16 The size of the active layer 214 can be designed based on the evaluation results of the present invention. That is, the thickness CTR1 of the second multi-quantum well layer 214C can be designed to extend from the interface between the second conductive type semiconductor layer 116 and the second multi-quantum well layer 214C toward the first conductive type semiconductor layer 112 to a position passing through the first peak of the light extraction efficiency LEE value. The thickness CTR2 of the first multi-quantum well layer 214A can be designed to extend from the interface between the spacer barrier layer 214B and the first multi-quantum well layer 214A toward the first conductive type semiconductor layer 112 to a position passing through the second peak of the light extraction efficiency LEE value. The thickness BT1 of the spacer barrier layer 214B can be designed to be greater than the thickness CTR2 of the first multi-quantum well layer 214A, greater than the thickness CTR1 of the second multi-quantum well layer 214C, and less than the distance TR1 between the position where the first peak of the light extraction efficiency LEE value exists and the position where the second peak of the light extraction efficiency LEE value exists.

[0140] For green light, it can be based on Figure 17 The size of the active layer 214 is designed based on the evaluation results of the present invention. That is, the thickness CTG1 of the second multi-quantum well layer 214C can be designed to extend from the interface between the second conductive type semiconductor layer 116 and the second multi-quantum well layer 214C toward the first conductive type semiconductor layer 112 to a position passing through the first peak of the light extraction efficiency LEE value. The thickness CTG2 of the first multi-quantum well layer 214A can be designed to extend from the interface between the spacer barrier layer 214B and the first multi-quantum well layer 214A toward the first conductive type semiconductor layer 112 to a position passing through the second peak of the light extraction efficiency LEE value. The thickness BT2 of the spacer barrier layer 214B can be designed to be greater than the thickness CTG2 of the first multi-quantum well layer 214A, greater than the thickness CTG1 of the second multi-quantum well layer 214C, and less than the distance TG1 between the position where the first peak of the light extraction efficiency LEE value exists and the position where the second peak of the light extraction efficiency LEE value exists.

[0141] For Blu-ray, it can be based on Figure 18 The size of the active layer 214 can be designed based on the evaluation results of the present invention. That is, the thickness CTB1 of the second multi-quantum well layer 214C can be designed to extend from the interface between the second conductive type semiconductor layer 116 and the second multi-quantum well layer 214C toward the first conductive type semiconductor layer 112 to a position passing through the first peak of the light extraction efficiency LEE value. The thickness CTB2 of the first multi-quantum well layer 214A can be designed to extend from the interface between the spacer barrier layer 214B and the first multi-quantum well layer 214A toward the first conductive type semiconductor layer 112 to a position passing through the second peak of the light extraction efficiency LEE value. The thickness BT3 of the spacer barrier layer 214B can be designed to be greater than the thickness CTB2 of the first multi-quantum well layer 214A, greater than the thickness CTB1 of the second multi-quantum well layer 214C, and less than the distance TB1 between the position where the first peak of the light extraction efficiency LEE value exists and the position where the second peak of the light extraction efficiency LEE value exists.

[0142] Figures 19A to 19G Each shows a cross-sectional view of a method of manufacturing a display device including a light emitting device according to a process sequence according to some embodiments. Figures 19A to 19G , describes the manufacturing of Figure 11 、 Figure 12 and Figure 13 An example of a method of displaying apparatus 400 is described. Figures 19A to 19G The same reference numerals in Figures 1 to 13 , and therefore any redundant description will be omitted.

[0143] Reference Figure 19A By using a semiconductor single crystal growth process, a deposition process, an etching process, etc., using a growth substrate 401, a structure in which a first conductive type base semiconductor layer 102, a plurality of semiconductor light emitting structures 110, and a plurality of transparent electrode layers 130 covering the plurality of semiconductor light emitting structures 110 are arranged can be formed on the growth substrate 401, and the plurality of semiconductor light emitting structures 110 are arranged in the pixel region PXR and each includes a first conductive type semiconductor layer 112, an active layer 114, and a second conductive type semiconductor layer 116.

[0144] Growth substrate 401 may be a substrate for growing semiconductor single crystals and may include AlN, AlGaN, ZnO, GaAs, MgAl2O4, MgO, LiAlO2, LiGaO2, GaN, or a combination thereof. In some embodiments, to improve the crystallinity and light extraction efficiency of the semiconductor layer, at least a portion of the upper surface of growth substrate 401 may have an uneven structure. In this case, the layers grown on growth substrate 401 may also have an uneven structure.

[0145] In some embodiments, to form Figure 19A , a first conductivity type base semiconductor layer 102, a first conductivity type semiconductor layer 112, an active layer 114, and a second conductivity type semiconductor layer 116 may be sequentially formed on a growth substrate 401, and a transparent electrode layer 130 may be formed on the second conductivity type semiconductor layer 116. Each of the transparent electrode layer 130, the second conductivity type semiconductor layer 116, the active layer 114, and the first conductivity type semiconductor layer 112 may be partially etched by an etching process using a hard mask pattern as an etching mask, leaving a plurality of semiconductor light emitting structures 110 spaced apart from each other and a plurality of transparent electrode layers 130 covering the plurality of semiconductor light emitting structures 110 on the first conductivity type base semiconductor layer 102. The plurality of semiconductor light emitting structures 110, together with the plurality of transparent electrode layers 130, may form a plurality of cylinders having a circular, elliptical, or polygonal planar shape.

[0146] The first conductive type base semiconductor layer 102, the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 may be formed by using a metal organic chemical vapor deposition (MOCVD) process, a hydride vapor phase epitaxy (HVPE) process, or a molecular beam epitaxy (MBE) process. The constituent materials and thicknesses of the first conductive type base semiconductor layer 102, the first conductive type semiconductor layer 112, the active layer 114, and the second conductive type semiconductor layer 116 may be the same as those described above. Figure 1 For example, the second conductive type semiconductor layer 116 in different semiconductor light emitting structures 110 may have different thicknesses.

[0147] In some embodiments, a wet etching process may be further performed on each of the plurality of semiconductor light emitting structures 110 to remove damaged regions resulting from etching. During the wet etching process, by controlling process conditions to differentiate crystal surface selectivity, damaged portions may be selectively removed from each of the plurality of semiconductor light emitting structures 110, and the sidewalls of each of the plurality of semiconductor light emitting structures 110 may have a profile extending in a direction perpendicular to the main surface 102M of the first conductive type base semiconductor layer 102. Furthermore, non-radiative recombination due to the damaged regions may be reduced in the sidewalls of each of the plurality of semiconductor light emitting structures 110, which may result in improved brightness in the light emitting device.

[0148] Reference Figure 19B ,from Figure 19AThe resulting product may form a reflective structure 150 covering the surfaces of the first conductive type base semiconductor layer 102, the plurality of semiconductor light emitting structures 110, and the plurality of transparent electrode layers 130, and the reflective structure 150 may be partially removed in the connection region CR and the contact pad region PAD to expose the first conductive type base semiconductor layer 102. By partially removing the exposed first conductive type base semiconductor layer 102 by a specific thickness, the thickness of the first conductive type base semiconductor layer 102 may be reduced in the connection region CR and the contact pad region PAD.

[0149] Reference Figure 19C , a common electrode 445 disposed on the first conductive type base semiconductor layer 102 may be formed in the connection region CR, and an internal pad electrode 447 disposed on the first conductive type base semiconductor layer 102 may be formed in the contact pad region PAD. An insulating layer 160 may be formed to cover the resultant product. The insulating layer 160 may be formed to cover the reflective structure 150 in the pixel region PXR, and to cover the common electrode 445 and the internal pad electrode 447 in the connection region CR and the contact pad region PAD. The insulating layer 160 may be formed to have a flat upper surface.

[0150] Reference Figure 19D ,from Figure 19C As a result, in the pixel region PXR, a portion of the insulating layer 160 and a portion of the reflective structure 150 may be etched to expose the plurality of transparent electrode layers 130. In this regard, the exposed portions of the plurality of transparent electrode layers 130 may be partially etched by over-etching to form a local recess 130R in the exposed surface of each of the plurality of transparent electrode layers 130 (see FIG. Figure 2A ).

[0151] A plurality of reflective electrode layers 170 may be formed to cover the local recess 130R of each of the plurality of transparent electrode layers 130 and the peripheral reflective structure 150 and the insulating layer 160. Each of the plurality of reflective electrode layers 170 may be formed to conformally cover a surface defining the local recess 130R of the transparent electrode layer 130 and surfaces of the reflective structure 150 and the insulating layer 160 adjacent to the local recess 130R.

[0152] A second bonding insulating layer 162 may be formed covering the plurality of reflective electrode layers 170 and the insulating layer 160 in the pixel region PXR and the insulating layer 160 in the connection region CR and the contact pad region PAD. The second bonding insulating layer 162 may be formed to have a flat upper surface.

[0153] Reference Figure 19EBy partially etching the second bonding insulating layer 162 in the pixel region PXR, the connection region CR, and the contact pad region PAD, a plurality of through holes exposing the plurality of reflective electrode layers 170, the common electrode 445, and the internal pad electrode 447 may be formed, and a plurality of second bonding electrodes 176 filling the plurality of through holes may be formed.

[0154] Reference Figure 19F After the circuit board 420 is prepared, the circuit board 420 may be arranged on Figure 19E On the resulting product, the second bonding insulation layer 162 and the plurality of second bonding electrodes 176 are arranged to face the first bonding insulation layer 440 and the plurality of first bonding electrodes 442 included in the circuit board 420, and the circuit board 420 can be pressurized in the direction of arrow AR on the surface where the second bonding insulation layer 162 and the plurality of second bonding electrodes 176 are exposed to bond the plurality of first bonding electrodes 442 to the plurality of second bonding electrodes 176, and to bond the first bonding insulation layer 440 to the second bonding insulation layer 162.

[0155] The bonding between the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176 and the bonding between the first bonding insulation layer 440 and the second bonding insulation layer 162 may be performed by wafer bonding, for example, the hybrid bonding described above.

[0156] Reference Figure 19G , from the basis of Figure 19F The process described herein bonds the plurality of first bonding electrodes 442 and the plurality of second bonding electrodes 176, and bonds the first bonding insulating layer 440 and the second bonding insulating layer 162. The growth substrate 401 covering the first conductive type base semiconductor layer 102 may be removed to expose the first conductive type base semiconductor layer 102. The growth substrate 401 may be removed by various processes such as laser lift-off, mechanical polishing, mechanical-chemical polishing, or etching. After the first conductive type base semiconductor layer 102 is exposed by removing the growth substrate 401, the thickness of the first conductive type base semiconductor layer 102 may be reduced by using a polishing process such as chemical mechanical polishing (CMP).

[0157] In the connection region CR and the contact pad region PAD, by partially etching the first conductive type base semiconductor layer 102, a portion of the common electrode 445 and the internal pad electrode 447 may be exposed, and in the pixel region PXR, by partially etching the first conductive type base semiconductor layer 102 and the reflective structure 150, a grid-shaped or mesh-shaped electrode space penetrating the first conductive type base semiconductor layer 102 and the reflective structure 150 may be arranged. By filling the electrode space with a conductive material, a grid electrode 492 may be formed. In the pixel region PXR, the grid electrodes 492 may be formed to be connected to each other in a grid shape or a mesh shape.

[0158] The grid electrode 492 may be formed to include a portion covering the rear surface 102B of the first conductive type base semiconductor layer 102 in the pixel region PXR and the connection region CR. The grid electrode 492 may be formed to contact each of the common electrode 445 in the connection region CR and the first conductive type base semiconductor layer 102. The grid electrode 492 may be formed using an electroplating process; however, the embodiment is not limited thereto.

[0159] like Figure 13 As shown, a plurality of micro lenses 496 covering a plurality of emission surfaces 102E defined by the grid electrode 492 of the rear surface 102B of the first conductive type base semiconductor layer 102 may be formed.

[0160] In the contact pad area PAD, a contact pad electrode 494 may be formed on the internal pad electrode 447 and formed on the edge area ISO (see FIG. Figure 11 ) is performed to manufacture the display device 400.

[0161] about Figures 19A to 19G Described Figure 11 、 Figure 12 and Figure 13 However, it is obvious to those skilled in the art that within the scope of the present disclosure, by modifying or changing the method for manufacturing the display device 400, Figures 19A to 19G Description provided, can be manufactured Figures 1 to 9B 1 and 2. The light emitting devices 100, 100A, 100B, 100C, 100D, 100E, 100F, and 200 are shown in FIG.

[0162] Figure 20 is a block diagram illustrating an example of an electronic device including a display device.

[0163] Reference Figure 20, an electronic device 8201 may be provided in a network environment 8200. In the network environment 8200, the electronic device 8201 may communicate with another electronic device 8202 via a first network 8298 (such as a short-range wireless communication network), or communicate with another electronic device 8204 and / or a server 8208 via a second network 8299 (such as a long-range wireless communication network). The electronic device 8201 may communicate with the electronic device 8204 via the server 8208. The electronic device 8201 may include a processor 8220, a memory 8230, an input device 8250, an audio output device 8255, a display device 8260, an audio module 8270, a sensor module 8276, an interface 8277, a haptic module 8279, a camera module 8280, a power management module 8288, a battery 8289, a communication module 8290, a subscriber identification module 8296, and / or an antenna module 8297. In the electronic device 8201, some components may be omitted or other components may be added. Some of these components may be implemented as an integrated circuit. For example, the sensor module 8276 (fingerprint sensor, iris sensor, illumination sensor, etc.) may be implemented by being embedded in the display device 8260 (display, etc.).

[0164] The processor 8220 can control one or more other components (hardware and software components, etc.) of the electronic device 8201 connected to the processor 8220 by executing software (such as a program 8240) and perform various data processing or calculations. As part of the data processing or calculations, the processor 8220 may load commands and / or data received from other components (such as the sensor module 8276 and the communication module 8290) into the volatile memory 8232, process the commands and / or data stored in the volatile memory 8232, and store the resulting data in the non-volatile memory 8234. The processor 8220 may include a main processor 8221 (such as a central processing unit or an application processor) and an auxiliary processor 8223 (such as a graphics processing unit, an image signal processor, a sensor hub processor, a communication processor, etc.) that can operate independently of or in conjunction with the main processor 8221. The auxiliary processor 8223 may use less power than the main processor 8221 and may perform dedicated functions.

[0165] The auxiliary processor 8223 may control functions and / or states related to some of the constituent elements of the electronic device 8201 (display device 8260, sensor module 8276, communication module 8290, etc.), replacing the main processor 8221 when the main processor 8221 is in an inactive state (sleep state), or together with the main processor 8221 when the main processor 8221 is in an active state (application execution state). The auxiliary processor 8223 (image signal processor, communication processor, etc.) may be implemented as part of other functionally related constituent elements (camera module 8280, communication module 8290, etc.).

[0166] The memory 8230 can store various data required by the components of the electronic device 8201 (such as the processor 8220 and the sensor module 8276). For example, the data may include software (such as the program 8240) and input data and / or output data related to commands associated with the software. The memory 8230 may include a volatile memory 8232 and / or a non-volatile memory 8234.

[0167] The program 8240 may be stored as software in the memory 8230 and may include an operating system 8242 , middleware 8244 , and / or applications 8246 .

[0168] The input device 8250 may receive commands and / or data for components of the electronic device 8201 (such as the processor 8220) from outside the electronic device 8201 (such as a user). The input device 8250 may include a remote controller, a microphone, a mouse, a keyboard, and / or a digital pen (such as a stylus).

[0169] The audio output device 8255 can output audio signals to the outside of the electronic device 8201. The audio output device 8255 may include a speaker and / or a receiver. The speaker can be used for general purposes such as multimedia playback or recording playback, and the receiver can be used to receive incoming calls. The receiver can be coupled as part of the speaker or implemented as a separate device.

[0170] The display device 8260 can visually provide information to the outside of the electronic device 8201. The display device 8260 may include a display, a holographic device or a projector, and a control circuit that controls the corresponding device. The display device 8260 may include Figure 1 The light emitting device (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) shown or Figure 11 、 Figure 12 and Figure 13Display device 400 is shown. Display device 8260 may include touch circuitry configured to detect a touch and / or sensor circuitry (pressure sensor, etc.) configured to measure the intensity of the force generated by the touch.

[0171] The audio module 8270 can convert sound into an electrical signal, or vice versa. The audio module 8270 can obtain sound through the input device 8250, or output sound through a speaker and / or earphone connected to the audio output device 8255 and / or another electronic device (such as the electronic device 8202) of the electronic device 8201 in a wired or wireless manner.

[0172] The sensor module 8276 can detect the operating state (power, temperature, etc.) or external environmental state (user status, etc.) of the electronic device 8201 and generate an electrical signal and / or data value corresponding to the detected state. The sensor module 8276 may include a gesture sensor, a gyroscope sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR sensor, a biometric sensor, a temperature sensor, a humidity sensor, and / or an illumination sensor.

[0173] The interface 8277 may support one or more designated protocols for connecting the electronic device 8201 to another electronic device (such as the electronic device 8202) in a wired or wireless manner. The interface 8277 may include a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, and / or an audio interface.

[0174] The connection terminal 8278 may include a connector for physically connecting the electronic device 8201 to another electronic device (electronic device 8202, etc.). The connection terminal 8278 may include an HDMI connector, a USB connector, an SD card connector, and / or an audio connector (headphone connector, etc.).

[0175] The haptic module 8279 may convert electrical signals into mechanical stimulation (vibration, movement, etc.) or electrical stimulation that a user can perceive through tactile or kinesthetic sense. The haptic module 8279 may include a motor, a piezoelectric device, and / or an electrical stimulation device.

[0176] The camera module 8280 can capture still images and videos. The camera module 8280 may include a lens assembly that includes one or more lenses, an image sensor, an image signal processor, and / or a flash. The lens assembly included in the camera module 8280 can collect light reflected from an object for image capture.

[0177] The power management module 8288 may manage power supplied to the electronic device 8201. The power management module 8288 may be implemented as a part of a power management integrated circuit (PMIC).

[0178] The battery 8289 can supply power to the components of the electronic device 8201. The battery 8289 can include a non-rechargeable primary battery, a rechargeable secondary battery, and / or a fuel cell.

[0179] The communication module 8290 can establish a wired communication channel and / or a wireless communication channel between the electronic device 8201 and another electronic device (electronic device 8202, electronic device 8204, server 8208, etc.) and support communication through the established communication channel. The communication module 8290 can operate independently of the processor 8220 (application processor, etc.) and may include one or more communication processors that support wired communication and / or wireless communication. The communication module 8290 may include a wireless communication module 8292 (cellular communication module, short-range wireless communication module, global navigation satellite system (GNSS) communication module, etc.) and / or a wired communication module 8294 (local area network (LAN) communication module, power line communication module, etc.). In the above communication modules, the corresponding communication module can communicate with another electronic device via a first network 8298 (a short-range communication network such as Bluetooth, WiFi Direct, or Infrared Data Association (IrDA)) or a second network 8299 (a long-range communication network such as a cellular network, the Internet, or a computer network (LAN, WAN, etc.)). These various types of communication modules may be integrated into one component (single chip, etc.), or may be implemented as multiple separate components (multiple chips). The wireless communication module 8292 can verify and authenticate the electronic device 8201 in a communication network such as the first network 8298 and / or the second network 8299 by using the subscriber information (International Mobile Subscriber Identifier (IMSI) etc.) stored in the subscriber identification module 8296.

[0180] The antenna module 8297 can send signals and / or power to the outside (another electronic device, etc.), or receive signals and / or power from the outside. The antenna may include a transmitter formed in a conductive pattern on a substrate (printed circuit board (PCB), etc.). The antenna module 8297 may include one or more antennas. When the antenna module 8297 includes multiple antennas, the communication module 8290 can select an appropriate antenna from these antennas for the communication method used in the communication network such as the first network 8298 and / or the second network 8299. Signals and / or power can be sent or received between the communication module 8290 and another electronic device through the selected antenna. Other components other than the antenna (RFIC, etc.) may be included as part of the antenna module 8297.

[0181] Some constituent components of the electronic device 8201 can be connected to each other through a communication method between peripheral devices (bus, general-purpose input and output (GPIO), serial peripheral interface (SPI), mobile industry processor interface (MIPI), etc.), and can exchange signals (commands, data, etc.) with each other.

[0182] Commands or data can be sent or received between the electronic device 8201 and the external electronic device 8204 via the server 8208 connected to the second network 8299. Electronic devices 8202 and 8204 can be of the same or different types as the electronic device 8201. All or part of the operations performed in the electronic device 8201 can be performed in one or more electronic devices (8202, 8204 and 8208). For example, when the electronic device 8201 needs to perform a function or service, the electronic device 8201 can request one or more electronic devices to perform part of the entire function or service instead of performing the function or service. The one or more electronic devices that receive the request can perform additional functions or services related to the request and send the results of the execution to the electronic device 8201. To this end, cloud computing, distributed computing and / or client-server computing technologies can be used.

[0183] The electronic device 8201 can be applied to various devices. Various components of the electronic device 8201 can be modified according to the function of the device, and other components suitable for performing the function of the device can be further added. Hereinafter, application examples of the electronic device 8201 are described.

[0184] Figure 21 9100 is a diagram illustrating an example of a mobile device as an application example of an electronic device. The mobile device 9100 may include a display device 9110. The display device 9110 may include Figure 1 The light emitting device (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) shown or Figure 11 、 Figure 12 and Figure 13 The display device 400 is shown. The display device 9110 may have a foldable structure, for example, a multi-foldable structure.

[0185] Figure 22 1 is a diagram showing an example of a head-up display device for a vehicle as an application example of an electronic device. The head-up display device 9200 for a vehicle may include a display 9210 provided in an area of ​​the vehicle and an optical path changing member 9220 configured to change an optical path so that a driver can see an image generated at the display 9210. The display 9210 may include Figure 1 The light emitting device (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) shown or Figure 11 、 Figure 12 and Figure 13 The display device 400 is shown.

[0186] Figure 23 is a diagram illustrating an example of augmented reality glasses or virtual reality glasses as an application example of an electronic device. The augmented reality glasses (or virtual reality glasses) 9300 may include a projection system 9310 configured to form an image and a guide element 9320 configured to guide the image from the projection system 9310 to the user's eyes. The projection system 9310 may include Figure 1 The light emitting device shown in (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) or Figure 11 、 Figure 12 and Figure 13 The display device 400 shown in FIG.

[0187] Figure 24 9400 is a diagram showing an example of a large sign as an application example of an electronic device. Figure 12 The display described. The sign 9400 may include Figure 1 The light emitting device shown in (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) or Figure 11 、 Figure 12 and Figure 13 The display device 400 shown in FIG. The sign 9400 can be used for outdoor advertising using a digital information display, and the content of the advertisement can be controlled through a network. The sign 9400 can be used by, for example, referring to Figure 20 The electronic device described is implemented.

[0188] Figure 25 9500 is a diagram showing an example of a wearable display as an application example of an electronic device. Figure 1 The light emitting device (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) shown in Figure 11 、 Figure 12 and Figure 13 The display device 400 shown in FIG. Figure 20 The described electronic device implements the wearable display 9500.

[0189] In addition to the above electronic devices, Figures 1 to 9B The light emitting device (100, 100A, 100B, 100C, 100D, 100E, 100F or 200) shown in Figure 11 、 Figure 12 and Figure 13The display device 400 shown in FIG. 4 may be applied to various products such as a rollable TV, an extendable display, and the like.

[0190] While aspects of the embodiments have been particularly shown and described, it will be understood that various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A light-emitting device, comprising: A semiconductor light emitting structure comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially disposed in a first direction; as well as an electrode layer covering the second conductive type semiconductor layer and spaced apart from the active layer in the first direction, the second conductive type semiconductor layer being between the electrode layer and the active layer, wherein the semiconductor light emitting structure is configured to emit light having a wavelength λ in the range of 490 nm to 700 nm, and Wherein, a minimum distance from the electrode layer to the active layer in the first direction is greater than 0.05λ and less than 0.24λ.

2. The light emitting device according to claim 1, wherein The second conductive type semiconductor layer includes a first surface in contact with the active layer and a second surface in contact with the electrode layer, and the second surface is opposite to the first surface in the first direction, and The thickness of the second conductive type semiconductor layer in the first direction is greater than 0.05λ and less than 0.24λ.

3. The light emitting device according to claim 1, wherein The electrode layer comprises: a transparent electrode layer in contact with the second conductive type semiconductor layer; and A reflective electrode layer contacts the transparent electrode layer and is spaced apart from the second conductive type semiconductor layer in the first direction, wherein the transparent electrode layer is located between the reflective electrode layer and the second conductive type semiconductor layer.

4. The light emitting device according to claim 1, wherein The active layer includes a first surface in contact with the first conductive type semiconductor layer and a second surface in contact with the second conductive type semiconductor layer, and Wherein, the minimum distance from the first surface to the second surface in the first direction is less than 300 nm.

5. The light emitting device according to claim 1, wherein The thickness of the active layer in the first direction is less than 0.4λ. The light emitting device according to claim 1 , wherein: The wavelength λ is in the range of 610 nm to 650 nm.

7. The light emitting device according to claim 1, wherein The wavelength λ is in the range of 510 nm to 550 nm.

8. The light emitting device according to claim 1, wherein The active layer includes a multi-quantum well layer including a first surface in contact with the first conductive type semiconductor layer and a second surface in contact with the second conductive type semiconductor layer, and Wherein, the thickness of the multi-quantum well layer in the first direction is less than 300 nm.

9. The light emitting device according to claim 1, wherein The active layer comprises: a first multi-quantum well layer comprising a first surface in contact with the first conductive type semiconductor layer; a second multi-quantum well layer including a second surface contacting the second conductive type semiconductor layer and spaced apart from the first multi-quantum well layer in the first direction; and a spacer barrier layer between the first multi-quantum well layer and the second multi-quantum well layer, and Wherein, in the first direction, the thickness of the spacer barrier layer is greater than each of the thickness of the first multi-quantum well layer and the thickness of the second multi-quantum well layer.

10. The light emitting device according to claim 9, wherein At least one constituent material of the spacer barrier layer is the same as at least one constituent material provided in the first multi-quantum well layer and the second multi-quantum well layer, and In the first direction, each of the thickness of the first multi-quantum well layer and the thickness of the second multi-quantum well layer is less than 300 nm.

11. The light emitting device according to claim 1, wherein The active layer has a quantum well structure, which includes a pair structure of a quantum well layer and a quantum barrier layer with 1 to 15 cycles, and Wherein, the paired structures in the quantum well structure are selected from InGaN / GaN, InGaN / InGaN, InGaN / AlGaN and InGaN / InAlGaN.

12. The light emitting device according to claim 1, wherein The semiconductor light emitting structure has a width less than 100 μm in a second direction perpendicular to the first direction.

13. The light emitting device according to claim 1 , further comprising a reflective structure covering a sidewall of each of the first conductive type semiconductor layer, the active layer, and the second conductive type semiconductor layer provided in the semiconductor light emitting structure, in, The reflective structure includes a distributed Bragg reflector (DBR).

14. The light emitting device according to claim 1 , further comprising a reflective structure covering a sidewall of each of the first conductive type semiconductor layer, the active layer, and the second conductive type semiconductor layer provided in the semiconductor light emitting structure, in, The reflective structure includes metal.

15. The light emitting device according to claim 1, further comprising: a first conductive type base semiconductor layer integrally connected to the first conductive type semiconductor layer and spaced apart from the active layer in the first direction, the first conductive type semiconductor layer being located between the first conductive type base semiconductor layer and the active layer; as well as A microlens is spaced apart from the first conductive type semiconductor layer in the first direction, the first conductive type base semiconductor layer is located between the microlens and the first conductive type semiconductor layer, and the microlens is configured to collect and emit light from the semiconductor light emitting structure.

16. A light emitting device comprising: a first conductivity type base semiconductor layer; a semiconductor light emitting structure comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially disposed on a main surface of the first conductive type base semiconductor layer in a first direction perpendicular to the main surface; a first electrode surrounding a sidewall of the first conductive type base semiconductor layer; a transparent electrode layer covering the second conductive type semiconductor layer and spaced apart from the active layer in the first direction, the second conductive type semiconductor layer being located between the transparent electrode layer and the active layer; a reflective structure covering a sidewall of each of the semiconductor light emitting structure and the transparent electrode layer; a second electrode contacting the transparent electrode layer and spaced apart from the second conductive type semiconductor layer in the first direction, the transparent electrode layer being located between the second electrode and the second conductive type semiconductor layer; as well as a microlens in contact with an emitting surface including a portion of a rear surface of the first conductive type base semiconductor layer opposite to the main surface, and configured to collect and emit light from the semiconductor light emitting structure, wherein the semiconductor light emitting structure is configured to emit light having a wavelength λ in the range of 490 nm to 700 nm, wherein the semiconductor light emitting structure has a width of 100 μm or less in a second direction parallel to the main surface of the first conductive type base semiconductor layer, The minimum distance from the active layer to the transparent electrode layer in the first direction is greater than 0.05λ and less than 0.24λ. Wherein, the active layer includes at least one multi-quantum well layer, and Wherein, the thickness of the at least one multi-quantum well layer in the first direction is less than 300 nm.

17. The light emitting device according to claim 16, wherein: The first electrode includes a first portion in contact with a sidewall of the first conductive type base semiconductor layer and a second portion in contact with a rear surface of the first conductive type base semiconductor layer to define the emission surface of the first conductive type base semiconductor layer, and The microlens is in contact with the second portion of the first electrode.

18. The light emitting device according to claim 16, wherein: The second conductive type semiconductor layer includes a first surface in contact with the active layer and a second surface in contact with the transparent electrode layer, and the second surface is opposite to the first surface in the first direction, and The thickness of the second conductive type semiconductor layer in the first direction is greater than 0.05λ and less than 0.24λ.

19. The light emitting device according to claim 16, wherein The active layer includes a first surface in contact with the first conductive type semiconductor layer and a second surface in contact with the second conductive type semiconductor layer, and Wherein, the thickness of the at least one multi-quantum well layer in the first direction is less than 300 nm.

20. A display device comprising: a circuit board including a driver circuit; as well as a pixel array located on the circuit board and comprising a plurality of pixels, Wherein, the pixel array comprises: a first conductivity type base semiconductor layer including a main surface and a rear surface opposite to each other; a plurality of semiconductor light emitting structures on the main surface of the first conductive type base semiconductor layer and spaced apart from each other in a horizontal direction parallel to the main surface, each of the plurality of semiconductor light emitting structures including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer sequentially arranged in a first direction perpendicular to the main surface; a first electrode including a metal layer having a lattice shape penetrating the first conductive type base semiconductor layer in the first direction; a plurality of transparent electrode layers, wherein the plurality of transparent electrode layers cover the second conductive type semiconductor layer in each of the plurality of semiconductor light emitting structures; a reflective structure covering a sidewall of each of the plurality of semiconductor light emitting structures and the plurality of transparent electrode layers; a plurality of second electrodes penetrating the reflective structure in the first direction and contacting one transparent electrode layer selected from the plurality of transparent electrode layers; and a plurality of micro lenses on the rear surface of the first conductive type base semiconductor layer and overlapping with the plurality of semiconductor light emitting structures in the first direction, wherein at least one semiconductor light emitting structure selected from the plurality of semiconductor light emitting structures is configured to emit light having a wavelength λ in a range of 490 nm to 700 nm, and Wherein, in the at least one semiconductor light emitting structure, a minimum distance from the active layer to a transparent electrode layer among the plurality of transparent electrode layers in the first direction is greater than 0.05λ and less than 0.24λ.

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