Data processing method and device, graphics processor, electronic device, and storage medium

Abstract

Embodiments of the present disclosure provide a data processing method and device, a graphics processor, an electronic device and a storage medium, and relate to the technical field of computer, to solve the problem that the data bandwidth is increased and the interface bit width is increased when obtaining texture data in related technologies. The data processing method comprises: determining the identification of a plurality of first reading addresses carried in a read texture request, the number of bits of the identification of the first reading address being less than the total number of the plurality of first reading addresses; determining the request data corresponding to the read texture request based on the identification of the plurality of first reading addresses.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to, but is not limited to, the technical field of computer technology, and particularly relates to a data processing method and device, a graphics processing unit, an electronic device, and a storage medium. BACKGROUND

[0002] In related technologies, in a GPU (Graphics Processing Unit), when texture data is acquired through a read texture request, since the read texture request usually includes multiple read addresses, the returned request data includes texture data of each read address, an identifier indicating the read address corresponding to each texture data, and the like, the number of bits of the identifier is consistent with the total number of read addresses, which increases the data bandwidth and the interface bit width at the same time. SUMMARY

[0003] Embodiments of the present disclosure provide a data processing method and device, a graphics processing unit, an electronic device, a storage medium, and a computer program product.

[0004] The technical solution of the embodiments of the present disclosure is implemented as follows:

[0005] The data processing method provided by the embodiments of the present disclosure comprises the following steps.

[0006] An identifier of multiple first read addresses carried in the read texture request is determined, and the number of bits of the identifier of the first read address is less than the total number of the multiple first read addresses.

[0007] Based on the identifier of the multiple first read addresses, request data corresponding to the read texture request is determined.

[0008] The graphics processing unit provided by the embodiments of the present disclosure comprises a texture unit and a storage unit, and the texture unit comprises the following.

[0009] The storage unit is configured to receive a read texture request transmitted by the texture unit, the read texture request carrying multiple first read addresses; determine an identifier of the multiple first read addresses, the number of bits of the identifier of the first read address being less than the total number of the multiple first read addresses; based on the identifier of the multiple first read addresses, determine request data corresponding to the read texture request; and transmit the request data corresponding to the read texture request to the texture unit.

[0010] The data processing device provided by the embodiments of the present disclosure comprises the following.

[0011] The first determination module is configured to determine an identifier of multiple first read addresses carried in the read texture request, and the number of bits of the identifier of the first read address is less than the total number of the multiple first read addresses.

[0012] The second determining module is configured to determine the request data corresponding to the read texture request based on the identification of the plurality of first reading addresses.

[0013] The electronic device provided by the embodiment of the present disclosure includes a processor and a memory. The memory stores a computer program which can run on the processor. When the processor executes the computer program, the above method is implemented.

[0014] The embodiment of the present disclosure provides a computer readable storage medium, which stores a computer program. When the computer program is executed by a processor, the above method is implemented.

[0015] The embodiment of the present disclosure provides a computer program product, which includes a non-transitory computer readable storage medium storing a computer program. When the computer program is read and executed by a computer, the above method is implemented.

[0016] In the embodiment of the present disclosure, by determining the identification of the plurality of first reading addresses carried in the read texture request, the number of bits of the identification of the first reading address is less than the total number of the plurality of first reading addresses; and based on the identification of the plurality of first reading addresses, the request data corresponding to the read texture request is determined. In this way, on the one hand, by setting the number of bits of the identification of the first reading address to be less than the total number of the first reading address, compared with the number of bits of the identification of the first reading address being the total number of the first reading address, the number of bits of the identification of the first reading address is reduced, thereby reducing the data amount corresponding to the first reading address and the data amount required to be reserved by the interface; on the other hand, the request data corresponding to the read texture request is determined according to the identification of each first reading address, which reduces the data amount of the request data, so that the data amount reserved on the interface is less, thereby reducing the data bandwidth and the interface bit width, and further reducing the hardware resource consumption.

[0017] It should be understood that the general description above and the detailed description below are only exemplary and explanatory, but not limiting the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0018] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the technical solutions of the present disclosure.

[0019] Figure 1 An implementation flowchart of a data processing method provided by the embodiment of the present disclosure is shown in the figure;

[0020] Figure 2 A component structure diagram of a graphics processor provided by the embodiment of the present disclosure is shown in the figure;

[0021] Figure 3 A component structure diagram of a data processing device provided by the embodiment of the present disclosure is shown in the figure;

[0022] Figure 4 A hardware entity schematic diagram of an electronic device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0023] In order to make the purposes, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below with reference to the drawings, and the described embodiments should not be regarded as limiting the present disclosure, and all other embodiments obtained by a person of ordinary skill in the art without creative labor fall within the scope of protection of the present disclosure.

[0024] In the following description, “some embodiments” are described, which describe a subset of all possible embodiments, but it can be understood that “some embodiments” can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0025] In the following description, the terms “first\second\third” are only to distinguish similar objects, and do not represent a specific order of the objects, and it can be understood that “first\second\third” can be interchanged in a specific order or sequence as allowed, so that the embodiments of the present disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0027] In the related art, in a GPU (Graphics Processing Unit, graphics processor), when reading a texture, a texture unit in the GPU sends a read texture request to a storage unit of the GPU, and the read texture request usually includes multiple read addresses, for example, a read texture request including a sampling instruction includes 16 read addresses, a read texture request including a loading instruction includes 8 read addresses, etc. Since the multiple read addresses can have the same read address, in order to reduce the data bandwidth when the storage unit returns, the storage unit needs to merge the same addresses and then return the corresponding request data, the request data including texture data corresponding to each read address, an identifier indicating the read address corresponding to each texture data, etc. The identifier is used to inform the texture unit which read addresses the texture data corresponds to.

[0028] Taking 32-bit texture data and sample instruction as an example, assuming that the 16 read addresses are abcceffghijkdddd, after the merging is completed, the storage unit returns the texture data of the 11 read addresses abcefghijkd, and the texture data returned by each read address needs to be accompanied by 16-bit (consistent with the total number of read addresses) identification to tell the texture unit which read addresses the texture data corresponds to. For the data returned by address a, the 16-bit identification needs to be accompanied by 1000000000000000, for the data returned by address b, the 16-bit identification needs to be accompanied by 0100000000000000, for the data returned by address c, the 16-bit identification needs to be accompanied by 0011000000000000, and so on. Then, the amount of data returned by the data is 528 (11x32+16x11) bits, and the amount of data that needs to be reserved on the interface is 768 (16x32+16x16) bits. In this way, the amount of requested data and the amount of data that needs to be reserved on the interface are increased, thereby increasing the data bandwidth and the interface bit width at the same time.

[0029] The data processing method provided by the embodiments of the present disclosure reduces the bit number of the identification of the first read address compared with the case where the bit number of the identification of the first read address is equal to the total number of the first read addresses, thereby reducing the amount of data corresponding to the first read addresses and the amount of data that needs to be reserved on the interface; and the request data corresponding to the read texture request is determined according to the identification of each first read address, thereby reducing the amount of request data and making the amount of data reserved on the interface smaller, thereby reducing the data bandwidth and the interface bit width at the same time, and further reducing the consumption of hardware resources.

[0030] The method provided by the embodiments of the present disclosure can be executed by an electronic device, which can be a notebook computer, a tablet computer, a desktop computer, a set-top box, a mobile device (for example, a mobile phone, a portable music player, a personal digital assistant, a dedicated message device, a portable game device), and various types of terminals, or can be implemented as a server. The server can be a standalone physical server, a server cluster composed of multiple physical servers, or a distributed system, and can also be a cloud server that provides cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content distribution networks (CDN), and basic cloud computing services such as big data and artificial intelligence platforms.

[0031] In the following, the technical solutions in the embodiments of the present disclosure will be described clearly and completely with reference to the drawings in the embodiments of the present disclosure.

[0032] Figure 1 An implementation flowchart of a data processing method provided by an embodiment of the present disclosure is shown in FIG. 1. As shown in FIG. 1, the data processing method includes steps S11 and S12, wherein: Figure 1

[0033] Step S11, determining an identification of a plurality of first read addresses carried in a read texture request, a bit number of the identification of the first read addresses being less than a total number of the plurality of first read addresses.

[0034] Here, the read texture request can be any suitable request. The read texture request can include any suitable content, for example, an instruction, a size of texture data, a plurality of first read addresses, etc. The instruction can be any suitable instruction capable of operating on the texture data, for example, a Load instruction, a Sample instruction, etc. The Sample instruction is mainly used for sampling from a texture in a storage unit of a GPU, and the Load instruction is mainly used for loading data from the storage unit of the GPU. The storage unit can be any suitable unit capable of storing data, and the storage unit can be located on the GPU. The size of the texture data can be any suitable size, for example, 8 bits, 16 bits, 32 bits, 64 bits, 128 bits, etc. In some embodiments, the size of the texture data can be any size in the range of 8-128 bits.

[0035] The read address (including the first read address and other read addresses mentioned later) can be any suitable address of a storage unit. The number of the first read addresses can be multiple, for example, 8, 16, etc. In some embodiments, different read texture requests can include different numbers of first read addresses. For example, a read texture request including a Load instruction can include 8 first read addresses, and a read texture request including a Sample instruction can include 16 first read addresses.

[0036] The bit number of the identification of the first read addresses can be any suitable bit number. In implementation, the bit number of the identification is less than the total number Num of the first read addresses. For example, when the read texture request includes 8 first read addresses, the bit number of the identification can include but is not limited to 2 bits, 3 bits, 4 bits, etc. For another example, when the read texture request includes 8 first read addresses, the bit number of the identification can include but is not limited to 2 bits, 3 bits, 4 bits, 8 bits, etc. In implementation, the bit number of the identification can be determined in real time, or can be pre-configured.

[0037] ​In some embodiments, the number of bits of the identification can be determined in real time according to the total number Num of the first read addresses. The number of bits of the identification can be a positive integer within a first threshold range [log2Num, Num). For example, when the total number Num is 8, the first threshold range is [3, 8), and the number of bits of the identification can be any one of 3-7 bits. For another example, when the total number Num is 12, the first threshold range is [4, 12), and the number of bits of the identification can be any one of 4-11 bits. In some embodiments, if the plurality of first read addresses are not all the same, the number of bits of the identification can be a positive integer of log2Num.

[0038] In some embodiments, the identification of each first read address is determined according to the number of bits of the identification, and the corresponding address is indicated by the identification of the first read address.

[0039] For example, assuming that the 8 first read addresses are abcdefgh and the number of bits of the identification is 3 bits, then:

[0040] The identification of the first read address a can be 000, indicating the first first read address;

[0041] The identification of the first read address b can be 001, indicating the second first read address;

[0042] The identification of the first read address c can be 010, indicating the third first read address;

[0043] The identification of the first read address d can be 011, indicating the fourth first read address;

[0044] The identification of the first read address e can be 100, indicating the fifth first read address;

[0045] The identification of the first read address f can be 101, indicating the sixth first read address;

[0046] The identification of the first read address g can be 110, indicating the seventh first read address;

[0047] The identification of the first read address h can be 111, indicating the eighth first read address.

[0048] In some embodiments, the number of bits of the identification can be determined in real time according to the total number Num of the first read addresses and a granularity GS. The granularity can be any suitable number, and the granularity GS is not greater than the total number Num. For example, the granularity GS can include but is not limited to 2, 4, 8, etc. The number of bits of the identification can include but is not limited to the number of bits of the group identification, the number of bits of the intra-group identification, etc. In implementation, the sum of the number of bits of the group identification and the number of bits of the intra-group identification is less than the total number Num.

[0049] The in-group identifier is used to indicate the number of the group. The number of bits of the in-group identifier can be determined according to the granularity GS, and the number of bits of the in-group identifier is a positive integer no greater than the granularity GS. The number of bits of the in-group identifier can be a positive integer within a second threshold range [log2GS, GS]. For example, when the granularity GS is 8, the second threshold range is [3, 8], and the number of bits of the in-group identifier can be any one of 3-8 bits. For another example, when the granularity GS is 4, the second threshold range is [2, 4], and the number of bits of the in-group identifier can be any one of 2-4 bits. In some embodiments, if the plurality of first read addresses are all different, the number of bits of the in-group identifier can be a positive integer of log2GS; if some of the plurality of first read addresses are the same, the number of bits of the in-group identifier can be the granularity GS.

[0050] The group identifier is used to indicate the number of the address group. The number of bits of the group identifier is determined according to the granularity GS and the total number Num. The number of bits of the group identifier can be a positive integer within a third threshold range [log2Q, Q], Q refers to the quotient between the total number Num and the granularity GS. For example, when the total number Num is 16 and the granularity GS is 8, the third threshold range is [1, 2], and the number of bits of the group identifier can be any one of 1-2 bits. For another example, when the total number Num is 16 and the granularity GS is 4, the third threshold range is [2, 4], and the number of bits of the group identifier can be any one of 2-4 bits. In some embodiments, the number of bits of the group identifier can be a positive integer of log2Q.

[0051] In some embodiments, the identifier of each first read address is determined according to the number of bits of the group identifier and the number of bits of the in-group identifier, and the corresponding address is indicated by the identifier of the first read address.

[0052] For example, assuming that the 8 first read addresses are abcceffg and the granularity is 4, the 8 first read addresses are divided into 2 address groups, the first address group includes the four first read addresses abcc, and the second address group includes the four first read addresses effg, and the number of bits of the identifier of each first read address can be 5 bits, the first bit represents the group identifier, and the last four bits represent the in-group identifier, then:

[0053] The identifier of the first first read address a of the first group can be 01000;

[0054] The identifier of the second first read address b of the first group can be 00100;

[0055] The identifier of the third and fourth first read addresses c of the first group can be 00011;

[0056] The identification of the first first read address e of the second group can be 10000.

[0057] The identification of the second and third first read addresses f of the second group can be 10110.

[0058] The identification of the fourth first read address g of the second group can be 10001.

[0059] In some embodiments, the granularity can be set according to configuration information, default value, instruction, repetition rate, sampling method, etc. The configuration information mainly refers to the granularity customized by the user. In some embodiments, the user can customize the granularity through configuration options, configuration files, etc. The repetition rate refers to the repetition rate of multiple first read addresses. In some embodiments, the repetition rate and the granularity can be proportional, that is, when the repetition rate is higher, the granularity can also be larger. The sampling method can include but is not limited to Nearest Point Sampling (NPS), Bilinear Sampling (BS), Trilinear Sampling (TS), etc. Different sampling methods can set the same or different granularity.

[0060] For example, different instructions can set the same or different granularity, such as, for the sampling instruction and the loading instruction, the granularity can be 4, or the granularity of the sampling instruction can be 8 and the granularity of the loading instruction can be 4.

[0061] In some embodiments, the identification of each first read address can be determined according to a division strategy, the number of bits of the group identification, and the number of bits of the in-group identification, and the corresponding address is indicated by the identification of the first read address. The division strategy can include but is not limited to division step, division method, etc. The division step is determined in real time based on the granularity. For example, the division step can be the granularity. The division method can include but is not limited to uniform division, non-uniform division, custom division, etc.

[0062] For example, the multiple first read addresses are uniformly divided. For example, 10 first read addresses abcceffghi are uniformly divided into 2 address groups, the first address group includes 5 first read addresses abcce, and the second address group includes 5 first read addresses ffghi. For another example, 16 first read addresses are uniformly divided into 4 address groups, and each address group includes 4 first read addresses.

[0063] For example, the plurality of first read addresses are divided according to granularity. For example, 10 first read addresses abcceffghi are divided into three address groups according to a granularity of 4, a first address group includes 4 first read addresses abcc, a second address group includes 4 first read addresses effg, and a third address group includes 2 first read addresses hi. For another example, 16 first read addresses are divided into 4 address groups according to a granularity of 4, and each address group includes 4 first read addresses.

[0064] For another example, part of the plurality of first read addresses are divided according to self-definition. For example, 16 first read addresses abcceffghijkdddd are divided into 2 address groups, a first address group includes the first 4 first read addresses abcc and the last 4 first read addresses dddd, and a second address group includes the middle 8 first read addresses effghijk.

[0065] In some embodiments, the number of bits of the group identifier and the number of bits of the intra-group identifier can be determined according to the division strategy, and the identifier of each first read address can be determined according to the number of bits of the group identifier and the number of bits of the intra-group identifier.

[0066] For example, assuming that 16 first read addresses abcceffghijkdddd are evenly divided into 4 address groups, the number of bits of the group identifier can be 2 bits, and the number of bits of the intra-group identifier can be 4 bits, i.e.

[0067] A first address group includes the four first read addresses abcc, the identifier of the first read address a can be 001000, the identifier of the first read address b can be 000100, and the identifier of the first read address c can be 000011.

[0068] A second address group includes the four first read addresses effg, the identifier of the first read address e can be 010000, the identifier of the first read address f can be 010110, and the identifier of the first read address g can be 010001.

[0069] A third address group includes the four first read addresses hijk, the identifier of the first read address h can be 101000, the identifier of the first read address i can be 100100, the identifier of the first read address j can be 100010, and the identifier of the first read address k can be 100001.

[0070] A fourth address group includes the four first read addresses dddd, and the identifier of the first read address d can be 111111.

[0071] In step S12, the request data corresponding to the read texture request is determined based on the identifiers of the plurality of first read addresses.

[0072] Here, the request data corresponding to the read texture request at least includes the request data of each first read address. The request data of the first read address can include but is not limited to the texture data of each first read address, the identification of each first read address, etc. In some embodiments, the data obtained by combining the texture data of the first read address and the identification of the first read address can be taken as the request data of the first read address.

[0073] In some embodiments, the first read addresses can be de-duplicated first to obtain at least one third read address; and then the request data corresponding to the read texture request is determined according to the texture data corresponding to each third read address and the identification of each third read address. The third read address is one first read address.

[0074] For example, assuming that the 16 first read addresses are abcceffghijkdddd, 11 third read addresses abcefghijkd are obtained after de-duplication, and the texture data corresponding to the 11 third read addresses and the identification of the 11 third read addresses are taken as the request data corresponding to the read texture request.

[0075] In some embodiments, the de-duplication can be performed on each address group to obtain at least one second read address; and then the request data corresponding to the read texture request is determined according to the texture data corresponding to each second read address and the identification of each second read address.

[0076] For example, assuming that the 16 first read addresses are abcceffgcijkdddd and are divided into two groups, the first address group includes abcceffg, and the second address group includes cijkdddd, then 7 second read addresses abceffg are obtained after de-duplication of the first address group, and 5 second read addresses cijkd are obtained after de-duplication of the second address group, then the texture data corresponding to the 12 second read addresses and the identification of the 12 second read addresses are taken as the request data corresponding to the read texture request.

[0077] In some embodiments, each read address in the associated address group corresponding to each address group can be taken as a second read address respectively; and then the request data corresponding to the read texture request is determined according to the texture data corresponding to each second read address and the identification of each second read address. Each read address in the associated address group is unique. In some embodiments, each read address in the associated address group is a first read address.

[0078] For example, assuming that 16 first read addresses are abcceffgcijkdddd, which are divided into 4 groups, the first address group includes abcc, the second address group includes effg, the third address group includes cijk, and the fourth address group includes dddd, then:

[0079] The first address group corresponds to an associated address group including 3 read addresses, i.e., abc;

[0080] The second address group corresponds to an associated address group including 3 read addresses, i.e., efg;

[0081] The third address group corresponds to an associated address group including 4 read addresses, i.e., cijk;

[0082] The fourth address group corresponds to an associated address group including 1 read address, i.e., d;

[0083] Then, each read address in each address group can be taken as a second read address, and the texture data corresponding to the 11 second read addresses and the identification of the 11 second read addresses can be taken as the request data corresponding to the read texture request.

[0084] In implementation, if the identification of each second read address is 6 bits (i.e., 2 bits of group identification and 4 bits of identification within the group) and the texture data is 32 bits, then the data amount of the request data corresponding to the read texture request is 418 bits (11x32 + 11x6), while the data amount of the request data in the related art is 528 bits (11x32 + 16x11), and meanwhile, the data amount that needs to be reserved on the interface is 608 bits (16x32 + 16x6), while the data amount that needs to be reserved on the interface in the related art is 768 bits (16x32 + 16x16), so it can be known that the data amount of the request data and the data amount that needs to be reserved on the interface are both reduced.

[0085] In the embodiments of the present disclosure, on one hand, by setting the bit number of the identification of the first read address to be less than the total number of the first read addresses, compared with the case that the bit number of the identification of the first read address is equal to the total number of the first read addresses, the bit number of the identification of the first read address is reduced, thereby reducing the data amount corresponding to the first read addresses and the data amount that needs to be reserved on the interface; on the other hand, the request data corresponding to the read texture request is determined according to the identification of each first read address, thereby reducing the data amount of the request data and making the data amount reserved on the interface less, so that the data bandwidth is reduced while the interface bit width is also reduced, and then the hardware resource consumption is reduced.

[0086] In some embodiments, the data processing method further includes step S110, in which:

[0087] Step S110, determining the granularity based on the read texture request and / or the configuration information.

[0088] Here, different instructions can be included in the read texture request, and the different instructions can correspond to the same or different granularity. For example, the granularity of the sampling instruction can be 8, and the granularity of the loading instruction can be 4. The configuration information mainly refers to the granularity customized by the user. In some embodiments, the user can customize the granularity through configuration options, configuration files, etc. For example, the user customizes the granularity to be 8 through the configuration options.

[0089] In the embodiments of the present disclosure, the granularity is determined in real time according to the read texture request, the configuration information, etc., which improves the accuracy and flexibility of the granularity.

[0090] In some embodiments, the step S11 includes steps S111 and S112, wherein:

[0091] Step S111, determining a division result of the plurality of first read addresses based on the granularity, the division result including at least two address groups, and each address group including at least two first read addresses.

[0092] Here, the granularity can be any suitable number, for example, the granularity can include but is not limited to 2, 4, 8, etc. In implementation, the granularity is less than the total number of the first read addresses.

[0093] In some embodiments, the plurality of first read addresses are divided according to the granularity to obtain the division result.

[0094] For example, for 16 first read addresses abcceffghijkdddd, the division is performed according to the granularity 4, and four address groups are obtained, each including 4 first read addresses, i.e., the first address group includes abcc, the second address group includes effg, the third address group includes hijk, and the fourth address group includes dddd.

[0095] In some embodiments, the division result of the plurality of first read addresses can be determined based on the granularity and the division manner. The division manner can include but is not limited to uniform division, non-uniform division, self-defined division, etc.

[0096] For example, for 16 first read addresses abcceffghijkdddd, the division is performed according to the granularity 8 and the self-defined division manner, and two address groups are obtained, each including 8 first read addresses, i.e., the first address group includes abccdddd, and the second address group includes effghijk.

[0097] In some embodiments, the step S111 includes a step S1111 and a step S1112, wherein:

[0098] The step S1111 determines a division step length based on the granularity.

[0099] Here, the division step length can be any suitable step length. In some embodiments, the division step length can be the granularity.

[0100] The step S1112 divides the plurality of first read addresses based on a preset division manner and the division step length to obtain at least two address groups.

[0101] Here, the division manner can include, but is not limited to, uniform division, non-uniform division, self-defined division, etc.

[0102] For example, for 16 first read addresses abcceffghijkdddd, the division is performed according to the division manner of uniform division and the division length of 4 to obtain four address groups, each including 4 first read addresses, i.e., the first address group includes abcc, the second address group includes effg, the third address group includes hijk, and the fourth address group includes dddd.

[0103] In the embodiments of the present disclosure, the plurality of first read addresses are divided by the granularity and the division manner, which improves the accuracy and flexibility of the division.

[0104] The step S112 determines the identity of each first read address in each address group based on the identity of the address group.

[0105] Here, the identity of the address group is used to indicate the number of the address group. The identity of the address group can be any suitable identity. For example, if the identity of the address group is 01, it indicates the second address group.

[0106] In some embodiments, the number of bits of the identity of the address group is determined according to the granularity GS and the total number Num of the plurality of first read addresses. The number of bits of the identity of the address group can be a positive integer within a fourth threshold range [log2Q, Q], Q refers to the quotient between the total number Num and the granularity GS. For example, when the total number Num is 16 and the granularity GS is 8, the fourth threshold range is [1, 2], and at this time, the number of bits of the identity of the address group can be any one of 1-2 bits. For another example, when the total number Num is 16 and the granularity GS is 4, the fourth threshold range is [2, 4], and at this time, the number of bits of the identity of the address group can be any one of 2-4 bits. In some embodiments, the number of bits of the identity of the address group can be a positive integer of log2Q.

[0107] In some embodiments, the number of bits of the identification of the address group is determined based on the total number of address groups TA contained in the division result. For example, the number of bits of the identification of the address group can be a positive integer of log2TA. When the total number of address groups TA is 4, the number of bits of the identification of the address group can be 2 bits; when the total number of address groups TA is 6, the number of bits of the identification of the address group can be 3 bits.

[0108] In some embodiments, the identification of the address group can be determined according to the number of bits of the identification of the address group and the number of the address group, and the first address group is indicated by the identification of the address group. For example, when the total number of address groups TA is 4, the number of the address group is 2, and the identification of the address group is 01, the identification of the address group can be 01, indicating the second address group.

[0109] The identification of the first read address includes a group identification and an intra-group identification. The group identification is used to indicate the first address group. In some embodiments, the group identification can be the identification of the address group to which the first read address belongs. In some embodiments, the group identification can be obtained by converting the identification of the address group according to the number of bits of the identification of the address group and the number of bits of the group identification. For example, when the number of bits of the group identification is 3 bits and the number of bits of the identification of the address group is 2 bits, if the identification of the address group is 01, the group identification can be 001.

[0110] The intra-group identification is used to indicate the first in the group. In some embodiments, the number of bits of the intra-group identification can be determined according to the granularity GS, and the number of bits of the intra-group identification is a positive integer not greater than the granularity GS. The number of bits of the intra-group identification can be a positive integer within the second threshold range [log2GS, GS]. For example, when the granularity GS is 8, the number of bits of the intra-group identification can be any one of 3-8 bits, such as 3 bits, 8 bits, etc.

[0111] In some embodiments, the intra-group identification can be determined according to the number of bits of the intra-group identification, and the first read address in the group is indicated by the intra-group identification. For example, the address group includes four first read addresses abcc, the identification of the first read address a can be 1000, indicating that it is the first first read address; the identification of the first read address b can be 1000, indicating that it is the second first read address; the identification of the first read address c can be 0010, indicating that it is the third first read address; and the identification of the second first read address c can be 0001, indicating that it is the fourth first read address.

[0112] In some embodiments, the plurality of first read addresses in the group can be de-duplicated, and the intra-group identification of each first read address can be determined according to the number of bits of the intra-group identification of each de-duplicated first read address.

[0113] For example, the address group includes the four first read addresses a, b, c and d, and after deduplication of the four first read addresses, three first read addresses are obtained, i.e., a, c and d, and at this time:

[0114] The identifier of the first read address a can be 1000, indicating that it is the first first read address.

[0115] The identifier of the first read address d can be 0110, indicating that it is the second and third first read addresses.

[0116] The identifier of the first read address c can be 0001, indicating the fourth first read address.

[0117] In the embodiments of the present disclosure, the division result of the plurality of first read addresses is determined based on granularity, and the division result includes at least two address groups; for each address group, the identifier of each first read address in the address group is determined based on the identifier of the address group. In this way, on the one hand, the plurality of first read addresses are divided into a plurality of address groups, improving the independence of the read addresses between the address groups; on the other hand, the identifier of each read address in each address group is determined respectively, shortening the determination time of the identifier of the read address, and at the same time, since the number of bits of the identifier of the first read address is less than the total number of the plurality of first read addresses, the amount of data corresponding to the first read address and the amount of data required to be reserved by the interface are reduced.

[0118] In some embodiments, the identifier of each first read address includes a group identifier and an intra-group identifier; the step S112 of "determining the identifier of each first read address in the address group based on the identifier of the address group" includes steps S1121 and S1122, wherein:

[0119] In step S1121, the identifier of the address group is determined based on the total number of the address groups included in the division result.

[0120] Here, the identifier of the address group is used to indicate the address group. The identifier of the address group can be any suitable identifier.

[0121] The number of bits of the identifier of the address group is determined based on the total number of the address groups TA. In some embodiments, the number of bits of the identifier of the address group can include, but is not limited to, a positive integer of log2TA, a positive integer after weighting log2TA, etc. In practice, those skilled in the art can independently set the determination method of the number of bits of the identifier of the address group according to actual needs, and the embodiments of the present disclosure are not limited.

[0122] For example, when the total number of the address groups TA is 8, the number of bits of the identifier of the address group can be 3 bits. For another example, when the total number of the address groups TA is 10, the number of bits of the identifier of the address group can be 4 bits.

[0123] In some embodiments, the identification of the address group can be determined according to the number of bits of the identification of the address group and the number of the address group. For example, when the number of the address group is 2 and the number of bits of the identification of the address group is 2, the identification of the address group can be 01, which indicates the second address group. For another example, when the number of the address group is 4 and the number of bits of the identification of the address group is 3, the identification of the address group can be 011, which indicates the fourth address group.

[0124] In some embodiments, the step S1121 comprises steps S131 and S132, wherein:

[0125] The step S131 determines the number of bits of the identification of the address group based on the total number of the address groups contained in the division result.

[0126] Here, the number of bits of the identification of the address group can include, but is not limited to, a positive integer of log2TA, a positive integer after weighting log2TA, etc. TA refers to the total number of the address groups. For example, a positive integer of log2TA is taken as the number of bits of the identification of the address group.

[0127] The step S132 determines the identification of the address group based on the number of bits of the identification of the address group and the number of the address group.

[0128] Here, the identification of the address group is used to indicate the address group, which is adapted to the number of the address group. For example, when the number of the address group is 3 and the number of bits of the identification of the address group is 2, the identification of the address group can be 10, which indicates the third address group.

[0129] In the embodiments of the present disclosure, the identification of the address group is determined in real time according to the total number of the address groups and the number of the address group, which improves the accuracy of the identification of the address group, and thus improves the accuracy of the identification of the read address determined based on the identification of the address group.

[0130] The step S1122 determines, for each first read address in the address group, the group identification of the first read address based on the identification of the address group, and determines the intra-group identification of the first read address based on the associated address group corresponding to the address group.

[0131] Here, the group identification of the first read address can be the identification of the address group, or can be obtained by converting the identification of the address group. For example, the number of bits of the group identification is 3, the number of bits of the identification of the address group is 2, and if the identification of the address group is 11, then the group identification can be 011. For another example, when the number of bits of the identification of the address group is the same as the number of bits of the group identification of the first read address, the identification of the address group can be taken as the group identification of the first read address.

[0132] The associated address group can include at least one read address or be empty. After initialization or end of a read texture request, the associated address group can be empty, and the memory occupied by the associated address group is released, thereby improving processing efficiency and reducing the possibility of running abnormally due to insufficient resources. The implementation of the associated address group can be any suitable manner, for example, an array, a queue, a key-value pair, a table, etc.

[0133] The in-group identifier of the first read address can be an in-group identifier of a read address in the associated address group, or can be determined according to each first read address in the address group.

[0134] For example, if the first read address is the same as a read address in the associated address group, the identifier of the read address is taken as the identifier of the first read address.

[0135] For example, if the first read address is the same as a read address in the associated address group, the identifier of the read address is taken as the identifier of the first read address.

[0136] In the embodiments of the present disclosure, the identifier of the address group is determined based on the total number of address groups contained in the division result; for each first read address in the address group, the in-group identifier of the first read address is determined based on the identifier of the address group, and the in-group identifier of the first read address is determined based on the associated address group corresponding to the address group. In this way, the identifier of the first read address is determined according to the identifier of the address group and the associated address group, which improves the accuracy of the identifier of the first read address, and at the same time, since the number of bits of the identifier of the first read address is less than the total number of the plurality of first read addresses, the number of bits of the identifier of the first read address is reduced, thereby achieving the purpose of reducing the amount of data corresponding to the first read address and the amount of data required to be reserved by the interface.

[0137] In some embodiments, the step of "determining the in-group identifier of the first read address based on the associated address group corresponding to the address group" in the step S1122 includes steps S141 and S142, wherein:

[0138] In step S141, when the associated address group is not empty, the traversal result of the first read address is determined based on the target address in the associated address group, and the in-group identifier of the first read address is determined based on the traversal result of the first read address.

[0139] Here, the target address is one of the read addresses in the associated address group, and the target address can be determined in any suitable manner. For example, randomly, user-defined, or sequentially selected according to a preset traversal manner. The traversal manner can include, but is not limited to, direction, starting point, etc. The traversal direction can include, but is not limited to, from front to back, from back to front, etc. The starting point of the traversal can be the first, last, or other specified point.

[0140] It can be understood that when the associated address group includes only one read address, the read address is taken as the target address; when the associated address group includes at least two read addresses, the target address can be determined from the at least two read addresses.

[0141] For example, one of the at least two read addresses is randomly selected as the target address. It can be understood that the target address selected each time in the traversal process is different.

[0142] For another example, the at least two read addresses are sequentially traversed in the order from front to back, that is, the first read address is taken as the target address the first time, the second read address is taken as the target address the second time, and so on, until the last read address is taken as a target address.

[0143] The traversal result can include, but is not limited to, a first traversal result and a second traversal result. The first traversal result indicates that the target address in the current traversal is the same as the first read address. The second traversal result indicates that the target address in the current traversal is different from the first read address.

[0144] In some embodiments, the at least one read address in the associated address group can be sequentially traversed according to a preset traversal manner.

[0145] The in-group identifier of the first read address can be the identifier of a read address in the associated address group, or can be determined based on each first read address in the address group.

[0146] In some embodiments, the step S141 of “determining the in-group identifier of the first read address based on the traversal result of the first read address” includes steps S1411 and S1412, wherein:

[0147] In step S1411, when the traversal result of the first read address is the first traversal result, the identifier of the target address is taken as the in-group identifier of the first read address.

[0148] In step S1412, when the traversal result of the first read address is not the first traversal result, the target address is re-determined in the associated address group.

[0149] Here, if the target address is the same as the first read address, the first traversal result is taken as the traversal result of the first read address; otherwise, the second traversal result is taken as the traversal result of the first read address. Since the associated address group further contains other read addresses, a new target address needs to be determined, and it is determined whether the new target address is the same as the first read address, so as to further determine the in-group identifier of the first read address.

[0150] For example, in the process of traversal, a read address in the associated address group can be taken as a target address. If the target address is the same as the first read address, the first traversal result is taken as the traversal result of the first read address, the identifier of the target address is taken as the in-group identifier of the first read address, and the traversal is stopped. Otherwise, the second traversal result is taken as the traversal result of the first read address, and the next address is continuously traversed until all addresses are traversed. If all read addresses in the associated address group are different from the first read address, the in-group identifier of each first read address in the address group can be determined based on the first read address.

[0151] In step S142, in a case where the associated address group is empty or the traversal result of the first read address is the second traversal result, the in-group identifier of each first read address in the address group is determined based on the first read address, and the first read address is added to the associated address group.

[0152] Here, the number of bits of the in-group identifier can be adapted to the total number of first read addresses contained in the address group. For example, if the total number of first read addresses contained in the address group is 4, the number of bits of the in-group identifier can be 4.

[0153] In some embodiments, the in-group identifier of each first read address can be determined according to the number of bits of the in-group identifier and the order of the first read address.

[0154] For example, if the address group includes four first read addresses, i.e., abcc, the in-group identifier of the first read address a can be 1000, indicating that the first read address a is the first first read address; the in-group identifier of the first read address b can be 0100, indicating that the first read address b is the second first read address; the in-group identifier of the first first read address c can be 1000, indicating that the first first read address c is the third first read address; and the in-group identifier of the second first read address c can be 1000, indicating that the second first read address c is the fourth first read address.

[0155] In some embodiments, the step of determining the in-group identifier of each first read address in the address group in step S142 includes steps S1421 and S1422, wherein:

[0156] Step S1421, set the bit mark where the first read address is located as the first mark.

[0157] Here, the first mark can be any suitable mark, for example, 0, 1, etc. The first mark is used to represent the position where the first read address is located.

[0158] Step S1422, for each other first read address in the address group except the first read address, if the first read address and the other first read address are the same, set the bit mark where the other first read address is located as the first mark, if the first read address and the other first read address are not the same, set the bit mark where the other first read address is located as the second mark.

[0159] Here, the second mark is different from the first mark, and the second mark is used to represent that the first read address is not the same as the current first read address. In implementation, if a first read address is the same as the current first read address, set the bit mark where the first read address is located as the first mark, otherwise, set the bit mark where the first read address is located as the second mark.

[0160] For example, for four first read addresses abcd of an address group, if the current first read address is a, since there is no first read address a in the associated address group, the in-group mark of the current first read address a can be obtained according to the following judgment process, that is:

[0161] First, set the bit mark where the current first read address a is located as 1;

[0162] Judge whether the second first read address b is the same as the current first read address a, if not, set the bit mark where the first read address b is located as 0;

[0163] Judge whether the third first read address a is the same as the current first read address a, if yes, set the bit mark where the third first read address a is located as 1;

[0164] Judge whether the first read address d is the same as the current first read address a, if not, set the bit mark where the first read address d is located as 0;

[0165] Therefore, the in-group mark of the current first read address a is 1010.

[0166] In this way, according to the bit marks of each first read address in the address group where the first read address is located, the in-group mark of the first read address is determined, which improves the accuracy of the in-group mark.

[0167] In implementation, when a certain first read address is determined as a new address, the first read address needs to be put into the corresponding associated address group, so as to facilitate the determination of the in-group identifier of the next first read address.

[0168] In the embodiments of the present disclosure, the in-group identifier of the first read address is determined according to whether the associated address group is empty, the traversal result of the first read address, and the like, which shortens the time length of the determination of the in-group identifier of the first read address and improves the accuracy of the in-group identifier.

[0169] In some embodiments, the step S12 includes a step S121 and a step S122, wherein:

[0170] The step S121 includes: performing deduplication processing on at least two first read addresses in each address group to obtain at least one second read address, or taking each read address in the corresponding associated address group of the address group as a second read address.

[0171] Here, since there is a possibility of the same address in each first read address in the address group, the deduplication processing can be performed on each first read address in the address group to obtain at least one second read address. For example, the address group includes four first read addresses, i.e., abcc, and after the deduplication processing on the address group, three second read addresses, i.e., abc, can be obtained.

[0172] The step S122 includes: determining the request data corresponding to the read texture request based on the data corresponding to each second read address and the identifier of each second read address.

[0173] Here, the request data corresponding to the read texture request at least includes the request data of each second read address. The request data of the second read address can include but is not limited to the texture data of each second read address, the identifier of each second read address, and the like. In some embodiments, the data obtained by combining the texture data of the second read address and the identifier of the second read address can be taken as the request data of the second read address.

[0174] In the embodiments of the present disclosure, the deduplication processing is performed on the read addresses in the address group to reduce the number of read addresses, thereby further reducing the data amount of the request data and the data amount that needs to be reserved by the interface.

[0175] In some embodiments, the step S12 includes a step S151 and a step S152, wherein:

[0176] The step S151 includes: performing deduplication processing on the plurality of first read addresses to obtain at least one third read address.

[0177] Here, since the same address can exist in each first read address, each first read address can be de-duplicated to obtain at least one third read address. For example, assuming that there are 4 first read addresses, i.e., abbc, after de-duplication of the 4 first read addresses, 3 third read addresses, i.e., abc, can be obtained.

[0178] In step S152, the request data corresponding to the read texture request is determined based on the data corresponding to each third read address and the identifier of each third read address.

[0179] Here, the request data corresponding to the read texture request at least includes the request data of each third read address. The request data of the third read address can include, but is not limited to, the texture data of each third read address, the identifier of each third read address, etc. In some embodiments, the data obtained by combining the texture data of the third read address and the identifier of the second read address can be used as the request data of the third read address.

[0180] In the embodiments of the present disclosure, by de-duplicating the plurality of first read addresses, the number of first read addresses is reduced, thereby further reducing the data amount of the request data and the data amount required to be reserved by the interface.

[0181] Based on the above embodiments, the embodiments of the present disclosure also provide a graphics processor, Figure 2 A schematic diagram of the composition structure of a graphics processor provided by the embodiments of the present disclosure is shown in Figure 2 As shown in the figure, the graphics processor 20 includes a texture unit 21 and a storage unit 22, wherein:

[0182] The storage unit 22 is configured to receive a read texture request transmitted by the texture unit 21, the read texture request carrying a plurality of first read addresses; determine the identifiers of the plurality of first read addresses, the number of bits of the identifier of the first read address being less than the total number of the plurality of first read addresses; determine the request data corresponding to the read texture request based on the identifiers of the plurality of first read addresses; and transmit the request data corresponding to the read texture request to the texture unit.

[0183] Here, the texture unit can be any suitable unit capable of achieving the function. The texture unit is mainly used for processing texture sampling, processing the sampled data, etc. The transmission mode of the read texture request can be any suitable mode, for example, direct transmission, indirect transmission, etc.

[0184] The read texture request can be any suitable request. The read texture request can include any suitable content, for example, an instruction, the size of the texture data, etc.

[0185] The storage unit can be any suitable unit capable of achieving the function. The storage unit is mainly used for determining the identification of each first read address, determining the request data corresponding to the read texture request, etc. In implementation, the storage unit determines the identification of each first read address, which can refer to the specific implementation of the foregoing step S11. The storage unit determines the request data corresponding to the read texture request, which can refer to the specific implementation of the foregoing step S12.

[0186] The delivery mode of the request data corresponding to the read texture request can be any suitable mode, for example, direct sending, indirect sending, etc.

[0187] In some embodiments, the graphics processor further includes an interface unit, configured to receive the read texture request sent by the texture unit and send the read texture request to the storage unit; and the interface unit is further configured to receive the request data corresponding to the read texture request sent by the storage unit and return the request data corresponding to the read texture request to the texture unit.

[0188] Here, the interface unit can be any suitable unit capable of achieving the function. The interface unit is mainly used for delivering the read texture request, request data, etc. between the texture unit and the storage unit.

[0189] Next, taking the size of the texture data as 32 bits and the sample instruction as an example.

[0190] The texture module sends a read texture request containing 16 first read addresses abcceffghiikdjdd to the interface unit;

[0191] The interface unit sends the read texture request to the storage unit;

[0192] The storage unit receives the read texture request. Based on the rule of the read addresses of the read texture request, generally, one pixel needs to sample 2x2 adjacent texels (texture elements), so the read texture request is at most four pixels, corresponding to 16 texels, so it is 16 first read addresses. The addresses of the adjacent 2x2 texels are likely to fall on the same read address due to out-of-bound processing or compression format, etc. Therefore, the 4 texel addresses of one pixel can be taken as one granularity, according to the granularity, the 16 first read addresses are first divided into four address groups, and the identification of each address group is 2 bits, which are 00, 01, 10 and 11 respectively.

[0193] 1) For the first address group, the address group includes abcc, and since the identification of the address group is 00, the group identification of each first read address in the address group can be 00, and then the intra-group identification of each first read address is determined, that is:

[0194] (1) For the first read address a, first determine whether the first read address a is a new address, if yes, set the bit mark of the first read address a as 1, then determine whether the first read address a is same as the other three first read addresses, if yes, set the corresponding bit mark as 1, finally the group mark of the first read address a is 1000, then the mark of the first read address a can be 001000, add the first read address a to the corresponding associated address group.

[0195] (2) For the first read address b, determine whether the first read address b is also a new address, if yes, set the bit mark of the first read address b as 1, then determine whether the first read address b is same as the other three first read addresses, if yes, set the corresponding bit mark as 1, finally the group mark of the first read address b is 0100, then the mark of the first read address b can be 000100, add the first read address b to the corresponding associated address group, at this time, the associated address group includes two non-repeated first read addresses, i.e. the first read address a and the first read address b.

[0196] (3) For the first read address c, determine whether the first read address c is also a new address, if yes, set the bit mark of the first read address c as 1, then determine whether the first read address c is same as the other three first read addresses, if yes, set the corresponding bit mark as 1, finally the group mark of the first read address c is 0011, then the mark of the first read address c can be 000011, add the first read address c to the corresponding associated address group, at this time, the associated address group includes three non-repeated first read addresses, i.e. the first read address a, the first read address b and the first read address c.

[0197] (4) For the second first read address c, since the associated address group already contains the first read address c, it indicates that the first read address c is not a new address, then the mark of the first read address c in the associated address group is used as the mark of the second first read address c.

[0198] Therefore, after the first address group is completed, three first read addresses are obtained, i.e. the mark of the first read address a can be 001000, the mark of the first read address b can be 000100 and the mark of the first read address c can be 000011.

[0199] 2) for the second address group, the address group includes effg, since the identification of the address group is 01, the group identification of each first read address in the address group can be 01, then the group identification of each first read address in the second address group can be determined according to the method of determining the group identification of each first read address in the first address group, then after the second address group is combined, three first read addresses are obtained, i.e. the identification of the first read address e can be 011000, the identification of the first read address f can be 010110 and the identification of the first read address g can be 010001.

[0200] 3) for the third address group, the address group includes hiik, since the identification of the address group is 10, the group identification of each first read address in the address group can be 10, then the group identification of each first read address in the third address group can be determined according to the method of determining the group identification of each first read address in the first address group, then after the third address group is combined, three first read addresses are obtained, i.e. the identification of the first read address h can be 101000, the identification of the first read address i can be 100110 and the identification of the first read address k can be 100001.

[0201] 4) for the fourth address group, the address group includes djdd, since the identification of the address group is 11, the group identification of each first read address in the address group can be 11, then the group identification of each first read address in the fourth address group can be determined according to the method of determining the group identification of each first read address in the first address group, then after the fourth address group is combined, two first read addresses are obtained, i.e. the identification of the first read address d can be 111011 and the identification of the first read address j can be 110100.

[0202] As can be seen from the above, after the combination of each address group of the storage unit, 11 first read addresses are obtained, i.e. abcefghikdj, the data returned by each first read address includes 32 bits of texture data + 6 bits of identification, then:

[0203] The total amount of data of the requested data returned is 418 (11x32 +11x6) bits, less than 528 (11x32 +16x11) bits;

[0204] The amount of data required to be reserved by the interface is 608 (16x32 + 16x6) bits, less than 768 (16x32 + 16x16) bits.

[0205] In some embodiments, the smaller the granularity, the smaller the amount of data that needs to be reserved by the interface, but the effect of merging will be worse, and the read addresses that can be merged may not be merged due to the small granularity, so the amount of data requested may be larger.

[0206] In some embodiments, the larger the granularity, the larger the amount of data that needs to be reserved by the interface, but the effect of merging will be better, so the amount of data requested may be smaller. In implementation, the granularity can be selected according to actual needs.

[0207] For example, for the Sample instruction, if the granularity is 2, the number of bits of the identification of the first read address is 5 bits; if the granularity is 4, the number of bits of the identification of the first read address is 6 bits; and if the granularity is 8, the number of bits of the identification of the first read address is 9 bits. As can be seen, the larger the granularity, the more bits of the identification of the read address, and the larger the amount of data that needs to be reserved by the interface; the smaller the granularity, the fewer bits of the identification of the read address, and the smaller the amount of data that needs to be reserved by the interface.

[0208] In some embodiments, the plurality of first read addresses can be divided according to the repetition rate, arrangement rule, etc. of the plurality of first read addresses.

[0209] For example, if the plurality of first read addresses are abcceffgabcceffg, the granularity is 8, and the size of the texture data is 32 bits:

[0210] Suppose the first 8 first read addresses are divided into one address group, and the 9th to 16th first read addresses are divided into one address group, so that the 12 first read addresses are included after merging, i.e. abcefgabcefg, and the amount of data requested by the read texture request is 492 (12*32+9*12) bits, and the amount of data that needs to be reserved by the interface is 656 (16*32+16*9) bits.

[0211] If the first 4 first read addresses abcc and the 9th to 12th first read addresses abcc are divided into one address group, and the 5th to 8th first read addresses effg and the 13th to 16th first read addresses effg are divided into one address group, so that only 6 first read addresses are included after merging, i.e. abcefg, and the amount of data requested by the read texture request is 246 (6*32+9*6) bits, which is much smaller than the amount of data corresponding to the previous division method.

[0212] Therefore, in implementation, the granularity and the division method can be determined in combination with the instruction in the read texture request, the repetition rate, the arrangement rule, etc. of each first read address.

[0213] In the embodiments of the present disclosure, on the one hand, by setting the number of identified bits of the first read address to be less than the total number of the first read address, compared with the case that the number of identified bits of the first read address is the total number of the first read address, the number of identified bits of the first read address is reduced, thereby reducing the amount of data corresponding to the first read address and the amount of data that needs to be reserved by the interface; on the other hand, the request data corresponding to the read texture request is determined according to the identification of each first read address, which reduces the amount of request data, so that the amount of data reserved on the interface is less, thereby reducing the data bandwidth and the interface bit width, and further reducing the hardware resource consumption.

[0214] In some embodiments, the storage unit is further configured to: determine a division result of the plurality of first read addresses based on the granularity, the division result including at least two address groups, each address group including at least two first read addresses; and for each address group, determine the identification of each first read address in the address group based on the identification of the address group.

[0215] In some embodiments, the storage unit is further configured to: determine the granularity based on the read texture request and / or the configuration information.

[0216] In some embodiments, the identification of each first read address includes a group identification and an intra-group identification; and the storage unit is further configured to: determine the identification of the address group based on the total number of address groups included in the division result; for each first read address in the address group, determine the group identification of the first read address based on the identification of the address group, and determine the intra-group identification of the first read address based on the associated address group corresponding to the address group.

[0217] In some embodiments, the storage unit is further configured to: determine the number of bits of the identification of the address group based on the total number of address groups included in the division result; and determine the identification of the address group based on the number of bits of the identification of the address group and the number of the address group.

[0218] In some embodiments, the storage unit is further configured to: in a case that the associated address group is not empty, determine a traversal result of the first read address based on a target address in the associated address group, and determine the intra-group identification of the first read address based on the traversal result of the first read address; and in a case that the associated address group is empty or the traversal result of the first read address is a second traversal result, determine the intra-group identification of the first read address based on each first read address in the address group, and add the first read address to the associated address group.

[0219] In some embodiments, the storage unit is further configured to: in a case where the traversal result of the first read address is the first traversal result, identify the target address as the in-group identifier of the first read address, the first traversal result indicating that the target address is the same as the first read address; and in a case where the traversal result of the first read address is not the first traversal result, re-determine the target address in the associated address group.

[0220] In some embodiments, the in-group identifier of the first read address comprises a bit identifier of each first read address in the address group; and the storage unit is further configured to: set the bit identifier of the first read address as the first identifier; and for each other first read address in the address group, set the bit identifier of the other first read address as the first identifier in a case where the first read address is the same as the other first read address, and set the bit identifier of the other first read address as the second identifier in a case where the first read address is not the same as the other first read address.

[0221] In some embodiments, the storage unit is further configured to: for each address group, perform deduplication processing on at least two first read addresses in the address group to obtain at least one second read address, or take each read address in the associated address group corresponding to the address group as a second read address; and determine the request data corresponding to the read texture request based on the data corresponding to each second read address and the identifier of each second read address.

[0222] In some embodiments, the storage unit is further configured to: determine a division step length based on the granularity; and divide the plurality of first read addresses based on the preset division manner and the division step length to obtain at least two address groups.

[0223] In some embodiments, the storage unit is further configured to: perform deduplication processing on the plurality of first read addresses to obtain at least one third read address; and determine the request data corresponding to the read texture request based on the data corresponding to each third read address and the identifier of each third read address.

[0224] The descriptions of the above embodiments of the graphics processor are similar to those of the above embodiments of the method, and have similar beneficial effects. For technical details not disclosed in the embodiments of the graphics processor of the present disclosure, please refer to the descriptions of the embodiments of the method of the present disclosure.

[0225] Based on the above embodiments, the embodiments of the present disclosure provide a data processing apparatus, Figure 3 A schematic diagram of the composition structure of a data processing apparatus provided by the embodiments of the present disclosure is shown in Figure 3 As shown in the figure, the data processing apparatus 30 comprises a first determination module 31 and a second determination module 32, wherein:

[0226] The first determining module 31 is configured to determine the identification of the plurality of first read addresses carried in the read texture request, and the number of bits of the identification of the first read address is less than the total number of the plurality of first read addresses.

[0227] The second determining module 32 is configured to determine the request data corresponding to the read texture request based on the identification of the plurality of first read addresses.

[0228] In some embodiments, the first determining module 31 is further configured to determine the division result of the plurality of first read addresses based on the granularity, the division result including at least two address groups, and each address group including at least two first read addresses; and for each address group, determine the identification of each first read address in the address group based on the identification of the address group.

[0229] In some embodiments, the identification of each first read address includes a group identification and an intra-group identification; the first determining module 31 is further configured to determine the identification of the address group based on the total number of the address groups included in the division result; and for each first read address in the address group, determine the group identification of the first read address based on the identification of the address group, and determine the intra-group identification of the first read address based on the associated address group corresponding to the address group.

[0230] In some embodiments, the first determining module 31 is further configured to determine the number of bits of the identification of the address group based on the total number of the address groups included in the division result; and determine the identification of the address group based on the number of bits of the identification of the address group and the number of the address group.

[0231] In some embodiments, the first determining module 31 is further configured to, in a case where the associated address group is not empty, determine the traversal result of the first read address based on a target address in the associated address group, and determine the intra-group identification of the first read address based on the traversal result of the first read address; and in a case where the associated address group is empty or the traversal result of the first read address is a second traversal result, determine the intra-group identification of the first read address based on each first read address in the address group, and add the first read address to the associated address group.

[0232] In some embodiments, the first determining module 31 is further configured to, in a case where the traversal result of the first read address is a first traversal result, take the identification of the target address as the intra-group identification of the first read address, and the first traversal result represents that the target address is the same as the first read address; and in a case where the traversal result of the first read address is not the first traversal result, determine the target address in the associated address group again.

[0233] In some embodiments, the first read address group identification includes a bit identification of each first read address in the address group; the first determining module 31 is further configured to: set the bit identification of the first read address as a first identification; for each other first read address in the address group except the first read address, set the bit identification of the other first read address as the first identification if the first read address and the other first read address are the same, or set the bit identification of the other first read address as a second identification if the first read address and the other first read address are different.

[0234] In some embodiments, the first determining module 31 is further configured to: determine a division step length based on the granularity; and divide the plurality of first read addresses based on the preset division manner and the division step length to obtain at least two address groups.

[0235] In some embodiments, the second determining module 32 is further configured to: for each address group, perform deduplication processing on at least two first read addresses in the address group to obtain at least one second read address, or take each read address in the address group as a second read address respectively; and determine the request data corresponding to the read texture request based on the data corresponding to each second read address and the identification of each second read address.

[0236] In some embodiments, the second determining module 32 is further configured to: perform deduplication processing on the plurality of first read addresses to obtain at least one third read address; and determine the request data corresponding to the read texture request based on the data corresponding to each third read address and the identification of each third read address.

[0237] The above device embodiments are similar to the above method embodiments in description, and have similar beneficial effects. For technical details not disclosed in the device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0238] It should be noted that, in the embodiments of the present disclosure, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the embodiments of the present disclosure can be embodied in the form of a software product in essence or the part that contributes to the related art, which is stored in a storage medium, includes a number of instructions to make an electronic device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the methods described in the embodiments of the present disclosure. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various media that can store program codes. Thus, the embodiments of the present disclosure are not limited to any specific hardware and software combination.

[0239] The embodiments of the present disclosure provide an electronic device, including a memory and a processor, the memory stores a computer program capable of running on the processor, and the processor implements the above method when executing the computer program.

[0240] The embodiments of the present disclosure provide a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the above method. The computer readable storage medium can be transitory or non-transitory.

[0241] The embodiments of the present disclosure provide a computer program product, which includes a non-transitory computer readable storage medium storing a computer program, and the computer program is read and executed by a computer to implement some or all steps of the above method. The computer program product can be specifically implemented by hardware, software or a combination thereof. In an optional embodiment, the computer program product is specifically embodied as a computer storage medium, and in another optional embodiment, the computer program product is specifically embodied as a software product, such as a software development kit (Software Development Kit, SDK) and the like.

[0242] It should be noted that, Figure 4 A hardware entity schematic diagram of an electronic device provided by the embodiments of the present disclosure is shown in FIG. 4, which includes a processor 401, a communication interface 402 and a memory 403. Figure 4

[0243] The processor 401 generally controls the overall operation of the electronic device 400.

[0244] The communication interface 402 can enable the electronic device to communicate with other terminals or servers through a network.

[0245] ​The memory 403 is configured to store instructions and applications executable by the processor 401, and can also cache data (e.g., image data, audio data, voice communication data, and video communication data) to be processed by the processor 401 and modules in the electronic device 400. The memory 403 can be implemented by a FLASH or a Random Access Memory (RAM). The processor 401, the communication interface 402, and the memory 403 can perform data transmission through the bus 404.

[0246] It should be noted that the above description of the storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0247] It should be understood that the terms "one embodiment" or "an embodiment" mentioned throughout the specification mean that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in various embodiments of the present disclosure, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The sequence number of the above embodiments of the present disclosure is only for description, not representing the advantages and disadvantages of the embodiments.

[0248] It should be noted that in this document, the term "comprising" or "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0249] In several embodiments provided by the present disclosure, it should be understood that the disclosed devices and methods can be implemented in other manners. The embodiments described above are merely exemplary, and the unit division is merely logical function division, and there can be other division manners in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed coupling, direct coupling, or communication connection between the components can be indirect coupling or communication connection through some interfaces, and can be electrical, mechanical, or in other forms.

[0250] The units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units; they can be located in one place, or distributed on a plurality of network units; and some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0251] In addition, each functional unit in the embodiments of the present disclosure can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; and the integrated unit can be implemented in the form of hardware, or in the form of hardware plus software function units.

[0252] Those of ordinary skill in the art can understand that all or part of the steps of the above-mentioned method embodiments can be completed by a program instructing related hardware, and the aforementioned program can be stored in a computer readable storage medium, and when the program is executed, the steps of the method embodiments are executed; and the aforementioned storage medium includes: a mobile storage device, a read-only memory (ROM), a magnetic disk or an optical disk, and various storage media that can store program codes.

[0253] Alternatively, the integrated units of the present disclosure, if implemented in the form of software function modules and sold or used as independent products, can also be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present disclosure can be embodied in the form of a software product, and the computer software product is stored in a storage medium, and includes a plurality of instructions for causing an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the embodiments of the present disclosure. The aforementioned storage medium includes: a mobile storage device, a ROM, a magnetic disk, or an optical disk, and various storage media that can store program codes.

[0254] The above merely describes the embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure.

Claims

1. A data processing method, characterized in that, The data processing method includes: The identifiers of multiple first read addresses carried in the texture read request are determined, and the number of bits in the identifier of each first read address is less than the total number of the multiple first read addresses; Based on the identifiers of the plurality of first read addresses, the request data corresponding to the texture read request is determined.

2. The data processing method according to claim 1, characterized in that, The identifiers of the multiple first read addresses carried in the texture read request include: Based on granularity, the partitioning result of the plurality of first read addresses is determined. The partitioning result includes at least two address groups, and each address group includes at least two first read addresses. The granularity is used to indicate the partitioning step size of the plurality of first read addresses. For each address group, the identifier of each first read address in the address group is determined based on the identifier of the address group.

3. The data processing method according to claim 2, characterized in that, Each first read address is identified by a group identifier and a group-specific identifier; determining the identifier of each first read address in the address group based on the identifier of the address group includes: Based on the total number of address groups included in the partitioning result, the identifier of the address group is determined; For each first read address in the address group, the group identifier of the first read address is determined based on the identifier of the address group, and the intra-group identifier of the first read address is determined based on the associated address group corresponding to the address group.

4. The data processing method according to claim 3, characterized in that, Determining the identifier of the address group based on the total number of address groups included in the partitioning result includes: Based on the total number of address groups included in the partitioning result, the number of bits in the identifier of the address group is determined; The identifier of the address group is determined based on the number of bits in the identifier of the address group and the number of the address group.

5. The data processing method according to claim 3, characterized in that, The step of determining the intra-group identifier of the first read address based on the associated address group corresponding to the address group includes: If the associated address group is not empty, the traversal result of the first read address is determined based on the target address in the associated address group, and the group identifier of the first read address is determined based on the traversal result of the first read address; wherein, the target address is a read address; If the associated address group is empty or the traversal result of the first read address is the second traversal result, the group identifier of the first read address is determined based on each first read address in the address group, and the first read address is added to the associated address group.

6. The data processing method according to claim 5, characterized in that, Determining the group identifier of the first read address based on the traversal result of the first read address includes: If the traversal result of the first read address is the same as the first traversal result, the identifier of the target address is used as the group identifier of the first read address, and the first traversal result indicates that the target address is the same as the first read address. If the traversal result of the first read address is not the same as the first traversal result, the target address is re-determined in the associated address group.

7. The data processing method according to claim 5, characterized in that, The intra-group identifier of the first read address includes the bit identifier of each first read address in the address group; determining the intra-group identifier of the first read address based on each first read address in the address group includes: Set the bit identifier at the first read address to the first identifier; For each other first read address in the address group other than the first read address, if the first read address and the other first read address are the same, the bit identifier of the other first read address is set to the first identifier; if the first read address and the other first read address are different, the bit identifier of the other first read address is set to the second identifier.

8. The data processing method according to claim 2, characterized in that, The step of determining the request data corresponding to the texture read request based on the identifiers of the plurality of first read addresses includes: For each address group, at least two first read addresses in the address group are deduplicated to obtain at least one second read address, or each read address in the associated address group corresponding to the address group is used as a second read address. Based on the data corresponding to each of the second read addresses and the identifier of each of the second read addresses, the request data corresponding to the texture read request is determined.

9. The data processing method according to any one of claims 2 to 8, characterized in that, The determination of the partitioning result of the multiple first read addresses based on granularity includes: Based on the granularity, the partitioning step size is determined; Based on the preset partitioning method and the partitioning step size, the plurality of first read addresses are partitioned to obtain the at least two address groups.

10. The data processing method according to any one of claims 1 to 7, characterized in that, The step of determining the request data corresponding to the texture read request based on the identifiers of the plurality of first read addresses includes: The multiple first read addresses are deduplicated to obtain at least one third read address; Based on the data corresponding to each of the third read addresses and the identifier of each of the third read addresses, the request data corresponding to the texture read request is determined.

11. A graphics processor, characterized in that, The graphics processor includes texture units and storage units, wherein: The storage unit is configured to receive a read texture request transmitted by the texture unit, wherein the read texture request carries a plurality of first read addresses; determine the identifiers of the plurality of first read addresses, wherein the number of bits in the identifier of each first read address is less than the total number of the plurality of first read addresses; determine the request data corresponding to the read texture request based on the identifiers of the plurality of first read addresses; and transmit the request data corresponding to the read texture request to the texture unit.

12. The graphics processor according to claim 11, characterized in that, The graphics processor further includes an interface unit, wherein: The interface unit is used to receive a texture read request sent by the texture unit and send the texture read request to the storage unit; The interface unit is further configured to receive request data corresponding to the read texture request sent by the storage unit, and return the request data corresponding to the read texture request to the texture unit.

13. A data processing apparatus, characterized in that, The data processing device includes: The first determining module is used to determine the identifiers of multiple first read addresses carried in the texture read request, wherein the number of bits in the identifier of each first read address is less than the total number of the multiple first read addresses; The second determining module is used to determine the request data corresponding to the read texture request based on the identifiers of the plurality of first read addresses.

14. An electronic device comprising a processor and a memory, the memory storing a computer program executable on the processor, characterized in that, When the processor executes the computer program, it implements the method according to any one of claims 1 to 10.

15. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the method described in any one of claims 1 to 10.

16. A computer program product, characterized in that, The computer program product includes a non-transitory computer-readable storage medium storing a computer program that, when read and executed by a computer, implements the method of any one of claims 1 to 10.

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